|
2025
|
P/S
|
Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; a... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Semiconductors... |
|
|
Invention
|
Chemical mechanical polishing apparatus and method.
The present disclosure describes a method an... |
|
|
Invention
|
Methods of forming anchor-containing underfill structures for a chip package.
A bonded assembly ... |
|
|
Invention
|
Semiconductor device and methods of fabrication thereof.
A method for forming a semiconductor de... |
|
|
Invention
|
Semiconductor package and manufacturing method thereof.
A semiconductor package includes a first... |
|
|
Invention
|
Dielectric liner for field effect transistors.
The present disclosure describes a semiconductor ... |
|
|
Invention
|
Method of manufacturing a semiconductor device and a semiconductor device.
In a method aspect ma... |
|
|
Invention
|
Methods of forming mimcap corner structures in the keep-out zones of a semiconductor die.
A semi... |
|
|
Invention
|
Back-end-of-line semiconductor device structure providing a not-gate logic function and methods o... |
|
|
Invention
|
Lithography mask having overlay mark and related method.
A method includes: generating a designe... |
|
|
Invention
|
Chip-on-wafer-on-board structure using spacer die and methods of forming the same.
A semiconduct... |
|
|
Invention
|
Semiconductor device structure and method for forming the same.
A semiconductor device structure... |
|
|
Invention
|
Trench isolation connectors for stacked structures.
Trench isolation connectors are disclosed he... |
|
|
Invention
|
Image sensor structures and methods for forming the same.
A semiconductor structure is disclosed... |
|
|
Invention
|
Payload transportation system.
System and method for cross-fab wafer transportation are provided... |
|
|
Invention
|
Magnetoresistive random-access memory (mram) cell and method of operation thereof.
An exemplary ... |
|
|
Invention
|
Structure and method for three-dimensional capacitor with enhanced packaging density and reduced ... |
|
|
Invention
|
Fuse cell structure.
A method includes: forming a first transistor and a second transistor, each... |
|
|
Invention
|
Package structure with molding layer and method for manufacturing the same.
A package structure ... |
|
|
Invention
|
Semiconductor device with back-side via structure.
A semiconductor device includes a transistor ... |
|
|
Invention
|
Underfill cushion films for packaging substrates and methods of forming the same.
A semiconducto... |
|
|
Invention
|
Semiconductor device structure and methods of forming the same.
A semiconductor device structure... |
|
|
Invention
|
Semiconductor structures with improved reliability.
Semiconductor structures and methods are pro... |
|
|
Invention
|
Methods of manufacturing semiconductor devices and semiconductor devices.
In a method of manufac... |
|
|
Invention
|
Semiconductor structure formation.
A recovery layer (e.g., a layer of organic and/or tin-based m... |
|
|
Invention
|
Semiconductor device having wide tuning range varactor and method of manufacturing the same.
A s... |
|
|
Invention
|
Integrated circuit packages and methods of forming the same.
A device includes a semiconductor d... |
|
|
Invention
|
Dispensing nozzle design and dispensing method thereof.
A lithography apparatus for semiconducto... |
|
|
Invention
|
Methods of forming semiconductor devices.
In an embodiment, a structure includes: a semiconducto... |
|
|
Invention
|
Photonic integrated circuit and package structure.
A photonic integrated circuit includes a base... |
|
|
Invention
|
Integrated circuit and method of forming the same.
An integrated circuit includes a first transi... |
|
|
Invention
|
Field effect transistor with strained channels and method.
A device includes: a stack of nanostr... |
|
|
Invention
|
Memory devices and methods for forming the same.
A memory device includes a memory array compris... |
|
|
Invention
|
Through silicon via.
A structure according to the present disclosure includes a bottom metal fea... |
|
|
Invention
|
Device having hybrid nanosheet structure and method.
A device includes: a stack of nanostructure... |
|
|
Invention
|
Semiconductor device having different size active regions and method of making.
A method of maki... |
|
|
Invention
|
Semiconductor device structure.
A semiconductor device structure is provided. The semiconductor ... |
|
|
Invention
|
Generation of physically unclonable function using one-time-programmable memory devices with back... |
|
|
Invention
|
Passive devices in bonding layers.
A semiconductor device according to embodiments of the presen... |
|
|
Invention
|
Protection against plasma induced damages.
The present disclosure provides embodiments of semico... |
|
|
Invention
|
Package structure.
A package structure including a chip stacking structure, a thermal enhance co... |
|
|
Invention
|
Self-aligned patterning layer for metal gate formation.
Methods of forming a metal gate structur... |
|
|
Invention
|
Semiconductor device and formation method thereof.
A method of forming a semiconductor device co... |
|
|
Invention
|
Self-aligned backside via.
A semiconductor structure and a method of forming the same are provid... |
|
|
Invention
|
3dic with gap-fill structures and the method of manufacturing the same.
A method includes bondin... |
|
|
Invention
|
Semiconductor package and method.
A semiconductor package including one or more heat dissipation... |
|
|
Invention
|
Optical device and method of manufacture.
Optical devices and methods of manufacture are present... |
|
|
Invention
|
Reduction of cracks in passivation layer.
Methods and semiconductor structures are provided. A s... |
|
|
Invention
|
Trim free wafer bonding methods and devices.
A method of manufacturing a semiconductor device st... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits Product resear... |
|
2024
|
P/S
|
Semiconductors; computer memory chips; wafers, namely, silicon wafers and semiconductor wafers; i... |
|
|
Invention
|
Semiconductor structure and method for manufacturing the same.
A semiconductor structure include... |
|
2023
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits. |
|
|
P/S
|
Custom manufacture of semiconductors, computer memory chips, multiprocessor memory chips, semicon... |
|
|
P/S
|
Custom manufacture of semiconductors, memory chips, wafers and integrated circuits |
|
2022
|
P/S
|
Semiconductors; computer memory chips, multiprocessor memory chips, semiconductor memory chips, s... |
|
|
P/S
|
Semiconductors; memory chips; semiconductor wafers; integrated circuits; telecommunication device... |
