Abrégé

A semiconductor device, including: a lower interlayer insulating layer; an insulating pattern extending in a first horizontal direction on an upper surface of the lower interlayer insulating layer; a plurality of nanosheets on the insulating pattern and spaced apart in a vertical direction; an active cut including a first portion penetrating the lower interlayer insulating layer and the insulating pattern in the vertical direction, and a second portion separating the plurality of nanosheets in the first horizontal direction on an upper surface of the first portion, wherein a lower surface of the second portion is on an upper surface of the insulating pattern, and wherein the second portion is on inner sidewalls of the plurality of nanosheets in the first horizontal direction; a first source/drain region on a first side of the active cut on the insulating pattern, wherein the first source/drain region is on first outer sidewalls of the plurality of nanosheets; a second source/drain region on a second side of the active cut opposite to the first side of the active cut in the first horizontal direction on the insulating pattern, wherein the second source/drain region is on second outer sidewalls of the plurality of nanosheets; and a bottom source/drain contact penetrating the lower interlayer insulating layer and the insulating pattern in the vertical direction, wherein the bottom source/drain contact is electrically connected to the second source/drain region, and wherein the bottom source/drain contact overlaps the first portion of the active cut in the first horizontal direction, wherein a width of the upper surface of the first portion of the active cut in the first horizontal direction is smaller than a width of a lower surface of the first portion of the active cut in the first horizontal direction.

Classes IPC  ?

• H10D 30/00 - Transistors à effet de champ [FET]
• H10D 30/01 - Fabrication ou traitement

Abrégé

An electronic device performing distributed training of an artificial intelligence (AI) model in a heterogeneous computing environment includes a communication interface for communicating with multiple computation nodes; a memory storing profile information on the multiple computation nodes and instructions; and at least one processor configured to assign weights to each of the multiple computation nodes for segmenting the AI model and training data based on the profile information; distribute the segmented AI model and training data to the multiple computation nodes based on the assigned weights; control the multiple computation nodes to train the segmented AI model; convert training result data from a first computation node into a data format processible by other computation nodes; and control a second computation node to train the segmented AI model based on the converted data.

Classes IPC  ?

• G06N 20/00 - Apprentissage automatique

Abrégé

A method of processing a substrate may be provided. The method may include preparing a substrate in a substrate processing apparatus, rotating a polishing pad on the substrate, and supplying a slurry on the polishing pad, wherein the supplying of the slurry includes supplying the slurry during a first time interval at a flow rate characterized by a first function and supplying the slurry during a second time interval at a flow rate characterized by a second function, each of the first function and the second function is a function of time, and the first function is different from the second function.

Classes IPC  ?

• H01L 21/3105 - Post-traitement
• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

A semiconductor device may include: a first semiconductor structure including a first substrate, first circuit elements on the first substrate, first circuit interconnection lines on the first circuit elements, and a first peripheral region insulating layer; a second semiconductor structure including a first region of a second substrate on the first semiconductor structure, second circuit elements on the first region of the second substrate, and second circuit interconnection lines on the second circuit elements; a capacitor structure including a first capacitor electrode spaced apart from the first circuit interconnection lines on a lower surface of the second substrate, a second region of the second substrate facing the first capacitor electrode, and a first through-via extending in the second substrate and electrically connected to the first capacitor electrode; and a third semiconductor structure including a third substrate on the second semiconductor structure, and memory cells on the third substrate.

Classes IPC  ?

• H10B 80/00 - Ensembles de plusieurs dispositifs comprenant au moins un dispositif de mémoire couvert par la présente sous-classe
• G11C 16/30 - Circuits d'alimentation
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou

Abrégé

A washing machine may include: a washing tub forming a sealable internal space in which carbon dioxide is receivable and configured so that, with the carbon dioxide received in the internal space and the internal space sealed, a pressure of the carbon dioxide is maintained, a rotatable drum in the internal space and configured to accommodate laundry to be washed with the received carbon dioxide, a rotatable shaft in the internal space and connected to the drum, and a drive device including: a stator outside the washing tub, and a rotor in the internal space, coupled to the shaft, and configured so that, with the carbon dioxide received in the internal space and the internal space sealed, electromagnetic interaction between the rotor and the stator causes the rotor to rotate thereby rotating the shaft and the drum to wash the laundry accommodated in the drum with the received carbon dioxide.

Classes IPC  ?

• D06F 43/02 - Appareillages de nettoyage à sec utilisant des solvants volatils ayant un seul réceptacle rotatif de nettoyage
• H02K 5/10 - Enveloppes ou enceintes caractérisées par leur configuration, leur forme ou leur construction avec des dispositions empêchant l'introduction de corps étrangers, p. ex. de l'eau ou des doigts
• H02K 7/08 - Association structurelle avec des paliers
• H02K 21/16 - Moteurs synchrones à aimants permanentsGénératrices synchrones à aimants permanents avec des induits fixes et des aimants tournants avec des aimants tournant à l'intérieur des induits avec des noyaux d'induits annulaires à pôles saillants

Abrégé

A lithium-containing oxide has one of the following parent compositions: Li2-zSbCl3O2, where z ranges from −1 to 1; Li2-zSb2Cl10O, where z ranges from −1 to 1; Li1-zSb(ClO)2, where z ranges from −0.5 to 0.5; or Li6-zSbCl3O4, where z ranges from −0.5 to 0.5. A lithium solid-state battery includes an anode, a cathode, and a solid electrolyte, wherein the solid electrolyte includes the aforementioned lithium-containing oxide. Also, a solid-state battery includes an anode, a cathode, and a solid electrolyte, wherein at least one of the anode and the cathode is coated with a coating which includes the aforementioned lithium-containing oxide.

Classes IPC  ?

• H01M 10/0562 - Matériaux solides
• C01B 11/06 - Hypochlorites, p. ex. chaux chlorée
• H01M 4/13 - Électrodes pour accumulateurs à électrolyte non aqueux, p. ex. pour accumulateurs au lithiumLeurs procédés de fabrication
• H01M 4/62 - Emploi de substances spécifiées inactives comme ingrédients pour les masses actives, p. ex. liants, charges
• H01M 10/052 - Accumulateurs au lithium

Abrégé

A detection method of weak points may include obtaining large-scale data including contours of a plurality of patterns formed on a wafer using a mask, calculating an average value of critical dimensions of the contours of the plurality of patterns included in the large-scale data, clustering the plurality of patterns into a plurality of clusters based on characteristics of the plurality of patterns, calculating, for each of the plurality of clusters, an average value of the critical dimensions of the contours of the plurality of patterns included in each of the plurality of clusters, and determining whether one or more clusters of the plurality of clusters are weak points based on the average value of the critical dimensions of each of the plurality of clusters and the average value of the critical dimensions of the large-scale data.

Classes IPC  ?

• G03F 1/84 - Inspection

Abrégé

Disclosed is a method for estimating an Auto-Focus (AF) disparity in Complementary Metal-Oxide-Semiconductor (CMOS) image sensor. The method includes acquiring left phase AF pixel data and right phase AF pixel data from a pixel array of the CMOS image sensor and generating difference channel signal and sum channel signal by pre-processing the left and right AF pixel data. The method includes filtering the difference channel signal and the sum channel signal and calculating a First-Order Derivative (FOD) of the sum channel signal. The method includes generating a T-processing signal based on a product of the difference channel signal and the sum channel signal and determining, within the generated T-processing signal, a plurality of peak locations exceeding a dynamic threshold value and estimating the AF disparity based on the plurality of peak locations and the FOD of the sum channel signal.

Classes IPC  ?

• H04N 25/704 - Pixels spécialement adaptés à la mise au point, p. ex. des ensembles de pixels à différence de phase
• H04N 23/67 - Commande de la mise au point basée sur les signaux électroniques du capteur d'image

Abrégé

An encoding apparatus and a method for providing maximum transition avoidance (MTA), direct current (DC) balance, and run-length limited codes are provided. An apparatus including a transmitter connected to a signal line, wherein the transmitter includes an encoder configured to encode data bits to be transmitted through the signal line, according to pulse amplitude modulation (PAM), to convert the data bits into data symbols having multiple voltage levels. The encoder includes a logic circuit configured to provide look-up tables indicating a correlation between the data bits and the data symbols and a control circuit configured to selectively control logic operations of the logic circuit that generates the look-up tables. The look-up tables include mappings related to operation requirements of the encoder, and the operation requirements of the encoder includes a DC balance requirement and a run-length limit requirement of data symbols.

Classes IPC  ?

• H03M 5/14 - Représentation du code, p. ex. transition, pour un élément binaire donné dépendant de l'information d'un ou de plusieurs éléments binaires adjacents, p. ex. code à modulation de durée, code à double densité
• H03M 7/46 - Conversion en, ou à partir de codes à longueur de série, c.-à-d. par représentation du nombre de chiffres successifs ou groupes de chiffres de même type à l'aide d'un mot-code et d'un chiffre représentant ce type

Abrégé

A semiconductor device including a gate stacking structure having stacked interlayer insulation layers and gate electrodes; a separation structure penetrating the gate stacking structure; a separation pattern separating some of the gate electrodes; a channel structure penetrating the gate stacking structure; a channel insulation layer on the gate stacking structure and including grooves; a bit line contact in a groove and connected with the channel structure; a bit line insulation layer on the bit line contact; and a bit line on the bit line insulation layer and connected with the bit line contact. A planar area of the bit line contact is larger than that of the channel structure in contact with the bit line contact. Planar shapes of portions of the bit line contact contacting the separation pattern and not contacting the separation pattern are different. The separation pattern and bit line insulation layer are connected through the groove.

Classes IPC  ?

• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 41/35 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire avec un transistor de sélection de cellules, p. ex. NON-ET
• H10B 43/35 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire avec transistors de sélection de cellules, p. ex. NON-ET

Abrégé

A semiconductor device includes conductive patterns, an insulating pattern between the conductive patterns, an insulating etch stop layer on the conductive patterns and the insulating pattern, a capacitor including first electrodes in contact with the first conductive patterns, a second capacitor electrode, and a dielectric between the first and second capacitor electrodes, an insulating structure covering the capacitor and the insulating etch stop layer, and a peripheral contact plug through the insulating structure and the insulating etch stop layer and including first through fifth plug regions stacked on top of each other, at least a portion of a side surface of the fourth plug region having an inclination angle different from inclinations angles of the third and fifth plug regions, and a vertical thickness of the fifth plug region being at least twice as great as a sum of vertical thicknesses of the first to fourth plug regions.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

A method, performed by a base station, of allocating a wireless resource includes: obtaining a cycle parameter indicating a cycle which the base station uses to transmit data to and receive data from at least one User Equipment (UE); obtaining downlink data indicating an amount of data in a downlink buffer that is to be transmitted to the at least one UE; generating, based on the obtained cycle parameter and the obtained downlink data, an active UE set including a UE that needs to be allocated to the wireless resource; and allocating the wireless resource to at least one active UE included in the generated active UE set.

Classes IPC  ?

• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c.-à-d. en direction du terminal
• H04W 76/28 - Transmission discontinue [DTX]Réception discontinue [DRX]

Abrégé

A display apparatus includes a display panel; a reflective sheet on a rear side of the display panel and configured to reflect light toward the display panel; a rear chassis configured to support the reflective sheet on a rear side of the reflective sheet, the rear chassis including a fixing hole; and a fastener configured to secure the reflective sheet to the rear chassis; wherein the fastener includes: an insertion portion configured to penetrate the reflective sheet and to be inserted into the fixing hole; and a bending portion bent at a first end of the insertion portion to prevent the insertion portion from being withdrawn from the fixing hole.

Classes IPC  ?

• G02F 1/13357 - Dispositifs d'éclairage

Abrégé

A foldable electronic device and modified embodiments of a hinge structure included therein are disclosed in the disclosure. The foldable electronic device includes a first housing and a second housing on which a display is partially seated and the hinge structure that connects the first and second housings. The hinge structure includes a first shaft and a second shaft that rotate in a folding or unfolding operation of the foldable electronic device, a cam member that supports a cam operation, and friction plates that are mounted on the first and second shafts and that make contact with protruding patterns formed on the cam member. The areas of the friction plates brought into contact with the protruding patterns vary as the first and second shafts rotate.

Classes IPC  ?

• G06F 1/16 - Détails ou dispositions de structure

Abrégé

A semiconductor memory device includes a gate structure in a gate trench. The gate structure includes: a gate insulating film extending along the gate trench; a gate conductive film on the gate insulating film and defining a gate recess, wherein a vertical length between a bottom surface of the gate trench and an upper surface of the gate conductive film is less than a vertical length between the bottom surface of the gate trench and an upper surface of the gate insulating film; and a gate electrode pattern in the gate recess and contacting the upper surface of the gate conductive film. The gate electrode pattern includes a first portion in the gate recess, and a second portion on the first portion of the gate electrode pattern. The second portion of the gate electrode pattern is in contact with the upper surface of the gate conductive film.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
• H10D 64/66 - Électrodes ayant un conducteur couplé capacitivement à un semi-conducteur par un isolant, p. ex. électrodes du type métal-isolant-semi-conducteur [MIS]
• H10D 64/68 - Électrodes ayant un conducteur couplé capacitivement à un semi-conducteur par un isolant, p. ex. électrodes du type métal-isolant-semi-conducteur [MIS] caractérisées par l’isolant, p. ex. par l’isolant de grille

Abrégé

A semiconductor device includes a substrate including cell and core regions respectively having first and second active patterns having respective, opposing sidewall surfaces at least partially defining a trench therebetween, and a boundary region between the cell and core regions, a device isolation layer on the boundary region to fill the trench, a line structure on the first active pattern and extended from the cell region to the boundary region, and a capping pattern covering an end of the line structure on the boundary region. The device isolation layer includes one or more inner surfaces at least partially defining a recess region, which is adjacent to the end of the line structure, and the capping pattern is extended along the end of the line structure into the recess region. A top surface of the device isolation layer is between the line structure and a bottom surface of the capping pattern.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]

Abrégé

An operating method for an electronic device including a processor for analyzing a semiconductor process flow, the method including: receiving process entry data for a plurality of wafers; extracting process sequence data that enumerates processes related to the plurality of wafers in order of execution times, based on the process entry data; selecting an analysis target parameter from among process parameters included in the process entry data; sorting the process entry data based on the process sequence data and the analysis target parameter; and mapping the sorted process entry data to a parallel coordinate system to generate analysis data, wherein the analysis data includes time information related to the processes in the process sequence data and wafer-specific process flow information corresponding to the analysis target parameter.

Classes IPC  ?

• H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants

Abrégé

An embodiment includes providing low latency applications with priority access to the wireless medium by giving the authorized device a prioritized enhanced distributed channel access (EDCA) parameter set where the values of the prioritized EDCA parameter set can be designed by the entity providing the set in such a manner that the authorized device using the parameter set can gain priority access to a channel compared to other devices that are not authorized, improving wireless communications and performance of low latency applications.

Classes IPC  ?

• H04W 74/08 - Accès non planifié, p. ex. ALOHA
• H04W 12/06 - Authentification
• H04W 28/02 - Gestion du trafic, p. ex. régulation de flux ou d'encombrement
• H04W 74/0816 - Accès non planifié, p. ex. ALOHA utilisant une détection de porteuse, p. ex. accès multiple par détection de porteuse [CSMA] avec évitement de collision

Abrégé

A semiconductor device, a semiconductor system, and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a reference layer with a fixed spin direction, a barrier layer below the reference layer, a free layer below the barrier layer and having a spin direction switchable by current, and a spin orbit coupling (SOC) layer below the free layer and containing different types of topological materials.

Classes IPC  ?

• H10N 50/10 - Dispositifs magnéto-résistifs
• G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
• H10N 50/01 - Fabrication ou traitement
• H10N 50/85 - Matériaux de la région active

Abrégé

An embodiment includes a STA with low latency traffic may transmit a defer signal to preempt one or more others STAs from contending for channel access, whereby the STA may quickly obtain channel access to transmit low latency frames, whereby the defer signal may place the one or more other STAs in an extended interframe space (EIFS) state or in an error state.

Classes IPC  ?

• H04W 74/0816 - Accès non planifié, p. ex. ALOHA utilisant une détection de porteuse, p. ex. accès multiple par détection de porteuse [CSMA] avec évitement de collision
• H04W 74/08 - Accès non planifié, p. ex. ALOHA

Abrégé

An organometallic compound represented by Formula 1, 2, or 3: An organometallic compound represented by Formula 1, 2, or 3: An organometallic compound represented by Formula 1, 2, or 3: wherein the descriptions of Formulae 1 to 3 are the same as described in the detailed description herein.

Classes IPC  ?

• H10K 85/30 - Composés de coordination
• C07F 15/00 - Composés contenant des éléments des groupes 8, 9, 10 ou 18 du tableau périodique
• C09K 11/06 - Substances luminescentes, p. ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
• H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants

Abrégé

Provided is a light detection and ranging (LiDAR) system including an optical coupler that generates an optical signal by mixing a transmission signal with a reception signal, in which the transmission signal is reflected back from a target, a photodiode that converts the optical signal into an analog beating signal, and a band pass filter array that filters the analog beating signal to extract a beating frequency.

Classes IPC  ?

• G01S 7/4914 - Réseaux des détecteurs, p. ex. portes de transfert de charge
• G01S 7/4912 - Récepteurs
• G01S 7/493 - Extraction des signaux d'écho désirés
• G01S 17/34 - Systèmes déterminant les données relatives à la position d'une cible pour mesurer la distance uniquement utilisant la transmission d'ondes continues, soit modulées en amplitude, en fréquence ou en phase, soit non modulées utilisant la transmission d'ondes continues modulées en fréquence, tout en faisant un hétérodynage du signal reçu, ou d’un signal dérivé, avec un signal généré localement, associé au signal transmis simultanément
• G01S 17/58 - Systèmes de détermination de la vitesse ou de la trajectoireSystèmes de détermination du sens d'un mouvement
• G01S 17/931 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour prévenir les collisions de véhicules terrestres

Abrégé

A wearable device includes a display assembly comprising one or more displays, cameras, sensors, memory comprising one or more storage media and storing instructions, and at least one processor comprising processing circuitry. The instructions, when executed by the at least one processor individually or collectively, cause the wearable device to obtain an image, identify depth values of pixels using obtained depth information, identify the number of pixels, identify a reference depth value among the depth values of the pixels, identify a first portion of the pixels, identify a second portion of the pixels, and based on setting the depth values of the first portion of the pixels to the reference depth value and based on setting depth values of the second portion of the pixels to a predetermined depth value, display, via the display assembly, a screen corresponding to the image.

Classes IPC  ?

• G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
• G06T 7/521 - Récupération de la profondeur ou de la forme à partir de la télémétrie laser, p. ex. par interférométrieRécupération de la profondeur ou de la forme à partir de la projection de lumière structurée

Abrégé

An in-memory processing memory device may include: a bank including a cell array; and a processing in memory (PIM) block, associated with the bank, including a register that stores a plurality of instructions. The PIM block is configured to: acquire one or more instructions of the plurality of instructions stored in the register; determine whether the one or more instructions operate independently of the bank; and based on the one or more instructions operating independently of the bank, perform computational processing corresponding to the one or more instructions during a first time interval in which the bank is in an inactive state.

Classes IPC  ?

• G06F 12/02 - Adressage ou affectationRéadressage
• G11C 11/406 - Organisation ou commande des cycles de rafraîchissement ou de régénération de la charge

Abrégé

A receiver according to the present disclosure includes: a fast fourier transform (FFT) processor configured to receive a signal including a plurality of first symbols, and configured to output a plurality of second symbols corresponding to a result of performing a fast fourier transform operation on the signal; a FFT reorder buffer memory configured to store a plurality of third symbols in which the plurality of second symbols are reordered according to a natural order; and a FFT buffer controller configured to control the FFT reorder buffer memory to read the plurality of third symbols according to a circular shift order in which bits of addresses of the FFT reorder buffer memory are circularly shifted.

Classes IPC  ?

• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples

Abrégé

Methods and apparatuses for discrete Fourier transform phase rotated permutation based orthogonal frequency division multiplexing (DFT-p-OFDM). An electronic device includes a processor configured to generate an input symbol vector of length M, and generate, from the input symbol vector, based on a first parameter c, a DFT-p-OFDM waveform. The electronic device also includes a transceiver operably coupled to the processor. The transceiver is configured to transmit the DFT-p-OFDM waveform.

Classes IPC  ?

• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples

Abrégé

A semiconductor memory device comprising, a substrate, a plurality of lower electrodes on the substrate, and a supporter connecting the plurality of lower electrodes to each other, wherein the supporter includes a plurality of supporter holes adjacent some of the plurality of lower electrodes, the plurality of lower electrodes include a plurality of first lower electrodes adjacent the plurality of supporter holes and a plurality of second lower electrodes spaced apart from the plurality of supporter holes, four adjacent first lower electrodes of the plurality of first lower electrodes are adjacent one of the plurality of supporter holes, and the plurality of supporter holes are at equal intervals in a first direction and a second direction crossing the first direction.

Classes IPC  ?

• H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
• H10B 51/30 - Dispositifs de RAM ferro-électrique [FeRAM] comprenant des transistors ferro-électriques de mémoire caractérisés par la région noyau de mémoire
• H10B 53/30 - Dispositifs RAM ferro-électrique [FeRAM] comprenant des condensateurs ferro-électriques de mémoire caractérisés par la région noyau de mémoire

Abrégé

A semiconductor device includes a bias voltage generation circuit generating a plurality of bias voltages. The bias voltage generation circuit includes a plurality of transistors connected in series between a first power node supplying a first power voltage and a reference node supplying a reference voltage, lower than the first power voltage, a plurality of capacitors connected to some transistors among the plurality of transistors, wherein each of the plurality of capacitors is connected in parallel with a corresponding transistor of the some transistors, and a turn-on circuit configured to supply a turn-on voltage to a gate of a first transistor among the plurality of transistors. Each of the turn-on circuit and the first transistor is directly connected to the first power node. Each of the plurality of transistors has a gate and a drain, electrically connected to each other.

Classes IPC  ?

• H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ

Abrégé

A repair kit for an electronic device includes a nozzle, a storage, and a guide tube. The storage stores sealing material in liquid or gel state and discharges it through the nozzle based on external force. The guide tube is detachably provided on the nozzle, accommodating a portion of the nozzle and aligning it at a predetermined position or direction. When mounted, the nozzle tip protrudes from a support end of the guide tube. The storage may include a cylindrical container with one open end and another end coupled to the nozzle, and a plunger that moves linearly within the container to discharge the sealing material. The repair kit may further include support pieces on the guide tube and support plates that can be coupled to adjust alignment height or angle, enabling precise positioning during electronic device repair operations.

Classes IPC  ?

• B29C 73/02 - Réparation d'articles faits de matières plastiques ou de substances à l'état plastique, p. ex. d'objets façonnés ou fabriqués par utilisation de techniques couvertes par la présente sous-classe ou la sous-classe utilisant un liquide ou un matériau pâteux
• B29L 31/34 - Appareils électriques, p. ex. bougies ou leurs parties constitutives

Abrégé

The present disclosure relates to a 5G or 6G communication system for supporting higher data transmission rates. The present invention relates to a method by which a UE reports a new UE capability parameter to a base station in order for the UE to reduce a layer 2 (L2) buffer size required for preventing packet loss due to buffer overflow.

Classes IPC  ?

• H04W 8/24 - Transfert des données du terminal

Abrégé

A semiconductor package including a first semiconductor chip, which includes a first semiconductor board, a bonding pad on the first semiconductor board, and a protection layer covering an upper surface of the first semiconductor board and including a recessed region exposing at least a portion of an upper surface of the bonding pad therethrough, a second semiconductor chip including a second semiconductor board in direct contact with the protection layer, and a wire electrically connecting the first semiconductor chip and the second semiconductor chip and connected to the bonding pad may be provided.

Classes IPC  ?

• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition

Abrégé

A memory controller includes a plurality of computing units and a controller. The plurality of computing units perform calculations related to a matrix multiplication. The controller identify first information indicating a plurality of vectors required for the calculations with respect to a plurality of rows of a matrix, identify second information indicating at least one row to which each of the plurality of vectors corresponds among the plurality of rows, and control the plurality of computing units to perform the calculations with respect to the plurality of rows by sequentially inputting the plurality of vectors into the plurality of computing units based on the first information and the second information.

Classes IPC  ?

• G06F 12/02 - Adressage ou affectationRéadressage

Abrégé

An electronic device with changeable shape on the basis of a user's gesture on a screen and/or a control method thereof. There may be provided operations of: detecting a user's gesture on a first screen displayed on a flexible display of the electronic device; determining whether the user's gesture is held in a designated area of the flexible display for at least a designated time; displaying, around the area in which the user's gesture is held, a first icon for inserting a second housing of the electronic device into a first housing of the electronic device and at least one second icon for extending the second housing out of the first housing by a designated length; changing the shape of the electronic device by inserting the second housing into the first housing or by extending the second housing out of the first housing by a designated length; and displaying a second screen, which is different from the first screen, on the electronic device of which the shape has been changed.

Classes IPC  ?

• G06F 3/0488 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] utilisant des caractéristiques spécifiques fournies par le périphérique d’entrée, p. ex. des fonctions commandées par la rotation d’une souris à deux capteurs, ou par la nature du périphérique d’entrée, p. ex. des gestes en fonction de la pression exercée enregistrée par une tablette numérique utilisant un écran tactile ou une tablette numérique, p. ex. entrée de commandes par des tracés gestuels
• G06F 3/04817 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] fondées sur des propriétés spécifiques de l’objet d’interaction affiché ou sur un environnement basé sur les métaphores, p. ex. interaction avec des éléments du bureau telles les fenêtres ou les icônes, ou avec l’aide d’un curseur changeant de comportement ou d’aspect utilisant des icônes
• G06F 3/0484 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p. ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs

Abrégé

A semiconductor device includes a host and a memory device including a first memory cell array corresponding to a plurality of word lines and a second memory cell array corresponding to a plurality of redundancy word lines. The host is configured to, based on an occurrence of a first type of error that is correctable through an error correction code (ECC) in a first memory cell row connected to a first word line in the first memory cell array, correct the first type of error through the error correction code. The host is configured to, based on a number of the occurrence of the first type of error in the first memory cell row exceeding a predetermined threshold value, deactivate the first word line and activate a first redundancy word line corresponding to the first word line among the plurality of redundancy word lines.

Classes IPC  ?

• G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11

Abrégé

A neural network platform, including: a memory array configured to store a plurality of synaptic weights corresponding to a plurality of neurons included in a plurality of memory cells; and a learning device configured to: based on a clock signal having a first logical value, perform a computation operation on the memory array using a computation module according to the plurality of synaptic weights, and based on the clock signal having a second logical value, perform a learning operation without using the plurality of synaptic weights

Classes IPC  ?

• G06N 3/049 - Réseaux neuronaux temporels, p. ex. éléments à retard, neurones oscillants ou entrées impulsionnelles
• G06N 3/088 - Apprentissage non supervisé, p. ex. apprentissage compétitif

Abrégé

A user equipment (UE) capable of facilitating communications in a wireless system can include a processor. In some examples, the processor is to receive from a base station (BS) active beam pattern information associated with a cell. The active beam pattern information can include one or more beams, geographic information, or timing information. In such examples, the processor can also identify a beam status associated with a geographic location of the UE based on the active beam pattern information. In at least one example, the processor can further perform a measurement operation on the cell based on the beam status.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• H04W 36/36 - Contrôle de resélection par un équipement d'abonné ou un équipement terminal
• H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p. ex. gestion de la mobilité

Abrégé

A method of operating a non-volatile memory device may include precharging sensing nodes of a plurality of page buffers based on a reference voltage and latching the sensing nodes to obtain first sensing data, precharging the sensing nodes of the plurality of page buffers based on a power supply voltage and latching the sensing nodes to obtain second sensing data, and comparing the first sensing data and the second sensing data to determine whether a voltage level of the power supply voltage is lower than the reference voltage.

Classes IPC  ?

• G11C 16/26 - Circuits de détection ou de lectureCircuits de sortie de données
• G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
• G11C 16/08 - Circuits d'adressageDécodeursCircuits de commande de lignes de mots
• G11C 16/24 - Circuits de commande de lignes de bits
• G11C 16/30 - Circuits d'alimentation

Abrégé

A loader device includes a frame, a first opening formed in a first side surface of the frame, a second opening formed on a second side surface of the frame, a cavity that connects the first opening and the second opening, a transport unit in the cavity, a first sensor that senses a presence or absence of a first substrate carrier, a second sensor that senses access of a person, and a controller that receives a first sensor signal from the first sensor and receives a second sensor signal from the second sensor. In response to the first sensor signal, the controller controls the transport unit to not transfer a second substrate carrier to the first opening, controls the transport unit to pick up the first substrate carrier from the first opening, and interrupts operation of the transport unit in response to the second sensor signal.

Classes IPC  ?

• B25J 11/00 - Manipulateurs non prévus ailleurs
• B25J 9/16 - Commandes à programme
• H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
• H01L 21/677 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le transport, p. ex. entre différents postes de travail
• H01L 21/68 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le positionnement, l'orientation ou l'alignement

Abrégé

An image sensor includes photoelectric conversion devices in a substrate; a separation structure in the substrate and between the photoelectric conversion devices; an insulating structure on the substrate and the separation structure; color filters on the insulating structure; and a grid structure on the insulating structure and between the color filters. The grid structure includes spacer layers and a capping layer. The spacer layers have first surfaces opposing each other. The spacer layers define an air gap between the first surfaces that oppose each other. The capping layer covers second surfaces and upper surfaces of the spacer layers, and defines an upper limit of the air gap. The spacer layers have a first thickness, and the capping layer has a second thickness less than the first thickness.

Classes IPC  ?

• H01L 27/146 - Structures de capteurs d'images

Abrégé

Methods and apparatuses for power control and beam management to enable coexistence of radar sensing and wireless communication. A method for a UE includes determining a sensing category or characteristics for a sensing application, and selecting a spatial filter for radar sensing transmission or reception based on determined sensing category or characteristics. The method further includes identifying a radar sensing transmission power and transmitting or receiving radar sensing signals using the spatial filter and the identified radar sensing transmission power. The method further includes reporting one of communication blockage, radar sensing beam information, or CSI adapted to the radar sensing beam information to a base station or neighboring UEs.

Classes IPC  ?

• G01S 7/40 - Moyens de contrôle ou d'étalonnage
• G01S 13/66 - Systèmes radar de poursuiteSystèmes analogues
• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• H04B 17/309 - Mesure ou estimation des paramètres de qualité d’un canal

Abrégé

A plasma etching device includes a source power generator configured to generate a source power signal based on a source control signal, a bias power generator configured to generate a bias power signal based on a bias control signal, an inductively-coupled antenna provided with the source power signal, a wafer support member connected to the bias power generator and receiving the bias power signal from the bias power generator, a chamber including the wafer support member and containing plasma generated by source power signal, and a memory configured to store frequency information. The source power generator detects whether the bias power generator is operating, and performs, in response to detecting of the bias power generator being operating, a frequency switching operation. In the frequency switching operation, a frequency of the source power signal is set to a frequency value of the frequency information.

Classes IPC  ?

• H01J 37/32 - Tubes à décharge en atmosphère gazeuse

Abrégé

Methods and devices are provided in which a processor of an electronic device encodes segments of a binary message word into real-valued outer codewords using corresponding non-linear neural network (NN) outer encoding processes. The processor combines the real-valued outer codewords using a real-field polarization operation to generate a codeword for the binary message word.

Classes IPC  ?

• G06N 3/0455 - Réseaux auto-encodeursRéseaux encodeurs-décodeurs

Abrégé

An electronic device including a fastening structure of a strap of an embodiment is provided. The electronic device of an embodiment includes a housing 410 including a cavity portion 412 formed toward a side direction of the electronic device, a hook member 420-2 arranged within the cavity portion 412 and protruding toward the side direction of the electronic device, a button member 420-1 configured to move the hook member 420-2 toward a front direction of the electronic device by applying force to the hook member 420-2 toward the front direction of the electronic device, and a strap 450 fastened to the hook portion 524. The strap 450 includes a strap body 455, and a strap adapter 451 including an attachment portion 452 and a plurality of protrusion guides 453, and positioned at one side of the strap body 455 and fastened to the hook portion 524.

Classes IPC  ?

• G04G 17/02 - Assemblages de composants
• G04B 37/14 - Dispositifs de suspension, supports ou piédestaux pour appareils à évaluer le temps dans la mesure où ils font partie du boîtier
• G04G 17/08 - Boîtiers
• G04G 21/02 - Détecteurs de valeurs physiques externes, p. ex. de température
• G06F 1/16 - Détails ou dispositions de structure
• G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur

Abrégé

A refrigerator including a main body having a storage compartment; an ice-making tray provided inside the storage compartment; a water supply device to supply water to the ice-making tray; an ice-separating device to separate, ice accommodated in the ice-making tray; a sensor provided in the storage compartment; and a controller which uses a measurement value detected by the sensor after a preset time following the water supply device completing a water supply operation, so as to determine whether water supply is low on the basis that the amount of water supplied to the ice-making tray being less than a preset amount or determines whether water supply is excessive based on the amount of water supplied to the ice-making tray is greater than the preset amount, and which controls, based on whether water supply is low or excessive, the ice-separating device such that a plurality of ice-separating operations are performed.

Classes IPC  ?

• F25C 1/24 - Construction des mouleauxDispositifs de remplissage pour mouleaux pour réfrigérateurs, p. ex. des plateaux de congélation

Abrégé

Provided are systems, methods, and apparatuses for entangled threads. In one or more examples, the systems, devices, and methods include generating, via a host, a first thread of a process; generating, via the first thread, a second thread, the first thread configuring the second thread as a proxy of the first thread; and executing the second thread on an accelerator. In some examples, the first thread places itself in the sleep state while the second thread executes on the accelerator. In some examples, the systems, devices, and methods include configuring, via the host, the first thread to execute on a processor of the host, and configuring, via the first thread, the second thread to execute on the accelerator.

Classes IPC  ?

• G06F 9/48 - Lancement de programmes Commutation de programmes, p. ex. par interruption

Abrégé

A laser processing apparatus includes a stage to support a substrate, a laser light source to generate a source laser beam, a first beam divider to divide the source laser beam into first and second laser beams in a first horizontal direction, a second beam divider to divide the first laser beams into a plurality of first laser sub-beams in a second horizontal direction and to divide the second laser beam into a plurality of second laser sub-beams in the second horizontal direction, and a condensing lens to condense the plurality of first laser sub-beams into a plurality of first laser branch beams that are spaced apart along a first scan line on the substrate and to condense the plurality of second laser sub-beams into a plurality of second laser branch beams spaced apart along a second scan line parallel with the first scan line on the substrate.

Classes IPC  ?

• B23K 26/364 - Gravure au laser pour faire une rainure ou une saignée, p. ex. pour tracer une rainure d'amorce de rupture
• B23K 26/06 - Mise en forme du faisceau laser, p. ex. à l’aide de masques ou de foyers multiples
• B23K 26/067 - Division du faisceau en faisceaux multiples, p. ex. foyers multiples
• B23K 26/073 - Détermination de la configuration du spot laser
• B23K 26/08 - Dispositifs comportant un mouvement relatif entre le faisceau laser et la pièce
• B23K 26/402 - Enlèvement de matière en tenant compte des propriétés du matériau à enlever en faisant intervenir des matériaux non métalliques, p. ex. des isolants
• B23K 103/00 - Matières à braser, souder ou découper
• G02B 19/00 - Condenseurs
• G02B 27/09 - Mise en forme du faisceau, p. ex. changement de la section transversale, non prévue ailleurs
• G02B 27/10 - Systèmes divisant ou combinant des faisceaux
• G02B 27/28 - Systèmes ou appareils optiques non prévus dans aucun des groupes , pour polariser
• H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants

Abrégé

An electronic device, a method, and a storage medium for generating an image are provided. The method for generating an image includes displaying a first image including a first object based on a first drawing input. The method includes receiving a second drawing input around the first object included in the first image. The method includes identifying, based on determining that the second drawing input is a control command, attributes of the first object. The attributes of the first object includes a type of the first object. The method includes generating a second image including a second object having the same attributes as the first object based on the identified attributes of the first object. The second image is of higher quality than the first image. The method includes providing the second image.

Classes IPC  ?

• G06T 11/20 - Traçage à partir d'éléments de base, p. ex. de lignes ou de cercles

Abrégé

An electronic device is provided. The electronic device including at least one electrical component, a button exposed to an exterior of the electronic device and configured to receive an input from a user, a button cable electrically connected to the button and configured to transmit an input signal from the button, and a waterproof bracket having a first surface positioned in an area exposed to moisture introduced from the exterior of the electronic device and a second surface positioned in an area not exposed to moisture, wherein the waterproof bracket includes a mount configured such that the electrical component is placed therein, and a cable hole provided through the waterproof bracket from the first surface to the second surface, and wherein the button cable extends through the cable hole towards a position of the second surface.

Classes IPC  ?

• H05K 5/06 - Enveloppes scellées hermétiquement
• H05K 5/00 - Enveloppes, coffrets ou tiroirs pour appareils électriques

Abrégé

A semiconductor device includes a multiphase clock generator generating clock signals by dividing a data clock signal, adjusting phases of the clock signals based on a control code set to generate a multiphase clock, a first data strobe module generating first and second serial signals from first and second data sequences using the multiphase clock, a phase error detector comparing a first length of a first rising period of the first serial signal and a second length of a second rising period of the second serial signal to generate a comparison result, a register storing the comparison result, and a control logic determining code values of the control code set by referring to the comparison result so that phase intervals between the clock signals are equalized with each other, and correcting a phase of the multiphase clock by storing the code values of the control code set in the register.

Classes IPC  ?

• H03L 7/107 - Détails de la boucle verrouillée en phase pour assurer la synchronisation initiale ou pour élargir le domaine d'accrochage utilisant une fonction de transfert variable pour la boucle, p. ex. un filtre passe-bas ayant une largeur de bande variable
• H03L 7/091 - Détails de la boucle verrouillée en phase concernant principalement l'agencement de détection de phase ou de fréquence, y compris le filtrage ou l'amplification de son signal de sortie le détecteur de phase ou de fréquence utilisant un dispositif d'échantillonnage

Abrégé

Methods of forming semiconductor devices are provided. A method of forming a semiconductor device includes forming a preliminary backside (BS) source/drain (S/D) contact that includes a barrier metal. In some embodiments, forming the preliminary BS S/D contact includes depositing the barrier metal, such as depositing the barrier metal as a sidewall spacer. Moreover, the method includes forming a BS S/D contact on the barrier metal.

Classes IPC  ?

• H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
• H01L 21/8234 - Technologie MIS
• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
• H01L 29/786 - Transistors à couche mince

Abrégé

An air conditioner may include: an indoor controller configured to receive an operation command and generate a plurality of first signals corresponding to the operation command; a main controller configured to receive the plurality of first signals, and combine the plurality of first signals to convert the combined first signals into a single second signal; an outdoor unit configured to operate based on the single second signal received from the main controller, and generate a third signal corresponding to an operation state of the outdoor unit; and an indoor unit connected to the main controller and including an indoor fan, wherein the main controller may be configured to control the indoor fan based on the plurality of first signals and the third signal.

Classes IPC  ?

• F24F 11/63 - Traitement électronique

Abrégé

In this power management system comprising: a plurality of home appliances including a first home appliance and a second home appliance; and a server for transmitting, to at least one of the first home appliance and the second home appliance, a control signal for operation in a power consumption reduction mode which enables reduction of a power consumption value, the server may: receive power consumption data from each of the first home appliance and the second home appliance; determine a total power consumption value for power consumed by the first home appliance and the second home appliance on the basis of the power consumption data; if the total power consumption value is greater than or equal to a first reference power consumption value, determine a home appliance, to which a control signal for operation in the power consumption reduction mode is to be transmitted, among the first home appliance and the second home appliance on the basis of a predetermined operation order of the power consumption reduction mode; and transmit a control signal for operation in the power consumption reduction mode to the determined home appliance.

Classes IPC  ?

• H04L 12/28 - Réseaux de données à commutation caractérisés par la configuration des liaisons, p. ex. réseaux locaux [LAN Local Area Networks] ou réseaux étendus [WAN Wide Area Networks]
• G01R 22/06 - Dispositions pour la mesure de l'intégrale dans le temps d'une puissance électrique ou d'un courant, p. ex. compteurs d'électricité par des méthodes électroniques
• G16Y 10/80 - HabitationsBâtiments
• G16Y 40/30 - Commande

Abrégé

A method for operating a first electronic device configured to perform Wi-Fi aware communication according to an embodiment of the present disclosure may comprise: an operation of transmitting a first SDF including a first BSSID related to the first electronic device to a second electronic device; an operation of receiving, from the second electronic device, a second SDF including a second BSSID related to the second electronic device; an operation of determining whether to drive an adaptive NAN schedule for adaptively adjusting a time interval for Wi-Fi aware communication between the first electronic device and the second electronic device on the basis of the result of comparing the first BSSID and the second BSSID; and an operation of, if the adaptive NAN scheduling is driven, transmitting a first message including allocation information regarding the time interval for Wi-Fi aware communication between the first electronic device and the second electronic device to the second electronic device.

Classes IPC  ?

• H04W 72/0446 - Ressources du domaine temporel, p. ex. créneaux ou trames
• H04W 72/543 - Critères d’affectation ou de planification des ressources sans fil sur la base de critères de qualité sur la base de la qualité demandée, p. ex. QdS [QoS]
• H04W 8/00 - Gestion de données relatives au réseau
• H04W 72/40 - Gestion des ressources pour la communication en mode direct, p. ex. D2D ou liaison secondaire
• H04W 76/30 - Libération de la connexion
• H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]

Abrégé

An embodiment includes a STA with low latency traffic may transmit a defer signal to preempt one or more others STAs from contending for channel access, whereby the STA may quickly obtain channel access to transmit low latency frames, whereby the defer signal may place the one or more other STAs in an extended interframe space (EIFS) state or in an error state.

Classes IPC  ?

• H04W 74/0816 - Accès non planifié, p. ex. ALOHA utilisant une détection de porteuse, p. ex. accès multiple par détection de porteuse [CSMA] avec évitement de collision
• H04W 74/00 - Accès au canal sans fil
• H04W 74/08 - Accès non planifié, p. ex. ALOHA
• H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]

Abrégé

According to an embodiment, electronic devices (101, 201) comprise one or more processors (120, 320) and memories (130, 330) storing instructions. The instructions, when executed by the one or more processors, may be configured to cause the electronic devices to: identify a plurality of speakers on the basis of speech data included in content; identify a sign language sentence corresponding to an utterance related to a first speaker among the plurality of speakers; identify a duration time of the utterance and a motion time for the sign language sentence; adjust motion playback times for each of words included in the sign language sentence such that the motion time for the sign language sentence corresponds to the duration time of the utterance; and express the words included in the sign language sentence by using a graphic object related to the first speaker according to the adjusted motion playback times.

Classes IPC  ?

• G06F 3/0484 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p. ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs
• G09B 21/00 - Moyens d'enseignement ou de communication destinés aux aveugles, sourds ou muets
• G06F 3/16 - Entrée acoustiqueSortie acoustique
• G10L 15/02 - Extraction de caractéristiques pour la reconnaissance de la paroleSélection d'unités de reconnaissance
• G10L 17/00 - Techniques d'identification ou de vérification du locuteur

Abrégé

According to one embodiment disclosed in the present document, a method for forming a wearable member is disclosed, the method comprising the steps of: arranging yarns constituting a wearing member and at least one jig arranged in a first direction; weaving the yarns in the first direction along the at least one jig; heating the at least one jig to deform at least one hole formed in the wearing member in a shape corresponding to the at least one jig; and separating the at least one jig from the wearing member, wherein the at least one hole is formed in a second direction perpendicular to the first direction, and the yarns include a first yarn formed of a thermoplastic material and a second yarn twisted with the first yarn. Various other embodiments understood through the specification are also possible.

Classes IPC  ?

• D04B 1/12 - Tricots ou articles à dessins caractérisés par la nature du fil
• D04B 9/42 - Métiers circulaires pour le tricotage de trame avec des aiguilles mobiles indépendantes spécialement conçus pour la production de tricot de configuration particulière
• D04B 21/14 - Tissus caractérisés par l'incorporation par tricotage de fils de renforcement, de fils de liage ou de fils décoratifs, dans un ou plusieurs fils, nappe ou couche de tissuTricots incorporant de petits éléments auxiliaires, p. ex. à des fins décoratives
• D04B 21/04 - Tricots à poil ou articles présentant des caractéristiques superficielles similaires caractérisés par la nature du fil
• A44C 5/14 - BraceletsBracelets pour montresLeurs systèmes de fixation caractérisés par leur mode de fixation à une montre ou similaire

Abrégé

An electronic device is disclosed. The electronic device of the present disclosure may comprise: a camera; a display; at least one processor; and a memory storing instructions that, when executed by the at least one processor, instruct the electronic device to: display an image acquired via the camera on the display; identify an object region and a background region other than the object region included in the image; acquire a score related to an image to be generated by means of inpainting for replacing the object region included in the image; display, via the display, guide information for guiding a user's action on the basis of the score; and provide an edited image by deleting a portion of the image corresponding to the object region, and generating an image to be applied to the deleted portion by means of inpainting on the basis of information acquired via the user's action performed in association with the image and the guide information.

Classes IPC  ?

• G06T 5/77 - RetoucheRestaurationSuppression des rayures
• G06T 7/11 - Découpage basé sur les zones
• G06T 7/194 - DécoupageDétection de bords impliquant une segmentation premier plan-arrière-plan
• G06T 5/60 - Amélioration ou restauration d'image utilisant l’apprentissage automatique, p. ex. les réseaux neuronaux
• G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
• G02B 27/01 - Dispositifs d'affichage "tête haute"
• G06T 19/00 - Transformation de modèles ou d'images tridimensionnels [3D] pour infographie
• G06N 3/08 - Méthodes d'apprentissage

Abrégé

This wearable device may comprise: a memory storing instructions and including one or more storage media; a first sensor; a second sensor; a communication circuit for Bluetooth and/or Bluetooth low energy (BLE); and at least one processor including a processing circuit. The instructions, when executed individually or collectively by the at least one processor, may cause the wearable device to: detect that the wearable device is worn by a user via the first sensor while being wirelessly connected to an external electronic device having a display by using the communication circuit; deactivate the communication circuit on the basis of the detection; and activate the second sensor used to acquire values for biometric information of the user.

Classes IPC  ?

• G06F 1/3228 - Surveillance d’exécution de tâches, p. ex. par utilisation de temporisations d’attente, de commandes d’arrêt ou de commandes d’attente
• G06F 1/16 - Détails ou dispositions de structure
• H04W 52/02 - Dispositions d'économie de puissance
• H04W 4/80 - Services utilisant la communication de courte portée, p. ex. la communication en champ proche, l'identification par radiofréquence ou la communication à faible consommation d’énergie
• G01R 31/382 - Dispositions pour la surveillance de variables des batteries ou des accumulateurs, p. ex. état de charge

Abrégé

An electronic device disclosed herein comprises: a wireless communication circuit; a display accommodated in the electronic device and including active areas including a plurality of pixels, at least one first active area among the active areas including at least one first control line, which extends in a first direction, for driving some of the plurality of pixels, and not including at least one second control line, which extends in a second direction substantially perpendicular to the first direction; and an antenna radiator disposed below the display, such that at least a portion thereof overlaps with the at least one first active area, and operatively connected to the wireless communication circuit. The antenna radiator may be configured to substantially radiate a second polarized wave corresponding to the second direction through the at least one first active area rather than a first polarized wave corresponding to the first direction.

Classes IPC  ?

• H01Q 21/24 - Combinaisons d'unités d'antennes polarisées dans des directions différentes pour émettre ou recevoir des ondes polarisées circulairement ou elliptiquement ou des ondes polarisées linéairement dans n'importe quelle direction
• H01Q 5/307 - Éléments rayonnants individuels ou couplés, chaque élément étant alimenté d’une façon non précisée
• H01Q 1/24 - SupportsMoyens de montage par association structurale avec d'autres équipements ou objets avec appareil récepteur
• H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
• G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice

Abrégé

An electronic device according to one embodiment of the present disclosure comprises: a memory for storing one or more instructions; and at least one processor for executing the one or more instructions, wherein the at least one processor can, when audio received through a microphone corresponds to a preset condition, identify the presence of a user within a sensing range of Wi-Fi CSI, and, when the presence of the user within the sensing range of the Wi-Fi CSI is identified, identify whether the user is present within a first sensing range based on ultrasonic waves.

Classes IPC  ?

• G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• G01H 17/00 - Mesure des vibrations mécaniques ou des ondes ultrasonores, sonores ou infrasonores non prévue dans les autres groupes de la présente sous-classe
• H04R 1/08 - EmbouchuresLeurs fixations

Abrégé

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). A method performed by a user equipment (UE) in a wireless communication system includes receiving at least one message including configuration information for a system information block (SIB); obtaining a reference configuration of the SIB; obtaining a delta configuration of the SIB; and determining a full configuration of the SIB based on a combination of the reference configuration and the delta configuration. At least one of the reference configuration of the SIB and the delta configuration of the SIB are obtained based on the at least one message including the configuration information for the SIB.

Classes IPC  ?

• H04W 48/14 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration utilisant une requête de l’utilisateur
• H04W 48/10 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration utilisant des informations radiodiffusées
• H04W 60/00 - Rattachement à un réseau, p. ex. enregistrementSuppression du rattachement à un réseau, p. ex. annulation de l'enregistrement

Abrégé

The present disclosure relates to a method for designing a base graph of a low-density parity-check code in a communication system, said base graph, and an encoding/decoding method and apparatus therefor. A communication device for performing encoding by using an LDPC code in a communication system, according to an embodiment of the present disclosure, may: identify a base graph to be used among a first base graph and a second base graph of the LDPC code, on the basis of the length and a code rate of information to be transmitted; and when the identified base graph is the second base graph, identify a plurality of index values constituting a parity check matrix on the basis of the second base graph. The plurality of index values are identified on the basis of row indices and column indices of a matrix corresponding to the second base graph, and lifting set indices for lifting of the base graph, and index values corresponding to at least one column index mapped to a specific row index among the row indices may be further used for the encoding.

Classes IPC  ?

• H03M 13/11 - Détection d'erreurs ou correction d'erreurs transmises par redondance dans la représentation des données, c.-à-d. mots de code contenant plus de chiffres que les mots source utilisant un codage par blocs, c.-à-d. un nombre prédéterminé de bits de contrôle ajouté à un nombre prédéterminé de bits d'information utilisant plusieurs bits de parité
• H03M 13/01 - Hypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
• H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
• H04L 27/20 - Circuits de modulationCircuits émetteurs
• H04L 27/34 - Systèmes à courant porteur à modulation de phase et d'amplitude, p. ex. en quadrature d'amplitude

Abrégé

The present disclosure relates to a 5G or 6G communication system for supporting higher data transmission rates. More particularly, the present disclosure relates to a method performed by a terminal in a wireless communication system, the method comprising the steps of: receiving downlink control information (DCI) for scheduling resources for transmitting a first physical uplink shared channel (PUSCH) related to a first transmission and reception point (TRP) for uplink transmission and downlink reception of the terminal and a second PUSCH related to a second TRP for only uplink transmission of the terminal; and transmitting a power headroom report (PHR) including a first PHR related to the first PUSCH and/or a second PHR related to the second PUSCH, wherein the first PHR is calculated on the basis of a downlink path loss calculated using a reference signal, the second PHR is calculated on the basis of the downlink path loss and a path loss offset, both the first PHR and the second PHR are configured to be transmitted, both the first PUSCH and the second PUSCH are transmitted in slot n in which the PHR is transmitted, and, when the first PUSCH is scheduled at a time point earlier than that of the second PUSCH, the PHR including the first PHR calculated on the basis of actual transmission of the first PUSCH and the second PHR calculated on the basis of actual transmission of the second PUSCH can be transmitted.

Classes IPC  ?

• H04W 52/36 - Commande de puissance d'émission [TPC Transmission power control] utilisant les limitations de la quantité totale de puissance d'émission disponible avec une plage ou un ensemble discrets de valeurs, p. ex. incrément, variation graduelle ou décalages
• H04W 52/24 - Commande de puissance d'émission [TPC Transmission power control] le TPC étant effectué selon des paramètres spécifiques utilisant le rapport signal sur parasite [SIR Signal to Interference Ratio] ou d'autres paramètres de trajet sans fil
• H04W 72/21 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens ascendant de la liaison sans fil, c.-à-d. en direction du réseau
• H04W 72/232 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c.-à-d. en direction du terminal les données de commande provenant de la couche physique, p. ex. signalisation DCI
• H04W 72/231 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c.-à-d. en direction du terminal les données de commande provenant des couches au-dessus de la couche physique, p. ex. signalisation RRC ou MAC-CE
• H04W 72/1268 - Jumelage du trafic à la planification, p. ex. affectation planifiée ou multiplexage de flux de flux de données en liaison ascendante
• H04W 72/0457 - Affectation de bande ou de débit variable

Abrégé

The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). In embodiments of the present disclosure, there is provided a method including transmitting a first signal including information related to requesting or assisting to activate a physical random access channel (PRACH) resource set and during an activation period of the PRACH resource set, initiating a random access procedure, based on the PRACH resource set activated based on the first signal, wherein the activation period includes at least one of a time period with a preset length, a first preset number of consecutive random access occasions (ROs) and a preset maximum number of PRACH preamble transmission.

Classes IPC  ?

• H04W 74/0833 - Procédures d’accès aléatoire, p. ex. avec accès en 4 étapes
• H04W 74/00 - Accès au canal sans fil
• H04W 48/10 - Distribution d'informations relatives aux restrictions d'accès ou aux accès, p. ex. distribution de données d'exploration utilisant des informations radiodiffusées
• H04B 17/318 - Force du signal reçu
• H04L 43/0852 - Retards
• H04W 72/0446 - Ressources du domaine temporel, p. ex. créneaux ou trames

Abrégé

This wearable device may comprise: a display assembly including one or more displays; cameras; sensors; a memory that stores instructions and includes one or more storage media; and at least one processor including a processing circuit. The instructions, when executed by the at least one processor, may instruct the wearable device to: obtain an image; identify depth values of pixels using obtained depth information; identify the number of pixels; identify a reference depth value among the depth values of the pixels; identify a first portion of the pixels; identify a second portion of the pixels; and display a screen corresponding to the image through the display assembly on the basis of setting the depth values of the first portion of the pixels to the reference depth value and setting the depth values of the second portion of the pixels to a predetermined depth value.

Classes IPC  ?

• H04N 13/128 - Ajustement de la profondeur ou de la disparité
• H04N 13/239 - Générateurs de signaux d’images utilisant des caméras à images stéréoscopiques utilisant deux capteurs d’images 2D dont la position relative est égale ou en correspondance à l’intervalle oculaire
• H04N 13/271 - Générateurs de signaux d’images où les signaux d’images générés comprennent des cartes de profondeur ou de disparité
• H04N 13/268 - Générateurs de signaux d’images avec conversion d’images monoscopiques en images stéréoscopiques au moyen du rendu basé sur une image de profondeur
• H04N 13/344 - Affichage pour le visionnement à l’aide de lunettes spéciales ou de visiocasques avec des visiocasques portant des affichages gauche et droit
• H04N 13/383 - Suivi des spectateurs pour le suivi du regard, c.-à-d. avec détection de l’axe de vision des yeux du spectateur
• H04N 13/156 - Mélange de signaux d’images

Abrégé

Provided are a dryer for recommending a drying course according to fabric type, and a method for controlling the dryer. The dryer comprises: a conductivity sensor; a temperature sensor; a current sensor; a drying module; at least one memory storing one or more instructions; and at least one processor. The at least one processor, by executing the one or more instructions stored in the memory, can: obtain a conductivity value from the conductivity sensor, the temperature inside the dryer from the temperature sensor, and a current value, applied to a drum motor, from the current sensor; determine the fabric type of to-be-dried materials inside the dryer or whether the to-be-dried materials include multiple to-be-dried materials of different fabric types on the basis of the obtained conductivity value, temperature, and current value applied to the drum motor; and control the drying module to perform drying by a drying method corresponding to the determined fabric type or a drying method corresponding to the multiple to-be-dried materials of different fabric types.

Classes IPC  ?

• D06F 58/36 - Commande des phases de fonctionnement, p. ex. optimisation ou amélioration des phases de fonctionnement en fonction des caractéristiques du linge
• D06F 34/14 - Dispositions de détection ou de mesure de paramètres spécifiques
• D06F 58/30 - Processus de séchage
• D06F 34/28 - Dispositions de choix du programme, p. ex. panneaux de commande à cet effetDispositions pour indiquer les paramètres du programme, p. ex. le programme choisi ou sa progression
• D06F 34/05 - Dispositions pour le transfert de signaux ou la transmission de données pour la communication sans fil entre parties constitutives, p. ex. pour le suivi ou la commande à distance
• D06F 105/58 - Indications ou alarmes transmises au système de commande ou à l’utilisateur
• D06F 105/12 - Humidité ou degré de séchage du linge

Abrégé

Mcc, a DFT-p-OFDM waveform. The electronic device also includes a transceiver operably coupled to the controller. The transceiver is configured to transmit the DFT-p-OFDM waveform.

Classes IPC  ?

• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples

Abrégé

The present invention relates to a method for efficiently managing a service application programming interface (API) by acquiring and utilizing information on an actual service API demand through a common API framework such that a subject actually providing the service API can dynamically expand or reduce a service capacity according to an actual API request demand in a mobile communication system and, more specifically, to a method and an apparatus for dynamically instantiating an API exposing function implemented to provide specific service APIs.

Classes IPC  ?

• H04L 67/51 - Découverte ou gestion de ceux-ci, p. ex. protocole de localisation de service [SLP] ou services du Web
• H04L 67/303 - Profils des terminaux
• H04L 9/40 - Protocoles réseaux de sécurité

Abrégé

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. According to an embodiment, a method executed by a first node in a wireless communication system includes encoding a bit sequence; and generating and transmitting a signal based on an encoding result; wherein bits having a value of 0 in the bit sequence are encoded as a first sequence, bits having a value of 1 are encoded as a second sequence, and the number of elements in each of the first sequence and the second sequence is N, where N ≥ 3; and wherein the number of elements having a value of 1 in the first sequence and/or the second sequence is greater than the number of elements having a value of 0, and the sum of the number of elements having a value of 1 in both the first sequence and the second sequence is greater than N.

Classes IPC  ?

• H04L 25/49 - Circuits d'émissionCircuits de réception à conversion de code au transmetteurCircuits d'émissionCircuits de réception à pré-distorsionCircuits d'émissionCircuits de réception à insertion d'intervalles morts pour obtenir un spectre de fréquence désiréCircuits d'émissionCircuits de réception à au moins trois niveaux d'amplitude
• H04B 17/318 - Force du signal reçu
• H04W 24/08 - Réalisation de tests en trafic réel

Abrégé

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The methods and apparatuses for measurement of sounding reference signal in wireless communication system. A user equipment (UE) in a wireless communication system, the UE comprising: a transceiver; and at least one processor coupled to the transceiver, and configured to: receive, from a base station (BS), first information on a report which is associated with transmission of a sounding reference signal (SRS) in a plurality of slots, based on the first information, determine a value of a quantity indicating a mismatch between the transmission of the SRS in the plurality of slots, and transmit, to the BS, the report including at least one indication indicating the value of the quantity.

Classes IPC  ?

• H04W 24/10 - Planification des comptes-rendus de mesures
• H04W 24/08 - Réalisation de tests en trafic réel
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission

Abrégé

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Specifically, the present disclosure provides a method performed by a user equipment in a wireless communication system, a method comprising: receiving first configuration information and second configuration information, the first configuration information comprising information related to a reference signal resource set, the reference signal resource set being associated with a beam pair, the second configuration information comprising information related to a channel state information (CSI) report; receiving, based on the first configuration information, a first reference signal associated with a first beam and a second reference signal associated with a second beam; and, transmitting a CSI report related to the beam pair based on the second configuration information.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 24/10 - Planification des comptes-rendus de mesures
• H04L 25/02 - Systèmes à bande de base Détails

Abrégé

An apparatus with a processor receives a bitstream including a syntax element indicating whether prediction errors, mesh connectivity information, and additional basemesh syntax elements are transmitted in a single entropy packet or a plurality of entropy packets, a first set of arithmetically coded prediction errors, and a second set of arithmetically coded prediction errors for decoding a mesh frame. The processor decodes the syntax element and arithmetically decodes the first and second set of arithmetically coded prediction errors based on the syntax element. In one example, the first and second set of arithmetically coded prediction errors are included in a single entropy packet if the syntax element has a first value and the first set of arithmetically coded prediction errors is in a first entropy packet and the second set of arithmetically coded error predictions is in a second entropy packet if the syntax element has a second value.

Classes IPC  ?

• H04N 19/54 - Estimation de mouvement autre que basée sur les blocs utilisant des points ou des maillages caractéristiques
• H04N 19/70 - Procédés ou dispositions pour le codage, le décodage, la compression ou la décompression de signaux vidéo numériques caractérisés par des aspects de syntaxe liés au codage vidéo, p. ex. liés aux standards de compression
• H04N 19/91 - Codage entropique, p. ex. codage à longueur variable ou codage arithmétique
• H04N 19/136 - Caractéristiques ou propriétés du signal vidéo entrant
• H04N 19/184 - Procédés ou dispositions pour le codage, le décodage, la compression ou la décompression de signaux vidéo numériques utilisant le codage adaptatif caractérisés par l’unité de codage, c.-à-d. la partie structurelle ou sémantique du signal vidéo étant l’objet ou le sujet du codage adaptatif l’unité étant des bits, p. ex. de flux vidéo compressé
• H04N 19/61 - Procédés ou dispositions pour le codage, le décodage, la compression ou la décompression de signaux vidéo numériques utilisant un codage par transformée combiné avec un codage prédictif

Abrégé

The present disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. In an embodiment of the present disclosure, a method performed by a policy control function (PCF) entity in a wireless communication system may comprise the steps of: receiving a request message associated with traffic characteristics in a target service flow; generating first PCC rule information regarding first traffic characteristics of the target service flow and second PCC rule information regarding second traffic characteristics thereof on the basis of the request message; and transmitting the first PCC rule information and the second PCC rule information to a session management function (SMF) entity.

Classes IPC  ?

• H04W 28/24 - Négociation de l'agrément du niveau de service [SLA Service Level Agreement]Négociation de la qualité de service [QoS Quality of Service]
• H04W 28/02 - Gestion du trafic, p. ex. régulation de flux ou d'encombrement
• H04L 41/0894 - Gestion de la configuration du réseau basée sur des règles
• H04W 24/08 - Réalisation de tests en trafic réel
• H04L 43/08 - Surveillance ou test en fonction de métriques spécifiques, p. ex. la qualité du service [QoS], la consommation d’énergie ou les paramètres environnementaux
• H04W 88/14 - Dispositifs formant réseau fédérateur
• H04L 47/24 - Trafic caractérisé par des attributs spécifiques, p. ex. la priorité ou QoS

Abrégé

The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. A method for detecting a transmitted signal in a wireless communication system is disclosed. The method includes receiving, from a plurality of user equipments (UEs), a plurality of signals including a plurality of transmitted layers, modelling symbol detection as a tree search based on a number of MIMO layers and a number of the transmitted layers, applying an M-algorithm on a tree based on the tree search, and detecting the transmitted signal based on the tree.

Classes IPC  ?

• H04B 7/0413 - Systèmes MIMO
• H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
• H04L 27/18 - Systèmes à courant porteur à modulation de phase, c.-à-d. utilisant une manipulation à décalage de phase
• H04L 27/34 - Systèmes à courant porteur à modulation de phase et d'amplitude, p. ex. en quadrature d'amplitude

Abrégé

This wearable device may comprise: a memory for storing instructions; one or more first cameras arranged in relation to the face of a user; one or more second cameras arranged in relation to the eyes of the user; one or more microphones; a display assembly including at least one display; and at least one processor. The wearable device may be caused to: display an avatar on the basis of generating first data for expressing a facial expression of the avatar using the one or more first cameras, generating second data for expressing a gaze of the avatar using the one or more second cameras, and generating third data for expressing a shape of a mouth of the avatar using the one or more microphones; identify an event that causes a change in a scheme for displaying the avatar while the avatar is being displayed on the basis of generating the first data, generating the second data, and generating the third data; and stop at least one of generating the first data, generating the second data, or generating the third data in response to the event.

Classes IPC  ?

• G06F 3/0484 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p. ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs
• G06F 1/16 - Détails ou dispositions de structure
• G06F 3/00 - Dispositions d'entrée pour le transfert de données destinées à être traitées sous une forme maniable par le calculateurDispositions de sortie pour le transfert de données de l'unité de traitement à l'unité de sortie, p. ex. dispositions d'interface
• G06T 13/40 - Animation tridimensionnelle [3D] de personnages, p. ex. d’êtres humains, d’animaux ou d’êtres virtuels
• G06T 19/00 - Transformation de modèles ou d'images tridimensionnels [3D] pour infographie
• G06T 17/20 - Description filaire, p. ex. polygonalisation ou tessellation
• G06V 40/16 - Visages humains, p. ex. parties du visage, croquis ou expressions
• G02B 27/01 - Dispositifs d'affichage "tête haute"
• G01K 1/02 - Moyens d’indication ou d’enregistrement spécialement adaptés aux thermomètres
• H04W 4/80 - Services utilisant la communication de courte portée, p. ex. la communication en champ proche, l'identification par radiofréquence ou la communication à faible consommation d’énergie

Abrégé

The disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). Embodiments herein disclose methods and systems for performing efficient Hybrid Automatic Repeat Request (HARQ) decoding in Centralized-Radio Access Networks (C-RAN) systems, based on a decoding status predicted at a Remote Unit (RU) in a wireless network. Embodiments herein disclose a 1-bit feedback mechanism from the RU to a Distributed Unit (DU) to improve the power efficiency of operations at the DU. The RU predicts if a data packet received in the uplink from a UE is decodable or not, using an Effective SINR (ESINR) approach and intimates the same to the DU using a 1-bit feedback. The DU proceeds with the channel decoding operation based on the indication received.

Classes IPC  ?

• H04L 1/00 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue
• H04L 1/20 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue en utilisant un détecteur de la qualité du signal
• H04B 17/336 - Rapport signal/interférence ou rapport porteuse/interférence

Abrégé

The disclosed refrigerator comprises: a main body having storage compartments; a cooling part for cooling air in the storage compartments; and a heat dissipation part for dissipating the heat of the cooling part. The cooling part includes a Peltier device. The heat dissipation part includes a water jacket, a radiator, and a coolant flow path. The water jacket comes into contact with a heat dissipation surface of the Peltier device so as to allow the heat dissipated from the heat dissipation surface to be absorbed by a coolant. The radiator is disposed in the main body so as to be spaced apart from the cooling part. The radiator dissipates heat absorbed by the coolant in the water jacket to the outside of the main body. The coolant flow path circulates the coolant between the water jacket and the radiator.

Classes IPC  ?

• F25D 15/00 - Dispositifs associés à des machines frigorifiques, non couverts par les groupes ou , p. ex. les dispositifs mobiles non autonomes
• F25D 17/02 - Dispositions pour la circulation des fluides de refroidissementDispositions pour la circulation de gaz, p. ex. d'air, dans les enceintes refroidies pour la circulation des liquides, p. ex. de la saumure
• F25B 21/02 - Machines, installations ou systèmes utilisant des effets électriques ou magnétiques utilisant l'effet PeltierMachines, installations ou systèmes utilisant des effets électriques ou magnétiques utilisant l'effet Nernst-Ettinghausen
• F25B 47/02 - Cycles de dégivrage
• F28F 3/04 - Éléments ou leurs ensembles avec moyens pour augmenter la surface de transfert de chaleur, p. ex. avec des ailettes, avec des évidements, avec des ondulations les moyens faisant partie intégrante de l'élément
• F28D 21/00 - Appareils échangeurs de chaleur non couverts par l'un des groupes

Produits et services

Digital door locks; video projectors; cameras; electric sensors; battery chargers; rechargeable batteries; televisions; smartphones; wearable computers; smartwatches; smartglasses; ear buds; protective covers for smartphones; virtual reality headsets; augmented reality headsets; extended reality headsets; electronic pens for smartphones; computers; semiconductors.

Abrégé

A system includes a Visual See-Through (VST) pipeline circuit capable of processing image data. The VST pipeline circuit is embodied as a die. The VST pipeline circuit includes an Image Signal Processing (ISP) circuit and a Display Processing Unit (DPU) circuit coupled to the ISP circuit. The VST pipeline circuit includes a memory circuit coupled to the ISP circuit and to the DPU circuit. The memory circuit is configured to implement a plurality of buffers that facilitate low latency operation of the ISP circuit and the DPU circuit.

Classes IPC  ?

• G06T 1/20 - Architectures de processeursConfiguration de processeurs p. ex. configuration en pipeline
• G06T 1/60 - Gestion de mémoire

Abrégé

In a fingerprint enrollment method of a fingerprint smart card configured to communicate with a server and to enroll fingerprint information through a point of sale (POS) terminal, the method includes determining whether the fingerprint information is enrolled in the fingerprint smart card, performing a first authentication based on a user authenticator corresponding to the fingerprint smart card, in response to determining the fingerprint information is not enrolled in the fingerprint smart card, receiving the fingerprint information, in response to the first authentication being successfully completed, performing a second authentication based on the server and a personal identification number (PIN) code corresponding to the fingerprint smart card, storing the fingerprint information in the fingerprint smart card, in response to the second authentication being successfully completed, and omitting the first authentication and the second authentication in response to determining the fingerprint information is enrolled in the fingerprint smart card.

Classes IPC  ?

• G06Q 20/20 - Systèmes de réseaux présents sur les points de vente
• G06Q 20/40 - Autorisation, p. ex. identification du payeur ou du bénéficiaire, vérification des références du client ou du magasinExamen et approbation des payeurs, p. ex. contrôle des lignes de crédit ou des listes négatives

Abrégé

Provided is a solid-state imaging device including a pixel including a photoelectric converter configured to photoelectrically convert light to generate electric charge, a plurality of charge accumulators each configured to accumulate the electric charge, and a plurality of transfer controllers configured to respectively control transfer of the electric charge to the plurality of charge accumulators from the photoelectric converter, a converter configured to generate a digital value that is based on the amount of electric charge accumulated in the plurality of charge accumulators, an adder configured to add the generated digital value to a digital value previously stored in the memory, and a driver configured to control the plurality of transfer controllers to store the resulting value of the addition in the memory.

Classes IPC  ?

• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• G01S 7/4865 - Mesure du temps de retard, p. ex. mesure du temps de vol ou de l'heure d'arrivée ou détermination de la position exacte d'un pic
• H04N 25/76 - Capteurs adressés, p. ex. capteurs MOS ou CMOS
• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F

Abrégé

A method of forming an IC device includes: forming a sacrificial element in an epitaxial layer, the sacrificial element including a first portion and a second portion contacting the first portion; forming a transistor including a channel structure and a source/drain region on an upper surface of the epitaxial layer, wherein a portion of the epitaxial layer is between an upper surface of the second portion of the sacrificial element and the source/drain region; removing at least a portion of the epitaxial layer extending around the sacrificial element to expose a lower surface and sidewalls of the sacrificial element; forming an interlayer insulating layer surrounding the sacrificial element; replacing the sacrificial element with a power contact, the source/drain region contacting an upper surface of the power contact; and forming a power rail on a lower surface of the interlayer insulating layer that contacts a lower surface of the power contact.

Classes IPC  ?

• H01L 21/8238 - Transistors à effet de champ complémentaires, p.ex. CMOS
• H01L 27/092 - Transistors à effet de champ métal-isolant-semi-conducteur complémentaires
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
• H01L 29/786 - Transistors à couche mince

Abrégé

The present disclosure provides a semiconductor device with improved element performance and reliability. The semiconductor device includes a lower insulating layer, a fin-shaped insulating layer that is on the lower insulating layer and extends in a first direction, a field insulating layer that is on the lower insulating layer and extends in the first direction, a plurality of gate structures that are on the fin-shaped insulating layer and include a gate electrode intersecting the fin-shaped insulating layer, a source/drain region that is on the fin-shaped insulating layer and is between the gate structures, and an active pattern that is on the fin-shaped insulating layer and penetrates the gate electrode and is electrically connected to the source/drain region, where the gate electrode extends in a second direction intersecting the first direction.

Classes IPC  ?

• H10D 30/62 - Transistors à effet de champ à ailettes [FinFET]
• H10D 30/67 - Transistors à couche mince [TFT]
• H10D 62/10 - Formes, dimensions relatives ou dispositions des régions des corps semi-conducteursFormes des corps semi-conducteurs
• H10D 62/13 - Régions semi-conductrices connectées à des électrodes transportant le courant à redresser, amplifier ou commuter, p. ex. régions de source ou de drain
• H10D 62/17 - Régions semi-conductrices connectées à des électrodes ne transportant pas de courant à redresser, amplifier ou commuter, p. ex. régions de canal
• H10D 86/01 - Fabrication ou traitement

Abrégé

A filter package is provided. The filter package includes a plurality of metal layers stacked in a vertical direction, a plurality of acoustic wave filters connected in parallel, the plurality of acoustic wave filters being located at one of the plurality of metal layers, power dividing and combining components connected with the plurality of acoustic wave filters, and heat dissipating components.

Classes IPC  ?

• H03H 9/08 - Supports avec moyens pour réguler la température
• H03H 9/00 - Réseaux comprenant des éléments électromécaniques ou électro-acoustiquesRésonateurs électromécaniques
• H03H 9/74 - Réseaux à plusieurs accès pour connecter plusieurs sources ou charges, fonctionnant sur la même fréquence ou dans la même bande de fréquence, à une charge ou à une source commune

Abrégé

Disclosed are a three-dimensional flash memory, to which a GSL-removed structure is applied, and an operating method thereof. Disclosed are a three-dimensional flash memory, to which a GSL-removed structure is applied, and an operating method thereof. According to an embodiment, the three-dimensional flash memory comprises: a plurality of word lines which are formed extending in a horizontal direction on a substrate and are sequentially stacked; and a plurality of strings passing through the plurality of word lines and formed extending in one direction on the substrate, wherein each of the plurality of strings comprises a channel layer formed extending in the one direction and a charge storage layer formed extending in the one direction to surround the channel layer, and the channel layer and the charge storage layer constitute a plurality of memory cells corresponding to the plurality of word lines, and the channel layer comprises a back gate formed extending in the one direction while at least a part thereof is surrounded by the channel layer and an insulation film formed extending in the one direction between the back gate and the channel layer, and each of the plurality of strings includes the back gate. Accordingly, the three-dimensional flash memory has a GSL-removed structure.

Classes IPC  ?

• G11C 16/34 - Détermination de l'état de programmation, p. ex. de la tension de seuil, de la surprogrammation ou de la sousprogrammation, de la rétention
• G11C 11/418 - Circuits d'adressage
• G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
• G11C 16/10 - Circuits de programmation ou d'entrée de données
• G11C 16/16 - Circuits pour effacer électriquement, p. ex. circuits de commutation de la tension d'effacement pour effacer des blocs, p. ex. des réseaux, des mots, des groupes
• G11C 16/26 - Circuits de détection ou de lectureCircuits de sortie de données
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U

Abrégé

An image sensor may include a semiconductor substrate including a plurality of unit pixels, an anti-reflection layer on the semiconductor substrate, color filters on the anti-reflection layer, grid structures disposed between adjacent color filters among the color filters, and a grid gap defined in each of the grid structures. The grid structures may include a first grid structure including an insulating fence and a second grid structure including an insulating fence, the second grid structure having a width larger than the first grid structure. The first grid structure may be spaced apart from the second grid structure, and the grid gap may be defined as a space that is extended from the insulating fence to the anti-reflection layer.

Classes IPC  ?

• H10F 39/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément couvert par le groupe , p. ex. détecteurs de rayonnement comportant une matrice de photodiodes
• H10F 39/18 - Capteurs d’images à semi-conducteurs d’oxyde de métal complémentaire [CMOS]Capteurs d’images à matrice de photodiodes

Abrégé

A semiconductor device includes a first substrate, a plurality of gate electrodes stacked on an upper surface of the first substrate in a vertical direction, the plurality of gate electrodes being apart from one another in the vertical direction, a channel structure passing through the plurality of gate electrodes, a second substrate disposed between the first substrate and a lowermost gate electrode of the plurality of gate electrodes, the second substrate including a first surface and a second surface opposite to the first surface, a buried pattern passing through the second substrate, and a vertical structure passing through the buried pattern, wherein the buried pattern includes a dielectric material.

Classes IPC  ?

• H10B 41/41 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région de circuit périphérique de régions de mémoire comprenant un transistor de sélection de cellules, p. ex. NON-ET
• G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
• H10B 41/10 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la configuration vue du dessus
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 43/10 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la configuration vue du dessus
• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 43/40 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région de circuit périphérique

Abrégé

An electronic device may include a frame defining at least a portion of a side surface of the electronic device, and a support portion on an inner side of the frame. The frame may include a corner portion defining a portion of the side surface and including a first metal, and a side portion defining another portion of the side surface and including a clad structure in which an outer portion including the first metal and an inner portion including a second metal are joined. The support portion may be connected to the corner portion and the side portion by welding.

Classes IPC  ?

• H05K 5/02 - Enveloppes, coffrets ou tiroirs pour appareils électriques Détails

Abrégé

Methods and nodes for delay management in a communication system are provided. A method performed by a first node in a communication system is provided. The method includes reporting a first delay parameter to a second node, wherein the first delay parameter is related to beamforming methods supported by the first node, receiving first configuration information related to delay management from the second node, and performing delay management based on the first configuration information.

Classes IPC  ?

• H04B 7/06 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station d'émission
• H04B 17/364 - Profils de temps de propagation

Abrégé

A semiconductor device may include a source structure, gate electrodes on the source structure, spaced apart from each other in a first direction perpendicular to an upper surface of the source structure, extending by different lengths in a second direction perpendicular to the first direction, and defining a stepped structure, and a pad insulating region on a portion of the source structure and being outside of the gate electrodes in the second direction, wherein the source structure has a bent upper surface covering a side surface in the second direction and a lower surface of the pad insulating region.

Classes IPC  ?

• H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
• H10B 41/35 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire avec un transistor de sélection de cellules, p. ex. NON-ET
• H10B 43/35 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire avec transistors de sélection de cellules, p. ex. NON-ET

Abrégé

A method for processing a workload includes: predicting system performance according to mixed use of a first memory and a second memory based on a performance monitoring result of a processor; determining a memory usage policy regarding the mixed use of the first memory and the second memory based on the system performance; and processing the workload using the first memory and the second memory according to the memory usage policy.

Classes IPC  ?

• G06F 9/50 - Allocation de ressources, p. ex. de l'unité centrale de traitement [UCT]
• G06F 11/34 - Enregistrement ou évaluation statistique de l'activité du calculateur, p. ex. des interruptions ou des opérations d'entrée–sortie

Abrégé

Provided are systems, methods, and apparatuses for systems and methods of multi-port storage devices. In one or more examples, the systems, devices, and methods including configuring a storage device with at least a first port, a second port, and a third port; establishing a first connection between a first processing unit and the storage device via the third port that is different from a second connection to the storage device via the first port or a third connection to the storage device via the second port; performing a data operation on the storage device based on the first connection; and maintaining a first quality of service for the first connection different from a second quality of service for the second connection.

Classes IPC  ?

• G06F 3/06 - Entrée numérique à partir de, ou sortie numérique vers des supports d'enregistrement

Abrégé

An electronic device is provided. The electronic device includes a communication circuit, memory, comprising one or more storage media, storing instructions, and at least one processor, wherein the instructions, when executed by the at least one processor individually or collectively, cause the electronic device to search for an external electronic device via a peripheral device search, and determine whether the external electronic device belongs to the same user as that of the electronic device, or is an indoor device, based on a result of the determination, display a pop-up display to onboard the external electronic device to a cloud, identify the connection type of the external electronic device in response to a user input on the pop-up display, and determine location information of the external electronic device based on the connection type of the external electronic device.

Classes IPC  ?

• H04W 4/029 - Services de gestion ou de suivi basés sur la localisation
• H04W 8/00 - Gestion de données relatives au réseau
• H04W 84/12 - Réseaux locaux sans fil [WLAN Wireless Local Area Network]

Abrégé

According to present disclosure, there is provided a method for repetitive transmitting physical uplink shared channel (PUSCH) to a multiple transmission and reception point (mTRP) performed by a user equipment (UE). The method comprises receiving, from a base station, downlink control information (DCI) including phase tracking reference signal (PTRS)-demodulation reference signal (DMRS) association information; based on the PTRS-DMRS association information, determining PTRS port for each sounding reference signal (SRS) resource set among a plurality of SRS resource set; and based on the determined PTRS port, transmitting PTRS.

Classes IPC  ?

• H04L 1/08 - Dispositions pour détecter ou empêcher les erreurs dans l'information reçue par émission répétée, p. ex. système Verdan
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 56/00 - Dispositions de synchronisation
• H04W 72/0446 - Ressources du domaine temporel, p. ex. créneaux ou trames
• H04W 72/0453 - Ressources du domaine fréquentiel, p. ex. porteuses dans des AMDF [FDMA]
• H04W 72/1268 - Jumelage du trafic à la planification, p. ex. affectation planifiée ou multiplexage de flux de flux de données en liaison ascendante
• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c.-à-d. en direction du terminal

Abrégé

A system and methods are disclosed for reducing Rx/Tx timing errors in a wireless network for latency of positioning measurements. Additionally, a system and methods are disclosed for increasing positioning accuracy by mitigating NLOS errors and/or by performing two-stage beam sweeping for DL-AoD. Further, a system and methods are disclosed for performing M-sample positioning measurements to improve latency reporting in connection with positioning reporting.

Classes IPC  ?

• G01S 5/10 - Position du récepteur obtenue par coordination de plusieurs lignes de position définies par des mesures de différence de parcours
• G01S 11/06 - Systèmes pour déterminer la distance ou la vitesse sans utiliser la réflexion ou la reradiation utilisant les ondes radioélectriques utilisant des mesures d'intensité
• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 56/00 - Dispositions de synchronisation
• H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p. ex. gestion de la mobilité

Abrégé

Methods and apparatuses for configuration of unified transmission configuration indicator (TCI) state in a wireless communication system. A method of operating a user equipment (UE) includes receiving configuration information for a list of TCI states for downlink (DL) or joint TCI states, receiving configuration information for a control resource set (CORESET), receiving configuration information for a search space set associated with the CORESET, and receiving an indication of a TCI state for the list of TCI states. The method further includes identifying a type of the search space set and an index of the CORESET, applying the indicated TCI state to a physical downlink control channel (PDCCH) in the CORESET based on (i) the identified type of the search space set and the identified index of the CORESET or (ii) additional configuration information, and receiving the PDCCH based on quasi-co-location properties corresponding to the indicated TCI state.

Classes IPC  ?

• H04L 5/00 - Dispositions destinées à permettre l'usage multiple de la voie de transmission
• H04W 72/23 - Canaux de commande ou signalisation pour la gestion des ressources dans le sens descendant de la liaison sans fil, c.-à-d. en direction du terminal

Abrégé

A semiconductor device may include an active pattern on a substrate, a lower channel pattern on the active pattern and including first and second lower semiconductor patterns, an upper channel pattern on the lower channel pattern and including first and second upper semiconductor patterns, a pair of lower source/drain patterns on opposite sides of the lower channel pattern and a pair of upper source/drain patterns on opposite sides of the upper channel pattern, and a gate electrode surrounding the lower and upper channel patterns. The gate electrode may include a first upper portion between the first and second upper semiconductor patterns, and a first lower portion between the first and second lower semiconductor patterns. Each semiconductor pattern may include a first recess part having a first recess region on a top surface thereof, and a first protrusion part protruding from a bottom surface of the first recess part.

Classes IPC  ?

• H10D 84/85 - Transistors IGFET complémentaires, p. ex. CMOS
• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H10D 30/01 - Fabrication ou traitement
• H10D 30/43 - Transistors FET ayant des canaux à gaz de porteurs de charge de dimension nulle [0D], à une dimension [1D] ou à deux dimensions [2D] ayant des canaux à gaz de porteurs de charge à une dimension, p. ex. transistors FET à fil quantique ou transistors ayant des canaux à confinement quantique à une dimension
• H10D 30/67 - Transistors à couche mince [TFT]
• H10D 62/10 - Formes, dimensions relatives ou dispositions des régions des corps semi-conducteursFormes des corps semi-conducteurs
• H10D 64/01 - Fabrication ou traitement
• H10D 84/01 - Fabrication ou traitement
• H10D 84/03 - Fabrication ou traitement caractérisés par l'utilisation de technologies basées sur les matériaux utilisant une technologie du groupe IV, p. ex. technologie au silicium ou au carbure de silicium [SiC]
• H10D 88/00 - Dispositifs intégrés tridimensionnels [3D]

Abrégé

A display apparatus includes a circuit board including a driving circuit, a pixel array on the circuit board and including unit pixels, each of the unit pixels including a plurality of subpixels, and a plurality of microlenses respectively on the plurality of subpixels, where the pixel array further includes a plurality of light-emitting diode (LED) cells each respectively including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer that are sequentially stacked, a passivation layer on side surfaces and lower surfaces of the plurality of LED cells, a reflective layer on the passivation layer, the reflective layer configured to emit light toward upper surfaces of the plurality of LED cells, a gap-fill insulating layer on the side surfaces and lower surfaces of the plurality of LED cells, and a first connection electrode on the gap-fill insulating layer, and connected to the first conductivity-type semiconductor layers.

Classes IPC  ?

• H10H 29/80 - Détails de structure
• H10H 20/812 - Corps ayant des structures ou des superréseaux à effet quantique, p. ex. jonctions tunnel au sein des régions électroluminescentes, p. ex. structures de confinement quantique
• H10H 29/34 - Affichages LED à matrice active caractérisés par la géométrie ou l’agencement des sous-pixels à l’intérieur d’un pixel, p. ex. la disposition relative des sous-pixels RGB
• H10H 29/39 - Connexion des électrodes de pixel aux transistors de commande
• H10H 29/41 - Couches isolantes formées entre les transistors de commande et les LED
• H10H 29/855 - Moyens de mise en forme du champ optique, p. ex. lentilles

Abrégé

A semiconductor device includes a semiconductor chip including a semiconductor integrated circuit; a cooling block including a first shower block and a second shower block stacked on the first shower block such that the first shower block and the second shower block define a cavity in which the at least one semiconductor chip is accommodated; and a printed circuit board, wherein the at least one cooling block is on the printed circuit board. The first shower block includes: first nozzles configured to spray a cooling liquid into the cavity toward a top surface of the semiconductor chip; and first outlets that receive the cooling liquid from the cavity, and the second shower block includes: second nozzles configured to spray the cooling liquid into the cavity toward a bottom surface of the semiconductor chip; and second outlets that receive the cooling liquid from the cavity.

Classes IPC  ?

• H01L 23/473 - Dispositions pour le refroidissement, le chauffage, la ventilation ou la compensation de la température impliquant le transfert de chaleur par des fluides en circulation par une circulation de liquides
• H01L 23/04 - ConteneursScellements caractérisés par la forme
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe

Abrégé

An electronic device is provided. The electronic device includes a housing configured to be movable between a first state and a second state, a first radio frequency (RF) circuit comprising a first amplifier, a second RF circuit comprising a second amplifier, memory storing one or more computer programs, and one or more processors communicatively coupled to the first RF circuit, the second RF circuit, and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors individually or collectively, cause the electronic device to identify a transmission mode currently set among a plurality of transmission modes, in a first transmission mode of the plurality of transmission modes, transmit first signals corresponding to first data through the first amplifier, and concurrently transmit second signals corresponding to second data through the second amplifier, wherein the first data is different from the second data, in a second transmission mode of the plurality of transmission modes, transmit the first signals through the first amplifier, and concurrently transmit the second signals through the second amplifier, wherein the first signals and the second signals correspond to same data, identify a state of the housing among the first state and the second state, based on the transmission mode currently set and the state of the housing, identify a first antenna, selected from a plurality of antennas, for transmitting the first signals, and identify a second antenna, selected from the plurality of antennas, for transmitting the second signals, and transmit the first signals through the first amplifier and the first antenna, and concurrently transmit the second signals through the second amplifier and the second antenna.

Classes IPC  ?

• H04B 1/00 - Détails des systèmes de transmission, non couverts par l'un des groupes Détails des systèmes de transmission non caractérisés par le milieu utilisé pour la transmission
• H04B 1/03 - Détails de structure, p. ex. boîtiers, enveloppes
• H04B 1/401 - Circuits pour le choix ou l’indication du mode de fonctionnement