A method for manufacturing a bonded semiconductor wafer includes growing an etching stop layer on a starting substrate, producing an epitaxial wafer by growing an epitaxial layer having a compound semiconductor functional layer on the etching stop layer, forming an isolation groove to form a device in the compound semiconductor functional layer by a dry etching method, performing roughening etching on a surface of the epitaxial layer, being the opposite side of the starting substrate, making surface roughness thereon to have 0.1 μm or more in an arithmetic average roughness Ra, bonding a visible light-transmissive substrate to the surface opposite to the starting substrate of the epitaxial wafer via visible light-transmissive thermosetting bonding material, and removing the starting substrate. This method for manufacturing the bonded semiconductor wafer in which a micro-LED can be made with a suppressed generation of luminance decrease when a micro-LED device is produced on the substrate.
The present invention is a nitride semiconductor substrate for high frequency, which includes an SOI substrate in which a single crystal silicon thin film is formed on a single crystal silicon substrate via a silicon oxide layer, and a nitride semiconductor layer including a GaN layer formed on the SOI substrate; in which the single crystal silicon thin film contains nitrogen at a concentration of 2.0×1014 atoms/cm3 or more and has a resistivity of 100 Ωcm or more, the single crystal silicon substrate has a resistivity of 50 mΩcm or less, and the silicon oxide layer has a thickness of 10 to 400 nm. This can provide the nitride semiconductor substrate in which the nitride semiconductor layer is grown on the SOI substrate for manufacturing devices for high frequency, and the nitride semiconductor substrate with suppressed plastic deformation.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
The present invention is a production method for a GaN epitaxial film. The production method is characterized by including a preparation procedure for preparing a support substrate that has a thickness of less than 1 mm and is formed by sealing a core that has a diameter of at least 150 mm and comprises a nitride ceramic with a sealing layer, a substrate production procedure for layering, in order, a flattening layer and a seed crystal layer that comprises an SiC single crystal on the support substrate to obtain an epitaxial growth substrate, and an epitaxial procedure for growing a GaN epitaxial film that has a thickness of at least 7 μm on the epitaxial growth substrate to produce a GaN epitaxial film that has a dislocation density of no more than 1.0×106/cm2. The present invention thereby provides a production method for a GaN epitaxial film that makes it possible to produce a GaN thick film that has a large diameter but has no warpage or cracks and has a dislocation density of no more than 1.0×106/cm2 by means of a simple process at low cost.
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
4.
HETEROEPITAXIAL WAFER AND METHOD FOR MANUFACTURING SAME
The present invention provides a heteroepitaxial wafer which is obtained by epitaxially growing a silicon germanium layer on a silicon single crystal substrate and epitaxially growing a silicon layer on the silicon germanium layer, and which is characterized in that the relationship between the film thickness (film thickness) of the silicon germanium layer and the germanium concentration (Ge (%)) of the silicon germanium layer satisfies [film thickness (nm)] < 1.4 × 107× [Ge (%)]-4.5. As a result, provided is a heteroepitaxial wafer free of trapped metallic impurities.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/336 - Transistors à effet de champ à grille isolée
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
The present invention is a device for manufacturing a silicon single crystal by the CZ method, the device comprising: a chamber in which a quartz crucible and a heater for heating and melting a silicon polycrystalline raw material in the quartz crucible to obtain a raw material melt are disposed; a gas introduction pipe; and a gas exhaust pipe. The gas exhaust pipe has a plurality of pipes each having a joint part, and a pipe clamp that can be liquid-cooled by cooling water passing therethrough. The joint parts of the plurality of pipes face each other with a sealing material interposed therebetween, and the plurality of pipes are connected to each other by the facing joint parts being sandwiched by the pipe clamp. The sealing material between the joint parts can be cooled by the liquid cooling of the pipe clamp. As a result, a CZ silicon single crystal manufacturing device is provided in which the gas exhaust pipe is easy to handle and the deterioration of the sealing material between the pipes can be prevented.
The present invention provides a method for producing a heteroepitaxial wafer heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method including: with using a reduced-pressure CVD apparatus, a first step of removing a native oxide film on a surface of the single crystal silicon substrate by hydrogen baking; a second step of nucleation of SiC on the single crystal silicon substrate on a condition of pressure of 13332 Pa or lower and a temperature of 300° C. or higher and 950° C. or lower and a third step of forming the 3C-SiC single crystal film by growing a SiC single crystal on condition of pressure of 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon into the reduced-pressure CVD apparatus. This provides the method for producing the heteroepitaxial wafer that can efficiently grow high-quality 3C-SiC single crystal film heteroepitaxially on the single crystal silicon substrate.
The present invention provides a method for manufacturing an SiC substrate 100, the method being characterized by comprising: a bonding step in which a 3C-SiC layer 1a of a growth substrate 21 that is obtained by growing the 3C-SiC layer 1a on a silicon substrate 1 is bonded to a poly SiC substrate, which is a support substrate 3, thereby obtaining a bonded substrate 10; a removal step in which the silicon substrate 1 is removed from the bonded substrate 10; and a heat treatment step in which the bonded substrate 10 after the removal step is further subjected to a heat treatment so as to cause a phase transition of the 3C-SiC layer 1a, thereby obtaining an SiC substrate 100 which has a SiC layer 1b having a plane orientation that is different from the plane orientation before the heat treatment. Consequently, there is provided a method for manufacturing an SiC substrate that is capable of achieving both a larger diameter and various types of SiC.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/31 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour former des couches isolantes en surface, p.ex. pour masquer ou en utilisant des techniques photolithographiques; Post-traitement de ces couches; Emploi de matériaux spécifiés pour ces couches
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/265 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée produisant une implantation d'ions
The present invention pertains to a resin applying method for applying a resin to a wafer, the method being characterized by comprising: preparing a wafer having a first main surface and a second main surface which is the reverse side of the first main surface; holding the second main surface of the wafer by a holding means; supplying a resin at the position opposite to the first main surface of the wafer; measuring the temperature of the resin or around the resin; referring to data of temperatures and press speeds, which are acquired in advance and at which the thickness of the resin and the press load each become a prescribed value, and selecting a press speed corresponding to the measured temperature; driving the holding means at the selected press speed to press and spread the resin on the first main surface of the wafer; stopping the holding means at a timing when the press load reaches the prescribed value; and curing the resin to form a flattened resin layer. As a result, provided are a method for applying a resin to a wafer, in which the resin thickness variation is suppressed, and a method for manufacturing a wafer, in which the wafer shape variation after grinding or after polishing is suppressed.
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
B24B 7/00 - Machines ou dispositifs pour meuler les surfaces planes des pièces, y compris ceux pour le polissage des surfaces planes en verre; Accessoires à cet effet
B24B 41/06 - Supports de pièces, p.ex. lunettes réglables
10.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING HYBRID IC, AND NITRIDE SEMICONDUCTOR SUBSTRATE
The present invention is a method for manufacturing a nitride semiconductor substrate that comprises a group III nitride layer including a group III nitride underlayer and a gallium nitride epitaxial layer on a Si substrate, the method comprising: a pre-flow step of supplying a gas containing an Al raw material and not containing a nitrogen raw material on a Si substrate that is heated to 1000°C or higher, using a Si 110 substrate; an underlayer formation step of supplying a gas containing a group III raw material and a nitrogen raw material to form the group III nitride underlayer on the Si substrate; and an epitaxial layer formation step of supplying a gas containing a Ga raw material and a nitrogen raw material to form the gallium nitride epitaxial layer. As a result, the present invention provides a method for manufacturing a nitride semiconductor substrate in which a Si 110 substrate is used, said nitride semiconductor substrate comprising a gallium nitride epitaxial layer having excellent surface morphology.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
11.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR WAFER, AND NITRIDE SEMICONDUCTOR WAFER
A method for manufacturing a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate includes: a step of forming the nitride semiconductor film on the silicon single-crystal substrate; and a step of irradiating the silicon single-crystal substrate with electron beam so that the silicon single-crystal substrate has a higher resistivity than a resistivity before the irradiation, wherein a substrate doped with nitrogen at a concentration of 5×1014 atoms/cm3 or more and 5×1016 atoms/cm3 or less is used as the silicon single-crystal substrate. A method for manufacturing a nitride semiconductor wafer having a nitride semiconductor film grown on a silicon single-crystal substrate, wherein the method makes it possible that a silicon single-crystal substrate having been irradiated with electron beam and thereby has an increased resistivity is prevented from recovering and having a lower resistivity during the epitaxial growth or other thermal treatment steps.
The present invention provides a cylindrical grinding machine which is capable of supporting a crystal rod regardless of the presence or absence of a conical cone portion and a tail portion at the two ends of the crystal rod, and which additionally comprises a discriminator capable of automatically discriminating between the presence or absence of the cone portion, etc., and a controller in which set values are registered separately depending on whether the cone portion, etc., are present or absent during traverse grinding, for a clamping force with which the crystal rod is clamped by a pair of support units and a maximum griding allowance per operation of a grinding unit, wherein the controller automatically selects a grinding recipe that includes the set values of the clamping force and the maximum griding allowance per operation, corresponding to the presence or absence of the cone portion, etc., as discriminated automatically by the discriminator, and traverse grinding can be automatically performed on the basis of the grinding recipe. The present invention thereby provides a cylindrical grinding machine and a cylindrical grinding method with which, when performing traverse grinding of a crystal rod, grinding can be performed efficiently and at low cost, and with a stable quality by preventing the occurrence of positional displacement and breakage of the crystal rod.
B24B 5/02 - Machines ou dispositifs pour meuler des surfaces de révolution des pièces, y compris ceux qui meulent également des surfaces planes adjacentes; Accessoires à cet effet possédant des pointes ou des mandrins pour maintenir la pièce
The present invention is a high mobility substrate characterized by comprising a semiconductor substrate, a first δ-doped layer having a band gap larger than that of the semiconductor substrate on the semiconductor substrate, a thin film of the same material as the semiconductor substrate on the first δ-doped layer, and a second δ-doped layer having a band gap larger than that of the semiconductor substrate on the thin film, the high mobility substrate being structured such that the thin film is sandwiched between the first δ-doped layer and the second δ-doped layer. In this way, a high mobility substrate and a method for manufacturing a high mobility substrate are provided that are practical and make uniform creation on the entire surface of a substrate having a large area possible, while achieving high mobility.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/316 - Couches inorganiques composées d'oxydes, ou d'oxydes vitreux, ou de verres à base d'oxyde
An epitaxial wafer production method, including forming a gettering epitaxial film containing silicon and carbon on a silicon substrate under reduced pressure using a reduced pressure CVD apparatus, and forming a silicon epitaxial film on the gettering epitaxial film. This provides a low-cost, low-contamination carbon-containing epitaxial wafer, and a method for producing such an epitaxial wafer.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p.ex. pour produire des défectuosités internes
H01L 29/36 - Corps semi-conducteurs caractérisés par la concentration ou la distribution des impuretés
15.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SAME
A nitride semiconductor substrate including a growth substrate, and a nitride semiconductor thin film formed on the growth substrate, in which the nitride semiconductor thin film includes an AlN layer formed on the growth substrate and a nitride semiconductor layer formed on the AlN layer, and an average concentration of Y (Yttrium) in the AlN layer is 1E15 atoms/cm3 or higher and 5E19 atoms/cm3 or lower. Thereby, a nitride semiconductor substrate is capable of improving the surface morphology of an AlN layer, thereby suppressing the generation of pits on the surface of a nitride semiconductor epitaxial wafer, and a method manufactures the nitride semiconductor substrate.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
H01L 29/205 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV comprenant plusieurs composés dans différentes régions semi-conductrices
16.
METHOD FOR PRODUCING JOINED SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention is a method for producing a joined substrate by directly joining the surfaces of two substrates to each other, said method comprising: a step for preparing two substrates, with an average surface roughness Ra and surface free energy of the surfaces to be directly joined being used as criteria; and a step for directly joining the two substrates prepared. In the step for preparing the two substrates, the substrates are prepared such that the surfaces to be directly joined have an average surface roughness Ra of 1 nm or less and such that a contact angle between water and the surfaces to be directly joined, which serves as an index of the surface free energy, is not more than 70°. The present invention thus provides a joined substrate production method that makes it possible to reduce the occurrence of joining defects in a joining technique.
A bonded wafer, wherein an epitaxial wafer having a heterojunction structure, in which a material with a different thermal expansion coefficient is epitaxially laminated on a growth substrate, and a support substrate are bonded via a bonding material, wherein the bonding material has an average thickness of 0.01 μm or more and 0.6 μm or less. As a result, provided is a bonded wafer and a method for producing the same that improves the film thickness distribution of the bonding material caused by the warpage of the semiconductor epitaxial substrate and the warpage that changes with thermal changes when the warped semiconductor epitaxial substrate and the support substrate are bonded together using the bonding material.
H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
B32B 7/12 - Liaison entre couches utilisant des adhésifs interposés ou des matériaux interposés ayant des propriétés adhésives
B32B 9/04 - Produits stratifiés composés essentiellement d'une substance particulière non couverte par les groupes comprenant une telle substance comme seul composant ou composant principal d'une couche adjacente à une autre couche d'une substance spécifique
18.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a substrate for film formation made of single-crystal silicon, in which a silicon nitride film is formed on an peripheral portion of the substrate for film formation, an AlN film is formed on the substrate for film formation and on the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film. A nitride semiconductor substrate without a reaction mark or a polycrystal growth portion on an edge portion when an AlN layer is epitaxially grown on a silicon substrate, and a GaN or AlGaN layers are epitaxially grown on top of that; and a method for manufacturing the nitride semiconductor substrate.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
Thus, provided is a method of manufacturing a compound semiconductor bonded substrate having an improved degree of freedom in designing a device or a device system.
H01L 21/18 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges les dispositifs ayant des corps semi-conducteurs comprenant des éléments du groupe IV de la classification périodique, ou des composés AIIIBV, avec ou sans impuretés, p.ex. des matériaux de dopage
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 23/14 - Supports, p.ex. substrats isolants non amovibles caractérisés par le matériau ou par ses propriétés électriques
20.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor is formed on a substrate for film formation includes: (1) subjecting a substrate for film formation made of single-crystal silicon to heat treatment under a nitrogen atmosphere to form a silicon nitride film on the substrate for film formation, (2) growing an AlN film on the silicon nitride film, and (3) growing a GaN film, an AlGaN film, or both on the AlN film. A method for manufacturing a nitride semiconductor substrate can prevent diffusion of Al to the high-resistance single-crystal silicon substrate when the AlN layer is epitaxially grown on the high-resistance single-crystal silicon substrate, and the GaN or the AlGaN layer is epitaxially grown on top of that.
C30B 29/68 - Cristaux avec une structure multicouche, p.ex. superréseaux
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
21.
NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR
A nitride semiconductor substrate includes: a silicon single-crystal substrate; and a nitride semiconductor thin film formed on the silicon single-crystal substrate, wherein the silicon single-crystal substrate has a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less. This provides a nitride semiconductor substrate resistant against plastic deformation and a manufacturing method therefor.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
A temporarily bonded wafer in which an epitaxial functional layer having two or more electrodes with different polarities on one surface and a support substrate are temporarily bonded, in which the surface having the electrodes of the epitaxial functional layer and the support substrate are temporarily bonded via an uncured thermosetting bonding material. A resulting technique reduces bonding failure and delamination failure after removing the substrate after a bonding process, improves the yield, and easily removes the temporary support substrate.
H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
H01L 33/32 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique contenant de l'azote
H01L 33/36 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les électrodes
The present invention is a polishing cloth cleaning method in which, in a wafer polishing machine having a surface plate, a horn-type ultrasonic wave generation device is used to clean the inside of a polishing cloth attached to the surface plate by transmitting ultrasonic waves to the inside of the polishing cloth while supplying a cleaning liquid such that a water seal is formed between the polishing cloth and the tip end of a horn, wherein the amplitude of the ultrasonic waves is 10-40 μm. The present invention thereby provides a cleaning method that cleans the inside of the polishing cloth without damaging the surface of the polishing cloth and that clears clogging caused by accumulated matter inside the polishing cloth.
B24B 53/017 - Dispositifs ou moyens pour dresser, nettoyer ou remettre en état les outils de rodage
B24B 37/08 - Machines ou dispositifs de rodage; Accessoires conçus pour travailler les surfaces planes caractérisés par le déplacement de la pièce ou de l'outil de rodage pour un rodage double face
B24B 37/24 - Tampons de rodage pour travailler les surfaces planes caractérisés par la composition ou les propriétés des matériaux du tampon
The present invention provides a method for producing a silicon single crystal by a CZ method using a cusp magnetic field formed by an upper coil and a lower coil provided in a pulling furnace, the method includes seeding by bringing a seed crystal into contact with a silicon melt, and pulling up of a straight body after enlarging a diameter of the silicon single crystal, in which the seeding is performed with a magnetic field minimum plane position on a central axis of the pulling furnace as a first position below a surface of the silicon melt, before proceeding to the pulling up of the straight body, the magnetic field minimum plane position on the central axis of the pulling furnace is moved to a second position above the first position, the pulling up of the straight body is performed with the magnetic field minimum plane position on the central axis of the pulling furnace as the second position. This provides the method for producing the silicon single crystal that efficiently produces the single crystal having low oxygen concentration and excellent in-plane distribution with an improved success rate of the seeding.
C30B 30/04 - Production de monocristaux ou de matériaux polycristallins homogènes de structure déterminée, caractérisée par l'action de champs électriques ou magnétiques, de l'énergie ondulatoire ou d'autres conditions physiques spécifiques en utilisant des champs magnétiques
25.
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
The present invention provides a method for manufacturing a semiconductor substrate, the method comprising: an ion implantation step in which ions of at least one of silicon, carbon, and oxygen are implanted into the surface of a 4H-SiC substrate, and an amorphous layer in which silicon and carbon have been amorphized is formed in the 4H-SiC substrate; a joining step in which the 4H-SiC substrate that has been subjected to the ion implantation step and another supporting substrate are joined to each other with a thin film interposed therebetween so as to obtain a joined substrate; a separation step in which the 4H-SiC substrate is separated from the joined substrate at the amorphous layer so as to separate the joined substrate into a bonded substrate in which the surface layer of the 4H-SiC substrate is transferred onto the supporting substrate and a separated substrate that is the 4H-SiC substrate left after the separation of the surface layer; an etching step in which the separation surface of at least one of the bonded substrate and the separated substrate after the separation step is subjected to plasma etching; and an epitaxial step in which at least one of the bonded substrate and the separated substrate is subjected to epitaxial growth. As a result, the present invention provides a method for manufacturing a semiconductor substrate, with which it is possible to manufacture a semiconductor substrate of higher quality at lower cost.
The present invention is a clean room including a stocker area in which an article management storage is installed, in which the article management storage includes an upper opening part and a lower flow-out port configured to adjust the aperture ratio, a ceiling of the stocker area includes an eyelid and an air outlet port, the upper opening part of the article management storage and the air outlet port are connected to each other so as to be surrounded by the eyelid, and the clean room is configured that air supplied from the air outlet port is directly supplied into the article management storage through the upper opening part and is discharged from the lower flow-out port. This can provide the clean room that can keep the inside of the article management storage clean with almost no additional cost and without reducing the storing volume in the article management storage.
H01L 21/677 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le transport, p.ex. entre différents postes de travail
F24F 3/167 - Salles blanches, c. à d. enceintes closes dans lesquelles un flux uniforme d’air filtré est distribué
F24F 13/06 - Bouches pour diriger ou distribuer l'air dans des pièces ou enceintes, p.ex. diffuseur d'air de plafond
27.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate including: a composite substrate with multiple layers stacked, a silicon oxide layer or a TEOS layer having a central flat surface and a side surface around the flat surface and stacked on the composite substrate; a single crystal silicon layer stacked on the silicon oxide layer or the TEOS layer, and a nitride semiconductor thin film deposited on the single crystal silicon layer, wherein the entire central flat surface of the silicon oxide layer or the TEOS layer is covered with the single crystal silicon layer.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
28.
EPITAXIAL WAFER, SOI WAFER, AND METHOD FOR MANUFACTURING SAME
The present invention pertains to an epitaxial wafer having a silicon epitaxial film on a silicon single-crystalline substrate having a resistivity of 10-5000 Ω·cm, wherein the carbon atom concentration in the silicon epitaxial film is at least 5×1017atoms/cm3and less than 2×1019atoms/cm3, and carbon defects are formed in the silicon epitaxial film. Accordingly, an epitaxial wafer and an SOI wafer and a method for manufacturing same are provided, wherein the wafers can be manufactured with a small number of processes and easy processing processes without using a high-resistivity substrate and harmonics are more reliably reduced.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p.ex. recuit, frittage
29.
SUBSTRATE FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
The present invention is a substrate for a semiconductor device, including: a high-resistant silicon single crystal substrate having a resistivity of 100 Ω·cm or more; a first buffer layer composed of an AlN layer and formed on the high-resistant silicon single crystal substrate; and a nitride semiconductor layer provided on the first buffer layer, wherein there is no low-resistivity portion on a top surface of the high-resistant silicon single crystal substrate, the low-resistivity portion having a resistivity relatively lower than the resistivity of an entirety of the high-resistant silicon single crystal substrate. This provides: a substrate for a semiconductor device that can impart good electric characteristics to a device; and a simple method for manufacturing such a substrate.
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
30.
SEMICONDUCTOR SUBSTRATE PRODUCTION METHOD, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
The present invention is a method for producing a semiconductor substrate, said method comprising: a laser irradiation step for irradiating the surface of a 4H-SiC substrate with a laser beam and forming, within the 4H-SiC substrate, an amorphous layer obtained by amorphization of silicon and carbon; a joining step for joining, via a thin film, another support substrate and the 4H-SiC substrate which has been subjected to the laser irradiation step to obtain a joined substrate; a separation step for separating the 4H-SiC substrate at the amorphous layer of the joined substrate to cause separation into a bound substrate in which the surface layer of the 4H-SiC substrate as a 4H-SiC layer is transferred onto the support substrate and a separated substrate which has been obtained by separating the surface layer from the 4H-SiC substrate; an etching step for performing plasma etching on at least one of the separation surfaces of the bound substrate and of the separated substrate after the separation step; and an epitaxial step for performing epitaxial growth on at least one of the bound substrate and the separated substrate. Thus, a semiconductor substrate production method that makes it possible to produce a more inexpensive, high-quality semiconductor substrate is provided.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
B23K 26/57 - Travail par transmission du faisceau laser à travers ou dans la pièce à travailler le faisceau laser entrant dans une face de la pièce à travailler d’où il est transmis à travers le matériau de la pièce à travailler pour opérer sur une face différente de la pièce à travailler, p.ex. pour effectuer un enlèvement de matière, pour rac
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/3065 - Gravure par plasma; Gravure au moyen d'ions réactifs
31.
DEFECT EVALUATION METHOD FOR SEMICONDUCTOR SUBSTRATE
The present invention provides a defect evaluation method for a semiconductor substrate, the method being characterized by comprising: a first step for detecting defects on surfaces of a plurality of semiconductor substrates; a second step for acquiring microscopic images of the defects; a third step for conducting a component analysis as to whether the defects are Ni defects; a fourth step for classifying the types of the defects on the basis of the microscopic images and the result of the component analysis; a fifth step for machine-learning the microscopic images of the various types of the defects classified in the fourth step, by an image classification means; a sixth step for estimating the types of unknown defects by applying the image classification means subjected to machine learning in the fifth step, to microscopic images of the unknown defects; and a seventh step for stratifying and integrating the types of the unknown defects estimated in the sixth step into the Ni defects and non-Ni defects. Thus, a method for easily evaluating Ni defects on surfaces of semiconductor substrates is provided.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01N 23/2208 - Combinaison de plusieurs mesures, l'une au moins étant celle d’une émission secondaire, p.ex. combinaison d’une mesure d’électrons secondaires [ES] et d’électrons rétrodiffusés [ER] toutes les mesures portant sur l’émission secondaire, p.ex. combinaison de la mesure ES et des rayons X caractéristiques
G01N 23/2252 - Recherche ou analyse des matériaux par l'utilisation de rayonnement [ondes ou particules], p.ex. rayons X ou neutrons, non couvertes par les groupes , ou en mesurant l'émission secondaire de matériaux en utilisant des microsondes électroniques ou ioniques en utilisant des faisceaux d’électrons incidents, p.ex. la microscopie électronique à balayage [SEM] en mesurant les rayons X émis, p.ex. microanalyse à sonde électronique [EPMA]
32.
NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR
A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers is bonded, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/205 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV comprenant plusieurs composés dans différentes régions semi-conductrices
A debris determination method of determining, using an image obtained by an appearance inspection device, debris that occurs around a hard laser mark (HLM) on a backside of a wafer, including: a step of calculating reference luminance from a grayscale image obtained by the appearance inspection device; a step of extracting a printed region including the HLM from the grayscale image; a step of excluding a dot portion of the HLM from the printed region; a step of extracting, with reference to the reference luminance, a debris region from the printed region from which the dot portion of the HLM has been excluded; and a step of determining the presence or absence of debris in the printed region based on the debris region. This provides a debris determination method that can reliably detect debris that cannot be detected by shape measuring devices and determine the presence or absence of debris.
A debris determination method of determining, from an image obtained by an appearance inspection device, debris that occurs around an HLM on a backside of a wafer, including: replacing luminance data of the image with matrix data; extracting an HLM-printed region; obtaining a least-squares plane of luminance; obtaining normalized matrix data by subtracting the least-squares plane from the printed region; obtaining protrusion-side matrix data by substituting 0 for matrix values less than 0; obtaining recess-side matrix data by inverting the sign of the normalized matrix data and substituting 0 for matrix values representing dots and noise; obtaining composite matrix data from the protrusion- and recess-side matrix data; obtaining low-pass matrix data by processing the composite matrix data; and determining debris from the low-pass matrix data with a predetermined threshold and obtaining an area ratio of the debris to determine the presence or absence of debris in the printed region.
The present invention is a method for carrying a wafer, wherein in taking out the wafer from a closed container and carrying the wafer by a carrier robot or in taking in the wafer carried by the carrier robot into the closed container, when a latchkey is rotationally driven for fixing and unfixing a lid relative to a container body of the closed container mounted on a load port frame by a latchkey-driving mechanism provided on a load port door that can fit with a wafer carrying-in/out port of a carrying room and that holds the lid of the closed container to enable removal from the wafer carrying-in/out port, the latchkey is rotationally driven at a rotation rate of 60 deg/sec or less. This provides a method for carrying a wafer and wafer-carrying apparatus that can reduce an amount of dust generated when the lid of the closed container is opened and closed or when the load port door is raised and lowered for carrying the wafer.
H01L 21/677 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le transport, p.ex. entre différents postes de travail
The present invention provides a method for forming a thermal oxide film, comprising the steps of: a step of acquiring a first correlation between an amount of OH groups and thickness of the thermal oxide film by forming a thermal oxide film by thermal oxidation treatment under the same condition after preparing a plurality of semiconductor substrates having chemical oxide films formed by cleaning and having different amounts of OH groups; a step of acquiring a second correlation between an amount of OH groups and drying conditions by cleaning under the same cleaning condition followed by changed drying conditions to substrates and measuring amounts of OH groups; a step of acquiring a third correlation between drying condition and thickness of thermal oxide film by using the first correlation and the second correlation; a step of determining drying condition and thermal oxidation condition by using the third correlation; a step of cleaning the substrates; and a step of drying and a thermal oxide film formation after the cleaning step using the drying conditions and thermal oxidation treatment conditions determined in the drying and thermal oxidation treatment condition determination step. This provides a method for forming thermal oxide film in which a thermal oxide film can be formed with intended thickness with good reproducibility while without changing the composition of the cleaning chemical solution.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
37.
WAFER MARKING METHOD, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR SUBSTRATE
A wafer marking method uses a laser for performing a laser marking on a defect region of a nitride semiconductor substrate in which a nitride semiconductor layer contains at least a GaN layer formed by epitaxial growth on a single-crystal silicon substrate. The method includes that a surface of the GaN layer and a surface of the single-crystal silicon substrate are performed laser marking simultaneously by irradiating the defect region with a laser of a wavelength within ±10% of 365 nm, having a wavelength corresponding to a band gap energy of GaN.
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/268 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée les radiations étant électromagnétiques, p.ex. des rayons laser
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
The present invention is an apparatus for manufacturing a single crystal by growing a single crystal according to a Czochralski method, the apparatus includes a main chamber configured to house a crucible configured to accommodate a raw-material melt and a heater configured to heat the raw-material melt, a pulling chamber being continuously provided at an upper portion of the main chamber and configured to accommodate a single crystal grown and pulled, and a cooling cylinder extends from at least a ceiling portion of the main chamber toward a surface of the raw material melt to surround the single crystal being pulled. The cooling cylinder is configured to be forcibly cooled with a coolant. The apparatus includes a first auxiliary cooling cylinder fitted inside of the cooling cylinder, and a second auxiliary cooling cylinder threadedly connected to the outside of the first auxiliary cooling cylinder from a side of a lower end. A gap between a bottom surface of the cooling cylinder and a top surface of the second auxiliary cooling cylinder is 0 mm or more to 1.0 mm or less. This provides an apparatus for manufacturing a single crystal which can increase growth rate of the single crystal by efficiently cooling the single crystal being grown.
A packaging member for packaging an object to be transported between clean rooms, the packaging member being used for packaging the object to be transported, being a FOUP or a FOSB, when transport thereof between the clean rooms each having a clean atmosphere of a semiconductor factory, in which the packaging member includes a dust-free cloth having dust-proof property and damp-proof property. The packaging member is capable of transporting an object to be transported between clean rooms at low cost while maintaining the high cleanness of the object to be transported, being the FOUP or the FOSB.
B65D 85/30 - Réceptacles, éléments d'emballage ou paquets spécialement adaptés à des objets ou à des matériaux particuliers pour objets particulièrement sensibles aux dommages par chocs ou compression
B65G 49/06 - Systèmes transporteurs caractérisés par leur utilisation à des fins particulières, non prévus ailleurs pour des matériaux ou objets fragiles ou dommageables pour des feuilles fragiles, p.ex. en verre
40.
EPITAXIAL WAFER FOR ULTRAVIOLET RAY EMISSION DEVICE AND METHOD FOR MANUFACTURING THE SAME
An epitaxial wafer for an ultraviolet ray emission device including: a first supporting substrate being transparent for ultraviolet ray and having heat resistance; a seed crystal layer of an AlxGa1-xN (0.5
H01L 33/32 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique contenant de l'azote
H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
H01L 33/06 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une structure à effet quantique ou un superréseau, p.ex. jonction tunnel au sein de la région électroluminescente, p.ex. structure de confinement quantique ou barrière tunnel
41.
METHOD FOR MANUFACTURING 3C-SiC SINGLE-CRYSTAL EPITAXIAL SUBSTRATE, METHOD FOR MANUFACTURING 3C-SiC FREE-STANDING SUBSTRATE, AND 3C-SiC SINGLE-CRYSTAL EPITAXIAL SUBSTRATE
A method for manufacturing a 3C-SiC single-crystal epitaxial substrate according to the present invention is characterized by comprising: a hydrogen baking step for annealing a single-crystal silicon substrate in a hydrogen atmosphere to remove a natural oxide film on the surface of the single-crystal silicon substrate; an epitaxial step for performing a carbonization process on the surface of the single-crystal silicon substrate after the hydrogen baking step to generate SiC nuclei, and epitaxially growing a 3C-SiC single-crystal film using the generated nuclei as origins to obtain a 3C-SiC single-crystal epitaxial substrate; and a diffusion step for heating the 3C-SiC single-crystal epitaxial substrate to a temperature lower than the melting point of Si in a gas atmosphere containing carbon to cause solid-state diffusion of Si in the single-crystal silicon substrate to the interface between the 3C-SiC single-crystal film and the single-crystal silicon substrate, and further growing SiC through a solid phase reaction between the diffused Si and C that has reached the interface to form, at the interface with respect to the 3C-SiC single-crystal film in the single-crystal silicon substrate, a vacancy layer having vacancy generated at sites where Si has diffused. Accordingly, provided is a method for manufacturing a 3C-SiC single-crystal epitaxial substrate from which it is possible to obtain a large diameter 3C-SiC free-standing substrate through a simple manufacturing process.
METHOD FOR MANUFACTURING EPITAXIAL WAFER FOR ULTRAVIOLET RAY EMISSION DEVICE, METHOD FOR MANUFACTURING SUBSTRATE FOR ULTRAVIOLET RAY EMISSION DEVICE, EPITAXIAL WAFER FOR ULTRAVIOLET RAY EMISSION DEVICE, AND SUBSTRATE FOR ULTRAVIOLET RAY EMISSION DEVICE
The present invention is a method for manufacturing an epitaxial wafer for an ultraviolet ray emission device, the method including steps of: preparing a supporting substrate having at least one surface composed of gallium nitride; forming a bonding layer on the surface composed of the gallium nitride of the supporting substrate; forming a laminated substrate having a seed crystal layer by laminating a seed crystal composed of an AlxGa1-xN (0.5
H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
H01L 33/06 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une structure à effet quantique ou un superréseau, p.ex. jonction tunnel au sein de la région électroluminescente, p.ex. structure de confinement quantique ou barrière tunnel
H01L 33/32 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique contenant de l'azote
43.
METHOD FOR PRODUCING EPITAXIAL SUBSTRATE, AND EPITAXIAL SUBSTRATE
The present invention provides a method for producing an epitaxial substrate, wherein: a single crystal Si substrate having a thickness of 1,500 µm or more is used; the epitaxial growth of a group III nitride epitaxial layer on the single crystal Si substrate and the measurement of a warp of the thus-obtained epitaxial substrate are performed using the resistivity of the single crystal Si substrate and the ratio a ((thickness of the single crystal Si substrate)/(thickness of the group III nitride epitaxial layer)) as parameters while varying the parameters; a correlation between the ratio a and the warp of the epitaxial substrate is determined for every resistivity of the single crystal Si substrate, and production parameters at which the absolute value of the warp of the epitaxial substrate becomes 50 µm or less are determined from the correlation; and a group III nitride epitaxial layer is epitaxially grown on the single crystal Si substrate with use of the thus-determined production parameters. Consequently, the present invention provides: an epitaxial substrate which has high pressure resistance characteristics and satisfies the formula |warp| ≤ 50 µm; and a production method by which such an epitaxial substrate can be obtained.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
A method for manufacturing a bonded wafer, the method including bonding a to-be-bonded wafer and a compound semiconductor wafer including a compound semiconductor epitaxially grown on a growth substrate. An area of a bonding surface of the to-be-bonded wafer is larger than an area of a bonding surface of the compound semiconductor wafer. The growth substrate is removed after the to-be-bonded wafer is bonded to the compound semiconductor wafer.
The present invention is a silicon wafer manufacturing method including a grinding step of grinding front and back surfaces of a raw wafer to obtain a wafer having an arithmetic surface roughness Sa per 2 μm2 of 10 nm or less; a dry-etching step of subjecting the wafer obtained in the grinding step to isotropic whole-surface dry-etching with an etching removal of 1 μm or less per surface to remove a mechanically damaged layer introduced into each of front and back surfaces of the wafer in the grinding step; and a double-side polishing step of, after the dry-etching step, polishing both surfaces of the wafer with a stock removal of 3 μm or less per surface. Thus, the silicon wafer manufacturing method that enables to manufacture a wafer having high flatness can be provided.
This method for producing a heteroepitaxial substrate is characterized by comprising: a substrate production step in which a single-crystal silicon substrate is produced in a thickness which exceeds the upper limit of standard thicknesses corresponding to the substrate diameter but is not larger than 2 mm; an epitaxial step in which a heteroepitaxial layer is grown on the single-crystal silicon substrate obtained in the substrate production step, thereby obtaining an epitaxial substrate; and a thinning step in which the surface of the single-crystal silicon substrate having undergone the epitaxial step that is on the reverse side from the surface where the heteroepitaxial layer has been formed is ground to thin down the single-crystal silicon substrate to a thickness within the range of standard thicknesses. Due to the configuration, a heteroepitaxial substrate which can be introduced into existing device processes can be produced by this method even when a heteroepitaxial layer has been formed on a single-crystal silicon substrate having a thickness exceeding the standard thicknesses.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
The present invention provides a heteroepitaxial single-crystal-silicon substrate for growing a heteroepitaxial layer on the surface, wherein said heteroepitaxial single-crystal-silicon substrate is characterized by satisfying one or more of the four conditions indicated below. What is provided thereby is a heteroepitaxial single-crystal-silicon substrate that can minimize the incidence of warping or cracking when growing a heteroepitaxial layer. Condition 1: A dopant content of at least 1.0×1016atoms/cm3Condition 2: An oxygen content of at least 5.0×1017atoms/cm3Condition 3: A nitrogen content of at least 5.0×1015atoms/cm3Condition 4: A carbon content of at least 5.0×1015atoms/cm 3 or greater
y1 − yx1 − x1 − xP (where 0.4 ≤ x ≤ 0.6 and 0 ≤ y ≤ 0.5) is sandwiched between a first clad and a second clad; an upper electrode; and a lower electrode, the polarity of which is different from that of the upper electrode. The micro-LED element is characterized in that the light emitting element structure, the upper electrode and the lower electrode are disposed in a first surface of the micro-LED element, the upper electrode is disposed over the light emitting element structure, and the lower electrode is disposed in a position where the light emitting element structure is not existent so that the periphery of the lower electrode is surrounded by the light emitting element structure. Thus, provided is a micro-LED element which has a dimension of each side of less than 100 μm and has, in the same surface, an AlGaInP-based light emitting element structure and two electrodes differing in polarity and which can be inhibited or prevented from suffering (die) breakage.
H01L 33/20 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une forme particulière, p.ex. substrat incurvé ou tronqué
H01L 33/30 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique
H01L 33/36 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les électrodes
49.
MICRO-LED STRUCTURAL BODY AND MANUFACTURING METHOD FOR SAME
y1-yx1-x1-xP (0.4≤x≤0.6, 0≤y≤0.5). The light emission element structure is bonded to a transparent substrate which is transparent with respect to a light emission wavelength and an LLO transfer laser beam, by means of a bonding material or an adhesive agent which is transparent with respect to the light emission wavelength and which absorbs the LLO transfer laser beam. The light emission element structure is subjected to element-isolation. The element-isolated light emission element structure has at least two electrodes with different polarities on one surface thereof. The longitudinal direction of the outer shape of the element-isolated light emission element structure in a plan view does not coincide with a crystal orientation <110>. Accordingly, provided is a micro-LED structural body which is formed by bonding a light emission element structure having an AlGaInP-based active layer and a transparent substrate via a bonding agent or an adhesive agent, and which makes it possible to minimize or prevent cracking of the micro-LED structural body when transferred in an LLO process.
H01L 33/16 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une structure cristalline ou une orientation particulière, p.ex. polycristalline, amorphe ou poreuse
G09F 9/33 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels à semi-conducteurs, p.ex. à diodes
H01L 33/30 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique
A method for manufacturing a semiconductor wafer, including: a chamfering step of grinding at least a periphery of a wafer to form a chamfered portion having a wafer edge portion and a wafer notch portion; a double-side polishing step; a mirror-surface chamfering step; and a mirror polishing step, wherein the mirror-surface chamfering step includes: a first mirror-surface chamfering process of polishing the wafer notch portion in the chamfered portion before the double-side polishing step; and a second mirror-surface chamfering process of polishing the wafer notch portion and the wafer edge portion after the double-side polishing step, and a polishing rate of the wafer notch portion in the second mirror-surface chamfering process is smaller than a polishing rate of the wafer notch portion in the first mirror-surface chamfering process.
B24B 9/06 - Machines ou dispositifs pour meuler les bords ou les biseaux des pièces ou pour enlever des bavures; Accessoires à cet effet caractérisés par le fait qu'ils sont spécialement étudiés en fonction des propriétés de la matière propre aux objets à meuler de matière inorganique non métallique, p.ex. de la pierre, des céramiques, de la porcelaine
B24B 7/22 - Machines ou dispositifs pour meuler les surfaces planes des pièces, y compris ceux pour le polissage des surfaces planes en verre; Accessoires à cet effet caractérisés par le fait qu'ils sont spécialement étudiés en fonction des propriétés de la matière des objets non métalliques à meuler pour meuler de la matière inorganique, p.ex. de la pierre, des céramiques, de la porcelaine
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
A method for producing a nitride semiconductor wafer by forming a nitride semiconductor film on a silicon single-crystal substrate, including the steps of forming the nitride semiconductor film on the silicon single-crystal substrate and irradiating the silicon single-crystal substrate with electron beams with an irradiation dose of 1×1014/cm2 or more. A method produces a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate, and in which a loss and a second harmonic characteristic due to the substrate are improved.
The present invention is a semiconductor epitaxial substrate manufacturing method characterized by comprising: an ion implantation step for implanting H+ into the surface of a 4H-SiC substrate; and an epitaxial growth step for epitaxially growing 4H-SiC on the surface of the 4H-SiC substrate subjected to the ion implantation step. Consequently, provided is a semiconductor epitaxial substrate manufacturing method by which forward-direction degradation due to the expansion of dislocation can be easily suppressed.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/329 - Procédés comportant plusieurs étapes pour la fabrication de dispositifs du type bipolaire, p.ex. diodes, transistors, thyristors les dispositifs comportant une ou deux électrodes, p.ex. diodes
The present invention is a method for evaluating a defect position in the depth direction of a wafer using X-ray topography (XRT), the wafer having a front surface and a back surface, the method characterized by comprising: a step for causing X-rays to enter the front surface from a right direction and a left direction at incident angles such that a diffraction condition is satisfied, to acquire two XRT images on the back surface of the wafer for a right-eye image and a left-eye image; an alignment step for aligning the acquired two XRT images at a defect position on either the front surface or the back surface; and a defect position determination step for determining another defect position having a different depth direction of the wafer on the basis of a shift between the right-eye image and the left-eye image. Thus, a method for evaluating a defect position in the depth direction of a wafer is provided through a simple method using X-ray topography (XRT).
G01N 23/2055 - Analyse des diagrammes de diffraction
G01N 23/205 - Recherche ou analyse des matériaux par l'utilisation de rayonnement [ondes ou particules], p.ex. rayons X ou neutrons, non couvertes par les groupes , ou en utilisant la réflexion de la radiation par les matériaux en utilisant des caméras de diffraction
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
54.
SILICON WAFER FOR EPITAXIAL GROWTH AND EPITAXIAL WAFER
The present invention is a silicon wafer for epitaxial growth, the silicon wafer being characterized by being composed of a silicon single crystal which is obtained by means of the Czochralski method, and in which the size and density of oxygen precipitation nuclei are adjusted, in the entire neutral (N) region not including voids and dislocation clusters, wherein the density of the oxygen precipitation nuclei having a size of at least 18 nm in the silicon wafer is less than 5×107/cm3. Consequently, provided is a silicon wafer for epitaxial growth from which defects have been suppressed and which has extremely excellent surface layer quality.
The present invention provides a substrate for high frequency devices, the substrate being obtained by forming a nitride semiconductor film on an SOI substrate, wherein: the SOI substrate is a TRSOI substrate wherein a trap rich layer, which is formed on a base substrate, and an SOI layer, which is formed of a silicon single crystal, are bonded to each other, with an oxide film being interposed therebetween; and the SOI layer has a resistivity of 1 kΩ∙cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less. Consequently, the present invention provides: a substrate for high frequency devices having excellent high frequency characteristics; and a method for producing this substrate for high frequency devices.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
56.
SEED SUBSTRATE FOR EPITAXIAL GROWTH USE AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SAME
A seed substrate for epitaxial growth has a support substrate, a planarizing layer of 0.5 to 3 μm provided on the top surface of the support substrate, and a seed crystal layer provided on the top surface of the planarizing layer. The support substrate includes a core of group III nitride polycrystalline ceramics and a 0.05 to 1.5 μm encapsulating layer that encapsulates the core. The seed crystal layer is provided by thin-film transfer of 0.1 to 1.5 μm of the surface layer of Si<111> single crystal with oxidation-induced stacking faults (OSF) of 10 defects/cm2 or less. High-quality, inexpensive seed substrates with few crystal defects for epitaxial growth of epitaxial substrates and solid substrates of group III nitrides such as AlN, AlxGa1-xN (0
C23C 16/50 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c. à d. procédés de dépôt chimique en phase vapeur (CVD) caractérisé par le procédé de revêtement au moyen de décharges électriques
C30B 31/22 - Dopage par irradiation au moyen de radiations électromagnétiques ou par rayonnement corpusculaire par implantation d'ions
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
57.
SINGLE CRYSTAL PULLING APPARATUS AND METHOD FOR PULLING SINGLE CRYSTAL
The present invention is a single crystal pulling apparatus which includes a pulling furnace having a central axis and a magnetic field generating apparatus having coils, and applies a horizontal magnetic field to a molten semiconductor raw material, wherein the coils are saddle-shaped, two pairs of the coils are provided with the coils of each pair arranged facing each other, two coil axes in the two pairs of coils are included in the same horizontal plane, when a magnetic force line direction on the central axis of the pulling furnace in the horizontal plane is defined as a X-axis, and a direction perpendicular to the X-axis in the horizontal plane is defined as a Y-axis, a center angle α between the two coil axes sandwiching the X-axis is 90 degrees or less and an inter-coil angle β between adjacent superconducting coils sandwiching the Y-axis is 20 degrees or less. As a result, the coil height can be reduced by increasing the magnetic field generation efficiency, the magnetic field center can be raised to near the melt surface of the semiconductor raw material, and it is possible to provide a single crystal pulling apparatus and a single crystal pulling method capable of pulling a single crystal with an even lower oxygen concentration than before and a defect-free crystal at a higher speed can be obtained.
C30B 30/04 - Production de monocristaux ou de matériaux polycristallins homogènes de structure déterminée, caractérisée par l'action de champs électriques ou magnétiques, de l'énergie ondulatoire ou d'autres conditions physiques spécifiques en utilisant des champs magnétiques
58.
METHOD FOR EVALUATING CRYSTAL DEFECTS IN SILICON CARBIDE SINGLE CRYSTAL WAFER
A method for evaluating crystal defects in a silicon carbide single crystal wafer, the method including steps of: etching a silicon carbide single crystal wafer with melted KOH so that a size of an etch pit due to a threading edge dislocation is 10 to 50 μm; obtaining microscopic images by automatic photographing at a plurality of positions on a surface of the silicon carbide single crystal wafer after the etching; determining presence or absence of a defect dense part in each of all the obtained microscopic images based on a continued length of the etch pit formed by the etching; and classifying all the obtained microscopic images into microscopic images having the defect dense part and microscopic images not having the defect dense part to evaluate a dense state of crystal defects in the silicon carbide single crystal wafer.
A method for processing a wafer including; surface-grinding front surface of the wafer and back surface opposite to the front surface with a grindstone having a size of 10000 or more and, double-side polishing both sides of the wafer that has been surface-ground so that removal on the back surface is ¼ or less than that on the front surface. This method can also process a wafer capable of selectively roughening the back surface of a wafer and suppressing warpage of the wafer due to stress, and a wafer having a sufficiently roughened back surface and having a small warpage.
B24B 37/08 - Machines ou dispositifs de rodage; Accessoires conçus pour travailler les surfaces planes caractérisés par le déplacement de la pièce ou de l'outil de rodage pour un rodage double face
60.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR EPITAXIAL WAFER, AND COMPOSITE SUBSTRATE FOR NITRIDE SEMICONDUCTOR EPITAXIAL WAFER
The present invention is a method for manufacturing a nitride semiconductor epitaxial wafer that comprises: a composite substrate comprising a ceramic-containing substrate and a single-crystal layer bonded to the ceramic-containing substrate; and a nitride semiconductor layer epitaxially grown on the composite substrate. The method includes: a step in which, as the composite substrate, a composite substrate is prepared that is provided with a ceramic-containing substrate with a coefficient of thermal expansion within ±10% of the coefficient of thermal expansion of the nitride semiconductor layer, and that has a shape which satisfies the conditions −150 < Bow (μm) ≤ 40, Warp (μm) < 150, and Warp (μm) < 90 − Bow (μm) shape; a step in which an intermediate layer that imparts compressive stress to the nitride semiconductor layer is formed on the single-crystal layer of the composite substrate; and a step in which the nitride semiconductor layer is epitaxially grown on the intermediate layer. The film thickness of the intermediate layer is adjusted so that the nitride semiconductor epitaxial wafer has a shape that satisfies the conditions Warp (μm) < 50 and |Bow (μm)| ≤ 40. This provides a method for manufacturing a nitride semiconductor epitaxial wafer with low curvature and no cracking or peeling.
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
61.
BONDING DEFECT REMOVAL METHOD FOR BONDED WAFER AND METHOD FOR MANUFACTURING BONDED WAFER
y1-yx1-x1-xP(0.4 ≤ x ≤ 0.6, 0 ≤ y ≤ 0.5), and said transparent substrate transmitting light of a light-emitting wavelength, wherein the bonded wafer is introduced into a plasma atmosphere, and the defects of the thermosetting bonding member where curing is insufficient are removed by being selectively destroyed. Thus, there is provided a bonding defect removal method for a bonded wafer, said method making it possible to remove curing defects from a bonded wafer in which a transparent substrate and a light-emitting element structure that has an active layer of an AlGaInP type are bonded with a thermosetting bonding member interposed therebetween, without using techniques such as measuring or the like.
An evaluation method including steps of: acquiring profile measurement data on an entire surface in a thickness direction of a mirror-polished wafer; identifying a slice-cutting direction by performing first-order or second-order differentiation on diameter-direction profile measurement data on the wafer to acquire differential profiles at predetermined rotation angles and pitches, and comparing the acquired differential profiles; acquiring x-y grid data by performing first-order or second-order differentiation on profile measurement data at a predetermined pitch in a y-direction at a predetermined interval in an x-direction perpendicular to the y-direction, which is the identified slice-cutting direction; acquiring, from the x-y grid data, a maximum derivative value in an intermediate region including the wafer center in the y-direction and a maximum derivative value in upper-end-side and lower-end-side regions located outside the intermediate region; and judging failure incidence possibility in a device fabrication process based on the maximum derivative values.
A method for detecting a surface state of a raw material melt in a crucible in single crystal production by a CZ method in which a single crystal is pulled from the raw material melt in the crucible including: photographing a predetermined same test region of the surface of the raw material melt in the crucible simultaneously in different directions with two CCD cameras to obtain measurement images; and automatically detecting, using parallax data of the measurement images from the two CCD cameras, one or more of the following: solidification timing when a state in which the raw material is completely melted becomes a state in which solidification is formed on the surface of the raw material melt; and melting complication timing when a state in which the raw material melt has solidification on the surface of the raw material melt becomes a completely melted state.
C30B 15/26 - Stabilisation, ou commande de la forme, de la zone fondue au voisinage du cristal tiré; Commande de la section du cristal en utilisant des détecteurs photographiques ou à rayons X
C30B 15/14 - Chauffage du bain fondu ou du matériau cristallisé
C30B 15/30 - Mécanismes pour faire tourner ou pour déplacer soit le bain fondu, soit le cristal
64.
METHOD FOR PRODUCING BONDED LIGHT-EMITTING ELEMENT WAFER
The present invention relates to a method for producing a bonded light-emitting element wafer having removed therefrom a defective part, the method being characterized by comprising: a step in which a light-emitting element structure that is to become a micro LED, and a substrate to be bonded, which is transparent with respect to an LLO transfer laser beam, are bonded to each other by an adhesive which absorbs the LLO transfer laser beam, thereby obtaining a bonded wafer; a step in which the bonded wafer is optically examined for defective parts so as to form map data for removal; and a step in which, on the basis of the map data for removal, a defective part in the bonded wafer is irradiated with a laser beam for removal, a portion of the light-emitting element structure included in the defective part is sublimated, and thereby, the portion of the light-emitting element structure included in the defective part is removed and a bonded light-emitting element wafer is obtained. Accordingly, the present invention provides a method for producing a bonded light-emitting element wafer, the method being capable of producing a bonded light-emitting element wafer by selectively removing a defective part of a light-emitting element structure which is to become a micro LED and is bonded to a bonding-subject wafer by an adhesive.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
H01L 33/08 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une pluralité de régions électroluminescentes, p.ex. couche électroluminescente discontinue latéralement ou région photoluminescente intégrée au sein du corps semi-conducteur
65.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING THE SAME
A nitride semiconductor substrate includes: a heat-resistant support substrate having a core including nitride ceramic enclosed in an encapsulating layer; a planarization layer provided on the heat-resistant support substrate; a silicon single crystal layer having a carbon concentration of 1×1017 atoms/cm3 or higher provided on the planarization layer; a carbonized layer containing silicon carbide as a main component and having a thickness of 4 to 2000 nm provided on the silicon single crystal layer; and a nitride semiconductor layer provided on the carbonized layer. This provides a high-quality nitride semiconductor substrate (a nitride semiconductor substrate particularly suitable for GaN-based high mobility transistors (HEMT) for high-frequency switches, power amplifiers, and power switching devices); and a method for producing the same.
A method of cleaning a silicon wafer in which the silicon wafer is roughened, including: forming an oxide film on the silicon wafer by SC1 cleaning, SC2 cleaning, or ozone water cleaning; cleaning the silicon wafer on which the oxide film is formed by using any one of: a diluted aqueous solution of ammonium hydroxide having an ammonium hydroxide concentration of 0.051% by mass or less; or a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide water and having an ammonium hydroxide concentration of 0.051% by mass or less and a hydrogen peroxide concentration of 0.2% by mass or less, the hydrogen peroxide concentration being four times or less the ammonium hydroxide concentration, to roughen front and rear faces of the silicon wafer.
The present invention provides a micro-LED characteristics evaluation wafer characterized by comprising a GaAs substrate, a micro-LED that is disposed on the GaAs substrate and has sides each measuring less than or equal to 100 μm, a pad-base portion adjacent to the micro-LED, an upper electrode pad on the micro-LED and the pad-base portion, and a lower electrode pad on the GaAs substrate in the vicinity of the micro-LED, wherein the micro-LED and the pad-base portion are connected with an insulating portion therebetween. This makes it possible to provide a micro-LED characteristics evaluation wafer with which it is possible to form a micro-LED-sized element in an epitaxial wafer state, and to evaluate energization characteristics, thus making it possible to perform transient characteristics evaluation without disconnection during environmental testing.
The present invention is a susceptor for performing epitaxial growth on a wafer that has a main surface (110), the susceptor for epitaxial growth comprising a pocket for placing the wafer, and a peripheral part that surrounds the pocket, and being characterized in that the peripheral part is provided with a flat part and a protrusion, said protrusion being a portion adjacent to the pocket and having a portion that protrudes from an upper surface of the flat portion, and the pocket is designed so that when the wafer is placed in the pocket, the height of the upper surface of the wafer is positioned above the height of the upper surface of the flat portion. Thus, there is provided a susceptor for expitaxial growth with which it is possible to manufacture a high-flatness (110) epitaxial wafer, using a wafer (substrate) where (110) is the main surface.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
C23C 16/46 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c. à d. procédés de dépôt chimique en phase vapeur (CVD) caractérisé par le procédé de revêtement caractérisé par le procédé utilisé pour le chauffage du substrat
H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitement; Appareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
69.
SINGLE CRYSTAL SILICON SUBSTRATE EQUIPPED WITH NITRIDE SEMICONDUCTOR LAYER, AND METHOD FOR MANUFACTURING SINGLE CRYSTAL SILICON SUBSTRATE EQUIPPED WITH NITRIDE SEMICONDUCTOR LAYER
The present invention is a single crystal silicon substrate equipped with a nitride semiconductor layer, said substrate including: a single crystal silicon substrate; a 3C-SiC single crystal film that has been epitaxially grown on the single crystal silicon substrate; and a nitride semiconductor layer that has been epitaxially grown on the 3C-SiC single crystal film. The single crystal silicon substrate equipped with a nitride semiconductor layer is characterized in that dislocations are formed throughout the entire single crystal silicon substrate, the length (dislocation length) when the dislocations are projected in a planar manner onto the single crystal silicon substrate is 1 mm or greater, and the dislocation density is 10/cm2 or greater. Through the above, provided are: a large diameter single crystal silicon substrate equipped with a nitride semiconductor layer, the diameter thereof being about 200 mm or 300 mm, and said substrate exhibiting reduced warping and no particular cracking when a Si substrate having an ordinary thickness is used therein; and a method for manufacturing a single crystal silicon substrate equipped with a nitride semiconductor layer.
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
The present invention is a method for determining the presence or absence of debris around a hard laser mark, after forming the hard laser mark on the backside of a wafer, or after forming the hard laser mark and polishing the backside of the wafer, said method characterized by: after measuring a thickness variation parameter of the wafer with a flatness measuring device, extracting statistical data regarding the thickness variation parameter in an area (hereinafter referred to as "area A") including the hard laser mark, and extracting statistical data regarding the thickness variation parameter in an area (hereinafter referred to as "area B") adjacent to the area A; comparing the statistical data regarding the area A and the area B to calculate the difference therebetween; and if the difference is equal to or greater than a predetermined threshold, determining that debris is present. A debris determination method that can accurately detect local thickness changes due to debris is thus provided.
A single crystal pulling apparatus includes: a pulling furnace having a central axis; and magnetic field generating apparatus around the pulling furnace and having coils, for applying a horizontal magnetic field to molten semiconductor raw material to suppress convection in crucible, in which, main coils and sub-coils are provided, as the main coils, two pairs of coils arranged facing each other are provided, two coil axes thereof are included in the same horizontal plane, a center angle α between the two coil axes sandwiching the X-axis, which is a magnetic force line direction on the central axis in the horizontal plane, is 100 degrees or more and 120 degrees or less, as the sub-coils, a pair of superconducting coils arranged to face each other is provided and its one coil axis is aligned with the X-axis, and current values of the main coils and the sub-coils can be set independently.
C30B 30/04 - Production de monocristaux ou de matériaux polycristallins homogènes de structure déterminée, caractérisée par l'action de champs électriques ou magnétiques, de l'énergie ondulatoire ou d'autres conditions physiques spécifiques en utilisant des champs magnétiques
A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed above a supporting substrate via an insulative layer, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/76 - Réalisation de régions isolantes entre les composants
H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
73.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SAME
The present invention is a nitride semiconductor substrate comprising: a silicon substrate having a resistivity of 1000 Ω•cm or more or a base substrate equipped on the surface thereof with a silicon layer having a resistivity of 1000 Ω•cm or more; and a group III nitride semiconductor thin film epitaxially formed on the silicon substrate or the silicon layer. The nitride semiconductor substrate is characterized in that the average value of the carbon concentration within the group III nitride semiconductor thin film is 3E + 18 atoms/cm3 or less. It is thus possible to provide a nitride semiconductor substrate with high thermal conductivity and little high-frequency loss, and a method for producing the same.
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
The present invention is a method for producing an epitaxial wafer forming a single crystal silicon layer on a single crystal silicon wafer, comprising, a step of removing native oxide film on surface of the single crystal silicon wafer with hydrofluoric acid, a step of forming an oxygen atomic layer on the surface of the single crystal silicon wafer from which the native oxide film has been removed, a step of epitaxially growing the single crystal silicon layer on the surface of the single crystal silicon wafer on which the oxygen atomic layer is formed, wherein the plane concentration of oxygen in the oxygen atomic layer is 1×1015 atoms/cm2 or less. As a result, a method for producing an epitaxial wafer, that an oxygen atomic layer can be stably and simply introduced into an epitaxial layer, and having a good-quality single crystal silicon epitaxial layer is provided.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p.ex. pour produire des défectuosités internes
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
The present invention provides a method for producing a bonded wafer for micro LEDs, the method comprising: a step for forming an epitaxial layer by epitaxially growing an AlGaInP first cladding layer, an active layer and a second cladding layer on a GaAs substrate; a step for growing a GaP window layer on the second cladding layer; a step for bonding the Gap window layer and a transparent substrate by the intermediary of a thermosetting bonding member; a step for separating GaAs substrate; a step for separating the epitaxial layer into a micro LED element; a step for having the second cladding layer or the GaP window layer of the micro Led element exposed; a step for forming an electrode; a step for bonding the electrode to a transfer substrate; and a step for separating the transparent substrate and the micro LED element from each other by means of laser irradiation from the transparent substrate side. With respect to this method for producing a bonded wafer for micro LEDs, the thickness of the GaP window layer is set to 6 µm or more. Consequently, the present invention provides a method for producing a bonded wafer for AlGaInP micro LEDs, the method being ameliorated in terms of yield decrease due to cracking of a micro LED element during the LLO step.
H01L 33/30 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique
H01S 5/323 - Structure ou forme de la région active; Matériaux pour la région active comprenant des jonctions PN, p.ex. hétérostructures ou doubles hétérostructures dans des composés AIIIBV, p.ex. laser AlGaAs
76.
METHOD FOR PRODUCING SILICON SUBSTRATE FOR QUANTUM COMPUTERS, SILICON SUBSTRATE FOR QUANTUM COMPUTERS, AND SEMICONDUCTOR DEVICE
The present invention provides a method for producing a silicon substrate for quantum computers, the method comprising: a step for forming an Si epitaxial layer on a silicon substrate by performing epitaxial growth using, as a silicon-based material gas, an Si source gas in which the total content of 28Si and 30Si relative to the all silicon contained in the silicon-based material gas is 99.9% or more; a step for forming a δ-doped layer of oxygen (O) by oxidizing the surface of the Si epitaxial layer; and a step for forming an Si epitaxial layer on the δ-doped layer by performing epitaxial growth with use of an Si source gas in which the total content of 28Si and 30Si relative to the all silicon contained in the silicon-based material gas is 99.9% or more. Consequently, the present invention provides: a silicon substrate for quantum computers, the silicon substrate being capable of suppressing the influence of 29Si, thereby being capable of suppressing the influence of nuclear spin; and a method for producing this silicon substrate for quantum computers.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
77.
METHOD FOR MANUFACTURING 3C-SIC LAMINATED SUBSTRATE, 3C-SIC LAMINATED SUBSTRATE, AND 3C-SIC INDEPENDENT SUBSTRATE
The present disclosure provides a method for manufacturing a 3C-SiC laminated substrate, the manufacturing method being characterized by comprising: a step in which a 3C-SiC single crystal film is epitaxially grown on a first single crystal silicon substrate; a step in which a support substrate is pasted to the upper surface of the 3C-SiC single crystal film; and a step in which the first single crystal silicon substrate is removed so as to manufacture a 3C-SiC laminated substrate. The purpose of the aforementioned is to provide a method for manufacturing a 3C-SiC laminated substrate. In particular, a method is provided by which a 3C-SiC laminated substrate having a large diameter such as 200 mmφ or 300 mmφ is obtained.
METHOD FOR MEASURING DISTANCE BETWEEN LOWER END SURFACE OF HEAT SHIELDING MEMBER AND SURFACE OF RAW MATERIAL MELT, METHOD FOR CONTROLLING DISTANCE BETWEEN LOWER END SURFACE OF HEAT SHIELDING MEMBER AND SURFACE OF RAW MATERIAL MELT AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL
A method for measuring distance between lower end surface of heat shielding member and surface of raw material melt, the method including providing the member being located above the melt, when a silicon single crystal is pulled by the Czochralski method while a magnetic field is applied to the melt in a crucible, the method including: forming a through-hole in the member; measuring distance between the member and the melt surface, and observing position of mirror image of the through-hole with fixed point observation apparatus, the mirror image being reflected on the melt surface; then measuring a moving distance of the mirror image, and calculating distance between the member and the melt surface from a measured value and the moving distance of the mirror image, during the pulling of the crystal. The distance between the member and the melt can be precisely measured by the method.
C30B 15/26 - Stabilisation, ou commande de la forme, de la zone fondue au voisinage du cristal tiré; Commande de la section du cristal en utilisant des détecteurs photographiques ou à rayons X
C30B 30/04 - Production de monocristaux ou de matériaux polycristallins homogènes de structure déterminée, caractérisée par l'action de champs électriques ou magnétiques, de l'énergie ondulatoire ou d'autres conditions physiques spécifiques en utilisant des champs magnétiques
C30B 15/14 - Chauffage du bain fondu ou du matériau cristallisé
The present invention is an inspection apparatus for inspecting a container including a light-transmittable transparent portion and configured to house a wafer, the apparatus including: a flat lamp provided to irradiate a portion to be inspected including at least a part of the transparent portion of the container with light; and a camera provided to face the flat lamp across the portion to be inspected of the container and configured to image the portion to be inspected so as to detect a foreign matter and/or a defect in the portion to be inspected of the container. This can provide an inspection apparatus and inspection method that can inspect whether a foreign matter or a defect is present inside a wafer container more certainly than visual inspection by a person.
The present invention is a polishing pad having a polishing layer for polishing surface of a wafer and a double-sided tape for attaching the polishing layer to an upper turn table of a double-side polishing apparatus, wherein, the double-sided tape has a 90° peeling adhesive strength A of 2000 g/cm or more, and a ratio A/B of the 90° peeling adhesive strength A to a 180° peeling adhesive strength B of 1.05 or more, the double-sided tape has a base material, a polishing-layer-side adhesive layer to be attached to the polishing layer, and an upper-turn-table-side adhesive layer to be attached to the upper turn table, and total thickness of the polishing-layer-side adhesive layer and the upper-turn-table-side adhesive layer is 80 μm or less. This provides a polishing pad capable of suppressing deterioration of flatness of the wafer when performing double-side polishing of the wafer.
B24B 37/22 - Tampons de rodage pour travailler les surfaces planes caractérisés par une structure multicouche
B24B 37/08 - Machines ou dispositifs de rodage; Accessoires conçus pour travailler les surfaces planes caractérisés par le déplacement de la pièce ou de l'outil de rodage pour un rodage double face
H01L 21/306 - Traitement chimique ou électrique, p.ex. gravure électrolytique
The present invention provides a method for manufacturing an epitaxial wafer in which a single crystal silicon epitaxial layer is formed on a single crystal silicon wafer, the method being characterized by comprising: a step for removing a natural oxide film from the surface of the single crystal silicon wafer; a step for forming an oxide film on the surface of the single crystal silicon wafer by using an oxidizing solution after the step for removing the natural oxide film; a step for forming an oxygen atomic layer by thinning the oxide film after forming the oxide film; and a step for epitaxially growing single crystal silicon on the surface of the single crystal silicon wafer having the oxygen atomic layer after forming the oxygen atomic layer. Thereby, it is possible to provide a method for manufacturing an epitaxial wafer that can stably and easily introduce an oxygen atomic layer into an epitaxial layer and that can manufacture an epitaxial wafer having a high-quality single crystal silicon epitaxial layer.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p.ex. pour produire des défectuosités internes
A single crystal manufacturing including: main chamber; pulling chamber; thermal shield member provided so as to face a silicon melt; rectifying cylinder provided on the thermal shield member so as to enclose the silicon single crystal being pulled up; cooling cylinder provided so as to encircle the silicon single crystal being pulled up and including an extending portion extending toward the silicon melt; and cooling auxiliary cylinder fitted to inside of the cooling cylinder. The extending portion of the cooling cylinder includes a bottom surface facing the silicon melt. The cooling auxiliary cylinder includes at least a first portion surrounding the bottom surface of the cooling cylinder and a second portion surrounding an upper end portion of the rectifying cylinder. This enables provision of the apparatus capable of manufacturing a single crystal with a carbon concentration lower than that according to the conventional technologies.
The present invention provides a member 34 with a heat spreader structure, the member comprising: a substrate member 31 that is provided with an integrated circuit part 10; and a heat spreader structure part 9 that is formed on the integrated circuit part 10. This member with a heat spreader structure is characterized in that: the integrated circuit part 10 forms a relief pattern; the heat spreader structure part 9 is obtained by providing a diamond layer 6 with a relief pattern that fits into the relief pattern of the integrated circuit part 10, or alternatively obtained by providing a silicon substrate 8, on which a diamond layer 6 is formed, with a relief pattern that fits into the relief pattern of the integrated circuit part 10; and the heat spreader structure part 9 is bonded to the substrate member 31 by having the relief pattern of the heat spreader structure part 9 fitted into the relief pattern of the integrated circuit part 10. Consequently, the present invention provides a heat dissipation structure that has a higher efficiency.
The present invention is a bonded light-emitting element wafer in which a light-emitting element epitaxial wafer that has an epitaxial layer including an active layer and a transparent substrate that is transparent with respect to visible light and transparent with respect to ultraviolet light are bonded via an adhesive layer which is transparent with respect to visible light but non-transparent with respect to ultraviolet light, wherein the height by which a spike-shaped inclusion existing in the epitaxial layer protrudes from the epitaxial layer is not more than the thickness of the adhesive layer. Thus, provided is a bonded light-emitting element wafer in which an epitaxial wafer that has a spike-shaped inclusion is bonded to a transparent substrate that is transparent with respect to visible light and transparent with respect to ultraviolet light, via an adhesive layer that is transparent with respect to visible light but non-transparent with respect to ultraviolet light, wherein the range of a defective part that occurs due to the spike-shaped inclusion is small.
The present invention is a method for growing a diamond layer via microwave plasma CVD, said method being characterized by comprising a step for disposing a substrate 2 inside a reaction vessel 1 of a microwave plasma CVD device 10, a step for introducing a raw material gas (reaction gas) 6 into the reaction vessel 1, and a step for irradiating a surface of the substrate 2 with microwave plasma to grow a diamond layer on the surface of the substrate 2, wherein, in the step for growing the diamond layer, the substrate 2 is moved in a direction parallel to the surface of the substrate 2, and/or the irradiation position of the microwave plasma is moved in a direction parallel to the surface of the substrate 2. This method provides a large-diameter diamond substrate.
C23C 16/511 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c. à d. procédés de dépôt chimique en phase vapeur (CVD) caractérisé par le procédé de revêtement au moyen de décharges électriques utilisant des décharges à micro-ondes
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
The present invention is a method for manufacturing a light-receiving element, the method comprising: a step for using an epitaxial wafer (10), in which an InP buffer layer (2), an InGaAs light absorption layer (3), and an InP cap layer (4) have been grown on an InP substrate (1), and forming an InGaAs contact layer (5A) on the InP cap layer (4); a step for removing a portion of the InGaAs contact layer (5A) by a photolithography method to form an InGaAs contact part (5B); a step for forming a protective film (6) so as to cover the InP cap layer (4) and the InGaAs contact part (5B); a step for forming an opening pattern part on a portion of the protective film (6); a step for diffusing impurities into the opening pattern part in a phosphorus-containing atmosphere; a step for selectively removing, using a strongly basic aqueous solution, phosphorus precipitates attached to the surface in the step for diffusing impurities; and a step for forming an electrode on the InGaAs contact part (5B) and the rear surface of the InP substrate (1). Consequently, provided is a method which is for manufacturing a light-receiving element and by which only phosphorus precipitates precipitated on a wafer surface can be selectively etched.
H01L 31/10 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails dans lesquels le rayonnement commande le flux de courant à travers le dispositif, p.ex. photo-résistances caractérisés par au moins une barrière de potentiel ou une barrière de surface, p.ex. photo-transistors
H01L 21/306 - Traitement chimique ou électrique, p.ex. gravure électrolytique
87.
NITRIDE SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING SAME
The present invention relates to a nitride semiconductor wafer comprising a silicon-based substrate, a buffer layer that comprises a nitride semiconductor and is laminated on the silicon-based substrate; and a functional layer that includes at least a GaN layer and is laminated on the buffer layer, the nitride semiconductor wafer being characterized in that: the buffer layer is doped with Fe; the Fe concentration distribution in the lamination direction of the buffer layer has a point where the Fe concentration is the highest, and the Fe concentration decreases from the point where the Fe concentration is the highest toward the functional layer; the Fe concentration at the point where the Fe concentration is the highest is 2.5×1018atoms/cm3to 6.0×1018atoms/cm3inclusive; and the Fe concentration in an upper surface of the functional layer side of the buffer layer is 4.0×1017atoms/cm3 or less. The present invention thus provides a nitride semiconductor wafer in which warping is suppressed.
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/338 - Transistors à effet de champ à grille Schottky
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 29/812 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à grille Schottky
An epitaxial wafer cleaning method for cleaning a wafer having an epitaxial film formed on a front surface thereof, including: a first cleaning step of supplying a cleaning solution containing O3 to all surfaces, including front, back, and end surfaces, of the wafer to perform spin cleaning; a second cleaning step of supplying a cleaning solution to the back and end surfaces of the wafer to perform cleaning with a roll brush after the first cleaning step; a third cleaning step of supplying a cleaning solution containing O3 to the front surface of the wafer to perform spin cleaning after the second cleaning step; and a fourth cleaning step of supplying a cleaning solution containing HF to the front surface of the wafer to perform spin cleaning after the third cleaning step.
The present invention provides a method for producing a bonded light-emitting element wafer wherein a light-emitting element structure that serves as a micro-LED and a substrate to be bonded are bonded to each other by the intermediary of an adhesive, the method comprising: a step in which a light-emitting element structure and a substrate to be bonded are bonded to each other by the intermediary of an adhesive, thereby obtaining a bonded wafer; a step in which the bonded wafer is optically examined for defective parts so as to form map data for removal; and a step in which a defective part of the bonded wafer is irradiated with a laser light beam for removal from the substrate to be bonded side on the basis of the map data for removal so that the adhesive contained in the defective part is sublimated by absorbing the laser light beam for removal, thereby removing a part of the light-emitting element structure contained in the defective part so as to obtain a bonded light-emitting element wafer. Consequently, the present invention provides a method for producing a bonded light-emitting element wafer, the method being capable of producing a bonded light-emitting element wafer by selectively removing a defective part of a light-emitting element structure.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
B23K 26/00 - Travail par rayon laser, p.ex. soudage, découpage ou perçage
B23K 26/57 - Travail par transmission du faisceau laser à travers ou dans la pièce à travailler le faisceau laser entrant dans une face de la pièce à travailler d’où il est transmis à travers le matériau de la pièce à travailler pour opérer sur une face différente de la pièce à travailler, p.ex. pour effectuer un enlèvement de matière, pour rac
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
The present invention is a method for producing a heteroepitaxial wafer in which a 3C-SiC single crystal film is heteroepitaxially grown on a single crystal silicon substrate, said method comprising: a first step for removing a natural oxide film on a surface of a single crystal silicon substrate by hydrogen baking using a low-pressure CVD device; a second step for forming a SiC nucleus on the single crystal silicon substrate at a pressure of 13-13,332 Pa and a temperature of 600-1200℃ while supplying a source gas containing carbon; and a third step for growing a SiC single crystal at a pressure of 13-13,332 Pa and a temperature of not less than 800°C but less than 1200°C, while supplying a source gas containing carbon and silicon, to form a 3C-SiC single crystal film. Thus, provided is a method for producing a heteroepitaxial wafer that makes it possible to efficiently epitaxially grow a good 3C-SiC single crystal film on a single crystal silicon substrate.
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
The present invention provides a method for producing a silicon single crystal by a CZ process that uses a cusp magnetic field that is formed by an upper coil and a lower coil, the coils being provided in a pulling furnace. This method for producing a silicon single crystal is characterized in that a silicon single crystal is pulled in a straight body formation step, while setting the rotation rate of a silicon single crystal to 7 rpm to 12 rpm, the rotation rate of a quartz crucible to 1.0 rpm or less, the position of the magnetic field minimum plane of the cusp magnetic field within the range from 10 mm below the surface of the raw material melt to 5 mm above the surface of the raw material melt, and the magnetic field strength of the cusp magnetic field at the intersection point of the inner wall of the quartz crucible and the plane that is level with the magnetic field minimum plane to 800 G to 1,200 G. Consequently, the present invention provides a method for efficiently producing a silicon single crystal which has a lower oxygen concentration than ever before, while having a good in-plane distribution of the oxygen concentration.
The present invention is a semiconductor wafer manufacturing method characterized by having: (1) a process of forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) a process of obtaining a laminated wafer by forming a carbon-non-doped silicon film on the carbon-doped silicon film at the first temperature; and (3) a process of obtaining a semiconductor wafer by annealing the laminated wafer at a second temperature higher than the first temperature or by further forming a film on the laminated wafer at the second temperature. Accordingly, provided is a method for manufacturing a semiconductor wafer having a carbon-containing silicon layer in which there is no deposition of SiC on the wafer surface and other defects are also suppressed.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p.ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p.ex. recuit, frittage
The present invention provides a resistivity measurement method for measuring, by a capacitance-voltage (C-V) method, the resistivity of an epitaxial (EP) layer formed in an epitaxial wafer (EPW) that has been manufactured using a low-resistivity substrate, the resistivity measurement method performing, with respect to an SEMI-converted resistivity obtained by measuring, with the C-V method, the resistivity of an EP layer to be measured, or with respect to a resistivity obtained by performing a predetermined conversion on the SEMI-converted resistivity, a conversion according to a first conversion formula and a conversion according to a second conversion formula to obtain a four-probe resistivity of the EP layer to be measured. The first conversion formula is determined by comparing a C-V resistivity, obtained by measuring, with the C-V method, a standard polished wafer (PW) to which a four-probe standard resistivity value is attached, with the four-probe standard resistivity. The second conversion formula is determined by comparing the C-V resistivities of the EP layers of a high-resistivity substrate EPW fabricated using a high-resistivity substrate having a resistivity measurable with the C-V method, and a low-resistivity substrate EPW fabricated using a low-resistivity substrate. Thus, it is possible to provide a resistivity measurement method having a novel resistivity conversion for tracing the C-V method to an international standard using a PW wafer.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01N 27/00 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques
G01N 27/06 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un liquide
94.
METHOD FOR DRY ETCHING SINGLE CRYSTAL SILICON WAFER, METHOD FOR PRODUCING SINGLE CRYSTAL SILICON WAFER, AND SINGLE CRYSTAL SILICON WAFER
22222 to 2.5 nm or more. Consequently, the present invention provides: a method for dry etching a single crystal silicon wafer, the method being capable of providing a silicon wafer with a roughened surface; and a method for producing a silicon wafer, wherein only one side of a silicon wafer is provided with a roughened surface.
The present invention pertains to a cylinder grinding machine that comprises: first and second detection means for detecting, in a non-contact manner, proximity between one end or the other end of a crystal rod and a spindle or a countershaft; and a drive mechanism which is capable of changing and adjusting the movement speed of a second support unit on the countershaft side. When one end of the crystal rod is to be supported through contact with the countershaft, a movement speed B of the second support unit during a period from when proximity between the one end and the countershaft is detected by the second detection means to when a contact for support takes place is so adjusted as to be slower than a movement speed A obtained until the detecting of proximity detection took place. Further, when the other end of the crystal rod is to be supported through contact with the spindle, a movement speed D during a period from when proximity between the other end and the spindle is detected by the first detection means to when a contact for support takes place is so adjusted as to be slower than a movement speed C obtained until the detecting of proximity took place. This configuration enables providing a cylinder grinding machine that makes it possible to minimize occurrences of breakage at terminal ends of a crystal rod and mechanical misalignment of a support unit during a loading process, to shorten the time required for the process, and to reduce the need for maintenance of portions for detecting the positional relation between the crystal rod and the spindle or the like.
B24B 5/04 - Machines ou dispositifs pour meuler des surfaces de révolution des pièces, y compris ceux qui meulent également des surfaces planes adjacentes; Accessoires à cet effet possédant des pointes ou des mandrins pour maintenir la pièce pour meuler extérieurement des surfaces cylindriques
B24B 41/06 - Supports de pièces, p.ex. lunettes réglables
B24B 49/12 - Appareillage de mesure ou de calibrage pour la commande du mouvement d'avance de l'outil de meulage ou de la pièce à meuler; Agencements de l'appareillage d'indication ou de mesure, p.ex. pour indiquer le début de l'opération de meulage impliquant des dispositifs optiques
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
96.
METHOD FOR PRODUCING GROUND WAFER AND METHOD FOR PRODUCING WAFER
The present invention provides a method for producing a ground wafer, wherein a ground wafer is produced by grinding a starting material wafer that has a first main surface and a second main surface, the method comprising: a first resin bonding step in which a resin is bonded to the first main surface of the starting material wafer, thereby forming a first resin layer on the first main surface; a step in which the second main surface, on which the first resin layer is not present, is subjected to one-side grinding; a first resin layer removal step in which the first resin layer is removed; a step in which the first main surface is subjected to one-side grinding; a second resin bonding step in which a resin is bonded to the second main surface, thereby forming a second resin layer on the second main surface; a step in which the first main surface, on which the second resin layer is not present, is subjected to one-side grinding; a second resin layer removal step in which the second resin layer is removed; and a step in which the second main surface is subjected to one-side grinding. Consequently, the present invention provides: a method for producing a ground wafer for the purpose of improving nanotopography and warp level at the same time; and a method for producing a wafer, the method enabling the production of a wafer that has excellent quality such as excellent flatness.
B24B 41/06 - Supports de pièces, p.ex. lunettes réglables
B24B 7/22 - Machines ou dispositifs pour meuler les surfaces planes des pièces, y compris ceux pour le polissage des surfaces planes en verre; Accessoires à cet effet caractérisés par le fait qu'ils sont spécialement étudiés en fonction des propriétés de la matière des objets non métalliques à meuler pour meuler de la matière inorganique, p.ex. de la pierre, des céramiques, de la porcelaine
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
97.
SUBSTRATE FOR ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREFOR
The present invention is a substrate for an electronic device, the substrate being obtained by forming a nitride semiconductor film on a bonded substrate of a silicon single crystal, wherein: the bonded substrate is a substrate obtained by bonding, via an oxide film, a first silicon single crystal substrate having the (111) crystal plane orientation and a second silicon single crystal substrate having the (111) crystal plane orientation; and the film thickness of the oxide film is 2-470 nm. Consequently, provided is a substrate for an electronic device, the substrate being obtained by forming a nitride semiconductor on a silicon single crystal and having higher breaking strength.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
98.
RESISTIVITY MEASUREMENT DEVICE AND RESISTIVITY MEASUREMENT METHOD
The present invention is a resistivity measurement device for semiconductor wafers, characterized by comprising a mercury electrode unit provided with a mercury electrode as a measurement probe, and an inert gas supply means configured so as to cause an inert gas to flow to the mercury electrode unit from at least three directions. Thereby, a resistivity measurement device can be provided which makes it possible to inhibit deterioration of a mercury electrode due to mercury oxidization at a low cost, and to reliably measure semiconductor wafer resistivity for a long period of time.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01R 27/02 - Mesure de résistances, de réactances, d'impédances réelles ou complexes, ou autres caractéristiques bipolaires qui en dérivent, p.ex. constante de temps
The present invention is an epitaxial wafer in which an epitaxial film made of a semiconductor material that is different from silicon is formed on a silicon substrate. The epitaxial film has a film thickness of less than 1 at the outer peripheral part of the wafer when the film thickness at the central part of the wafer is 1. Due to this configuration, it is possible to provide an epitaxial wafer having a heteroepitaxial film with few defects, without having to rely on the silicon wafer dopant concentration or the type of silicon wafer.
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/31 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour former des couches isolantes en surface, p.ex. pour masquer ou en utilisant des techniques photolithographiques; Post-traitement de ces couches; Emploi de matériaux spécifiés pour ces couches
The present invention provides a double-sided polishing method including a startup stage for gradually increasing a polishing rate from a polishing stopped state, a main polishing step, continuous with the startup stage, for performing double-sided polishing, and a ramp-down stage for gradually lowering the polishing rate from the main polishing step to return to the polishing stopped state, characterized in that the main polishing step includes a plurality of substeps for performing double-sided polishing with different polishing rates, and the polishing rate at which the double-sided polishing is performed in the last of the plurality of substeps is at most equal to 0.35 μm/minute. This makes it possible to provide a double-sided polishing method that has a high productivity and that enables wafers having good nanotopography to be obtained.
B24B 37/08 - Machines ou dispositifs de rodage; Accessoires conçus pour travailler les surfaces planes caractérisés par le déplacement de la pièce ou de l'outil de rodage pour un rodage double face
B24B 37/24 - Tampons de rodage pour travailler les surfaces planes caractérisés par la composition ou les propriétés des matériaux du tampon
H01L 21/304 - Traitement mécanique, p.ex. meulage, polissage, coupe
