A debris determination method of determining presence or absence of debris occurrence around hard laser mark after hard laser mark is formed on a back surface of wafer or after back surface of wafer is polished after formation of hard laser mark, wherein thickness unevenness parameter of wafer is measured by flatness measuring instrument, and statistical data on thickness unevenness parameter of region including hard laser mark (referred to as region A) is extracted, along with statistical data on a thickness unevenness parameter of a region adjacent to the region A (referred to as region B) is extracted and statistical data of region A and statistical data of region B are compared and a difference is calculated, when the difference is equal to or greater than a predetermined threshold, debris is determined to occur. This provides debris determination method that can accurately detect a local thickness variation due to debris.
The present invention provides: a substrate containing a carbon-doped silicon epitaxial layer, the substrate having a carbon-doped silicon epitaxial layer on a silicon substrate and a non-carbon-doped silicon epitaxial layer on the carbon-doped silicon epitaxial layer, wherein the carbon concentration in the carbon-doped silicon epitaxial layer decreases continuously or stepwise from the silicon substrate side toward the non-carbon-doped silicon epitaxial layer side; and a method for manufacturing said substrate. Consequently, a substrate containing a carbon-doped silicon epitaxial layer, in which both good gettering characteristics and a high-quality silicon epitaxial layer having good crystallinity are achieved, and a method for manufacturing said substrate are provided.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
3.
SILICENE LAYER-CONTAINING SILICON SUBSTRATE AND METHOD FOR PRODUCING SAME
The present invention is a silicene layer-containing silicon substrate and a method for producing the same, the silicene layer-containing silicon substrate being characterized by comprising a silicene layer on a silicon substrate and a carbon-doped silicon layer on the silicene layer. Thus, provided are: a silicene layer-containing silicon substrate in which oxidation of the silicene layer is suppressed; and a method for producing the same.
The present invention relates to: a silicene layer-containing silicon substrate having a first carbon doped silicon layer on a silicon substrate, a silicene layer on the first carbon doped silicon layer, and a second carbon doped silicon layer on the silicene layer; and a method for producing the same. Provided is a silicene layer-containing silicon substrate in which a silicene layer is formed on an insulating layer.
The present invention is a method for evaluating a surface defect of an SiGe substrate, the method being characterized by including: a step for preparing an SiGe epitaxial substrate for cross-sectional observation; a first defect-manifesting step for manifesting a defect on the surface of the substrate for cross-sectional observation through selective etching; a cross-sectional observation step for evaluating, in advance, the cross-sectional shape of an etching pit formed through the selective etching in the substrate for cross-sectional observation, and obtaining a reference ratio of the lateral-width-direction size of the defect being evaluated to the depth; a step for preparing a substrate for evaluation; a second defect-manifesting step for manifesting a defect on the surface of the substrate for evaluation through selective etching; and an evaluation step for observing the surface of the substrate for evaluation that has been subjected to the second defect-manifesting step, counting only defects for which the ratio of the lateral-width-direction size to the depth is equal to or less than the reference ratio, and evaluating the surface defect. This makes it possible to provide a method for evaluating a surface defect of an SiGe substrate, the method making it possible to easily and very accurately evaluate defects.
The present invention is a method for managing a surface defect inspection device on which a high-low angle scattering detector is mounted, the method comprising steps of: preparing, as a standard wafer, a semiconductor Si wafer in which a plurality of defects having a convex or concave shape in which the dimension in the direction parallel to the surface is larger than the dimension in the vertical direction and having known coordinates and sizes are formed on the outermost surface; with a device to be managed, detecting by a detector scattered light from defects of the standard wafer; acquiring the coordinates and size of the defects; for defects of the same coordinates, calculating for each detector a detected size difference, which is the difference between the known size of a standard wafer and the detected size; acquiring the absolute value of the most frequent value for each detector; and when the absolute value of the most frequent value of the detection size difference of a high-angle scattering detector is larger than that of a low-angle scattering detector, performing inspection and calibration of the optical system of the device. Thus, it is possible to provide a management method for a surface defect inspection device capable of detecting an abnormality only in the high-angle scattering detector of the surface defect inspection device and calibrating the device in which the abnormality has been detected.
A method for manufacturing a silicon substrate for a quantum computer, the method includes the steps of forming a Si epitaxial layer by epitaxial growth using a Si source gas as a silicon-based raw material gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on a silicon substrate, forming an oxygen (O) δ-doped layer by oxidizing a surface of the Si epitaxial layer, and forming a Si epitaxial layer by epitaxial growth using a Si source gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on the δ-doped layer.
C30B 29/68 - Crystals with laminate structure, e.g. "superlattices"
C30B 31/06 - Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structureApparatus therefor by contacting with diffusion material in the gaseous state
H10D 86/00 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
The present invention provides an epitaxial wafer which has a single crystal Si epitaxial layer (Si epitaxial layer) on a single crystal Si substrate. The Si epitaxial layer has a single crystal Si lattice spacing of 5.408 Å or less. A dopant in the single crystal Si substrate is diffused from the single crystal Si substrate into the Si epitaxial layer, while being reduced, and has a concentration profile locally higher on the Si epitaxial layer side than on the single crystal Si substrate side at the interface between the single crystal Si substrate and the Si epitaxial layer. The epitaxial wafer is a wafer for bonding. The Si epitaxial layer has a function as an etching stopping layer or a polishing stopping layer during thinning after bonding. Consequently, the present invention provides an epitaxial wafer which has a function as a stopping layer in an etching/polishing step during thinning after bonding especially in a silicon device manufacturing process.
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
9.
GROUP-III NITRIDE SEMICONDUCTOR WAFER AND METHOD FOR PRODUCING SAME
The present invention is a group-III nitride semiconductor wafer including a group-III nitride semiconductor film on a substrate for film formation, in which in a cross-sectional shape of a surface of the substrate for film formation of a chamfered portion of the substrate in a diameter direction, a chamfering angle (θ1) relative to the surface of the substrate is 21° or more and 23° or less, and on the surface of the substrate in a diameter direction, a chamfering width (X1) is 500 μm or more and 1000 μm or less, which is a distance between an outer peripheral end portion of the substrate for film formation and an inner peripheral end portion of the chamfered portion. Thereby, the group-III nitride semiconductor wafer, in which the group-III nitride semiconductor film is provided on the substrate for film formation, and the method for producing the same are provided.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H10D 62/85 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
H10D 62/852 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP
The present invention is a method for producing a light emitting device, the method includes the steps of growing an epitaxial layer including at least a light emitting layer having (AlxGa1-x)yIn1-yP (0≤x<1, 0.4≤y≤0.6) as an active layer above a starting substrate, and forming an isolation groove to form a device in the light emitting layer by an ICP dry etching method using inductively coupled plasma, in which a temperature of a substrate including the epitaxial layer at the time of processing to form the isolation groove by the ICP dry etching method is 40° C. or less. Thereby, the method for producing a light emitting device can be provided, in which luminance decrease can be prevented when the light emitting device having a micro-LED size is formed by processing the epitaxial layer having the AlGaInP-based light emitting layer using the ICP dry etching method.
The present invention is a member 34 having a heat spreader structure including a substrate member 31 in which an integrated circuit portion 10 is formed, and a heat spreader structure portion 9 formed on the integrated circuit portion 10, in which the integrated circuit portion 10 forms a recessed and protruding shape, the heat spreader structure portion 9 is formed by either a diamond layer 6 with a protruding and recessed shape that fits the recessed and protruding shape of the integrated circuit portion 10 or by a silicon substrate 8 having a diamond layer 6 formed thereon where the silicon substrate 8 has a protruding and recessed shape that fits the recessed and protruding shape of the integrated circuit portion 10, and the protruding and recessed shape of the heat spreader structure portion 9 is fitted to the recessed and protruding shape of the integrated circuit portion 10 to bond the heat spreader structure portion 9 to the substrate member 31. This provides a more efficient heat dissipation structure.
3322O. Thus, provided is a chromium-free etching liquid that is specialized for SiGe substrates and is suitable for detecting defects in SiGe substrates.
x1-xy1-y1-yP (wherein 0 ≤ x ≤ 1 and 0 ≤ y ≤ 1) and in which at least an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially stacked on an n-type GaP substrate; and a p-type GaP layer which is a window layer and is superposed on a second main surface of the quaternary light-emitting layer, the second main surface being on the opposite side of a first main surface which is on the n-type GaP substrate side. This compound semiconductor substrate is characterized in that, in the active layer, the p-type impurity concentration is 9 × 1015(Atoms/cm3) or less, and the n-type impurity concentration is 7 × 1015(Atoms/cm3) or less. Consequently, the present invention provides: a compound semiconductor substrate which has a quaternary light-emitting layer of AlGaInP, and which enables a light-emitting element to have good life characteristics of luminance during energization if applied thereto; and a method for producing the compound semiconductor substrate.
H10H 20/824 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H10H 20/816 - Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
14.
METHOD FOR GROWING DIAMOND LAYER AND MICROWAVE PLASMA CVD APPARATUS
The present invention is a method for growing a diamond layer by a microwave plasma CVD method, including: a step of placing a substrate 2 in a reaction vessel 1 of a microwave plasma CVD apparatus 10; a step of introducing a raw material gas (reaction gas) 6 into the reaction vessel 1; and a step of growing a diamond layer on a surface of the substrate 2 by irradiating microwave plasma on the surface of the substrate 2, wherein the step of growing the diamond layer includes at least one of moving the substrate 2 in a direction parallel to the surface of the substrate 2 and moving an irradiation position of the microwave plasma in a direction parallel to the surface of the substrate 2. Thereby, a large-diameter diamond substrate is provided.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
15.
METHOD FOR PRODUCING SEMICONDUCTOR WAFER AND SEMICONDUCTOR WAFER
A method for producing a semiconductor wafer, the method including steps of: (1) forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) forming a carbon-undoped silicon film on the carbon-doped silicon film at the first temperature to obtain a stacked wafer; and (3) annealing the stacked wafer at a second temperature higher than the first temperature or further forming a film on the stacked wafer at the second temperature to obtain a semiconductor wafer. This provides a method for producing a semiconductor wafer having a carbon-containing silicon layer without precipitation of SiC on the wafer surface and with inhibited other defects.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H10D 62/834 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
16.
EXHAUST ARRARATUS, SILICON SINGLE-CRYSTAL PRODUCTION APPARATUS, EXHAUST METHOD, AND METHOD FOR PRODUCING SILICON SINGLE CRYSTALS
The present invention is an exhaust apparatus which is connected to a silicon single-crystal pulling apparatus which comprises a chamber and a quartz crucible in the chamber and pulls silicon single crystals from a raw material melt stored in the quartz crucible. The exhaust apparatus is characterized by comprising: an exhaust pipe which is connected to the chamber and discharges an inert gas introduced into the chamber; a water supply device which is connected to the exhaust pipe and supplies the exhaust pipe with water for removing sediment accumulated in the exhaust pipe; and a storage tank which is connected to the exhaust pipe and which stores the water discharged from the exhaust pipe and precipitates and removes the sediment included in the water. As a result, an apparatus which safely and continuously removes silicon oxide (SiOx) sediment generated in an exhaust pipe without opening an exhaust gas pipe in pulling silicon single crystals by CZ method is provided.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a SiGe substrate manufacturing method characterized by comprising: a step for epitaxially growing a SiGe layer on the main front surface of a Si substrate; a step for polishing the main front surface and the main back surface of the Si substrate, which has been provided with the SiGe layer, while sandwiching the Si substrate with pads; and a step for cleaning the Si substrate, which has been provided with the SiGe layer, after the polishing. As a result, the present invention provides a SiGe substrate manufacturing method in which a SiGe layer is formed on a Si substrate, the method efficiently homogenizing the surface of the SiGe layer and manufacturing a high-quality SiGe substrate.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
19.
Ge-CONTAINING SUBSTRATE, AND METHOD FOR MANUFACTURING Ge-CONTAINING SUBSTRATE
x1-x1-x layer (0≤x<1) on the silicon epitaxial layer. Thus provided is a high-quality, efficiently manufactured Ge-containing substrate having an Si substrate and a Ge-containing layer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
A method for producing silicon single crystal by CZ method using a cusp magnetic field formed by upper and lower coils coil provided in pulling furnace, the silicon single crystal is pulled up in a straight-body step by setting a rotational rate of the silicon single crystal to 7 rpm or more and 12 rpm or less, rotational rate of a quartz crucible to 1.0 rpm or less, position of a magnetic field minimum plane of the cusp magnetic field in a range of 10 mm downward to 5 mm upward from a raw-material melt surface, and intensity of magnetic field of cusp magnetic field at intersection of plane having same height as magnetic field minimum plane and inner wall of quartz crucible from 800 to 1200 G. Method for efficiently producing silicon single crystal having lower oxygen concentration and better in-plane distribution of oxygen concentration compared to conventional techniques.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
C30B 15/30 - Mechanisms for rotating or moving either the melt or the crystal
The present invention is a method for manufacturing an SiGe substrate provided with an SiGe layer on the main surface of a silicon substrate, the method being characterized in that the SiGe layer is grown on the main surface of the silicon substrate by using, as the silicon substrate, a silicon substrate having an off angle of 0.1° to 0.7° on the main surface thereof. Thereby provided are: a method for manufacturing an SiGe substrate in which defects on the surface of an SiGe layer, in particular cross-hatch-like defects, are suppressed; and an SiGe substrate.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
22.
METHOD FOR MEASURING OXYGEN CONCENTRATION OF OXYGEN ATOMIC LAYER
The present invention provides a method for measuring the oxygen concentration of an oxygen atomic layer of an epitaxial wafer in which the oxygen atomic layer and a single crystal silicon epitaxial layer on the oxygen atomic layer are formed on a silicon single crystal substrate. The method includes: creating in advance a calibration curve between the oxygen concentration of the oxygen atomic layer of an epitaxial wafer for a preliminary test and the band edge emission intensity of the epitaxial wafer for the preliminary test as determined by a photoluminescence method or a cathode luminescence method; and measuring the oxygen concentration of an oxygen atomic layer of an epitaxial wafer to be measured from the measurement result of the band edge emission intensity of the epitaxial wafer to be measured using the calibration curve. As a result, there is provided a method for measuring the oxygen concentration of an oxygen atomic layer in an epitaxial wafer in a stable and simple way in a non-destructive manner.
G01N 23/2258 - Measuring secondary ion emission, e.g. secondary ion mass spectrometry [SIMS]
G01N 27/62 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating the ionisation of gases, e.g. aerosolsInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electric discharges, e.g. emission of cathode
The present invention is a production method for an SiGe substrate that involves growing an SiGe layer on a silicon substrate. The production method is characterized in that growth of the SiGe layer is begun at a temperature that is at or above room temperature and at or below the lowest glass transition temperature of the most stable structure at the surface of the silicon substrate in accordance with the crystal plane orientation at the surface of the silicon substrate, and the SiGe layer is grown as the temperature is raised above the lowest glass transition temperature. The present invention thereby provides a method for producing a high-quality SiGe substrate that has a good-quality SiGe layer formed on a silicon substrate.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is an epitaxial wafer, including an epitaxial film of a semiconductor material different from silicon being formed on a silicon substrate, in which the epitaxial film has a film thickness of less than 1 at a wafer outer-peripheral portion when a film thickness at a center of the wafer is defined as 1. Thereby, the epitaxial wafer having a heteroepitaxial film with few defects without dependence on a dopant concentration or a variety of a silicon wafer is provided.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
25.
EPITAXIAL SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND METHOD FOR MANUFACTURING VERTICAL DEVICE SUBSTRATE
The present invention pertains to an epitaxial substrate comprising a nitride semiconductor epitaxial layer on a main surface of a Si substrate, the epitaxial substrate being characterized in that: the rear surface of the Si substrate has recesses in which the substrate thickness of a region other than an outer peripheral part is less than the substrate thickness of the outer peripheral part; the width of the outer peripheral part in the radial direction is 1/15 to 1/6 of the diameter of the Si substrate; the average thickness of the region other than the outer peripheral part is 1/3 to 1/2 of the thickness of the outer peripheral part; and the warpage of said epitaxial substrate is at most 50 μm. Consequently, provided are: an epitaxial substrate in which a nitride semiconductor layer is formed on a Si substrate and in which both shortening of etching time and ensuring of the load resistance of a Si support substrate are achieved, and both shortening of etching time and a reduction in warpage of an epitaxial wafer due to the stress of a heteroepitaxial film are achieved; and a method for manufacturing the same.
The present invention provides a method for producing a semiconductor wafer that has, on the surface thereof, protrusions made of silicon carbide crystals. The method is characterized by comprising: a step for forming a carbon-containing silicon film on a silicon substrate at a first temperature; a step for precipitating silicon carbide crystals in the silicon film by annealing the silicon substrate, on which the silicon film has been formed, at a second temperature; and a step for polishing the silicon film on the annealed silicon substrate to produce a semiconductor wafer in which protrusions made of the silicon carbide crystals are formed on the silicon substrate. Thus, there is provided a method for producing a semiconductor wafer containing silicon carbide crystals (SiC crystals) having a large surface roughness by a simple process.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
27.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SAME
The present invention provides a nitride semiconductor substrate including a substrate for film formation including a composite substrate having a plurality of layers bonded together and a single-crystal silicon layer formed on the composite substrate and a nitride semiconductor thin film formed on the substrate for film formation. The nitride semiconductor thin film includes a GaN layer, and the GaN layer is doped with at least 1×1019 atoms/cm3 or more and less than 5×1020 atoms/cm3 of carbon and/or 5×1018 atoms/cm3 or more and less than 5×1020 atoms/cm3 of iron. Thereby, the nitride semiconductor substrate with an improved high-frequency characteristic and a method of producing this substrate can be provided.
The present invention is a cylindrical grinding method for cylindrically grinding a crystal ingot, wherein: a support device having a concave-shaped support section able to support a conical end of the crystal ingot is used as a support device; a cylindrical grinder equipped with a remaining state determining means for determining whether part of the conical end of the crystal ingot remains inside the support section is used as a cylindrical grinder; and in continuous processing of the cylindrical grinding, continuous processing is maintained if the remaining state determining means determines that no part of the end is remaining inside the support section, and the continuous processing is stopped if it is determined that part of the end is remaining. Provided thereby are a cylindrical grinding method and a cylindrical grinder making it possible to reliably find it out if a distal end of a conical tail part is remaining inside the support device in an unloading step after a silicon single crystal ingot has been subjected to cylindrical grinding.
B24B 41/06 - Work supports, e.g. adjustable steadies
B24B 5/04 - Machines or devices designed for grinding surfaces of revolution on work, including those which also grind adjacent plane surfacesAccessories therefor involving centres or chucks for holding work for grinding cylindrical surfaces externally
B24B 49/08 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving liquid or pneumatic means
B24B 49/12 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving optical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
29.
DEFECT EVALUATION METHOD FOR SEMICONDUCTOR SILICON WAFER
The present invention is a defect evaluation method for a semiconductor Si wafer for evaluating a defect shape inside the Si wafer, the defect evaluation method comprising: a first defect detection step for irradiating a surface of an Si wafer with a DUV laser beam to acquire the position coordinates of defects included in the outermost surface; a second defect detection step for irradiating the surface of the Si wafer with a visible-light laser beam to acquire the position coordinates of defects included in a surface layer region including the outermost surface; a defect classification step for comparing the position coordinates of the defects acquired in the first and second defect detection steps, classifying defects detected only in the first defect detection step and defects of the same coordinates among the defects detected in the first and second defect detection steps into exposed defects, and classifying defects detected only in the second defect detection step into non-exposed defects; and a defect observation step for observing the shapes of the defects classified into the non-exposed defects. Accordingly, a method for observing the overall situations of defects present in an Si wafer without destroying the structures of the defects is provided.
The present invention is a method for producing a bonded light-emitting device wafer, in which a light-emitting device structure, to be a micro LED, and a to-be-bonded substrate are bonded with each other via an adhesive, the method includes the steps of bonding the light-emitting device structure to the to-be-bonded substrate via the adhesive to obtain a bonded wafer, producing a map data for removal by optically investigating a failure portion of the bonded wafer, and irradiating the failure portion of the bonded wafer with the laser light for removal from the to-be-bonded substrate based on the map data for removal, causing a portion of the adhesive which is included in the failure portion to absorb the laser light for removal and causing the portion of the adhesive which is included in the failure portion to sublimate, thereby removing the portion of the light-emitting device structure which is included in the failure portion to obtain the bonded light-emitting device wafer. This can provide the method for producing a bonded light-emitting device wafer capable of selectively removing the failure portion of the light-emitting device structure and producing the bonded light-emitting device wafer.
A method for producing a heteroepitaxial wafer of hetero-epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, wherein the method includes: with using a reduced-pressure CVD apparatus, removing a natural oxide film on a surface of the single crystal silicon substrate with hydrogen baking; forming a SiC nucleus on the single crystal silicon substrate under a condition of a pressure of 13 Pa or higher and 13332 Pa or lower and a temperature of 600° C. or higher and 1200° C. or lower while a source gas containing carbon is supplied; and growing a SiC single crystal under a condition of a pressure of 13 Pa or higher and 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C. while a source gas containing carbon and silicon is supplied to form the 3C-SiC single crystal film.
The present invention is a method for manufacturing a high frequency SOI wafer having a structure in which a silicon single crystal substrate, a high resistivity epitaxial layer, a Trap-rich layer, a BOX layer, and an SOI layer are laminated in the stated order, wherein: a high resistivity epitaxial layer is formed in advance on the surface of another silicon single crystal substrate, the thickness of said high resistivity epitaxial layer being different from that of the silicon single crystal substrate; measurements are taken of the harmonic characteristics; and the thickness of the high resistivity epitaxial layer is determined on the basis of the measurement result. The present invention thereby provides a manufacturing method that makes it possible, in a silicon substrate having ordinary resistivity, for the harmonic characteristics to be improved a level equivalent to that of a high-resistivity substrate.
The present invention is a method for manufacturing an epitaxial wafer, for forming a single-crystal silicon layer on a silicon single-crystal wafer. The method is characterized by comprising a hydrofluoric acid cleaning step for removing a natural oxide film from the surface of the silicon single-crystal wafer with a cleaning liquid containing hydrofluoric acid, an oxygen atomic layer forming step for forming, by cleaning, an oxygen atomic layer on the surface of the silicon single-crystal wafer from which the natural oxide film has been removed, and an epitaxial growth step for epitaxially growing, by a vapor-phase growth method, the single-crystal silicon layer on the surface of the silicon single-crystal wafer on which the oxygen atomic layer has been formed, wherein a cleaning liquid containing at least hydrogen peroxide water is used for the cleaning in the oxygen atomic layer forming step. Thus, a method for manufacturing an epitaxial wafer is provided that makes it possible to efficiently form and control an oxygen atomic layer without causing a deterioration in the surface roughness of the wafer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
The present invention is a heat treatment method for performing a film-forming heat treatment which forms a film on a main surface of a silicon substrate in which the plane orientation of the main surface is {110}, said heat treatment method being characterized by including: a step in which the silicon substrate, in which the plane orientation of the main surface is {110}, is loaded into a heat treatment furnace while the internal temperature of the furnace is 540°C or lower; a step in which the temperature of the silicon substrate that was loaded into the heat treatment furnace is increased while a passivation film is formed on the main surface of the silicon substrate; and a step in which the film-forming heat treatment of the silicon substrate is performed after the temperature increase. Thus, provided is a method that suppresses and controls roughness, especially minute protruding defects, on the main surface while forming a film on the Si {110} substrate.
The present invention is a substrate for an electronic device, comprising a nitride semiconductor film formed on a bonded substrate comprising a silicon single crystal, wherein the bonded substrate is a substrate comprising a first silicon single-crystal substrate having a crystal plane orientation of {111} and a second silicon single-crystal substrate having a main surface that has an off-angle with respect to a crystal plane orientation of {100}, the first silicon single-crystal substrate and the second silicon single-crystal substrate being bonded via an oxide film, and
the nitride semiconductor film is formed on a surface of the first silicon single-crystal substrate of the bonded substrate. This provides a substrate for an electronic device, including a nitride semiconductor formed on a silicon single-crystal, which is the substrate for the electronic device with the suppressed generation of slips, cracks, etc., and with a high breaking strength, and provides a method for producing the substrate.
H10D 86/00 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
36.
SILICON SUBSTRATE AND HEAT TREATMENT METHOD FOR SILICON SUBSTRATE
The present invention provides a silicon substrate in which the plane orientation of a main surface is (110), the silicon substrate including no hollow defect that has a length in the longitudinal direction of 50 nm to 2,000 nm inclusive in the surface. As a result, provided is an Si(110) substrate in which the formation of a hollow defect is suppressed.
The present invention is a method for measuring resistivity of a silicon single crystal with resistivity of 100 Ωcm or higher, the silicon single crystal being grown with addition of nitrogen by an MCZ method, the method including: performing oxidation heat treatment at a temperature of 1100 to 1250° C. for 90 to 240 minutes on a substrate sliced from the silicon single crystal to form a thermal oxide film on a surface of the substrate; and measuring resistivity of the substrate after removing the thermal oxide film from the surface of the substrate. This provides a method for measuring resistivity of a silicon single crystal is provided which can measure a precise resistivity derived from a dopant for a silicon single crystal with resistivity of 100 Ωcm or higher that is grown with addition of nitrogen by the MCZ method.
The present invention is a method for determining a defect region of a silicon single-crystal substrate having a mirror-polished (100) surface orientation, using a laser scattering surface inspection apparatus with a rotary stage, the method being characterized in that: crystal defects present in regions of a main surface of the silicon single-crystal substrate in which the crystal orientation includes the <010> direction and the <011> direction are measured using the oblique incidence mode of the surface inspection apparatus to determine the number of defects or the defect density of the crystal defects, and it is determined whether an I-rich region is included in the silicon single-crystal substrate on the basis of the difference between the number of defects or the defect density of the crystal defects present in the region in which the crystal orientation includes the <010> direction and the number of defects or the defect density of the crystal defects present in the region in which the crystal orientation includes the <011> direction. Thus, a non-destructive and simple method for I-rich determination for a defect region of a semiconductor substrate is provided.
The present invention is a method for manufacturing a heteroepitaxial wafer by epitaxially growing a 3C–SiC monocrystalline film on a monocrystalline silicon substrate. The method is characterized in that: the method includes a step in which a monocrystalline silicon substrate with a plane orientation of (111) is prepared, a step in which, using a flash lamp device, a native oxide film on a surface of the monocrystalline silicon substrate is removed by hydrogen baking, and a step in which a source gas that includes carbon and silicon is supplied into the flash lamp device and a SiC monocrystal is grown on the surface of the monocrystalline silicon substrate; in the step in which the native oxide film is removed, after preliminary heating at 300°C–600°C, hydrogen baking is performed at 900°C–1350°C; and, in the step in which the SiC monocrystal is grown, after preliminary heating at 300°C–600°C, SiC nucleation is performed at 900°C–1350°C. Due to this configuration, a method for manufacturing a heteroepitaxial wafer is provided by which a good-quality 3C–SiC monocrystalline film is epitaxially grown with good efficiency on a monocrystalline silicon substrate.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
A method for efficiently producing a heteroepitaxial film in a thin film shape while minimizing damage to a device and material loss, including heteroepitaxial growing a 3C—SiC single crystal film on a single crystal Si substrate and then delaminating thereof, the method includes: with using a reduced-pressure CVD apparatus, removing a native oxide film on a surface of the single crystal Si substrate by hydrogen baking, performing nucleation of SiC at 1333 Pa or lower and 300° C. or higher and 950° C. or lower and forming the 3C—SiC single crystal film and forming a vacancy directly under the 3C—SiC single crystal film at 1333 Pa or lower and 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon; and producing the heteroepitaxial film by delaminating the 3C—SiC single crystal film along the vacancy.
The present invention provides a method for manufacturing a bonded semiconductor wafer, the method includes the steps of epitaxially growing an etching stop layer on a starting substrate, epitaxially growing a compound semiconductor functional layer on the etching stop layer, forming an isolation groove for forming a device in the compound semiconductor functional layer by a dry etching method, etching on a surface of the isolation groove by a wet etching method, bonding a visible light-transmissive substrate of a different material from a material of the compound semiconductor functional layer to the compound semiconductor functional layer via a visible light-transmissive thermosetting bonding member, and obtaining a bonded semiconductor wafer by removing the starting substrate from the compound semiconductor functional layer bonded to the visible light-transmissive substrate. This can provide a method for manufacturing a bonded semiconductor wafer that can make a device with suppressed generation of decrease in brightness when the device is produced on a substrate.
A substrate for a high-frequency device including a support substrate having unevenness on a surface thereof, a diamond layer on the surface of the support substrate, and a silicon oxide film layer on the diamond layer. Thereby, the substrate for a high-frequency device using diamond having excellent high-frequency characteristics and a method for producing a substrate for a high-frequency device using diamond having excellent high-frequency characteristics are provided.
G01B 11/30 - Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
43.
WAFER HAVING MICRO-LED STRUCTURE, METHOD FOR MANUFACTURING WAFER HAVING MICRO-LED STRUCTURE, AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR WAFER HAVING MICRO-LED STRUCTURE
The present invention is a wafer having a micro-LED structure, the wafer including a starting substrate, a mask formed on the starting substrate and having a mask pattern including an opening, and a plurality of epitaxial layer structures, each of the plurality of structures selectively grown on a portion corresponding to the opening of the mask pattern on the starting substrate, in which each of the plurality of the epitaxial layer structures has a pyramid-shape or a truncated pyramid-shape surrounded by {111} planes, the plurality of epitaxial layer structures includes a first structure, as a light-emitting device portion, and a second structure connected to the first structure, and a polarity of an electrode of the first structure is different from that of an electrode of the second structure, and the first structure and the second structure constitute a micro-LED structure operable as one micro-LED. Thereby, the wafer having a micro-LED structure, in which generation of brightness decrease is suppressed, can be provided.
H10H 20/813 - Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
H10H 20/824 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
44.
METHOD FOR GROWING DIAMOND ON SILICON SUBSTRATE AND METHOD FOR SELECTIVELY GROWING DIAMOND ON SILICON SUBSTRATE
The present invention is a method for growing diamond on a silicon substrate, the method includes: subjecting a surface of the silicon substrate to damage as a pretreatment so as to make a Raman shift of a peak at 520 cm-1 in Raman spectroscopy 0.1 cm-1 or more, or subjecting the surface of the silicon substrate to unevenness formation as the pretreatment so as to make a surface roughness Sa measured by AFM 10 nm or more, or subjecting the surface of the silicon substrate to both the damage and the unevenness formation thereon as the pretreatment, and growing diamond by a CVD method on the silicon substrate subjected to the pretreatment. This provides a method for growing diamond on a silicon substrate and a method for selectively growing diamond on a silicon substrate.
The present invention is a manufacturing method for a nitride semiconductor epitaxial substrate, said method being characterized by comprising: a SiC single crystal film formation step in which, while epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, a vacancy is additionally formed in a silicon layer on a surface layer of the single crystal silicon substrate directly below the 3C-SiC single crystal film; and a nitride formation step in which, while epitaxially growing a nitride semiconductor layer on the 3C-SiC single crystal film, dislocations are formed over the entire surface of the single crystal silicon substrate, and the nitride semiconductor layer having a ratio of yellow light emission intensity to band edge emission intensity of 0.02 or less is formed. In this way, a manufacturing method is provided for a large-diameter nitride semiconductor epitaxial substrate having reduced yellow light emission and non-light emission defects even when a nitride semiconductor layer is grown on a single crystal silicon substrate.
The present invention provides a method for evaluating the crystallinity of a 3C-SiC film heteroepitaxially grown on a single-crystal silicon substrate, the method being characterized in that the crystallinity of the 3C-SiC film of the heteroepitaxial wafer is determined from both a WARP value of the heteroepitaxial wafer and a value of stress imposed on the substrate and obtained by the Stoney equation. By this method, the crystallinity of a 3C-SiC film heteroepitaxially grown on a single-crystal silicon substrate is easily evaluated in a non-destructive manner without the need of a wafer processing operation.
H01L 21/66 - Testing or measuring during manufacture or treatment
47.
PINHOLE AND DEAERATION FAILURE INSPECTION METHOD FOR BAG BODY IN WHICH SEALED STORAGE CONTAINER IS HERMETICALLY PACKAGED, AND PINHOLE AND DEAERATION FAILURE INSPECTION DEVICE FOR BAG BODY IN WHICH SEALED STORAGE CONTAINER IS HERMETICALLY PACKAGED
The present invention is a pinhole and deaeration failure inspection method for a bag body in which a sealed storage container is hermetically packaged, the method inspecting for the presence or absence of a pinhole or deaeration failure in the bag body in a state in which the sealed storage container accommodating a semiconductor wafer is hermetically packaged in the bag, made of resin or having aluminum vapor deposition, in a degasified state so as not to contact the outside air, the method characterized by comprising: a pressurization step for pressurizing, with a pad, at least one side surface part of the bag body having the sealed storage container hermetically packaged therein, after a predetermined time or longer has elapsed after the hermetic packaging; a measurement step for measuring, using a sensor provided above an upper end part of the bag body having the sealed storage container hermetically packaged therein, the distance between the upper end part and the sensor in a pressurized state achieved by the pressurization step; and a determination step for determining the presence or absence of a pinhole and the presence or absence of deaeration failure in the bag body on the basis of the distance measured in the measurement step. Thus, an inspection method is provided with which it is possible to determine the presence or absence of a pinhole and the presence or absence of deaeration failure in a bag body in which a sealed storage container is hermetically packaged, by a simple method regardless of the inspector.
H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers
G01M 3/26 - Investigating fluid tightness of structures by using fluid or vacuum by measuring rate of loss or gain of fluid, e.g. by pressure-responsive devices, by flow detectors
48.
SINGLE-CRYSTAL SILICON SUBSTRATE AND METHOD FOR PRODUCING SINGLE-CRYSTAL SILICON SUBSTRATE
The present invention relates to a single-crystal silicon substrate characterized in that the plane orientation is (110) and the surface of the single-crystal silicon substrate has a surface stable structure of 1×1 in a room-temperature environment. Thus, the haze of a silicon (110) substrate is reduced, and a single-crystal silicon substrate having a stable surface structure and a method for producing the single-crystal silicon substrate are provided.
The present invention provides a nitride semiconductor epitaxial wafer which includes a composite substrate including a ceramic wafer and a silicon single crystal layer that is bonded onto the ceramic wafer, and a nitride semiconductor layer epitaxially grown on the silicon single crystal layer of the composite substrate, wherein the thermal expansion coefficient of the ceramic wafer is substantially equal to the thermal expansion coefficient of the nitride semiconductor layer. This nitride semiconductor epitaxial wafer is characterized in that the thickness of the silicon single crystal layer is 100 nm to 200 nm inclusive. As a result, it is possible to suppress melt back etching even in a structure in which a nitride semiconductor is grown on a silicon single crystal layer, and the present invention provides a nitride semiconductor epitaxial wafer in which it is easy to form an ohmic contact at a silicon single crystal layer during device manufacture.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a method for manufacturing an epitaxial wafer in which a single crystal silicon layer is formed on a single crystal silicon wafer with an oxygen atom layer interposed therebetween, the method being characterized by comprising: a step for removing a natural oxide film from the surface of the single crystal silicon wafer; a step for forming a thermal oxide film on the surface of the single crystal silicon wafer from which the natural oxide film has been removed; a step for thinning the thermal oxide film; and a step for epitaxially growing the single crystal silicon after the thinning of the thermal oxide film to form an epitaxial wafer in which the single crystal silicon layer is formed on the single crystal silicon wafer with the oxygen atom layer interposed therebetween. Provided, through this feature, is a method for manufacturing an epitaxial wafer in which an oxygen atom layer can be stably and easily introduced into an epitaxial layer in the manufacture of a silicon epitaxial wafer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
Provided is a method for manufacturing an epitaxial wafer, the method comprising: a hydrofluoric acid washing step for removing a natural oxide film on a surface of a silicon single crystal wafer with hydrofluoric acid; a pure water washing step for washing the surface of the silicon single crystal wafer, from which the natural oxide film has been removed, with pure water to form an oxygen atomic layer on the surface; an epitaxial growth step for epitaxially growing, by a vapor phase growth method, a single crystal silicon layer on the surface of the silicon single crystal wafer on which the oxygen atomic layer has been formed; and a CMP step for performing CMP processing on the surface of the single crystal silicon layer grown in the epitaxial growth step. In the pure water washing step, a planar concentration of oxygen in the oxygen atomic layer is set to 1×1015atoms/cm2 or less, and pure water containing dissolved oxygen is used. Due to this configuration, provided is a method for manufacturing an epitaxial wafer with which the planar concentration of oxygen in the oxygen atomic layer can be controlled, and defects and roughness of the surface can also be improved.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is an epitaxial wafer comprising a single-crystal silicon substrate having a resistivity of 10-5,000 Ω·cm and having, formed thereon in the following order, an epitaxial silicon film having a carbon concentration of 2×1019atoms/cm3or higher but less than 3×1020atoms/cm3and containing carbon defects and a dielectric layer. The epitaxial silicon film has a thickness satisfying the formula: 6.6×1020×exp\{-1.6×[thickness (μm) of epitaxial silicon film]\}>[carbon concentration (atoms/cm3) of epitaxial silicon film]. As a result, the present invention provides: an epitaxial silicon wafer for high-frequency integrated circuit boards which is obtained by forming the epitaxial silicon film on a silicon substrate having an ordinary resistivity and which has the excellent ability to reduce higher harmonics and is easy to process; and a method for producing the epitaxial silicon wafer.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
The present invention is a SOI wafer comprising, in this order on a silicon single crystal substrate having a resistivity of 10–5000 Ω*cm: a silicon epitaxial film having a carbon concentration of not less than 2×1019atoms/cm3and less than 3×1020atoms/cm3, and including carbon defects; a dielectric layer; and a silicon single crystal film, wherein the thickness of the silicon epitaxial film satisfies the relationship 6.6×1020×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms/cm3)]. Thus, there is provided a SOI wafer for a high-frequency integrated circuit board comprising an epitaxial wafer in which a silicon epitaxial film containing carbon at a high concentration is formed on a normal resistivity substrate, wherein the ability to reduce harmonics is superior to that of a SOI wafer comprising a conventional polysilicon layer as a trap-rich layer. Also provided is a method for manufacturing the SOI wafer for a high-frequency integrated circuit board that can be processed easily.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
The present invention is a nitride semiconductor substrate including a nitride semiconductor thin film formed on a substrate, in which the nitride semiconductor thin film includes a stress-relaxing layer formed on the substrate and a carbon-doped GaN layer formed on the stress-relaxing layer, and the GaN layer includes high carbon concentration layers and a low carbon concentration layer, the low carbon concentration layer being sandwiched between the high carbon concentration layers and having a lower carbon concentration by 75% or more than the high carbon concentration layers. This provides the nitride semiconductor substrate with improved crystallinity without increasing a thickness of a GaN epitaxial layer and without using other special materials, and a method for producing the substrate.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
55.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SAME
A nitride semiconductor substrate includes: a silicon single crystal substrate having a front surface and a back surface; and a nitride semiconductor thin film formed on the front surface, in which the silicon single crystal substrate has a carbon diffusion layer that has been implanted with carbon and has a carbon concentration higher than a bulk portion of the silicon single crystal substrate in at least the front surface and the back surface, and the carbon concentration in the carbon diffusion layer is 5E+16 atoms/cm3 or more. The nitride semiconductor substrate can suppress warp failure caused by plastic deformation during epitaxial growth and device processes when the nitride semiconductor substrate is produced using a silicon single crystal substrate.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
56.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR SUBSTRATE
The present invention is a nitride semiconductor substrate including a group III-nitride semiconductor layer containing GaN and formed on a support substrate, in which the support substrate includes: a composite substrate having laminated layers, the laminated layers including a polycrystalline ceramic core, a first adhesive layer bonded entirely to the polycrystalline ceramic core, a second adhesive layer laminated entirely to the first adhesive layer, and a barrier layer bonded entirely to the second adhesive layer; and a group III-nitride semiconductor seed crystal layer containing at least GaN, bonded on the composite substrate via a planarization layer, in which the group III-nitride semiconductor layer is formed on the group III-nitride semiconductor seed crystal layer, and crystallinity on a (0002) growth surface of GaN in the group III-nitride semiconductor seed crystal layer is 550 arcsec or less in XRD half-value width. This can provide the nitride semiconductor substrate, including the group III-nitride semiconductor layer, with a small warp, low generation of dislocation, and excellent crystallinity.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
The present invention is a diamond substrate 100 characterized by comprising: a substrate 1; a 3C-SiC layer 3 grown on the substrate 1; and a single crystal diamond layer 4 grown on the 3C-SiC layer 3. The diamond substrate is also characterized by having pores formed at a density of 0.001 to 10 pores/μm 2 on the substrate side at the interface between the substrate 1 and the 3C-SiC layer 3. As a result of this configuration, an inexpensive diamond substrate having a large diameter can be provided.
C23C 16/511 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a cleaning process device 1 comprising a horn-type ultrasonic wave generation device 5 that transmits ultrasonic waves to a cleaning liquid supplied to a polishing cloth 109 of a polishing device 100 provided with a lower surface plate 101, an upper surface of which has the polishing cloth 109 affixed thereto, a sun gear 105 which is provided inward of the lower surface plate 101, and an internal gear 107 which is provided outward of the lower surface plate 101. The cleaning process device 1 is provided with a rail 3 which is fixed so as to span the lower surface plate 101 on the internal gear 107 and the sun gear 105, and on which the ultrasonic wave generation device 5 is mounted. The ultrasonic wave generation device 5 is capable of moving on the rail 3. As the ultrasonic wave generation device 5 moves on the rail 3, a horn 23 generates ultrasonic waves which are transmitted to the polishing cloth 109 via the cleaning liquid, thereby performing ultrasonic cleaning. Thus, provided is a cleaning process device that, even when provided with a horn-type ultrasonic wave generation device, is capable of ultrasonic cleaning in which a gap between a horn and a polishing cloth is maintained with high precision.
A substrate for an electronic device, including a nitride semiconductor film formed on a bonded substrate of a silicon single crystal, in which the bonded substrate is a substrate including a first silicon single-crystal substrate having a crystal plane orientation of {111} and a second silicon single-crystal substrate having a crystal plane orientation of {100} being bonded via an oxide film, the first substrate is formed with a notch in <110> direction, the second substrate is formed with a notch in <011> direction or <001> direction, the <110> direction of the first substrate and the <011> direction of the second substrate are bonded in an angular range of −15° to 15°, and the nitride semiconductor film is formed on a surface of the first substrate of the bonded substrate.
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
60.
SPIN ETCHING DEVICE, SPIN ETCHING METHOD, AND WAFER HOLDING METHOD
The present invention is a spin etching device 1 comprising a stage 5 that holds a wafer W and spins to rotate the wafer W, wherein a removal liquid is supplied onto an upper surface of the rotating wafer W to remove a film on the upper surface of the wafer W. The spin etching device 1 includes: a plurality of edge chuck pins 13 provided on the stage 5 so as to sandwich the wafer W in point contact with an edge part 21 of the wafer W; and a plurality of wafer support pins 15 that are provided on the stage 5 and that contact a lower surface of the wafer W to support the wafer W from below in a state where a gap is formed between the stage 5 and the wafer W. Thus, an edge chuck-type spin etching device is provided that suppresses local etching of a back surface (lower surface) oxide film as much as possible, and does not affect the SFQR value of the upper surface of the wafer after etching.
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
61.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
The present invention is a nitride semiconductor substrate for high frequency, which includes an SOI substrate in which a single crystal silicon thin film is formed on a single crystal silicon substrate via a silicon oxide layer, and a nitride semiconductor layer including a GaN layer formed on the SOI substrate; in which the single crystal silicon thin film contains nitrogen at a concentration of 2.0×1014 atoms/cm3 or more and has a resistivity of 100 Ωcm or more, the single crystal silicon substrate has a resistivity of 50 mΩcm or less, and the silicon oxide layer has a thickness of 10 to 400 nm. This can provide the nitride semiconductor substrate in which the nitride semiconductor layer is grown on the SOI substrate for manufacturing devices for high frequency, and the nitride semiconductor substrate with suppressed plastic deformation.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
A method for manufacturing a bonded semiconductor wafer includes growing an etching stop layer on a starting substrate, producing an epitaxial wafer by growing an epitaxial layer having a compound semiconductor functional layer on the etching stop layer, forming an isolation groove to form a device in the compound semiconductor functional layer by a dry etching method, performing roughening etching on a surface of the epitaxial layer, being the opposite side of the starting substrate, making surface roughness thereon to have 0.1 μm or more in an arithmetic average roughness Ra, bonding a visible light-transmissive substrate to the surface opposite to the starting substrate of the epitaxial wafer via visible light-transmissive thermosetting bonding material, and removing the starting substrate. This method for manufacturing the bonded semiconductor wafer in which a micro-LED can be made with a suppressed generation of luminance decrease when a micro-LED device is produced on the substrate.
The present invention is a production method for a GaN epitaxial film. The production method is characterized by including a preparation procedure for preparing a support substrate that has a thickness of less than 1 mm and is formed by sealing a core that has a diameter of at least 150 mm and comprises a nitride ceramic with a sealing layer, a substrate production procedure for layering, in order, a flattening layer and a seed crystal layer that comprises an SiC single crystal on the support substrate to obtain an epitaxial growth substrate, and an epitaxial procedure for growing a GaN epitaxial film that has a thickness of at least 7 μm on the epitaxial growth substrate to produce a GaN epitaxial film that has a dislocation density of no more than 1.0×106/cm2. The present invention thereby provides a production method for a GaN epitaxial film that makes it possible to produce a GaN thick film that has a large diameter but has no warpage or cracks and has a dislocation density of no more than 1.0×106/cm2 by means of a simple process at low cost.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
64.
HETEROEPITAXIAL WAFER AND METHOD FOR MANUFACTURING SAME
The present invention provides a heteroepitaxial wafer which is obtained by epitaxially growing a silicon germanium layer on a silicon single crystal substrate and epitaxially growing a silicon layer on the silicon germanium layer, and which is characterized in that the relationship between the film thickness (film thickness) of the silicon germanium layer and the germanium concentration (Ge (%)) of the silicon germanium layer satisfies [film thickness (nm)] < 1.4 × 107× [Ge (%)]-4.5. As a result, provided is a heteroepitaxial wafer free of trapped metallic impurities.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
The present invention is a device for manufacturing a silicon single crystal by the CZ method, the device comprising: a chamber in which a quartz crucible and a heater for heating and melting a silicon polycrystalline raw material in the quartz crucible to obtain a raw material melt are disposed; a gas introduction pipe; and a gas exhaust pipe. The gas exhaust pipe has a plurality of pipes each having a joint part, and a pipe clamp that can be liquid-cooled by cooling water passing therethrough. The joint parts of the plurality of pipes face each other with a sealing material interposed therebetween, and the plurality of pipes are connected to each other by the facing joint parts being sandwiched by the pipe clamp. The sealing material between the joint parts can be cooled by the liquid cooling of the pipe clamp. As a result, a CZ silicon single crystal manufacturing device is provided in which the gas exhaust pipe is easy to handle and the deterioration of the sealing material between the pipes can be prevented.
The present invention provides a method for producing a heteroepitaxial wafer heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method including: with using a reduced-pressure CVD apparatus, a first step of removing a native oxide film on a surface of the single crystal silicon substrate by hydrogen baking; a second step of nucleation of SiC on the single crystal silicon substrate on a condition of pressure of 13332 Pa or lower and a temperature of 300° C. or higher and 950° C. or lower and a third step of forming the 3C-SiC single crystal film by growing a SiC single crystal on condition of pressure of 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon into the reduced-pressure CVD apparatus. This provides the method for producing the heteroepitaxial wafer that can efficiently grow high-quality 3C-SiC single crystal film heteroepitaxially on the single crystal silicon substrate.
The present invention provides a method for manufacturing an SiC substrate 100, the method being characterized by comprising: a bonding step in which a 3C-SiC layer 1a of a growth substrate 21 that is obtained by growing the 3C-SiC layer 1a on a silicon substrate 1 is bonded to a poly SiC substrate, which is a support substrate 3, thereby obtaining a bonded substrate 10; a removal step in which the silicon substrate 1 is removed from the bonded substrate 10; and a heat treatment step in which the bonded substrate 10 after the removal step is further subjected to a heat treatment so as to cause a phase transition of the 3C-SiC layer 1a, thereby obtaining an SiC substrate 100 which has a SiC layer 1b having a plane orientation that is different from the plane orientation before the heat treatment. Consequently, there is provided a method for manufacturing an SiC substrate that is capable of achieving both a larger diameter and various types of SiC.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
The present invention pertains to a resin applying method for applying a resin to a wafer, the method being characterized by comprising: preparing a wafer having a first main surface and a second main surface which is the reverse side of the first main surface; holding the second main surface of the wafer by a holding means; supplying a resin at the position opposite to the first main surface of the wafer; measuring the temperature of the resin or around the resin; referring to data of temperatures and press speeds, which are acquired in advance and at which the thickness of the resin and the press load each become a prescribed value, and selecting a press speed corresponding to the measured temperature; driving the holding means at the selected press speed to press and spread the resin on the first main surface of the wafer; stopping the holding means at a timing when the press load reaches the prescribed value; and curing the resin to form a flattened resin layer. As a result, provided are a method for applying a resin to a wafer, in which the resin thickness variation is suppressed, and a method for manufacturing a wafer, in which the wafer shape variation after grinding or after polishing is suppressed.
The present invention is a method for manufacturing a nitride semiconductor substrate that comprises a group III nitride layer including a group III nitride underlayer and a gallium nitride epitaxial layer on a Si substrate, the method comprising: a pre-flow step of supplying a gas containing an Al raw material and not containing a nitrogen raw material on a Si substrate that is heated to 1000°C or higher, using a Si 110 substrate; an underlayer formation step of supplying a gas containing a group III raw material and a nitrogen raw material to form the group III nitride underlayer on the Si substrate; and an epitaxial layer formation step of supplying a gas containing a Ga raw material and a nitrogen raw material to form the gallium nitride epitaxial layer. As a result, the present invention provides a method for manufacturing a nitride semiconductor substrate in which a Si 110 substrate is used, said nitride semiconductor substrate comprising a gallium nitride epitaxial layer having excellent surface morphology.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
71.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR WAFER, AND NITRIDE SEMICONDUCTOR WAFER
A method for manufacturing a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate includes: a step of forming the nitride semiconductor film on the silicon single-crystal substrate; and a step of irradiating the silicon single-crystal substrate with electron beam so that the silicon single-crystal substrate has a higher resistivity than a resistivity before the irradiation, wherein a substrate doped with nitrogen at a concentration of 5×1014 atoms/cm3 or more and 5×1016 atoms/cm3 or less is used as the silicon single-crystal substrate. A method for manufacturing a nitride semiconductor wafer having a nitride semiconductor film grown on a silicon single-crystal substrate, wherein the method makes it possible that a silicon single-crystal substrate having been irradiated with electron beam and thereby has an increased resistivity is prevented from recovering and having a lower resistivity during the epitaxial growth or other thermal treatment steps.
The present invention provides a cylindrical grinding machine which is capable of supporting a crystal rod regardless of the presence or absence of a conical cone portion and a tail portion at the two ends of the crystal rod, and which additionally comprises a discriminator capable of automatically discriminating between the presence or absence of the cone portion, etc., and a controller in which set values are registered separately depending on whether the cone portion, etc., are present or absent during traverse grinding, for a clamping force with which the crystal rod is clamped by a pair of support units and a maximum griding allowance per operation of a grinding unit, wherein the controller automatically selects a grinding recipe that includes the set values of the clamping force and the maximum griding allowance per operation, corresponding to the presence or absence of the cone portion, etc., as discriminated automatically by the discriminator, and traverse grinding can be automatically performed on the basis of the grinding recipe. The present invention thereby provides a cylindrical grinding machine and a cylindrical grinding method with which, when performing traverse grinding of a crystal rod, grinding can be performed efficiently and at low cost, and with a stable quality by preventing the occurrence of positional displacement and breakage of the crystal rod.
B24B 5/02 - Machines or devices designed for grinding surfaces of revolution on work, including those which also grind adjacent plane surfacesAccessories therefor involving centres or chucks for holding work
The present invention is a high mobility substrate characterized by comprising a semiconductor substrate, a first δ-doped layer having a band gap larger than that of the semiconductor substrate on the semiconductor substrate, a thin film of the same material as the semiconductor substrate on the first δ-doped layer, and a second δ-doped layer having a band gap larger than that of the semiconductor substrate on the thin film, the high mobility substrate being structured such that the thin film is sandwiched between the first δ-doped layer and the second δ-doped layer. In this way, a high mobility substrate and a method for manufacturing a high mobility substrate are provided that are practical and make uniform creation on the entire surface of a substrate having a large area possible, while achieving high mobility.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
An epitaxial wafer production method, including forming a gettering epitaxial film containing silicon and carbon on a silicon substrate under reduced pressure using a reduced pressure CVD apparatus, and forming a silicon epitaxial film on the gettering epitaxial film. This provides a low-cost, low-contamination carbon-containing epitaxial wafer, and a method for producing such an epitaxial wafer.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
75.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SAME
A nitride semiconductor substrate including a growth substrate, and a nitride semiconductor thin film formed on the growth substrate, in which the nitride semiconductor thin film includes an AlN layer formed on the growth substrate and a nitride semiconductor layer formed on the AlN layer, and an average concentration of Y (Yttrium) in the AlN layer is 1E15 atoms/cm3 or higher and 5E19 atoms/cm3 or lower. Thereby, a nitride semiconductor substrate is capable of improving the surface morphology of an AlN layer, thereby suppressing the generation of pits on the surface of a nitride semiconductor epitaxial wafer, and a method manufactures the nitride semiconductor substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
76.
METHOD FOR PRODUCING JOINED SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention is a method for producing a joined substrate by directly joining the surfaces of two substrates to each other, said method comprising: a step for preparing two substrates, with an average surface roughness Ra and surface free energy of the surfaces to be directly joined being used as criteria; and a step for directly joining the two substrates prepared. In the step for preparing the two substrates, the substrates are prepared such that the surfaces to be directly joined have an average surface roughness Ra of 1 nm or less and such that a contact angle between water and the surfaces to be directly joined, which serves as an index of the surface free energy, is not more than 70°. The present invention thus provides a joined substrate production method that makes it possible to reduce the occurrence of joining defects in a joining technique.
A bonded wafer, wherein an epitaxial wafer having a heterojunction structure, in which a material with a different thermal expansion coefficient is epitaxially laminated on a growth substrate, and a support substrate are bonded via a bonding material, wherein the bonding material has an average thickness of 0.01 μm or more and 0.6 μm or less. As a result, provided is a bonded wafer and a method for producing the same that improves the film thickness distribution of the bonding material caused by the warpage of the semiconductor epitaxial substrate and the warpage that changes with thermal changes when the warped semiconductor epitaxial substrate and the support substrate are bonded together using the bonding material.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
B32B 7/12 - Interconnection of layers using interposed adhesives or interposed materials with bonding properties
B32B 9/04 - Layered products essentially comprising a particular substance not covered by groups comprising such substance as the main or only constituent of a layer, next to another layer of a specific substance
78.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a substrate for film formation made of single-crystal silicon, in which a silicon nitride film is formed on an peripheral portion of the substrate for film formation, an AlN film is formed on the substrate for film formation and on the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film. A nitride semiconductor substrate without a reaction mark or a polycrystal growth portion on an edge portion when an AlN layer is epitaxially grown on a silicon substrate, and a GaN or AlGaN layers are epitaxially grown on top of that; and a method for manufacturing the nitride semiconductor substrate.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
Thus, provided is a method of manufacturing a compound semiconductor bonded substrate having an improved degree of freedom in designing a device or a device system.
H01L 21/18 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
80.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor is formed on a substrate for film formation includes: (1) subjecting a substrate for film formation made of single-crystal silicon to heat treatment under a nitrogen atmosphere to form a silicon nitride film on the substrate for film formation, (2) growing an AlN film on the silicon nitride film, and (3) growing a GaN film, an AlGaN film, or both on the AlN film. A method for manufacturing a nitride semiconductor substrate can prevent diffusion of Al to the high-resistance single-crystal silicon substrate when the AlN layer is epitaxially grown on the high-resistance single-crystal silicon substrate, and the GaN or the AlGaN layer is epitaxially grown on top of that.
A nitride semiconductor substrate includes: a silicon single-crystal substrate; and a nitride semiconductor thin film formed on the silicon single-crystal substrate, wherein the silicon single-crystal substrate has a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less. This provides a nitride semiconductor substrate resistant against plastic deformation and a manufacturing method therefor.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
A temporarily bonded wafer in which an epitaxial functional layer having two or more electrodes with different polarities on one surface and a support substrate are temporarily bonded, in which the surface having the electrodes of the epitaxial functional layer and the support substrate are temporarily bonded via an uncured thermosetting bonding material. A resulting technique reduces bonding failure and delamination failure after removing the substrate after a bonding process, improves the yield, and easily removes the temporary support substrate.
The present invention is a polishing cloth cleaning method in which, in a wafer polishing machine having a surface plate, a horn-type ultrasonic wave generation device is used to clean the inside of a polishing cloth attached to the surface plate by transmitting ultrasonic waves to the inside of the polishing cloth while supplying a cleaning liquid such that a water seal is formed between the polishing cloth and the tip end of a horn, wherein the amplitude of the ultrasonic waves is 10-40 μm. The present invention thereby provides a cleaning method that cleans the inside of the polishing cloth without damaging the surface of the polishing cloth and that clears clogging caused by accumulated matter inside the polishing cloth.
B24B 53/017 - Devices or means for dressing, cleaning or otherwise conditioning lapping tools
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
B24B 37/24 - Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
The present invention provides a method for producing a silicon single crystal by a CZ method using a cusp magnetic field formed by an upper coil and a lower coil provided in a pulling furnace, the method includes seeding by bringing a seed crystal into contact with a silicon melt, and pulling up of a straight body after enlarging a diameter of the silicon single crystal, in which the seeding is performed with a magnetic field minimum plane position on a central axis of the pulling furnace as a first position below a surface of the silicon melt, before proceeding to the pulling up of the straight body, the magnetic field minimum plane position on the central axis of the pulling furnace is moved to a second position above the first position, the pulling up of the straight body is performed with the magnetic field minimum plane position on the central axis of the pulling furnace as the second position. This provides the method for producing the silicon single crystal that efficiently produces the single crystal having low oxygen concentration and excellent in-plane distribution with an improved success rate of the seeding.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
85.
METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
The present invention provides a method for manufacturing a semiconductor substrate, the method comprising: an ion implantation step in which ions of at least one of silicon, carbon, and oxygen are implanted into the surface of a 4H-SiC substrate, and an amorphous layer in which silicon and carbon have been amorphized is formed in the 4H-SiC substrate; a joining step in which the 4H-SiC substrate that has been subjected to the ion implantation step and another supporting substrate are joined to each other with a thin film interposed therebetween so as to obtain a joined substrate; a separation step in which the 4H-SiC substrate is separated from the joined substrate at the amorphous layer so as to separate the joined substrate into a bonded substrate in which the surface layer of the 4H-SiC substrate is transferred onto the supporting substrate and a separated substrate that is the 4H-SiC substrate left after the separation of the surface layer; an etching step in which the separation surface of at least one of the bonded substrate and the separated substrate after the separation step is subjected to plasma etching; and an epitaxial step in which at least one of the bonded substrate and the separated substrate is subjected to epitaxial growth. As a result, the present invention provides a method for manufacturing a semiconductor substrate, with which it is possible to manufacture a semiconductor substrate of higher quality at lower cost.
The present invention is a clean room including a stocker area in which an article management storage is installed, in which the article management storage includes an upper opening part and a lower flow-out port configured to adjust the aperture ratio, a ceiling of the stocker area includes an eyelid and an air outlet port, the upper opening part of the article management storage and the air outlet port are connected to each other so as to be surrounded by the eyelid, and the clean room is configured that air supplied from the air outlet port is directly supplied into the article management storage through the upper opening part and is discharged from the lower flow-out port. This can provide the clean room that can keep the inside of the article management storage clean with almost no additional cost and without reducing the storing volume in the article management storage.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
F24F 3/167 - Clean rooms, i.e. enclosed spaces in which a uniform flow of filtered air is distributed
F24F 13/06 - Outlets for directing or distributing air into rooms or spaces, e.g. ceiling air diffuser
87.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate including: a composite substrate with multiple layers stacked, a silicon oxide layer or a TEOS layer having a central flat surface and a side surface around the flat surface and stacked on the composite substrate; a single crystal silicon layer stacked on the silicon oxide layer or the TEOS layer, and a nitride semiconductor thin film deposited on the single crystal silicon layer, wherein the entire central flat surface of the silicon oxide layer or the TEOS layer is covered with the single crystal silicon layer.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
88.
EPITAXIAL WAFER, SOI WAFER, AND METHOD FOR MANUFACTURING SAME
The present invention pertains to an epitaxial wafer having a silicon epitaxial film on a silicon single-crystalline substrate having a resistivity of 10-5000 Ω·cm, wherein the carbon atom concentration in the silicon epitaxial film is at least 5×1017atoms/cm3and less than 2×1019atoms/cm3, and carbon defects are formed in the silicon epitaxial film. Accordingly, an epitaxial wafer and an SOI wafer and a method for manufacturing same are provided, wherein the wafers can be manufactured with a small number of processes and easy processing processes without using a high-resistivity substrate and harmonics are more reliably reduced.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
89.
SUBSTRATE FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
The present invention is a substrate for a semiconductor device, including: a high-resistant silicon single crystal substrate having a resistivity of 100 Ω·cm or more; a first buffer layer composed of an AlN layer and formed on the high-resistant silicon single crystal substrate; and a nitride semiconductor layer provided on the first buffer layer, wherein there is no low-resistivity portion on a top surface of the high-resistant silicon single crystal substrate, the low-resistivity portion having a resistivity relatively lower than the resistivity of an entirety of the high-resistant silicon single crystal substrate. This provides: a substrate for a semiconductor device that can impart good electric characteristics to a device; and a simple method for manufacturing such a substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
90.
SEMICONDUCTOR SUBSTRATE PRODUCTION METHOD, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
The present invention is a method for producing a semiconductor substrate, said method comprising: a laser irradiation step for irradiating the surface of a 4H-SiC substrate with a laser beam and forming, within the 4H-SiC substrate, an amorphous layer obtained by amorphization of silicon and carbon; a joining step for joining, via a thin film, another support substrate and the 4H-SiC substrate which has been subjected to the laser irradiation step to obtain a joined substrate; a separation step for separating the 4H-SiC substrate at the amorphous layer of the joined substrate to cause separation into a bound substrate in which the surface layer of the 4H-SiC substrate as a 4H-SiC layer is transferred onto the support substrate and a separated substrate which has been obtained by separating the surface layer from the 4H-SiC substrate; an etching step for performing plasma etching on at least one of the separation surfaces of the bound substrate and of the separated substrate after the separation step; and an epitaxial step for performing epitaxial growth on at least one of the bound substrate and the separated substrate. Thus, a semiconductor substrate production method that makes it possible to produce a more inexpensive, high-quality semiconductor substrate is provided.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
B23K 26/57 - Working by transmitting the laser beam through or within the workpiece the laser beam entering a face of the workpiece from which it is transmitted through the workpiece material to work on a different workpiece face, e.g. for effecting removal, fusion splicing, modifying or reforming
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a defect evaluation method for a semiconductor substrate, the method being characterized by comprising: a first step for detecting defects on surfaces of a plurality of semiconductor substrates; a second step for acquiring microscopic images of the defects; a third step for conducting a component analysis as to whether the defects are Ni defects; a fourth step for classifying the types of the defects on the basis of the microscopic images and the result of the component analysis; a fifth step for machine-learning the microscopic images of the various types of the defects classified in the fourth step, by an image classification means; a sixth step for estimating the types of unknown defects by applying the image classification means subjected to machine learning in the fifth step, to microscopic images of the unknown defects; and a seventh step for stratifying and integrating the types of the unknown defects estimated in the sixth step into the Ni defects and non-Ni defects. Thus, a method for easily evaluating Ni defects on surfaces of semiconductor substrates is provided.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 23/2208 - Combination of two or more measurements, at least one measurement being that of secondary emission, e.g. combination of secondary electron [SE] measurement and back-scattered electron [BSE] measurement all measurements being of secondary emission, e.g. combination of SE measurement and characteristic X-ray measurement
G01N 23/2252 - Measuring emitted X-rays, e.g. electron probe microanalysis [EPMA]
92.
NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR
A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers is bonded, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
A debris determination method of determining, using an image obtained by an appearance inspection device, debris that occurs around a hard laser mark (HLM) on a backside of a wafer, including: a step of calculating reference luminance from a grayscale image obtained by the appearance inspection device; a step of extracting a printed region including the HLM from the grayscale image; a step of excluding a dot portion of the HLM from the printed region; a step of extracting, with reference to the reference luminance, a debris region from the printed region from which the dot portion of the HLM has been excluded; and a step of determining the presence or absence of debris in the printed region based on the debris region. This provides a debris determination method that can reliably detect debris that cannot be detected by shape measuring devices and determine the presence or absence of debris.
A debris determination method of determining, from an image obtained by an appearance inspection device, debris that occurs around an HLM on a backside of a wafer, including: replacing luminance data of the image with matrix data; extracting an HLM-printed region; obtaining a least-squares plane of luminance; obtaining normalized matrix data by subtracting the least-squares plane from the printed region; obtaining protrusion-side matrix data by substituting 0 for matrix values less than 0; obtaining recess-side matrix data by inverting the sign of the normalized matrix data and substituting 0 for matrix values representing dots and noise; obtaining composite matrix data from the protrusion- and recess-side matrix data; obtaining low-pass matrix data by processing the composite matrix data; and determining debris from the low-pass matrix data with a predetermined threshold and obtaining an area ratio of the debris to determine the presence or absence of debris in the printed region.
The present invention is a method for carrying a wafer, wherein in taking out the wafer from a closed container and carrying the wafer by a carrier robot or in taking in the wafer carried by the carrier robot into the closed container, when a latchkey is rotationally driven for fixing and unfixing a lid relative to a container body of the closed container mounted on a load port frame by a latchkey-driving mechanism provided on a load port door that can fit with a wafer carrying-in/out port of a carrying room and that holds the lid of the closed container to enable removal from the wafer carrying-in/out port, the latchkey is rotationally driven at a rotation rate of 60 deg/sec or less. This provides a method for carrying a wafer and wafer-carrying apparatus that can reduce an amount of dust generated when the lid of the closed container is opened and closed or when the load port door is raised and lowered for carrying the wafer.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
B25J 11/00 - Manipulators not otherwise provided for
96.
METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention provides a method for forming a thermal oxide film, comprising the steps of: a step of acquiring a first correlation between an amount of OH groups and thickness of the thermal oxide film by forming a thermal oxide film by thermal oxidation treatment under the same condition after preparing a plurality of semiconductor substrates having chemical oxide films formed by cleaning and having different amounts of OH groups; a step of acquiring a second correlation between an amount of OH groups and drying conditions by cleaning under the same cleaning condition followed by changed drying conditions to substrates and measuring amounts of OH groups; a step of acquiring a third correlation between drying condition and thickness of thermal oxide film by using the first correlation and the second correlation; a step of determining drying condition and thermal oxidation condition by using the third correlation; a step of cleaning the substrates; and a step of drying and a thermal oxide film formation after the cleaning step using the drying conditions and thermal oxidation treatment conditions determined in the drying and thermal oxidation treatment condition determination step. This provides a method for forming thermal oxide film in which a thermal oxide film can be formed with intended thickness with good reproducibility while without changing the composition of the cleaning chemical solution.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
97.
WAFER MARKING METHOD, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR SUBSTRATE
A wafer marking method uses a laser for performing a laser marking on a defect region of a nitride semiconductor substrate in which a nitride semiconductor layer contains at least a GaN layer formed by epitaxial growth on a single-crystal silicon substrate. The method includes that a surface of the GaN layer and a surface of the single-crystal silicon substrate are performed laser marking simultaneously by irradiating the defect region with a laser of a wavelength within ±10% of 365 nm, having a wavelength corresponding to a band gap energy of GaN.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
H01L 21/66 - Testing or measuring during manufacture or treatment
98.
PACKAGING MEMBER FOR PACKAGING OBJECT TO BE TRANSPORTED BETWEEN CLEAN ROOMS, PACKAGING METHOD, AND TRANSPORTING METHOD
A packaging member for packaging an object to be transported between clean rooms, the packaging member being used for packaging the object to be transported, being a FOUP or a FOSB, when transport thereof between the clean rooms each having a clean atmosphere of a semiconductor factory, in which the packaging member includes a dust-free cloth having dust-proof property and damp-proof property. The packaging member is capable of transporting an object to be transported between clean rooms at low cost while maintaining the high cleanness of the object to be transported, being the FOUP or the FOSB.
B65D 85/30 - Containers, packaging elements or packages, specially adapted for particular articles or materials for articles particularly sensitive to damage by shock or pressure
B65G 49/06 - Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles for fragile sheets, e.g. glass
The present invention is an apparatus for manufacturing a single crystal by growing a single crystal according to a Czochralski method, the apparatus includes a main chamber configured to house a crucible configured to accommodate a raw-material melt and a heater configured to heat the raw-material melt, a pulling chamber being continuously provided at an upper portion of the main chamber and configured to accommodate a single crystal grown and pulled, and a cooling cylinder extends from at least a ceiling portion of the main chamber toward a surface of the raw material melt to surround the single crystal being pulled. The cooling cylinder is configured to be forcibly cooled with a coolant. The apparatus includes a first auxiliary cooling cylinder fitted inside of the cooling cylinder, and a second auxiliary cooling cylinder threadedly connected to the outside of the first auxiliary cooling cylinder from a side of a lower end. A gap between a bottom surface of the cooling cylinder and a top surface of the second auxiliary cooling cylinder is 0 mm or more to 1.0 mm or less. This provides an apparatus for manufacturing a single crystal which can increase growth rate of the single crystal by efficiently cooling the single crystal being grown.
An epitaxial wafer for an ultraviolet ray emission device including: a first supporting substrate being transparent for ultraviolet ray and having heat resistance; a seed crystal layer of an AlxGa1-xN (0.5
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
