Micron Technology, Inc.

États‑Unis d’Amérique

Nouveaux brevets et marques déposées la semaine dernière

Dernière mise à jour : 2026-10-10

Sommaire

	Brevets	Marques
	44	0
	0	0
	9	1
		0

Viewing 1 - 54 of 54

marques

1942979

VHBM

Status: Registered

brevets

#	ID	Title
1	19633750	LOW RESISTANCE STRUCTURES IN SYSTEMS
2	19173258	MEMORY DEVICES HAVING TRANSISTOR GATE STACKS WITH MULTIPLE METAL REGIONS
3	19715576	MEMORY DEVICES WITH MULTIPLE PSEUDO-CHANNELS
4	19461507	ELECTRONIC DEVICES COMPRISING ADJOINING OXIDE MATERIALS AND RELATED SYSTEMS
5	19709930	MANAGING ALLOCATION OF SUB-BLOCKS IN A MEMORY SUB-SYSTEM
6	19561356	ENHANCED ERROR DETECTION MODE FOR MEMORY DEVICES
7	19576607	AGGREGATING LOG DATA TO A REDUNDANT DIE OF A MEMORY SUB-SYSTEM
8	19704697	BIAS VOLTAGE CONTROL FOR SUB-BLOCK GROUPS IN A MEMORY DEVICE
9	19534122	MULTIPLE INPUT SIGNATURE REGISTER CIRCUIT WITH PASS-GATE EXCLUSIVE OR LOGIC
10	19697429	ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICE
11	19550627	HBM POWER UP PROTECTION SCHEME DESIGN
12	19715921	SEMICONDUCTOR DEVICE ASSEMBLIES WITH CAVITY-EMBEDDED CUBES AND LOGIC-SUPPORTING INTERPOSERS
13	19637149	NON-BINARY FULLY DIFFERENTIAL SAR ADC FOR AI-NAND
14	19630159	COMMAND ADDRESS ERROR CONTROL
15	19172071	STRESS LINER INTEGRATION IN MEMORY DEVICES
16	19713222	SELF-CALIBRATION IN A MEMORY DEVICE
17	19715859	CONNECTING SEMICONDUCTOR DIES THROUGH TRACES
18	19715447	AGGREGATING UNALIGNED SEQUENTIAL WRITE REQUESTS
19	19709803	HYBRID CACHE COHERENCY
20	19708630	SEMICONDUCTOR DEVICES, ASSEMBLIES, AND ASSOCIATED METHODS
21	19633922	APPARATUS WITH A SELECTABLE READ CONTROL MECHANISM AND METHODS FOR OPERATING THE SAME
22	US2026016248	OVERWRITING PAGES OF DATA
23	US2026018682	MICROELECTRONIC DEVICES AND RELATED MEMORY DEVICES
24	19707092	DRIFT COMPENSATION FOR CODEWORDS IN MEMORY
25	19460671	DUAL-LEVEL REFRESH MANAGEMENT
26	19173044	LATERAL CHARGE MIGRATION HANDLING ON EDGE WORDLINES OF A MEMORY DEVICE IN A MEMORY SUB-SYSTEM
27	19716839	MEMORY DEVICE WITH ASYMMETRIC PASS THROUGH VOLTAGE FOR READ OPERATIONS
28	19714283	DATA THROUGHPUT USING A METAL BRACKET
29	19373295	MEMORY CELL FORMATION USING A DOUBLE SPLIT PILLAR PROCESS FLOW
30	19705302	MEMORY ARCHITECTURE FOR BLOCK MIGRATION IN ZNS
31	19715352	SELECTIVE USE OF A WORD LINE MONITORING PROCEDURE FOR RELIABILITY-RISK WORD LINES
32	19576610	PRINTED CIRCUIT BOARD HAVING CONNECTION FINGERS PROVIDING IMPROVED ELECTRICAL CONTACT WITH CORRESPONDING SOCKET CONNECTION PINS UPON INSERTION
33	19563707	MICROELECTRONIC DEVICES, AND RELATED METHODS AND MEMORY DEVICES
34	19697445	DYNAMICALLY CONFIGURABLE LOW DENSITY PARITY CHECK CODE
35	19710626	ALTERNATIVE ERASE SCHEMES FOR RELIABILITY-RISK WORD LINES
36	19711747	RESAMPLE START VOLTAGE FOR CALIBRATION IN A PROGRAM OPERATION IMPROVEMENT
37	19170472	GATE EXTENSION TO TUNE THRESHOLD VOLTAGE
38	19708586	SEMICONDUCTOR MEMORY DEVICE WITH PROCESSING-IN-MEMORY USING TEST CIRCUITRY
39	19710156	OPTIMIZATION OF SOFT BIT WINDOWS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS
40	19561273	MICROELECTRONIC DEVICES AND RELATED MEMORY DEVICES
41	19713696	DETECTION AND MITIGATION OF ATTACKS ON ROW HAMMER MITIGATION CIRCUITS
42	19697483	SEMICONDUCTOR DEVICES HAVING ALIGNED FRONT-END INTERFACE CONTACTS AND BACK-END INTERFACE CONTACTS, AND ASSOCIATED SYSTEMS AND METHODS
43	19572391	DYNAMIC SCRAMBLING FOR WIRED COMMUNICATIONS BETWEEN SYSTEMS
44	19170534	DYNAMIC ERROR CORRECTION PROTECTION WITH RAIN PROTECTION FOR MEMORY SYSTEM
45	19708849	ANTENNA PROTECTION ON DUMMY METAL FILLS
46	19638989	UNIQUE VIA STRUCTURES FOR SEMICONDUCTOR PACKAGES
47	US2026021182	DYNAMIC SCRAMBLING FOR WIRED COMMUNICATIONS BETWEEN SYSTEMS
48	US2026019430	OVERLAPPED INTERCONNECT WITH ENHANCED DESIGN
49	US2026020865	3D STACKED MEMORY DEVICE ASSEMBLY AND METHOD THEREOF
50	US2026022130	LOW RESISTANCE STRUCTURES IN SYSTEMS
51	US2026021086	MEMORY-ONLY CUBES AND METHODS OF FORMING THE SAME
52	US2026021085	MEMORY-ONLY CUBES AND METHODS OF FORMING THE SAME
53	US2026020993	LOW POWER MANAGEMENT AND CLOCK MANAGEMENT WITHIN A MULTI-PORT MEMORY SYSTEM