Micron Technology, Inc.

United States of America

New patents and trademarks in the last week

Last updated : 2026-08-01

Summary

Patents

Trademarks
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trademarks


patents

# ID Jurisdiction Title
1 19379449 WRITE BOOSTER BUFFER AND HIBERNATE
2 19366104 Integrated Circuit Construction, DRAM Circuitry, Method Used In Forming Integrated Circuitry, And Method Used In Forming DRAM Circuitry
3 19634483 MEMORY DEVICE HARDWARE HOST READ ACTIONS BASED ON LOOKUP OPERATION RESULTS
4 19427822 ARRAY STABILIZATION IN MEMORY ARCHITECTURES
5 19441335 METHODS OF FORMING MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MICROELECTRONIC DEVICES
6 19578750 APPARATUSES AND MEMORY DEVICES INCLUDING AIR GAPS BETWEEN CONDUCTIVE LINES
7 19572156 SENSE AMPLIFIERS AS STATIC RANDOM ACCESS MEMORY CACHE
8 19039678 Track Runtime Memory Latency Changes to Improve Dynamic Allocation of Memory Provided over Multiple Connections
9 19572748 MICROELECTRONIC DEVICES AND RELATED MEMORY DEVICES
10 19036901 MULTI-WORDLINE PROGRAMMING WITH DATA LOSS PREVENTION
11 19573811 PCB LAND PAD FOR THREE-PIN MOSFET COMPONENT
12 19407557 SURFACE BASED EPITAXIAL GROWTH
13 19406948 SEMICONDUCTOR WAFERS WITH BURIED CONNECTORS AND ASSOCIATED SYSTEMS AND METHODS
14 19037740 MODIFICATION OF CERAMIC CAPACITOR FOR MITIGATION OF DELAMINATION IN MEMORY DEVICES
15 19555301 STORING DATA ON MULTI-LEVEL CELL MEMORY CELLS
16 19411098 HIGH-VOLTAGE DEVICES WITH EXTENDED TAP ACTIVE AREAS
17 19455276 METHOD FOR FORMING CELL CONTACT OF MEMORY DEVICE
18 19435468 REPLACEMENT POLICY FOR ACCESS GRANULARITY IN MEMORY SUBSYSTEMS
19 19455545 CHARGE TRAPPING NOT OR (NOR) FLASH MEMORY ARCHITECTURES
20 19572613 PARALLEL PIPE LATCH FOR MEMORY ACCESS OPERATIONS
21 19449042 SEMICONDUCTOR DEVICE
22 19449264 DATA LINE STATABLIZATION WITH KNOCK-OUT EFFECT REDUCTION
23 19449267 METHODS AND SYSTEMS TO BOOST BIT LINE VOLTAGE BIASING
24 19574148 MINIMUM MEMORY CLOCK ESTIMATION PROCEDURES
25 19574146 TECHNIQUES TO BALANCE LOG STRUCTURED MERGE TREES
26 19578676 WRITE BUFFER FLUSH TECHNIQUES
27 19629400 DEEP LEARNING ACCELERATION WITH MIXED PRECISION
28 US2026010435 CHARGE TRAPPING NOR FLASH MEMORY FOR STACKED MEMORY ARCHITECTURES
29 US2026011463 HOST-SIDE ALIGNMENT TO A MULTI-PHASE INTERNAL CLOCK OF A MEMORY SYSTEM