Abrégé

A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. A digital representation may be externally written to the digital storage circuit of the at least one pixel.

Classes IPC  ?

• H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
• G06F 7/02 - Comparaison de valeurs numériques
• H03M 1/12 - Convertisseurs analogiques/numériques
• H04N 25/40 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
• H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixelCapteurs d'images commandés par événementSélection des pixels à lire en fonction des données d'image
• H04N 25/703 - Architectures de capteurs SSIS incorporant des pixels pour produire des signaux autres que des signaux d'image
• H04N 25/766 - Capteurs adressés, p. ex. capteurs MOS ou CMOS comprenant des lignes de commande ou de sortie utilisées pour une pluralité de fonctions, p. ex. pour la sortie, la commande, la réinitialisation ou l'alimentation des pixels
• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Classes IPC  ?

• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
• H03M 1/12 - Convertisseurs analogiques/numériques
• G06F 7/02 - Comparaison de valeurs numériques

Abrégé

The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.

Classes IPC  ?

• H04N 25/77 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
• H01L 27/146 - Structures de capteurs d'images
• H04N 25/571 - Commande de la gamme dynamique impliquant une réponse non linéaire
• H04N 25/766 - Capteurs adressés, p. ex. capteurs MOS ou CMOS comprenant des lignes de commande ou de sortie utilisées pour une pluralité de fonctions, p. ex. pour la sortie, la commande, la réinitialisation ou l'alimentation des pixels

Abrégé

A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.

Classes IPC  ?

• H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
• G06F 7/02 - Comparaison de valeurs numériques
• H03M 1/12 - Convertisseurs analogiques/numériques
• H04N 25/40 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
• H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixelCapteurs d'images commandés par événementSélection des pixels à lire en fonction des données d'image
• H04N 25/703 - Architectures de capteurs SSIS incorporant des pixels pour produire des signaux autres que des signaux d'image
• H04N 25/766 - Capteurs adressés, p. ex. capteurs MOS ou CMOS comprenant des lignes de commande ou de sortie utilisées pour une pluralité de fonctions, p. ex. pour la sortie, la commande, la réinitialisation ou l'alimentation des pixels
• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés

Abrégé

A delta image sensor comprising an arrangement of pixels and acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes a sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; a digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and a digital output circuit configured to generate an event output when the level has changed. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates corresponding to modulation of the light signal.

Classes IPC  ?

• H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
• G06F 7/02 - Comparaison de valeurs numériques
• H03M 1/12 - Convertisseurs analogiques/numériques
• H04N 25/40 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p. ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner
• H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixelCapteurs d'images commandés par événementSélection des pixels à lire en fonction des données d'image
• H04N 25/703 - Architectures de capteurs SSIS incorporant des pixels pour produire des signaux autres que des signaux d'image
• H04N 25/766 - Capteurs adressés, p. ex. capteurs MOS ou CMOS comprenant des lignes de commande ou de sortie utilisées pour une pluralité de fonctions, p. ex. pour la sortie, la commande, la réinitialisation ou l'alimentation des pixels
• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés

Abrégé

A delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect a changed level; and at least one digital output circuit configured to generate an event output under the condition of the changed level. The sensor circuit is configured to change an analogue function of its read-out characteristics to generate a respective changed VSIG.

Classes IPC  ?

• H04N 25/47 - Capteurs d'images avec sortie d'adresse de pixelCapteurs d'images commandés par événementSélection des pixels à lire en fonction des données d'image
• G06F 7/02 - Comparaison de valeurs numériques
• H03M 1/12 - Convertisseurs analogiques/numériques
• H04N 25/703 - Architectures de capteurs SSIS incorporant des pixels pour produire des signaux autres que des signaux d'image
• H04N 25/766 - Capteurs adressés, p. ex. capteurs MOS ou CMOS comprenant des lignes de commande ou de sortie utilisées pour une pluralité de fonctions, p. ex. pour la sortie, la commande, la réinitialisation ou l'alimentation des pixels
• H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
• H04N 25/772 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des convertisseurs A/N, V/T, V/F, I/T ou I/F
• H04N 25/78 - Circuits de lecture pour capteurs adressés, p. ex. amplificateurs de sortie ou convertisseurs A/N
• H04N 25/79 - Agencements de circuits répartis entre des substrats, des puces ou des cartes de circuits différents ou multiples, p. ex. des capteurs d'images empilés

Abrégé

An image sensor comprises an arrangement of pixels, the pixels including an acquisition circuit each, the acquisition circuit including: a sensor circuit configured to generate a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel; a storage circuit configured to store during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG); and a comparator circuit configured to generate after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE). A method of operating an image sensor comprises steps of generating a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel, storing during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG) and generating after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE).

Classes IPC  ?

• H04N 25/771 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des moyens de stockage autres que la diffusion flottante
• H04N 25/75 - Circuits pour fournir, modifier ou traiter des signaux d'image provenant de la matrice de pixels
• H04N 25/778 - Circuits de pixels, p. ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs comprenant des amplificateurs partagés entre une pluralité de pixels, c.-à-d. qu'au moins une partie de l'amplificateur doit se trouver sur la matrice de capteurs elle-même

Abrégé

The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.

Classes IPC  ?

• H04N 5/355 - Réglage de la gamme dynamique
• H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one single slope analogue to digital conversion, A/D, circuit, preferably at least one single slope A/D circuit (12) configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the analogue to digital conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG, being generated by using a storage ramp; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG, being generated by using a comparison ramp, to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Classes IPC  ?

• H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
• H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. The sensor circuit is configured to change an analogue function of its read-out characteristics to generate a respective changed VSIG.

Classes IPC  ?

• H04N 5/355 - Réglage de la gamme dynamique

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one preferably single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. The repeat rate of the analogue to digital conversion is chosen from one or more repeat rates in correspondence with a light source modulation of a light signal illuminating the photosensor.

Classes IPC  ?

• H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. A digital representation may be externally written to the digital storage circuit of the at least one pixel.

Classes IPC  ?

• H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
• H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner

Abrégé

Delta image sensor with digital pixel storage with event output with magnitude and direction The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level. The event output comprises a magnitude of the level change and preferably a direction of the level change.

Classes IPC  ?

• H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner

Abrégé

The present invention relates to a delta image sensor comprising an arrangement of pixels and a plurality of acquisition circuits corresponding to at least one pixel and formed as part of an integrated circuit. Each acquisition circuit includes at least one sensor circuit comprising a photosensor configured to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor of the at least one pixel; at least one analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output under the condition of the changed level.

Classes IPC  ?

• H04N 5/341 - Extraction de données de pixels provenant d'un capteur d'images en agissant sur les circuits de balayage, p.ex. en modifiant le nombre de pixels ayant été échantillonnés ou à échantillonner

Abrégé

An image sensor comprises an arrangement of pixels, the pixels including an acquisition circuit (1) each, the acquisition circuit (1) including: a sensor circuit (11) configured to generate a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel; a storage circuit (12) configured to store during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG); and a comparator circuit (13) configured to generate after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE). A method of operating an image sensor comprises steps of generating a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel, storing during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG) and generating after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE).

Classes IPC  ?

• H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
• H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS