09 - Scientific and electric apparatus and instruments
Goods & Services
Semiconductor wafer processing chambers for depositing
dielectric materials. Recorded computer software for use in processing
semiconductor wafers, namely software for use in operating
wafer processing chambers for depositing dielectric
materials.
2.
BONDED SHOWERHEAD ASSEMBLY AND METHOD FOR USING THE SAME
The present disclosure generally relate to a processing chamber comprising a showerhead assembly. The showerhead assembly comprises a heat transfer plate having a first side and a second side, the heat transfer plate having cooling channels formed adjacent the first side of the heat transfer plate and a heater formed in the second side of the heat transfer plate, a showerhead plate having a first side coupled to the second side the heat transfer plate, a first gas passageway extending through the heat transfer plate to the showerhead plate, and a gas distribution plate (GDP) bonded to a second side of the showerhead plate, the GDP having a first plurality of holes formed therethrough, first ends of the first plurality of holes open to the showerhead plate. The showerhead plate comprises a metal backing and a plurality of anodized gas paths extending within the metal backing.
B05B 1/24 - Nozzles, spray heads or other outlets, with or without auxiliary devices such as valves, heating means incorporating means for heating the liquid or other fluent material, e.g. electrically
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
Embodiments of the disclosure include apparatus and methods for substrate processing. A method includes applying a first DC bias to a first pair of electrodes and a second pair of electrodes, the first pair is disposed within a first portion of a substrate support and the second pair is disposed within a second portion of the substrate support. The method further includes detecting a difference in a first electrical characteristic of a first flow and a second electrical characteristic of a second flow between the electrode pairs and the substrate. A second DC bias is applied to the first pair and a third DC bias, different from the second DC bias, is applied to the second pair. The second DC bias and the third DC bias are selected based on the difference in the first and second flows.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
4.
REMOVAL OF ORGANIC MATERIAL FROM HIGH ASPECT RATIO STRUCTURES
Embodiments of the disclosure include a method of device processing, comprising: exposing a device substrate to a carbon-free fluorine-containing gas for a first period of time, delivering an inert gas to the processing volume for a second period of time; and removing a organic fill material of the device substrate by generating a plasma over the device substrate, wherein the plasma comprises the inert gas. The device substrate comprises one or more layers disposed on the device substrate, wherein the one or more layers define at one or more high-aspect ratio (HAR) features, wherein the HAR feature includes sidewall surfaces and a bottom surface and the organic fill material disposed within the one or more HAR features.
Exemplary semiconductor processing methods may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include alternating layers of silicon nitride and silicon oxide. The methods may include forming plasma effluents of the fluorine-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor. The contacting may selectively etch an exposed portion of silicon nitride. The methods may include introducing a phosphorous-and-fluorine-containing precursor into the processing region of the semiconductor processing chamber while maintaining a flow of the fluorine-containing precursor. The methods may include forming plasma effluents of the fluorine-containing precursor and the phosphorous-and-fluorine-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the phosphorous-and-fluorine-containing precursor. The contacting may selectively etch an exposed portion of silicon oxide.
An apparatus and method for drying substrates is proved, comprising a containment tank having a rinsing liquid region and a headspace a particle detector, comprising an inlet line extending into the rinsing liquid region of the containment tank; a detection unit configured to receive a flow of liquid from the inlet line therethrough; an outlet line extending from the detection unit and into the containment tank; and a pump connected to one of the inlet line, outlet line or detection unit and configured to cause fluid to be drawn from the containment tank through the inlet line and returned to the containment tank through the outlet line a controller configured to receive information from the detection unit.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
7.
LID AND HYDBRID SUBSTRATE SUPPORT FOR EFFICIENT HEATING AND COOLING IN PROCESS CHAMBERS
A lid for a process chamber includes a first ceramic disc including a first dielectric material having a first thermal conductivity, a second ceramic disc including a second dielectric material having a second thermal conductivity, and a bond layer that bonds the second ceramic disc to the first ceramic disc. The first thermal conductivity may be greater than the second thermal conductivity.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A method and apparatus for forming an interconnect structure. The method includes depositing a ruthenium layer on a cobalt layer disposed within a feature formed on a substrate. The ruthenium layer has a ruthenium concentration that increases from a lower portion of the feature to an upper portion of the feature. The method includes depositing a copper layer within the feature. A material forming the copper layer is heated to a reflow temperature before, during, or after depositing the copper layer.
C23C 28/02 - Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of main groups , or by combinations of methods provided for in subclasses and only coatings of metallic material
C23C 14/02 - Pretreatment of the material to be coated
Embodiments disclosed herein include an apparatus that comprises a microwave power delivery channel, and an impedance measurement system electrically coupled to the microwave power delivery channel. In an embodiment, the impedance measurement system includes a dual directional coupler (DDC), and a detector electrically coupled to the DDC. In an embodiment, a first interconnect between the DDC and the detector is configured to supply a forward power signal to the detector, and a second interconnect between the DDC and the detector is configured to supply a reflected power signal to the detector. The detector may be configured to measure an amplitude and a phase between the forward power signal and the reflected power signal.
Embodiments of the disclosure include an electrostatic chuck (ESC). The ESC includes a substrate support including a first segment and a second segment that is laterally adjacent to the first segment. The first segment includes a first pair of electrodes. The second segment includes a second pair of electrodes. The first segment is to be displaced vertically relative to the second segment to accommodate a non-planar surface of a substrate.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
11.
FINISHING ON PACKAGING SUBSTRATE WITH ULTRA HIGH-DENSITY INTERCONNECTS
A packaging substrate is provided. The packaging substrate includes a core and first organic buildup layers on a first side of the core. The first organic buildup layers include an organic dielectric material and at least one of first metallic traces, first metallic vias, or first metallic pads. The packaging substrate includes second organic buildup layers on a second side of the core that is opposite the first side. The second organic buildup layers include the organic dielectric material and at least one of second metallic traces, second metallic vias, or second metallic pads. The packaging substrate includes first inorganic buildup layers disposed on the first organic buildup layers. The first inorganic buildup layers include an inorganic dielectric material and at least one of third metallic traces, third metallic vias, or third metallic pads.
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
Embodiments of the present disclosure generally relate to mixing gases for deposition processes. Specifically, the disclosure relates to a 3D printed single piece gas mixer that mixes a plurality of gases prior to the gases entering a processing chamber. In one embodiment a mixer is provided. The mixer includes a body, an inlet, an outlet, and a hollow passage. The hollow passage is disposed through the body and fluidly connects the inlet to the outlet. The hollow passage includes a sidewall. The mixer further includes a plurality of fins formed on the sidewall. The plurality of fins extend into the hollow passage, and the plurality of fins and the sidewall form a monolithic structure.
C23C 16/448 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
13.
ISOLATION VALVE FOR IMPLANT PRODUCTIVITY ENHANCEMENT
An isolation valve for use in an ion implantation system is disclosed. The isolation valve is disposed between the process chamber, which houses the workpiece to be implanted, and the components located immediately upstream from the process chamber. This isolation valve may be closed to allow preventative maintenance to be performed on the process chamber without venting the rest of the ion implantation system. This may reduce particles and other material from traveling upstream from the process chamber during a preventive maintenance operation. This enhancement may reduce the frequency that the rest of the system undergoes preventative maintenance.
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
14.
AIR BEARING SHAFT WITH WIDE OPERATING TEMPERATURE RANGE
A system that reduces the amount of contaminants that enters a process chamber or air bearing via a movable shaft is disclosed. The movable shaft includes an outer shell made from a material having a low coefficient of thermal expansion. This allows the outer shell to be heated to sufficiently high temperatures to avoid condensation of contaminants on the shaft, while minimizing any change in the diameter of the shaft, which passes through an air bearing. The shaft may also have a temperature modification device disposed adjacent to the interior surface of the outer shell. In some embodiment, the shaft may include an inner liner. An insulative layer may be provided between the inner liner and the outer shell, such that the temperature of the outer shell does not cause the inner liner to thermally expand.
F16C 32/06 - Bearings not otherwise provided for with moving member supported by a fluid cushion formed, at least to a large extent, otherwise than by movement of the shaft, e.g. hydrostatic air-cushion bearings
The present disclosure generally relate to a processing chamber comprising a showerhead assembly. The showerhead assembly comprises a heat transfer plate having a first side and a second side, the heat transfer plate having cooling channels formed adjacent the first side of the heat transfer plate and a heater formed in the second side of the heat transfer plate, a showerhead plate having a first side coupled to the second side the heat transfer plate, a first gas line extending through the heat transfer plate to the showerhead plate, and a gas distribution plate (GDP) bonded to a second side of the showerhead plate, the GSP having a first plurality of holes formed therethrough, first ends of the first plurality of holes open to the showerhead plate. The showerhead plate comprises a metal backing and a plurality of anodized gas paths extending within the metal backing.
The present disclosure relates to liners having flow openings, and related chamber kits, processing chambers, and methods for semiconductor manufacturing. In one or more embodiments, a liner applicable for semi- conductor manufacturing includes an inner face and an outer face opposing the inner face. The liner includes an inlet opening extending into the inner face and an outlet opening extends into the inner face. The liner includes a curved flow opening extending into the outer face and extending at least partially about the liner. The curved flow opening extends along an azimuthal angle greater than 90 degrees.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
17.
ELECTRICAL CONNECTION FOR CHEMICAL MECHANICAL POLISHING CARRIER HEAD
A chemical mechanical polishing apparatus has a platen with a top surface to hold a polishing pad, a carrier head to hold a substrate against a polishing surface of the polishing pad during a polishing process, a sensor and/or actuator arranged on the carrier head, and a rotary electrical connection which provides at least two electrical connections between a controller and the sensor and/or actuator. The controller is configured to receive a signal from the sensor and/or actuator and control the carrier head based on the signal.
B24B 37/10 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
B24B 37/30 - Work carriers for single side lapping of plane surfaces
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
Gas inserts for semiconductor manufacturing processing chambers with a plurality of injection levels are described. Each of the gas injection levels provides a gas flow to an inner channel within the gas insert. Each of the gas flows are directed in a rotational direction within the inner channel. The gas injection level closest to the outlet end of the gas insert directs a gas flow in the opposite rotational direction to the other gas injection levels. Processing chambers, gas distribution assemblies and methods using the gas inserts are also described.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
Embodiments of the disclosure include apparatus and methods for substrate processing. A method includes applying a first DC bias to a first pair of electrodes and a second pair of electrodes, the first pair is disposed within a first portion of a substrate support and the second pair is disposed within a second portion of the substrate support. The method further includes detecting a difference in a first electrical characteristic of a first flow and a second electrical characteristic of a second flow between the electrode pairs and the substrate. A second DC bias is applied to the first pair and a third DC bias, different from the second DC bias, is applied to the second pair. The second DC bias and the third DC bias are selected based on the difference in the first and second flows.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 23/00 - Details of semiconductor or other solid state devices
H02N 13/00 - Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
B23Q 3/15 - Devices for holding work using magnetic or electric force acting directly on the work
20.
MULTI-CHANNEL MICROWAVE PLASMA IMPEDANCE MATCH TUNING
Embodiments disclosed herein may include a method for impedance match tuning. In an embodiment, the method includes setting a pin depth of a pin inserted into a hole in a dielectric resonator antenna (DRA) to adjust an input impedance of the DRA to match a load impedance of the DRA at a resonant frequency of the DRA. In an embodiment, the method further includes tuning a frequency of a microwave power amplifier that is electrically coupled to the microwave frequency to match the resonant frequency of the DRA. In an embodiment, the method further includes converting the load impedance of the DRA to a characteristic impedance of a coaxial transmission line with an impedance transformer, wherein the impedance transformer is electrically coupled between the microwave power amplifier and the DRA.
Exemplary semiconductor processing methods may include flowing a fluorine-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include alternating layers of silicon nitride and silicon oxide. The methods may include forming plasma effluents of the fluorine-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor. The contacting may selectively etch an exposed portion of silicon nitride. The methods may include introducing a phosphorous-and-fluorine-containing precursor into the processing region of the semiconductor processing chamber while maintaining a flow of the fluorine-containing precursor. The methods may include forming plasma effluents of the fluorine-containing precursor and the phosphorous-and-fluorine-containing precursor. The methods may include contacting the substrate with the plasma effluents of the fluorine-containing precursor and the phosphorous-and-fluorine-containing precursor. The contacting may selectively etch an exposed portion of silicon oxide.
An apparatus and method for drying substrates is proved, comprising a containment tank having a rinsing liquid region and a headspace a particle detector, comprising an inlet line extending into the rinsing liquid region of the containment tank; a detection unit configured to receive a flow of liquid from the inlet line therethrough; an outlet line extending from the detection unit and into the containment tank; and a pump connected to one of the inlet line, outlet line or detection unit and configured to cause fluid to be drawn from the containment tank through the inlet line and returned to the containment tank through the outlet line a controller configured to receive information from the detection unit.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
B24B 27/033 - Other grinding machines or devices for grinding a surface for cleaning purposes, e.g. for descaling or for grinding off flaws in the surface
23.
TWO-DIMENSION SELF-ALIGNED SCHEME WITH SUBTRACTIVE METAL ETCH
Embodiments of the present disclosure generally relate to layer stacks produced during back-end-of-line (BEOL) process flows. In one or more embodiments, the layer stack is disposed on a substrate and contains a first hard mask layer disposed on a first metal layer, one or more low-k material layers disposed over the first hard mask layer, a second metal layer disposed over the one or more low-k material layers and the first hard mask layer, a second hard mask layer disposed over the second metal layer, and an oxide layer disposed over the second hard mask layer. The second metal layer, the second hard mask layer, and the oxide layer are patterned and form a plurality of features. A gapfill interconnect metal is connected to the first metal layer and the second metal layer and is disposed through the first hard mask layer and the one or more low-k material layers.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/033 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or comprising inorganic layers
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
Embodiments of the present disclosure generally relate to mixing gases for deposition processes. Specifically, the disclosure relates to a 3D printed single piece gas mixer that mixes a plurality of gases prior to the gases entering a processing chamber. In one embodiment a mixer is provided. The mixer includes a body, an inlet, an outlet, and a hollow passage. The hollow passage is disposed through the body and fluidly connects the inlet to the outlet. The hollow passage includes a sidewall. The mixer further includes a plurality of fins formed on the sidewall. The plurality of fins extend into the hollow passage, and the plurality of fins and the sidewall form a monolithic structure.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
25.
SHORTWAVE INFRARED INSPECTION OF PATTERNED SUBSTRATES USING FOCUS AVERAGING
A system includes a memory and at least one processing device, operatively coupled with the memory, to obtain metrology data with respect to a substrate, cause a lithography process to be performed using the metrology data to obtain a patterned substrate to be processed, and after performing the lithography process, cause a shortwave infrared (SWIR) inspection system to inspect the patterned substrate by focus averaging a plurality of images of the patterned substrate. Each image of the plurality of images corresponds to a respective SWIR wavelength of a plurality of SWIR wavelengths.
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfacesMaterials therefor, e.g. comprising photoresistsApparatus specially adapted therefor
26.
SMALL CELL REACTORS WITH SHARED FORELINE AND PRESSURE CONDUIT
In one embodiment, a processing system for semiconductor manufacturing, includes a chamber housing, a first process chamber, a second process chamber and a foreline disposed in the chamber housing and between the first process chamber and the second process chamber. The first and second process chambers are in the chamber housing and each includes a pump ring and a liner. The pump ring includes a port and baffle. The pump rings and liners each partially define a first and second process volume respectively. The foreline includes a first exhaust chamber fluidly coupled to the first process volume and a second exhaust chamber fluidly coupled to the second process volume.
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
27.
FINISHING ON PACKAGING SUBSTRATE WITH ULTRA HIGH-DENSITY INTERCONNECTS
A packaging substrate is provided. The packaging substrate includes a core and first organic buildup layers on a first side of the core. The first organic buildup layers include an organic dielectric material and at least one of first metallic traces, first metallic vias, or first metallic pads. The packaging substrate includes second organic buildup layers on a second side of the core that is opposite the first side. The second organic buildup layers include the organic dielectric material and at least one of second metallic traces, second metallic vias, or second metallic pads. The packaging substrate includes first inorganic buildup layers disposed on the first organic buildup layers. The first inorganic buildup layers include an inorganic dielectric material and at least one of third metallic traces, third metallic vias, or third metallic pads.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
A method and apparatus for forming an interconnect structure. The method includes depositing a ruthenium layer on a cobalt layer disposed within a feature formed on a substrate. The ruthenium layer has a ruthenium concentration that increases from a lower portion of the feature to an upper portion of the feature. The method includes depositing a copper layer within the feature. A material forming the copper layer is heated to a reflow temperature before, during, or after depositing the copper layer.
A method of processing a substrate, includes performing a preclean process to form an exposed surface of a conductive layer within a via formed in a dielectric layer formed over the conductive layer, forming a passivation layer over the exposed surface of the conductive layer, and removing the passivation layer using a microwave assisted process.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
30.
PERFORMANCE VALIDATION FOR IMPEDANCE TRANSFORMER IN A MICROWAVE SYSTEM
Embodiments disclosed herein may include a method for testing a thermal break. In an embodiment, the method includes sweeping a frequency between a first frequency and a second frequency with a vector network analyzer (VNA) on a test bench that comprises a dielectric resonator antenna (DRA) and a thermal break electrically coupled to the VNA. In an embodiment, the method may further include detecting a resonant frequency of the DRA and an impedance at an input of the thermal break. The method may further include comparing the resonant frequency and the impedance to a reference resonant frequency and a reference impedance of a known good thermal break.
A method includes depositing a contact capping layer over a surface of a contact structure, the contact capping layer deposition process comprising flowing hydrogen (H2) and a silicon containing gas into a processing chamber, and delivering a molybdenum (Mo) precursor for a first period of time and halting delivering of the Mo precursor for a second period of time while flowing the hydrogen (H2) and the silicon containing gas, and repeating delivering the Mo precursor and halting delivering the Mo precursor one or more times while flowing the hydrogen (H2) and the silicon containing gas.
C23C 16/04 - Coating on selected surface areas, e.g. using masks
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
32.
FORMATION OF INDUCTOR CORE STACKS USING SELF-ASSEMBLED MONOLAYERS
A method for forming a multi-layer inductor core incorporates a leaky self¬ assembled monolayer (SAM) as a plateable dielectric layer that is interposed between magnetic layers formed by electrochemical deposition (ECD) plating processes. A method may include depositing a dielectric layer on a first magnetic layer of an inductor core stack where the dielectric layer is a SAM layer and depositing a second magnetic layer on the dielectric layer of the multi-layer inductor core. The method may be repeated to form as many layers as desired. Subsequent dielectric layers may be the same SAM layer or a different SAM layer. A mix of different molecules may be used in the SAM layers to form the dielectric layers.
H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
H01F 27/245 - Magnetic cores made from sheets, e.g. grain-oriented
An ion implantation system including an ion source for generating an ion beam, an end station for holding a substrate to be implanted by the ion beam, and a linear accelerator disposed between the ion source and the end station and adapted to accelerate the ion beam, the linear accelerator including a beam tube for transmitting the ion beam, the beam tube having at least five adjoining sidewalls, at least one resonator coupled to the beam tube, and at least one turbomolecular pump coupled to the beam tube, wherein at least one of the at least five adjoining sidewalls of the beam tube has an opening formed therein for providing access to an interior of the beam tube.
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
A process chamber for processing a substrate is provided. The process chamber includes: a chamber body disposed around an interior volume; a substrate support in the interior volume; a showerhead positioned over the substrate support; and a backing plate positioned over the showerhead. A plenum is formed between the showerhead and the backing plate, the backing plate including a gas inlet, a first gas outlet positioned at a center of the backing plate, and a first plurality of additional gas outlets fluidly coupled to the gas inlet by a plurality of internal channels of the backing plate.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/505 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using radio frequency discharges
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
A method of epitaxial deposition is disclosed. The method includes plasma pre-cleaning a substrate having openings with an aspect ratio of greater than 5:1. The plasma pre-cleaning is performed at pre-clean pressure of less than 5 Torr. The method also includes, after the plasma pre-cleaning, depositing a material in the openings using epitaxial deposition at a deposition pressure of about 700 Torr to about 800 Torr. In another embodiment, a method of gap filling using epitaxial deposition includes patterning a substrate with openings having an aspect ratio of 5:1. The method also includes plasma pre-cleaning the substrate, the plasma pre-cleaning being performed at a pre- clean pressure of about 1 Torr to about 5 Torr. The method also includes, after the plasma pre-cleaning, depositing a gap fill material in the openings using epitaxial deposition at a deposition pressure of about 700 Torr to about 800 Torr.
Embodiments described herein relate to a method of treatment for substrate edge profiles. The method including generating a plasma in a plasma processing region of a processing volume of a processing chamber where the processing volume includes a first volume disposed above a grid assembly to receive the plasma and a second volume containing a substrate support assembly disposed below the grid assembly for processing a substrate. The grid assembly includes one or more grid plates; each grid plate including a plurality of perforations of two or more perforations arranged along a circular path disposed over a peripheral region of a substrate support surface. The method includes exposing the peripheral region of the substrate support surface to a plasma species generated in the first volume by focusing the plasma species through the perforations onto the peripheral region of the substrate support surface in the second volume.
According to one or more embodiments, a method includes exposing a semiconductor device structure to a microwave process to cause impurities within at least one electrical connection formed in at least one feature of the semiconductor device structure to rise to a surface of the at least one electrical connection, and exposing the semiconductor device structure to a reactive gas to remove the impurities from the surface of the at least one electrical connection.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/225 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regionsRedistribution of impurity materials, e.g. without introduction or removal of further dopant using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
38.
SMALL CELL REACTORS WITH SHARED FORELINE AND PRESSURE CONDUIT
In one embodiment, a processing system for semiconductor manufacturing, includes a chamber housing, a first process chamber, a second process chamber and a foreline disposed in the chamber housing and between the first process chamber and the second process chamber. The first and second process chambers are in the chamber housing and each includes a pump ring and a liner. The pump ring includes a port and baffle. The pump rings and liners each partially define a first and second process volume respectively. The foreline includes a first exhaust chamber fluidly coupled to the first process volume and a second exhaust chamber fluidly coupled to the second process volume.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
39.
EXTRACTION OF ORGANIC MATERIAL FROM HIGH ASPECT RATIO STRUCTURES
Embodiments of the disclosure include a method of device processing, comprising: exposing a device substrate to a carbon-free fluorine-containing gas for a first period of time, delivering an inert gas to the processing volume for a second period of time; and removing a organic fill material of the device substrate by generating a plasma over the device substrate, wherein the plasma comprises the inert gas. The device substrate comprises one or more layers disposed on the device substrate, wherein the one or more layers define at one or more high-aspect ratio (HAR) features, wherein the HAR feature includes sidewall surfaces and a bottom surface and the organic fill material disposed within the one or more HAR features.
Embodiments of the disclosure include an electrostatic chuck (ESC). The ESC includes a substrate support including a first segment and a second segment that is laterally adjacent to the first segment. The first segment includes a first pair of electrodes. The second segment includes a second pair of electrodes. The first segment is to be displaced vertically relative to the second segment to accommodate a non-planar surface of a substrate.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
41.
COMBINATION OF INLINE METROLOGY AND ON TOOL METROLOGY FOR ADVANCED PACKAGING
Aspects of the present disclosure generally relate to a digital lithography system and methods for alignment resolution with the digital lithography system. The digital lithography system includes a metrology system configured to improve overlay alignment for different layers of the lithography process. The metrology system includes an inline metrology system (IMS) in combination with an on tool metrology system (OTM), which enable substrate overlay alignment and die placement correction. The inline metrology system may be positioned on an inline metrology tool and the on tool metrology system is positioned on a digital lithography tool. The inline metrology system facilitates measurement of high-throughput measurement inline metrology data for marks such as die marks and global alignment marks for verification of process stability and die placement data for digital data correction. This inline metrology data can be compared with a design file to determine offsets for the digital data correction.
A chemical mechanical polishing apparatus includes a platen to hold a polishing pad, a carrier to hold a substrate against a polishing surface of the polishing pad during a polishing process, and a temperature control system including a source of a fluid medium and one or more openings positioned over the platen and separated from the polishing pad and configured for the fluid medium to flow onto the polishing pad to heat or cool the polishing pad.
A method includes identifying sets of a first type of data associated with wafers processed via processing chambers of wafer processing equipment and identifying sets of a second type of data associated with the wafers processed via the processing chambers of the wafer processing equipment. The first type of data is different than the second type of data. The method further includes generating sets of aggregated data, where each of the sets of aggregated data includes a respective set of the first type of data and a respective set of the second type of data. The method further includes causing, based on the sets of aggregated data, performance of a corrective action associated with adjusting at least one operation associated with the wafer processing equipment.
G05B 19/404 - Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by control arrangements for compensation, e.g. for backlash, overshoot, tool offset, tool wear, temperature, machine construction errors, load, inertia
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
A method includes obtaining an event sequence related to a set of runs performed by a process tool that has failed, determining, using the event sequence, an issue causing a failure of the process tool, identifying, based on the issue, a first subset of runs from the set of runs and a second subset of runs from the set of runs, identifying a corrective action to address the issue that caused the failure, and causing the corrective action to be provided.
A substrate support assembly is provided including: a shaft; and a substrate support including: a substrate support body attached to the shaft, the substrate support body formed of a first material; and a tube positioned inside the substrate support body, the tube formed of a second material having a melting point that is higher than a sintering temperature of the first material.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
Embodiments disclosed herein may include an apparatus that includes a body with a first surface and a second surface opposite from the first surface. In an embodiment, the body is an electrically conductive material. A hole may be formed into the first surface of the body, and a ceramic plate may be on the second surface of the body. An electrically conductive electrode may be embedded in the ceramic plate. In an embodiment, the apparatus may further include a pin that is electrically conductive and positioned in the hole. The pin may be electrically isolated from the body, and the pin may be electrically coupled to the electrode embedded in the ceramic plate.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
An ion implantation system including an ion source for generating an ion beam, an end station for holding a substrate to be implanted by the ion beam, and a linear accelerator disposed between the ion source and the end station and adapted to accelerate the ion beam, the linear accelerator including a beam tube for transmitting the ion beam, the beam tube having at least five adjoining sidewalls, at least one resonator coupled to the beam tube, and at least one turbomolecular pump coupled to the beam tube, wherein at least one of the at least five adjoining sidewalls of the beam tube has an opening formed therein for providing access to an interior of the beam tube.
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
A method includes depositing a contact capping layer over a surface of a contact structure, the contact capping layer deposition process comprising flowing hydrogen (H2) and a silicon containing gas into a processing chamber, and delivering a molybdenum (Mo) precursor for a first period of time and halting delivering of the Mo precursor for a second period of time while flowing the hydrogen (H2) and the silicon containing gas, and repeating delivering the Mo precursor and halting delivering the Mo precursor one or more times while flowing the hydrogen (H2) and the silicon containing gas.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
According to one or more embodiments, a method includes exposing a semiconductor device structure to a microwave process to cause impurities within at least one electrical connection formed in at least one feature of the semiconductor device structure to rise to a surface of the at least one electrical connection, and exposing the semiconductor device structure to a reactive gas to remove the impurities from the surface of the at least one electrical connection.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
A method of processing a substrate, includes performing a preclean process to form an exposed surface of a conductive layer within a via formed in a dielectric layer formed over the conductive layer, forming a passivation layer over the exposed surface of the conductive layer, and removing the passivation layer using a microwave assisted process.
A method for forming a multi-layer inductor core incorporates a leaky self-assembled monolayer (SAM) as a plateable dielectric layer that is interposed between magnetic layers formed by electrochemical deposition (ECD) plating processes. A method may include depositing a dielectric layer on a first magnetic layer of an inductor core stack where the dielectric layer is a SAM layer and depositing a second magnetic layer on the dielectric layer of the multi-layer inductor core. The method may be repeated to form as many layers as desired. Subsequent dielectric layers may be the same SAM layer or a different SAM layer. A mix of different molecules may be used in the SAM layers to form the dielectric layers.
H01F 41/02 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets
A chemical mechanical polishing apparatus has a platen with a top surface to hold a polishing pad, a carrier head to hold a substrate against a polishing surface of the polishing pad during a polishing process, a sensor and/or actuator arranged on the carrier head, and a rotary electrical connection which provides at least two electrical connections between a controller and the sensor and/or actuator. The controller is configured to receive a signal from the sensor and/or actuator and control the carrier head based on the signal.
B24B 37/10 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for single side lapping
B24B 49/08 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving liquid or pneumatic means
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
53.
SELF-ALIGNED STORAGE NODE CONTACT IN DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICE
A method for forming a storage node contact in a dynamic random access memory (DRAM) device includes polishing an array wafer from a top side of the array wafer, the array wafer including a bitline layer, a channel pillar, a word line layer, and a bottom source/drain (S/D) junction that electrically connects the channel pillar to the bitline layer, disposed within a shallow trench isolation (STI), doping a top portion of the channel pillar and forming a top S/D junction, selectively forming an interlayer dielectric (ILD) on the STI versus the top S/D junction, forming an interface layer on an exposed surface of the top S/D junction, depositing a contact metal layer on the ILD and the interface layer, forming a storage node landing pad in the contact metal layer, and filling a gap between the storage node landing pad and an adjacent storage node contact pad with insulator film material.
A technique for acquiring reference traces includes measuring an angular orientation of a calibration substrate, rotating a carrier head and a platen to respective predetermined angular positions, and bringing the calibration substrate into contact with a polishing pad on the platen. The platen and the carrier head are rotated with the calibration substrate in contact with the polishing pad. The calibration substrate is monitored by sweeping a sensor of an in-situ monitoring system across the calibration substrate to generate a sequence of reference traces with each respective reference trace of the sequence of reference traces corresponding to a respective sweep of a sequence of sweeps by the sensor, and with each reference trace including a series of signal values. The sequence of reference traces is stored and each reference trace is labelled to distinguish an order of the reference traces within the sequence.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
55.
PROCESSING OF SCALED SIGNALS FROM IN-SITU MONITORING SYSTEM IN CHEMICAL MECHANICAL POLISHING
A conductive layer is monitored during polishing by an in-situ eddy current monitoring system. This includes repeatedly sweeping a sensor of the in-situ eddy current monitoring system across substrate such that each sweep generates a sequence of raw signal values that provides a trace and the repeated sweeping provides a sequence of traces. For each trace is scaled to generate scaled traces extending from a same start time or start position to a same end time or end position. A sequence of average traces is generated by calculating a running average of a multiplicity of consecutive scaled traces from the sequence of scaled traces. A sequence of estimated thickness values is generated based on the sequence of average traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
56.
GENERATION OF BACKGROUND SIGNAL SEQUENCE USING AN IN-SITU MONITORING SYSTEM IN CHEMICAL MECHANICAL POLISHING
A polishing control technique includes storing data representing a sequence of background traces generated by a sequence of scans of a sensor of an in-situ monitoring system across a substrate, and polishing a layer on a substrate. The layer is monitored during the polishing with the in-situ monitoring system, including repeatedly sweeping the sensor of the in-situ monitoring system across substrate such that each sweep provides a measured trace. For each measured trace, a respective background trace that has an equivalent position in the sequence of background traces is subtracted from the measured trace to generate a modified trace, and a sequence of estimated thickness values is generated based on the modified traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
57.
CATHODE ASSEMBLY FOR INTEGRATION OF EMBEDDED ELECTROSTATIC CHUCK (ESC)
Embodiments disclosed herein include an apparatus that includes an electrostatic chuck (ESC). The electrostatic chuck may include a first body that is electrically conductive, and a ceramic insert on the first body with an electrode embedded within the ceramic insert. In an embodiment, the apparatus may further include a facility plate that is coupled to the ESC. The facility plate may include a second body that is electrically conductive with a hole through the second body. In an embodiment, a DC input connector is provided through the hole, and an RE feed line is coupled to the second body. In an embodiment, a pin of the DC input connector is electrically isolated from the RE feed line.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
Exemplary processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be housed in the processing region. The substrate may define a feature. The methods may include forming plasma effluents of the silicon-containing precursor. The methods may include depositing a silicon-containing material on the substrate. The methods may include providing an oxygen-containing precursor to the processing region, forming plasma effluents of the oxygen-containing precursor, and contacting the silicon-containing material with the plasma effluents of the oxygen-containing precursor to form a silicon-and-oxygen-containing material. The methods may include providing a fluorine-containing precursor to the processing region, forming plasma effluents of the fluorine-containing precursor, and etching the silicon-and-oxygen-containing material from a top, a sidewall, or both of the feature with the plasma effluents of the fluorine-containing precursor.
Embodiments of the present disclosure relate to optical systems. And the embodiments provide a system including: an interconnect comprising at least one power splitter; and a photonic integrated circuit (PIC) disposed on the interconnect, the PIC comprising at least one set of modulators, and a method including: obtaining at least one interconnect comprising at least one power splitter; obtaining at least one PIC comprising at least one set of modulators; and forming a device comprising the at least one interconnect and the at least one PIC.
G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
G02B 6/28 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals
G02B 6/122 - Basic optical elements, e.g. light-guiding paths
60.
CATHODE ASSEMBLY FOR INTEGRATION OF EMBEDDED ELECTROSTATIC CHUCK (ESC)
Embodiments disclosed herein include an apparatus that includes an electrostatic chuck (ESC). The electrostatic chuck may include a first body that is electrically conductive, and a ceramic insert on the first body with an electrode embedded within the ceramic insert. In an embodiment, the apparatus may further include a facility plate that is coupled to the ESC. The facility plate may include a second body that is electrically conductive with a hole through the second body. In an embodiment, a DC input connector is provided through the hole, and an RF feed line is coupled to the second body. In an embodiment, a pin of the DC input connector is electrically isolated from the RF feed line.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A system that reduces the amount of contaminants that enters a process chamber or air bearing via a movable shaft is disclosed. The movable shaft includes an outer shell made from a material having a low coefficient of thermal expansion. This allows the outer shell to be heated to sufficiently high temperatures to avoid condensation of contaminants on the shaft, while minimizing any change in the diameter of the shaft, which passes through an air bearing. The shaft may also have a temperature modification device disposed adjacent to the interior surface of the outer shell. In some embodiment, the shaft may include an inner liner. An insulative layer may be provided between the inner liner and the outer shell, such that the temperature of the outer shell does not cause the inner liner to thermally expand.
F16C 17/22 - Sliding-contact bearings for exclusively rotary movement characterised by features not related to the direction of the load with arrangements compensating for thermal expansion
Embodiments described herein relate to a method of treatment for substrate edge profiles. The method including generating a plasma in a plasma processing region of a processing volume of a processing chamber where the processing volume includes a first volume disposed above a grid assembly to receive a plasma and a second volume containing a substrate support assembly disposed below the grid assembly for processing a substrate. The grid assembly includes one or more grid plates; each grid plate including a plurality of perforations of two or more perforations arranged along a circular path disposed over a peripheral region of a substrate support surface. The method includes exposing the peripheral region of the substrate support surface to a plasma species generated in the first volume by focusing the plasma species through the perforations onto the peripheral region of the substrate support surface in the second volume.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
63.
LINERS HAVING FLOW OPENINGS, AND RELATED CHAMBER KITS, PROCESSING CHAMBERS, AND METHODS FOR SEMICONDUCTOR MANUFACTURING
The present disclosure relates to liners having flow openings, and related chamber kits, processing chambers, and methods for semiconductor manufacturing. In one or more embodiments, a liner applicable for semi-conductor manufacturing includes an inner face and an outer face opposing the inner face. The liner includes an inlet opening extending into the inner face and an outlet opening extends into the inner face. The liner includes a curved flow opening extending into the outer face and extending at least partially about the liner. The curved flow opening extends along an azimuthal angle greater than 90 degrees.
A method for estimating process characteristics is provided. The method can include collecting process data from a spectral emitter and a spectral sensor during a substrate processing operation, and generating a calibrated model for the process data. Generating a calibrated model can include selecting a calibration option from a set of calibration options, based on a degree of freedom associated with a given calibration option, and calibrating a base model to generate the calibrated model. The base model is calibrated using the selected calibration option and a portion of the first process data.
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfacesMaterials therefor, e.g. comprising photoresistsApparatus specially adapted therefor
Gas inserts for semiconductor manufacturing processing chambers with a plurality of injection levels are described. Each of the gas injection levels provides a gas flow to an inner channel within the gas insert. Each of the gas flows are directed in a rotational direction within the inner channel. The gas injection level closest to the outlet end of the gas insert directs a gas flow in the opposite rotational direction to the other gas injection levels. Processing chambers, gas distribution assemblies and methods using the gas inserts are also described.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
A method of epitaxial deposition is disclosed. The method includes plasma pre-cleaning a substrate having openings with an aspect ratio of greater than 5:1. The plasma pre-cleaning is performed at pre-clean pressure of less than 5 Torr. The method also includes, after the plasma pre-cleaning, depositing a material in the openings using epitaxial deposition at a deposition pressure of about 700 Torr to about 800 Torr. In another embodiment, a method of gap filling using epitaxial deposition includes patterning a substrate with openings having an aspect ratio of 5:1. The method also includes plasma pre-cleaning the substrate, the plasma pre-cleaning being performed at a pre-clean pressure of about 1 Torr to about 5 Torr. The method also includes, after the plasma pre-cleaning, depositing a gap fill material in the openings using epitaxial deposition at a deposition pressure of about 700 Torr to about 800 Torr.
C30B 35/00 - Apparatus not otherwise provided for, specially adapted for the growth, production or after-treatment of single crystals or of a homogeneous polycrystalline material with defined structure
67.
Isolation Valve for Implant Productivity Enhancement
An isolation valve for use in an ion implantation system is disclosed. The isolation valve is disposed between the process chamber, which houses the workpiece to be implanted, and the components located immediately upstream from the process chamber. This isolation valve may be closed to allow preventative maintenance to be performed on the process chamber without venting the rest of the ion implantation system. This may reduce particles and other material from traveling upstream from the process chamber during a preventive maintenance operation. This enhancement may reduce the frequency that the rest of the system undergoes preventative maintenance.
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
A process chamber includes a chamber body having a ceiling disposed above a floor with a chassis and an injector ring disposed therebetween. Upper and lower clamp rings secure the upper and floors, respectively, in place. An upper heating module is coupled to the upper clamp ring above the ceiling. A lower heating module is coupled to the lower clamp ring below the floor.
A conductive layer on a substrate is polished and the conductive layer is monitored during the polishing with an in-situ eddy current monitoring system. This includes repeatedly sweeping a sensor of the in-situ eddy current monitoring system across substrate such that each sweep generates a sequence of raw signal values that provides a trace and the repeated sweeping provides a sequence of traces. A sequence of average traces is generated by calculating a running average of a multiplicity of consecutive traces from the sequence of traces. A sequence of estimated thickness values is generated based on the sequence of average traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
A susceptor for a processing chamber is provided including: an inner portion having a center; an outer rim disposed around the inner portion, the outer rim including a first inner side surface and a first outer side surface; and a plurality of apertures, each aperture extending from the first outer side surface to the first inner side surface. Each aperture of the plurality of apertures is located at a different angular location relative to the center of the inner portion.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
Embodiments disclosed herein may include an apparatus that includes a body with a first surface and a second surface opposite from the first surface. In an embodiment, the body is an electrically conductive material. A hole may be formed into the first surface of the body, and a ceramic plate may be on the second surface of the body. An electrically conductive electrode may be embedded in the ceramic plate. In an embodiment, the apparatus may further include a pin that is electrically conductive and positioned in the hole. The pin may be electrically isolated from the body, and the pin may be electrically coupled to the electrode embedded in the ceramic plate.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
A substrate support assembly is provided including: a shaft; and a substrate support including: a substrate support body attached to the shaft, the substrate support body formed of a first material; and a tube positioned inside the substrate support body, the tube formed of a second material having a melting point that is higher than a sintering temperature of the first material.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C04B 37/00 - Joining burned ceramic articles with other burned ceramic articles or other articles by heating
73.
AUTONOMOUS FAULT DIAGNOSTIC TOOLS FOR MANUFACTURING SYSTEMS BY ANALYZING PROCESS RUNS
A method includes obtaining an event sequence related to a set of runs performed by a process tool that has failed, determining, using the event sequence, an issue causing a failure of the process tool, identifying, based on the issue, a first subset of runs from the set of runs and a second subset of runs from the set of runs, identifying a corrective action to address the issue that caused the failure, and causing the corrective action to be provided.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
Embodiments described herein generally relate to a display. In one or more embodiments, a sub-pixel circuit includes at least two anodes disposed over a substrate, with adjacent anodes defining a well. The sub-pixel circuit further includes adjacent overhang structures. The overhang structures include a first portion disposed in the well and a second portion disposed over the first portion, and a portion of the uppermost surface of the anode. The second portion includes overhang extensions extending past lower sidewalls of the first portion, and an upper surface. The upper surface of the second portion is above the uppermost surface of the anodes. The well has a trench area defined by the lower sidewalls and a bottom surface of the overhang extensions with a gap between the overhang extensions of the adjacent overhang structures.
Embodiments of the present disclosure generally relate to methods for silicon oxide gap filling of trenches and other features. The methods provide bottom-up processes to gapfill features with oxides, such as silicon oxide without voids, seams, or other defects. In one or more embodiments, a method for oxide gap filling is provided and includes providing a workpiece containing features, conducting a deposition-etch cycle to deposit a fill material containing silicon oxide into the features, and repeating the deposition-etch cycle including a PE-ALD process and an etch process to bottom-up fill the features with the fill material. The deposition-etch cycle includes conducting the PE-ALD process to deposit the silicon oxide on the sidewall surfaces and the bottom surfaces. The etch process is conducted to selectively remove the silicon oxide from the sidewall surfaces while maintaining the silicon oxide on the bottom surfaces.
In some embodiments, an optical device includes a waveguide having a first surface and a second surface opposing the first surface. The waveguide further includes an input coupler and an output coupler disposed over the first surface or the second surface. The optical device further includes a first prism disposed over at least the output coupler and over the first surface. The first prism is operable to increase a first projection angle of an image relative to a horizontal plane of the waveguide. The optical device further includes a second prism disposed under at least the output coupler and under the second surface. The second prism is operable to increase the second projection angle of light leakage relative to the horizontal plane of the waveguide.
Embodiments of the present disclosure generally relate to a device with a substrate with a first surface, a second surface, and an edge where the first surface of the substrate includes a waveguide, where the waveguide includes an input coupling grating, a pupil expansion grating, and an output coupling grating. The device additionally includes a cover substrate, a blackening section disposed over the first surface between the edge of the substrate and the waveguide, and a gap between the substrate and the cover substrate. A method includes disposing blackening material over the substrate, placing a cover substrate on the blackening material and curing to form a blackening section. Another method includes disposing blackening material over the substrate, curing the blackening material to form a blackening section, disposing adhesive over the blackening section, curing the adhesive, and placing a cover substrate on the adhesive.
Disclosed are a gas ring for providing a process gas, a processing chamber having the gas ring, and a gas delivery method. The gas ring includes an annular body surrounding an inner space configured to accommodate a substrate and having a network of gas channels. The network of gas channels includes a plurality of circumferential gas channels coupled with radial gas channels. The plurality of the circumferential gas channels are disposed concentrically around a center of the annular body. The gas ring further includes a plurality of gas inlets and outlets coupled with the network. The gas inlets are disposed along an inner side surface of the annular body. The method includes providing a process gas to the gas ring, flowing the process gas circumferentially and radially along the network of the gas channels, and releasing the process gas via the plurality of gas outlets.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
A method for forming a storage node contact in a dynamic random access memory (DRAM) device includes polishing an array wafer from a top side of the array wafer, the array wafer including a bitline layer, a channel pillar, a word line layer, and a bottom source/drain (S/D) junction that electrically connects the channel pillar to the bitline layer, disposed within a shallow trench isolation (STI), doping a top portion of the channel pillar and forming a top S/D junction, selectively forming an interlayer dielectric (ILD) on the STI versus the top S/D junction, forming an interface layer on an exposed surface of the top S/D junction, depositing a contact metal layer on the ILD and the interface layer, forming a storage node landing pad in the contact metal layer, and filling a gap between the storage node landing pad and an adjacent storage node contact pad with insulator film material.
A conductive layer on a substrate is polished and the conductive layer is monitored during the polishing with an in-situ eddy current monitoring system. This includes repeatedly sweeping a sensor of the in-situ eddy current monitoring system across substrate such that each sweep generates a sequence of raw signal values that provides a trace and the repeated sweeping provides a sequence of traces. A sequence of average traces is generated by calculating a running average of a multiplicity of consecutive traces from the sequence of traces. A sequence of estimated thickness values is generated based on the sequence of average traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
A technique for acquiring reference traces includes measuring an angular orientation of a calibration substrate, rotating a carrier head and a platen to respective predetermined angular positions, and bringing the calibration substrate into contact with a polishing pad on the platen. The platen and the carrier head are rotated with the calibration substrate in contact with the polishing pad. The calibration substrate is monitored by sweeping a sensor of an in-situ monitoring system across the calibration substrate to generate a sequence of reference traces with each respective reference trace of the sequence of reference traces corresponding to a respective sweep of a sequence of sweeps by the sensor, and with each reference trace including a series of signal values. The sequence of reference traces is stored and each reference trace is labelled to distinguish an order of the reference traces within the sequence.
A substrate is monitored during polishing with an in-situ monitoring system so as to generate a sequence of signal values. The sequence of signal values from the zone is converted into a sequence of effective thickness values for each of multiple zones. For each zone, a function is fit to the sequence of effective thickness values. An effective starting thickness profile for the layer at a start of polishing is determined using the fitted functions, and an adjusted target thickness profile is calculated based on an initial target profile, a starting thickness profile, and the effective starting thickness profile. A polishing parameter is modified based on the sequences of effective thickness values and the adjusted target thickness profile.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
B24B 51/00 - Arrangements for automatic control of a series of individual steps in grinding a workpiece
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
83.
LIFT PIN ASSEMBLY FOR A SUSCEPTOR OF A PROCESSING CHAMBER
Disclosed herewith are a lift pin assembly, a substrate support assembly having the lift pin assembly, and a method of handling a substrate. The lift pin assembly includes a pin head detachably coupled with a pin body. The elongated pin body includes a first material, and the pin head includes a second material different from the first material. The second material is softer than the first material and may have a thermal conductivity about four (4) to eight (8) times of the first material. The second material has a melting point or a sublimation point of at least 600°C.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
84.
ULTRAVIOLET (UV) TREATMENT CHAMBER FOR LOW TEMPERATURE EPITAXIAL GROWTH
The present disclosure relates to photo-emitting plasma for gas activation in processing chambers, and related apparatus and methods. In one or more embodiments, a processing system includes a transfer chamber. At least one film formation chamber is coupled to the transfer chamber. An oxide removal chamber is coupled to the transfer chamber. An ultraviolet (UV) treatment chamber is coupled to the transfer chamber. The UV treatment chamber includes a substrate support and an UV energy source.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C30B 25/10 - Heating of the reaction chamber or the substrate
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
85.
SELECTIVE ETCHING OF SILICON-AND-GERMANIUM-CONTAINING MATERIALS WITH REDUCED UNDER LAYER LOSS
Exemplary semiconductor processing methods may include providing a first etchant precursor to a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. A first layer of silicon-and-germanium-containing material, a second layer of silicon-and-germanium-containing material, and a layer of silicon-containing material may be disposed on the substrate. The methods may include providing a passivation precursor to the processing region. The methods may include contacting the substrate with the first etchant precursor and the passivation precursor. The contacting may selectively etch the first layer of silicon-and-germanium-containing material. The contacting may form a passivation material on the substrate.
The disclosure provides a system and methods of performing a cyclic growth oxidation process. The method includes forming a plasma of a plasma gas using a remote plasma source fluidly coupled to a conduit coupled to a first nozzle of a processing chamber. An oxidation radical is produced. A first oxidation process is performed by introducing the oxidation radical for a first period of time to the processing chamber using the first nozzle. A bake process is performed for a second period of time. A second oxidation process is performed by introducing the oxidation radical for a third period of time.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
Disclosed are a gas ring for providing a process gas, a processing chamber having the gas ring, and a gas delivery method. The gas ring includes an annular body surrounding an inner space configured to accommodate a substrate and having a network of gas channels. The network of gas channels includes a plurality of circumferential gas channels coupled with radial gas channels. The plurality of the circumferential gas channels are disposed concentrically around a center of the annular body. The gas ring further includes a plurality of gas inlets and outlets coupled with the network. The gas inlets are disposed along an inner side surface of the annular body. The method includes providing a process gas to the gas ring, flowing the process gas circumferentially and radially along the network of the gas channels, and releasing the process gas via the plurality of gas outlets.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
88.
MULTILAYER OVERHANG ROOF FOR OLED SUB-PIXEL CIRCUIT
Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. A method of forming a sub-pixel circuit includes depositing an anode over a substrate; depositing a pixel isolation structures (PIS) layer over the substrate; removing one or more portions of the PIS layer to form a plurality of first PIS and second PIS; planarizing the first PIS and the second PIS; depositing a first structure layer, a first metal-containing layer of a second structure layer, and a second metal-containing layer of the second structure layer over the substrate; disposing and patterning a first resist over the second structure layer; and removing portions of the second structure layer to form a second structure and portions of the first structure layer to form a first structure.
Disclosed herein are a detachable part of a susceptor, a susceptor including the detachable part, a substrate support assembly including the susceptor, and a processing chamber having the same. In one example, the processing chamber includes a chamber body having an interior volume, a heating module, a susceptor, and a rotatable cylinder. The heating module is arranged to direct radiation into the interior volume. The susceptor has a disk shape and is disposed in the interior volume of the chamber body to support a substrate. The susceptor is rotatable on a vertical axis and fabricated from an opaque material. The rotatable cylinder is disposed in the interior volume and has an upper circumference supporting the susceptor thereon.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
Methods of manufacturing interconnect structures as part of a microelectronic device fabrication process are described. The methods include forming a dielectric layer including at least one feature defining a gap having sidewalls and a bottom on a substrate. The methods further include forming a blocking layer on the bottom by exposing the substrate to a blocking species that comprises a hydrocarbon and at least one additive; selectively depositing a barrier layer on the sidewalls; selectively depositing a metal liner on the barrier layer on the sidewalls; removing the blocking layer; and performing a gap fill process to fill the gap with a gapfill material.
Embodiments of the disclosure provided herein include systems and methods for correcting thickness asymmetry of a substrate during chemical mechanical polishing. The system includes a carrier head with a pixel cartridge array disposed within a carrier head body and a membrane adjacent to the pixel cartridge array, a notch sensor array disposed on a carrier ring, and a controller coupled to the pixel cartridge array and the notch sensor array. The controller is configured to receive and orient a substrate such that the substrate is an oriented substrate, determine a thickness profile on the oriented substrate, position the oriented substrate in a loading position, receive the oriented substrate, and polish the oriented substrate use the pixel cartridge array. The pixel cartridge array is configured to apply pressure on the membrane of the carrier head in the chemical mechanical polishing system.
B24B 49/10 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving electrical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
92.
HIGH DENSITY AMORPHOUS CARBON FILM WITH REDUCED HYDROGEN CONTENT
Embodiments described herein generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of amorphous carbon films on a substrate with improved etch selectivity. In certain embodiments, a method of forming an amorphous carbon film with film density close to the theoretical density of pure sp2 graphite and reduced hydrogen content is provided.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/04 - Coating on selected surface areas, e.g. using masks
C23C 16/02 - Pretreatment of the material to be coated
C23C 16/52 - Controlling or regulating the coating process
93.
METHOD OF INTEGRATED COPPER OXIDE REMOVAL AND LOW K REPAIR PROCESS
A method for repairing copper and low-k dielectric films on a substrate is provided. In some embodiments, the method includes positioning the substrate within a process chamber, introducing a reducing agent into the process chamber to remove copper oxide from a copper layer on the substrate, removing the reducing agent from the process chamber, and introducing a recovery precursor into the process chamber to decrease a k value of a low-k film on the substrate.
A component, system, and method for improved foreline cleaning of semiconductor chambers and components are disclosed herein. In one example, a processing chamber component includes a foreline constructed from stainless steel having a circular cross sectional shape and an inner surface. The foreline further includes a first end configured to couple to a processing chamber, a second end configured to couple to a valve, and a coating disposed within the inner surface of the foreline, the coating having a thickness between about 150 nanometers and about 525 nanometer. Further, the first end includes a first flange, the second end comprises a second flange, wherein the first end and the second end are coupled by a bend. Further, the coating has properties configured to reduce depositions within the foreline.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
95.
PRISMS FOR INDEPENDENT CONTROL OVER VIRTUAL IMAGE AND WORLD LEAKAGE ANGLES
In some embodiments, an optical device includes a waveguide having a first surface and a second surface opposing the first surface. The waveguide further includes an input coupler and an output coupler disposed over the first surface or the second surface. The optical device further includes a first prism disposed over at least the output coupler and over the first surface. The first prism is operable to increase a first projection angle of an image relative to a horizontal plane of the waveguide. The optical device further includes a second prism disposed under at least the output coupler and under the second surface. The second prism is operable to increase the second projection angle of light leakage relative to the horizontal plane of the waveguide.
Embodiments of the disclosure provided herein include systems and methods for correcting thickness asymmetry of a substrate during chemical mechanical polishing. The system includes a carrier head with a pixel cartridge array disposed within a carrier head body and a membrane adjacent to the pixel cartridge array, a notch sensor array disposed on a carrier ring, and a controller coupled to the pixel cartridge array and the notch sensor array. The controller is configured to receive and orient a substrate such that the substrate is an oriented substrate, determine a thickness profile on the oriented substrate, position the oriented substrate in a loading position, receive the oriented substrate, and polish the oriented substrate use the pixel cartridge array. The pixel cartridge array is configured to apply pressure on a membrane of a carrier head in a chemical mechanical polishing system.
The disclosure provides a system and methods of performing a cyclic growth oxidation process. The method includes forming a plasma of a plasma gas using a remote plasma source fluidly coupled to a conduit coupled to a first nozzle of a processing chamber. An oxidation radical is produced. A first oxidation process is performed by introducing the oxidation radical for a first period of time to the processing chamber using the first nozzle. A bake process is performed for a second period of time. A second oxidation process is performed by introducing the oxidation radical for a third period of time.
A conductive layer is monitored during polishing by an in-situ eddy current monitoring system. This includes repeatedly sweeping a sensor of the in-situ eddy current monitoring system across substrate such that each sweep generates a sequence of raw signal values that provides a trace and the repeated sweeping provides a sequence of traces. For each trace is scaled to generate scaled traces extending from a same start time or start position to a same end time or end position. A sequence of average traces is generated by calculating a running average of a multiplicity of consecutive scaled traces from the sequence of scaled traces. A sequence of estimated thickness values is generated based on the sequence of average traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
A polishing control technique includes storing data representing a sequence of background traces generated by a sequence of scans of a sensor of an in-situ monitoring system across a substrate, and polishing a layer on a substrate. The layer is monitored during the polishing with the in-situ monitoring system, including repeatedly sweeping the sensor of the in-situ monitoring system across substrate such that each sweep provides a measured trace. For each measured trace, a respective background trace that has an equivalent position in the sequence of background traces is subtracted from the measured trace to generate a modified trace, and a sequence of estimated thickness values is generated based on the modified traces. A polishing endpoint is detected or a polishing parameter is modified based on the sequence of estimated thickness values.
Embodiments described herein generally relate to sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes substrate, pixel-defining layer (PDL) structures disposed over the section of the substrate, inorganic or metal overhang structures disposed on an upper surface of the PDL structures, and a plurality of sub-pixels. The PDL structures include a trench disposed in the top surface of the PDL structure. Each sub-pixel includes an anode, an OLED material disposed over and in contact with the anode, and a cathode disposed over the OLED material. The inorganic or metal overhang structures have an overhang extension that extends laterally over the trench. An encapsulation layer is disposed over the cathode and extends under at least a portion of the inorganic or metal overhang structures and along a top surface of the PDL structures.
