Semiconductor wafer processing equipment and components,
namely, chemical mechanical polishers and monitoring
equipment, all for the processing and production of
semiconductor substrates, thin films, silicon discs and
wafers and metrology-related goods.
A tray for carrying workpieces, such as optical waveguides, is disclosed. The tray includes a plurality of openings, each opening having a plurality of fingers extending toward the center of the opening. The top surface of each finger is sloped downward and comprises an elastomer. In this way, the workpieces contact the fingers along their edges and any nanostructures disposed on the workpiece are not contacted. Further, in some embodiments, the tray is stackable and includes a retention mechanism located on the bottom side of the tray. The retention mechanism on a first tray serves to secure the workpiece disposed on a second tray positioned directly below the first tray. The tray may optionally be used for shipping and other purposes.
Methods for forming a metal carbide liner in features formed in a substrate surface are described. Each of the features extends a distance into the substrate from the substrate surface and have a bottom and at least one sidewall. The methods include depositing a metal carbide liner in the feature of the substrate surface with a plurality of high-frequency ratio-frequency (HFRF) pulses. Semiconductor devices with the metal carbide liner and methods for filling gaps using the metal carbide liner are also described.
Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.
A shield for use with a rotatable platen is disclosed. The shield includes an exposed portion and a frame to attach the shield to the platen. The exposed portion of the shield has an arc shaped back surface that faces the platen and an opposite exposed surface that faces toward the ion beam. The exposed surface is designed such that the ion beam strikes the exposed surface at angles that are roughly 90°, as sputtering may be reduced at these angles. The exposed surface may have various shapes, including flat, rounded or sloped. Additionally, the exposed surface may include a plurality of exposed segments, separated by connecting segments that are not exposed to the ion beam. The shield may be graphite, silicon or silicon carbide.
H01J 37/30 - Electron-beam or ion-beam tubes for localised treatment of objects
H01J 37/20 - Means for supporting or positioning the object or the materialMeans for adjusting diaphragms or lenses associated with the support
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
The disclosure describes a plasma source assemblies comprising a differential screw assembly, an RF hot electrode, a top cover, an upper housing and a lower housing. The differential screw assembly is configured to provide force to align the plasma source assembly vertically matching planarity of a susceptor. More particularly, the differential screw assembly increases a distance between the top cover and the upper housing to align the gap with the susceptor. The disclosure also provides a better thermal management by cooling fins. A temperature capacity of the plasma source assemblies is extended by using titanium electrode. The disclosure provides a cladding material covering a portion of a first surface of RF hot electrode, a second surface of RF hot electrode, a bottom surface of RF hot electrode, a portion of a surface of the showerhead and a portion of lower housing surface.
Methods of depositing a film selectively onto a first substrate surface relative to a second substrate surface are described. The methods include exposing the substrate surfaces to a blocking compound to selectively form a blocking layer on at least a portion of the first surface over the second surface. The substrate is sequentially exposed to a metal precursor with a kinetic diameter in excess of 21 angstroms and a reactant to selectively form a metal-containing layer on the second surface over the blocking layer or the first surface. The relatively larger metal precursors of some embodiments allow for the use of blocking layers with gaps or voids without the loss of selectivity.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
10.
IN-SITU ANALYSIS OF METAL SPECIES FOR PROCESSING CHAMBERS
Systems and methods are provided for analysis of metal contaminants within a processing chamber. Such systems and methods can include a vacuum system and valve attached to a processing chamber. The vacuum system and valve can effect a reduction in a pressure within a sampling chamber, an opening, while a process is in effect within a processing chamber connected to the sampling chamber, of a first fluid connection from the sampling chamber to the processing chamber such that a fluid ingresses from the processing chamber into the sampling chamber, a closing of the first fluid connection, an opening a second fluid connection from the sampling chamber to an inductively coupled plasma mass spectrometer (ICP-MS) such that the fluid egresses from the sampling chamber into the ICP-MS, an identification, via the ICP-MS, of a presence of trace elements within the fluid, and responsive to the identified presence of trace elements, performance of a corrective action associated with the processing chamber.
G01N 27/68 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating the ionisation of gases, e.g. aerosolsInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electric discharges, e.g. emission of cathode using electric discharge to ionise a gas
G01N 33/00 - Investigating or analysing materials by specific methods not covered by groups
Described herewith are an RF filter assembly for processing a coupled RF power originated from a substrate support assembly of a processing chamber, a chucking circuit for the substrate support assembly, and a method for processing the coupled RF power. The RF filter assembly includes a compensation circuit connected to an electrode of the substrate support assembly and configured to receive the coupled RF power and reduce a reflection of the coupled RF power back to the substrate support assembly; and an RF filter block configured to receive signals processed by the compensation circuit and comprising a plurality of RF filters configured to filter out predetermined frequencies of the coupled RF power. The chucking circuit includes the RF filter assembly. The method includes process and operations of the RF filter assembly.
An ion extraction optics including an extraction plate defining first, second, and third extraction apertures, the second extraction aperture being located between the first and third extraction apertures, first, second, and third beam blockers located adjacent the first, second, and third extraction apertures, respectively, wherein the first beam blocker and the first extraction aperture define first and second extraction slits, the second beam blocker and the second extraction aperture define third and fourth extraction slits, and the third beam blocker and the third extraction aperture define fifth and sixth extraction slits, wherein a height of the first extraction slit is greater than a height of at least one of the third extraction slit and the fourth extraction slit, and wherein a height of the sixth extraction slit is greater than the height of at least one of the third extraction slit and the fourth extraction slit.
H01J 37/09 - DiaphragmsShields associated with electron- or ion-optical arrangementsCompensation of disturbing fields
H01J 37/04 - Arrangements of electrodes and associated parts for generating or controlling the discharge, e.g. electron-optical arrangement, ion-optical arrangement
A method includes generating a causal graph based on a plurality of values, each value corresponding to a causal relationship between two or more sensors of a plurality of sensors in one or more manufacturing systems. The method further includes determining a causal strength index matrix. The method further includes responsive to identifying an anomalous behavior in at least one of the plurality of sensors, determining a root cause of the anomalous behavior using at least one of the causal strength index matrix or the causal graph. The method further includes causing a recommended corrective action to be issued based on the root cause of the anomalous behavior.
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
Systems and methods for fluid inspection are disclosed. The system includes a transportation system to transport a plurality of containers of fluid through an inspection zone, one or more cameras operable to view the plurality of containers from a first direction, and a back illuminator positioned to direct light in a second direction while the plurality of containers are in the inspection zone. The second direction is oriented greater than 90 degrees and less than 180 degrees from the first direction. The system further includes a controller electrically coupled to the back illuminator and the one or more cameras. The controller is operable to cause the back illuminator to emit light in the second direction while the plurality of containers are in the inspection zone and capture a plurality of images of the fluid in the plurality of containers while being illuminated by the back illuminator.
An optical device includes a substrate, an input coupler disposed on a first surface of the substrate and configured to receive input light, a first output coupler disposed on the first surface of the substrate, a second output coupler disposed on a second surface of the substrate, wherein the first output coupler and the second output coupler comprise asymmetric grating structures the first surface of the substrate opposes the second surface of the substrate.
Methods of manufacturing electronic devices are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices, e.g., complementary field-effect transistors (CFETs) that have improved negative bias temperature (NBTI) and boosted performance of the PMOS transistor due to the presence of a silicon germanium (SiGe) channel in the PMOS transistor. Specifically, a plurality of nanosheet release layers are removed from the N-channel metal-oxide-semiconductor (NMOS) transistor to form a plurality of openings adjacent the corresponding plurality of nanosheet channel layers, and a plurality of oxide layers are deposited in each of the plurality of openings.
H10D 84/03 - Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
A memory cell array includes a bitline encapsulated in a blocking layer within a spacer layer, the bitline extending in a first direction, and a plurality of memory cells aligned in the first direction, each of the plurality of memory cells including a cell transistor having a source electrically connected to the bitline, a drain, a word line, and a channel electrically connected to the source and the drain, and a cell capacitor having a top electrode that is electrically connected to the drain.
Disclosed herein are a plasma source, an abatement unit, and a method for detecting a coolant leak. The plasma source includes an RF generation system coupled with a cooling system. The RF generation system includes one or more electrical components comprising a hollow RF antenna for generating a plasma. The cooling system includes a coolant channel extending through the plasma source, including the electrical components of the RF generation system; a first flow control device coupled to the coolant channel to control a flow of the coolant into the coolant channel and electrically isolated from the hollow antenna; a second flow control device coupled to the coolant channel to control a flow of the coolant out of the coolant channel; and a pressure measurement device coupled with the coolant channel to measure a pressure level of the coolant. The coolant channel includes the hollow RF antenna.
Methods for depositing metal films using a metal halide precursor and diethyl zinc are described. The substrate is exposed to a first metal precursor and diethyl zinc to form the metal film. The exposures can be sequential or simultaneous. The metal films are pure with a low carbon content. The first metal precursor may be a metal halide selected from the group consisting of tantalum chloride, aluminum chloride, niobium chloride, titanium chloride, zirconium chloride, hafnium chloride, tungsten chloride, molybdenum chloride, tantalum bromide, aluminum bromide, niobium bromide titanium bromide, zirconium bromide, hafnium bromide, tungsten bromide, molybdenum bromide, tantalum fluoride, aluminum fluoride, niobium fluoride, titanium fluoride, zirconium fluoride, hafnium fluoride, tungsten fluoride, molybdenum fluoride, tantalum iodide, aluminum iodide, niobium iodide, titanium iodide, zirconium iodide, hafnium iodide, tungsten iodide, and molybdenum iodide.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/08 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
C23C 16/18 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
20.
MODEL BASED DEVELOPMENT OF ZONE BASED FLOW OR THERMAL DISTRIBUTION SYSTEMS
Embodiments disclosed herein include a method for optimizing zones in a fluid flow system. In an embodiment, the method comprises running a baseline simulation for the fluid flow system, and running a plurality of sensitivity simulations, where each sensitivity simulation perturbs a flowrate through one of a plurality of pitch circles in the fluid flow system by an offset percentage. In an embodiment, the method further comprises generating a sensitivity matrix from the plurality of sensitivity simulations, and optimizing an objective function to enable grouping of the plurality of pitch circles into a plurality of zones.
Embodiments described herein relate to sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display such as an organic light-emitting diode (OLED) display. The device includes a plurality of sub-pixels, each sub-pixel of the plurality of sub-pixels defined by adjacent pixel-defining layer (PDL) structures with inorganic overhang structures disposed on the PDL structures, each sub-pixel having an anode, organic light-emitting diode (OLED) material disposed on the anode, and a cathode disposed on the OLED material. The device is made by a process including the steps of: depositing the OLED material and the cathode by evaporation deposition, and depositing an encapsulation layer disposed over the cathode.
A method of forming a portion of a gate-all-around field-effect transistor (GAA FET) nanosheet structure includes performing a trim back recess process to form recesses in inner spacers of a fin-shaped column in a first direction from a sidewall of the fin-shaped column, wherein the fin-shaped column includes a stack of nanosheet channels and sacrificial layers having the inner spacers on both sides thereof in the first direction, performing an interface epitaxial growth process to grow interface source/drain (S/D) epi layers from exposed surfaces of the nanosheet channels of the fin-shaped column on the sidewalls of the fin-shaped column, performing an etch back process to etch back the interface S/D epi layer and form a continuous surface of the interface S/D epi layer, and performing a full epitaxial growth process to fully grow an S/D epi layer from the continuous surface of the interface S/D epi layer.
Methods of filling a feature on a semiconductor substrate may include performing a process to fill the feature on the semiconductor substrate by repeatedly performing first operations. First operations can include providing a silicon-containing precursor. First operations can include contacting the substrate with the silicon-containing precursor to form a silicon-containing material within the feature defined on the substrate. First operations can include purging the semiconductor processing chamber. First operations can include providing an oxygen-containing precursor. First operations can include contacting the substrate with the oxygen-containing precursor to form a silicon-and-oxygen-containing material within the feature defined on the substrate. At least some portions of the first operations can be performed with a frequency characteristic, a power characteristic, and a pressure characteristic.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
Methods of manufacturing interconnect structures as part of a microelectronic device fabrication process are described. The methods include forming a dielectric layer including at least one feature defining a gap having sidewalls and a bottom on a substrate. The methods further include forming a blocking layer on the bottom by exposing the substrate to a blocking compound; selectively depositing a barrier layer on the sidewalls; selectively depositing a metal liner on the barrier layer on the sidewalls; removing the blocking layer; and performing a gap fill process to fill the gap with a gapfill material.
Embodiments described herein relate to a sub-pixel circuit and methods of forming a sub-pixel circuit. The sub-pixel circuit include adjacent overhang structures, an anode, an organic light emitting diode (OLED) material disposed over the anode, and a cathode disposed over the OLED material. The OLED material extends under the adjacent overhang structures. The cathode extends under the adjacent overhang structures. The overhang structures are defined by an overhang extension of a second structure extending laterally past a first structure. The first structure is disposed over a substrate. The first structure includes a lower section having a first lateral etching rate and an upper section deposited over the lower section having a second lateral etching rate. The second lateral etching rate is different from the first lateral etching rate.
An apparatus for controlling temperature profile of a substrate within an epitaxial chamber includes a bottom center pyrometer and a bottom outer pyrometer to respectively measure temperatures at a center location and an outer location of a first surface of a susceptor of an epitaxy chamber, a top center pyrometer and a top outer pyrometer to respectively measure temperatures at a center location and an outer location of a substrate disposed on a second surface of the susceptor opposite the first surface, a first controller to receive signals, from the bottom center pyrometer and the bottom outer pyrometer, and output a feedback signal to a first heating lamp module that heats the first surface based on the measured temperatures of the first surface, and a second controller to receive signals, from the top center pyrometer, the top outer pyrometer, the bottom center pyrometer, and the bottom outer pyrometer, and output a feedback signal to a second heating lamp module that heats the substrate based on the measured temperatures of a substrate and the measured temperatures of the first surface.
G01J 5/00 - Radiation pyrometry, e.g. infrared or optical thermometry
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
27.
SYSTEMS AND METHODS FOR VISUAL INSPECTION OF PHARMACEUTICAL CONTAINERS
Systems and methods for fluid inspection are disclosed. The system includes a transportation system to transport a plurality of containers of fluid through an inspection zone, one or more cameras operable to view the plurality of containers from a first direction, and a back illuminator positioned to direct light in a second direction while the plurality of containers are in the inspection zone. The second direction is oriented greater than 90 degrees and less than 180 degrees from the first direction. The system further includes a controller electrically coupled to the back illuminator and the one or more cameras. The controller is operable to cause the back illuminator to emit light in the second direction while the plurality of containers are in the inspection zone and capture a plurality of images of the fluid in the plurality of containers while being illuminated by the back illuminator.
A method includes generating a product knowledge causal graph based on causal relationships between multiple sensors in one or more manufacturing systems, parts data of a plurality of parts of the manufacturing system, and equipment constant data of a plurality of equipment constants of the manufacturing system. The method further includes determining a causal strength index matrix. The method further includes, responsive to identifying an anomalous behavior in at least one of the plurality of sensors, determining a root cause of the anomalous behavior using at least one of the causal strength index matrix or the product knowledge causal graph. The method further includes identifying, based on at least a subset of the parts data corresponding to the root cause of the anomalous behavior, or a subset of the equipment constant data corresponding to the root cause of the anomalous behavior, at least one corrective action for the anomalous behavior.
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
29.
SOURCE/DRAIN (S/D) EPITAXIAL GROWTH IN GATE-ALL-AROUND (GAA) NANOSHEET DEVICE
A method of forming a portion of a gate-all-around field-effect transistor (GAA FET) nanosheet structure includes performing a trim back recess process to form recesses in inner spacers of a fin-shaped column in a first direction from a sidewall of the fin-shaped column, wherein the fin-shaped column includes a stack of nanosheet channels and sacrificial layers having the inner spacers on both sides thereof in the first direction, performing an interface epitaxial growth process to grow interface source/drain (S/D) epi layers from exposed surfaces of the nanosheet channels of the fin-shaped column on the sidewalls of the fin-shaped column, performing an etch back process to etch back the interface S/D epi layer and form a continuous surface of the interface S/D epi layer, and performing a full epitaxial growth process to fully grow an S/D epi layer from the continuous surface of the interface S/D epi layer.
Methods of filling a feature on a semiconductor substrate may include performing a process to fill the feature on the semiconductor substrate by repeatedly performing first operations. First operations can include providing a silicon-containing precursor. First operations can include contacting the substrate with the silicon-containing precursor to form a silicon-containing material within the feature defined on the substrate. First operations can include purging the semiconductor processing chamber. First operations can include providing an oxygen-containing precursor. First operations can include contacting the substrate with the oxygen-containing precursor to form a silicon-and-oxygen-containing material within the feature defined on the substrate. At least some portions of the first operations can be performed with a frequency characteristic, a power characteristic, and a pressure characteristic.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers
31.
SUBSTRATE LIFT PINS AND SUBSTRATE SUPPORTS AND PROCESS CHAMBERS INCORPORATING SAME
Embodiments of substrate lift pins for use in process chambers are provided herein. In some embodiments, a substrate lift pin includes: an elongate tube having a top end and a bottom end; a magnetic insert disposed in the elongate tube proximate the bottom end; and a potting material disposed within the elongate tube and securing the magnetic insert within the elongate tube. A cap having a support surface configured to support a substrate can be disposed on the top end of the elongate tube. A rod can be disposed within the elongate tube, above the magnetic insert.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
A tray for carrying workpieces, such as optical waveguides, is disclosed. The tray includes a plurality of openings, each opening having a plurality of fingers extending toward the center of the opening. The top surface of each finger is sloped downward and comprises an elastomer. In this way, the workpieces contact the fingers along their edges and any nanostructures disposed on the workpiece are not contacted. Further, in some embodiments, the tray is stackable and includes a retention mechanism located on the bottom side of the tray. The retention mechanism on a first tray serves to secure the workpiece disposed on a second tray positioned directly below the first tray. The tray may optionally be used for shipping and other purposes.
B65D 71/70 - Trays provided with projections or recesses in order to assemble multiple articles, e.g. intermediate elements for stacking
B65D 81/05 - Containers, packaging elements, or packages, for contents presenting particular transport or storage problems, or adapted to be used for non-packaging purposes after removal of contents specially adapted to protect contents from mechanical damage maintaining contents at spaced relation from package walls, or from other contents
B65D 21/02 - Containers specially shaped, or provided with fittings or attachments, to facilitate nesting, stacking, or joining together
Energy storage devices and methods and apparatus for manufacturing energy storage devices including patterned electrodes are provided. A flexible support layer having a lithium film formed thereon is exposed to a laser lift-off process. During the laser lift-off process, a laser is directed through the flexible support layer to activate an interface of the lithium film and the flexible support layer, for example, at a Li-PET interface. The laser can be directed through the backside of the flexible support layer stack, for example, from the plastic containing substrate or PET side. Exposure to the laser can pattern the lithium film by creating a void volume between the lithium film and the flexible support layer. The void volume can make subsequent separation of the lithium film from the flexible support layer easier during removal of the flexible support layer from the lithium film.
Exemplary semiconductor component assembly platforms include a base frame having a frame body extending from a first end to a second end. The component assembly platforms include a telescoping frame movably connected to the base frame and a component support movably connected to the telescoping frame. Semiconductor component assembly platforms exhibit a compressed position and a fully extended position. In a compressed position, a first end of the telescoping frame is disposed substantially above a first end of the base frame. In an extended position, the first end of the telescoping frame is disposed between the first end and the second end of the base frame, and a second end of the component support is disposed outward of the second end of the telescoping frame. The component assembly platform may be characterized by having a fully extended length that is at least about 1.2 times greater than the compressed length.
Systems and methods are provided for analysis of metal contaminants within a processing chamber. Such systems and methods can include a vacuum system and valve attached to a processing chamber. The vacuum system and valve can effect a reduction in a pressure within a sampling chamber, an opening, while a process is in effect within a processing chamber connected to the sampling chamber, of a first fluid connection from the sampling chamber to the processing chamber such that a fluid ingresses from the processing chamber into the sampling chamber, a closing of the first fluid connection, an opening a second fluid connection from the sampling chamber to an inductively coupled plasma mass spectrometer (ICP-MS) such that the fluid egresses from the sampling chamber into the ICPMS, an identification, via the ICP-MS, of a presence of trace elements within the fluid, and responsive to the identified presence of trace elements, performance of a corrective action associated with the processing chamber.
Embodiments of the present technology may include semiconductor processing methods and systems. Methods include flowing a deuterium-containing precursor and a silicon containing precursor into a processing region of a processing chamber. Methods include contacting a semiconductor device disposed in the processing region with the deuterium-containing precursor and the silicon containing precursor. Methods include forming a deuterium-containing dielectric film over or on the semiconductor device at a processing temperature of greater than or about 350 °C. Methods include passivating the target region with deuterium from the deuterium-containing dielectric film. Methods include where the deuterium-containing dielectric film is spaced apart from or adjacent to the target region.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H10B 12/00 - Dynamic random access memory [DRAM] devices
C23C 16/22 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
37.
HEATERS AND PLASMA GENERATORS FOR GAS ACTIVATION, AND RELATED CHAMBER AND FOR SEMICONDUCTOR MANUFACTURING
The present disclosure relates to heaters and plasma generators for gas activation, and related chamber components, methods, and processing chambers for semiconductor manufacturing. The processing chamber includes a chamber body comprising a flow module, a window, one or more heat sources, a substrate support, and a plasma generator. The window and the chamber body at least partially defining a processing volume. The one or more heat sources are operable to heat the processing volume. The substrate support is disposed in the processing volume. The plasma generator disposed at least partially around the processing volume. The window further includes a flange. The flange includes an opaque material. An induction coil is embedded in the opaque material of the flange.
In one example, a substrate support assembly having a cooling base that promotes temperature uniformity. In one embodiment, the cooling base has a top plate. The top plate has cooling channels formed therein. The cooling base has a middle plate. The middle plate has a cooling return plenum disposed on a middle layer. A plurality of islands are disposed in the cooling return plenum. The middle plate has a cooling supply plenum disposed below the middle layer. A plurality of cooling inlets are disposed through the islands and couple the cooling supply plenum to the cooling channels. Cooling outlets fluidly couple the cooling channels to the cooling return plenum. The cooling base has a bottom plate. The bottom plate has a cooling inlets fluidly coupled to cooling supply plenum and cooling outlets fluidly coupled to the cooling return plenum.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
39.
EFFICIENT DECHUCKING AND PARTICLE MANAGEMENT IN PROCESS CHAMBERS
A method including using a plurality of clamp electrodes of a substrate support to electrostatically secure a substrate during a process. The method further includes actively discharging a residual charge from the substrate after completion of the process based on at least one of contacting a backside of the substrate with a conductive lift pin or exposing the substrate to ultraviolet light. The method further includes raising a plurality of lift pins disposed in the substrate support to a first height to lift the substrate off of the substrate support after the discharging of the residual charge.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
40.
DIETHYL ZINC AND METAL HALIDE PRECURSORS FOR DEPOSITION OF METAL FILMS ON SEMICONDUCTOR SUBSTRATES
Methods for depositing metal films using a metal halide precursor and diethyl zinc are described. The substrate is exposed to a first metal precursor and diethyl zinc to form the metal film. The exposures can be sequential or simultaneous. The metal films are pure with a low carbon content. The first metal precursor may be a metal halide selected from the group consisting of tantalum chloride, aluminum chloride, niobium chloride, titanium chloride, zirconium chloride, hafnium chloride, tungsten chloride, molybdenum chloride, tantalum bromide, aluminum bromide, niobium bromide titanium bromide, zirconium bromide, hafnium bromide, tungsten bromide, molybdenum bromide, tantalum fluoride, aluminum fluoride, niobium fluoride, titanium fluoride, zirconium fluoride, hafnium fluoride, tungsten fluoride, molybdenum fluoride, tantalum iodide, aluminum iodide, niobium iodide, titanium iodide, zirconium iodide, hafnium iodide, tungsten iodide, and molybdenum iodide.
C23C 16/04 - Coating on selected surface areas, e.g. using masks
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/08 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metal halides
C23C 16/52 - Controlling or regulating the coating process
41.
APPARATUS AND METHOD FOR MODULATING IONS AND RADICAL SPECIES IN PLASMAS
Embodiments disclosed herein include an apparatus for ion blocking. In an embodiment, the apparatus comprises a first plate, with a plurality of first holes pass through a thickness of the first plate, and a second plate over the first plate, with a plurality of second holes that pass through a thickness of the second plate. In an embodiment, a spacer is provided between the first plate and the second plate.
The present disclosure relates to heaters and plasma generators for gas activation, and related chamber components, methods, and processing chambers for semiconductor manufacturing. The processing chamber includes a chamber body comprising a flow module, a window, one or more heat sources, a substrate support, and a plasma generator. The window and the chamber body at least partially defining a processing volume. The one or more heat sources are operable to heat the processing volume. The substrate support is disposed in the processing volume. The plasma generator disposed at least partially around the processing volume. The window further includes a flange. The flange includes an opaque material. An induction coil is embedded in the opaque material of the flange.
C23C 14/22 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
C30B 23/08 - Epitaxial-layer growth by condensing ionised vapours
A method includes generating a product knowledge causal graph based on causal relationships between multiple sensors in one or more manufacturing systems, parts data of a plurality of parts of the manufacturing system, and equipment constant data of a plurality of equipment constants of the manufacturing system. The method further includes determining a causal strength index matrix. The method further includes, responsive to identifying an anomalous behavior in at least one of the plurality of sensors, determining a root cause of the anomalous behavior using at least one of the causal strength index matrix or the product knowledge causal graph. The method further includes identifying, based on at least a subset of the parts data corresponding to the root cause of the anomalous behavior, or a subset of the equipment constant data corresponding to the root cause of the anomalous behavior, at least one corrective action for the anomalous behavior.
Exemplary semiconductor component assembly platforms include a base frame having a frame body extending from a first end to a second end. The component assembly platforms include a telescoping frame movably connected to the base frame and a component support movably connected to the telescoping frame. Semiconductor component assembly platforms exhibit a compressed position and a fully extended position. In a compressed position, a first end of the telescoping frame is disposed substantially above a first end of the base frame. In an extended position, the first end of the telescoping frame is disposed between the first end and the second end of the base frame, and a second end of the component support is disposed outward of the second end of the telescoping frame. The component assembly platform may be characterized by having a fully extended length that is at least about 1.2 times greater than the compressed length.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
A method includes generating a causal graph based on a plurality of values, each value corresponding to a causal relationship between two or more sensors of a plurality of sensors in one or more manufacturing systems. The method further includes determining a causal strength index matrix. The method further includes responsive to identifying an anomalous behavior in at least one of the plurality of sensors, determining a root cause of the anomalous behavior using at least one of the causal strength index matrix or the causal graph. The method further includes causing a recommended corrective action to be issued based on the root cause of the anomalous behavior.
Methods of manufacturing electronic devices are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices, e.g., complementary field-effect transistors (CFETs) that have improved negative bias temperature (NBTI) and boosted performance of the PMOS transistor due to the presence of a silicon germanium (SiGe) channel in the PMOS transistor. Specifically, a plurality of nanosheet release layers is removed from the N-channel metal-oxide-semiconductor (NMOS) transistor to form a plurality of openings adjacent the corresponding plurality of nanosheet channel layers, and a plurality of oxide layers are deposited in each of the plurality of openings.
A method and apparatus for patterning semiconductor materials using tin-based materials as mandrels, hardmasks, and liner materials are provided. One or more implementations of the present disclosure use tin-oxide and/or tin-carbide materials as hardmask materials, mandrel materials, and/or liner material during various patterning applications. Tin-oxide or tin-carbide materials are easy to strip relative to other high selectivity materials like metal oxides (e.g., TiO2, ZrO2, HfO2, Al2O3) to avoid influencing critical dimensions and generate defects. In addition, tin-oxide and tin-carbide have low refractive index, k-value, and are transparent under 663-nm for lithography overlay.
Embodiments of the present disclosure include an apparatus and methods for the plasma processing of a substrate. Some embodiments are directed to a plasma processing chamber. The plasma processing chamber generally includes a planar coil region comprising a plurality of planar coils, a first power supply circuit coupled to at least two of the plurality of planar coils, a concentric coil region at least partially surrounding the planar coil region, and a second power supply circuit coupled to at least two of a plurality of concentric coils. The first power supply circuit may be configured to bias the at least two of the plurality of planar coils to affect a plasma in a center region of the plasma processing chamber, and the second power supply circuit may be configured to bias the at least two of the plurality of concentric coils to affect the plasma in an outer region.
Implementations disclosed describe, among other things, a system and a method of scanning a substrate with a beam of light and detecting for each of a set of locations of the substrate, a respective one of a set of intensity values associated with a beam of light reflected from (or transmitted through) the substrate. The detected intensity values are used to determine a profile of a thickness of the substrate.
A method includes causing a laser component (125) to perform a first set（202A） patterning operations (200B) in a pixel shape (240A) on a substrate at a first focal plane without offset(242A).The method further includes causing the laser component (125) to perform a second set (202B) of the patterning operations (200B) in the pixel shape (240B) on the substrate at a second focal plane with a positive offset (242B).
Embodiments herein provide for a measurement system for determining optical properties of an optical device. The measurement system includes a light engine having a light source. The light source is configured to project a light including at least a first wavelength of light, a second wavelength of light, and a third wavelength of light. Reticles are configured to form a pattern from the light projected from the light source. The reticles are configured to be positioned at least in a first position to form a first pattern with the first wavelength of light, a second position to form a second pattern with the second wavelength of light, and a third position to form a third pattern with the third wavelength of light along an axis extending from the light source to a first lens. A detector configured to detect the light from the optical device.
A system includes a material removal apparatus including a laser. The material removal apparatus is configured to perform a material removal operation with respect to a workpiece. The system further includes a vacuum system configured to provide suction during the material removal operation. The system further includes a manifold configured to remove debris from the workpiece responsive to the suction provided by the vacuum system. The manifold includes a plurality of vanes arranged radially around an open center portion of the manifold. The manifold further includes a shell at least partially enclosing the plurality of vanes.
Embodiments disclosed herein include an apparatus for ion blocking. In an embodiment, the apparatus comprises a first plate, with a plurality of first holes pass through a thickness of the first plate, and a second plate over the first plate, with a plurality of second holes that pass through a thickness of the second plate. In an embodiment, a spacer is provided between the first plate and the second plate.
Embodiments of the present disclosure include a waveguide. The waveguide includes a substrate, the substrate having a substrate thickness, a first surface opposing a second surface, and at least one sidewall coupled to the first surface and the second surface. The waveguide includes an input-coupler disposed over the first surface. The waveguide includes an output-coupler disposed over the first surface; and a fold grating disposed in the substrate, where the fold grating is operable to split reflected beams into transmitted beams that transmit to the output-coupler and subsequent reflected beams to the second surface.
Disclosed herein are methods for forming MOSFET trenches using an ashable mask. In some embodiments, a method may include providing a device structure including an epitaxial layer and a hard mask over the epitaxial layer, and forming a set of trenches through the epitaxial layer, wherein each trench of the set of trenches is defined by a sidewall and a bottom surface. The method may further include forming an ashable mask over the device structure, including within each trench of the set of trenches, and forming an implanted region in the epitaxial layer, below the bottom surface of each trench, by delivering ions into the set of trenches while the ashable mask is along the sidewall and the bottom surface of each trench of the set of trenches.
H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
56.
Substrate Lift Pins and Substrate Supports and Process Chambers Incorporating Same
Embodiments of substrate lift pins for use in process chambers are provided herein. In some embodiments, a substrate lift pin includes: an elongate tube having a top end and a bottom end; a magnetic insert disposed in the elongate tube proximate the bottom end; and a potting material disposed within the elongate tube and securing the magnetic insert within the elongate tube. A cap having a support surface configured to support a substrate can be disposed on the top end of the elongate tube. A rod can be disposed within the elongate tube, above the magnetic insert.
A method including using a plurality of clamp electrodes of a substrate support to electrostatically secure a substrate during a process. The method further includes actively discharging a residual charge from the substrate after completion of the process based on at least one of contacting a backside of the substrate with a conductive lift pin or exposing the substrate to ultraviolet light. The method further includes raising a plurality of lift pins disposed in the substrate support to a first height to lift the substrate off of the substrate support after the discharging of the residual charge.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
Embodiments of the present technology may include semiconductor processing methods and systems. Methods include flowing a deuterium-containing precursor and a silicon containing precursor into a processing region of a processing chamber. Methods include contacting a semiconductor device disposed in the processing region with the deuterium-containing precursor and the silicon containing precursor. Methods include forming a deuterium-containing dielectric film over or on the semiconductor device at a processing temperature of greater than or about 350° C. Methods include passivating the target region with deuterium from the deuterium-containing dielectric film. Methods include where the deuterium-containing dielectric film is spaced apart from or adjacent to the target region.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
Exemplary dynamic load safety devices may include a shaft. The safety devices may include a first roller bearing mounted on the shaft. The safety devices may include a second roller bearing mounted on the shaft. The first roller bearing and the second roller bearing may be spaced apart along a length of the shaft. The safety devices may include a roller mounted on the first roller bearing and the second roller bearing The safety devices may include at least one strain gauge disposed on the shaft between the first roller bearing and the second roller bearing.
In one example, a substrate support assembly having a cooling base that promotes temperature uniformity. In one embodiment, the cooling base has a top plate. The top plate has cooling channels formed therein. The cooling base has a middle plate. The middle plate has a cooling return plenum disposed on a middle layer. A plurality of islands are disposed in the cooling return plenum. The middle plate has a cooling supply plenum disposed below the middle layer. A plurality of cooling inlets are disposed through the islands and couple the cooling supply plenum to the cooling channels. Cooling outlets fluidly couple the cooling channels to the cooling return plenum. The cooling base has a bottom plate. The bottom plate has a cooling inlets fluidly coupled to cooling supply plenum and cooling outlets fluidly coupled to the cooling return plenum.
The present technology includes vertical cell dynamic random-access memory (DRAM) arrays with improved floating body effect. The arrays include one or more bit lines arranged in a first horizontal direction and one or more word lines arranged in a second horizontal direction. The arrays include one or more channels extending in a vertical direction generally orthogonal to the first direction and the second horizontal direction, such that the bit lines intersect with a source/drain region of the plurality of channels, and the word lines intersect with gate regions of the plurality of channels. Arrays include where the source/drain region includes a low bandgap material, where the low bandgap material exhibits a bandgap less than a bandgap of a channel material.
A process to generate an etch-resistant nitride layer is provided. The process may include providing a substrate, the substrate including a silicon nitride layer formed by PECVD at an elevated deposition temperature, heating the substrate to an elevated implant temperature, and performing a hot implant by implanting the substrate at the elevated implant temperature, wherein an implanted silicon nitride layer is formed. The process may also include annealing the substrate after the hot implant at an elevated anneal temperature, wherein a relative etch rate of the implanted silicon nitride layer is reduced with respect to an unimplanted silicon nitride layer.
Techniques for generating and maintaining a low stress nitride layer after a low temperature anneal, including the operations of providing a substrate, the substrate including a nitride layer formed by PECVD; heating the substrate to an elevated temperature; and performing a hot implant by implanting the substrate at the elevated temperature between 150° C. and 700° C.
A method includes obtaining first data indicative of a temperature of a first component of a process chamber. The method further includes processing the first data using a trained machine learning model. The trained machine learning model generates an output. The output includes second data, indicative of a temperature of a surface of the process chamber. The method further includes displaying an augmented reality overlay including a visual indication of the temperature of the surface to a user.
G05B 19/4069 - Simulating machining process on screen
G05B 19/18 - Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form
G05B 19/4155 - Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by programme execution, i.e. part programme or machine function execution, e.g. selection of a programme
H01L 21/66 - Testing or measuring during manufacture or treatment
65.
PHOTORESIST DEPOSITION USING INDEPENDENT MULTICHANNEL SHOWERHEAD
Some embodiments include a method of depositing a photoresist onto a substrate in a processing chamber. In an embodiment, the method comprises flowing an oxidant into the processing chamber through a first path in a showerhead, and flowing an organometallic into the processing chamber through a second path in the showerhead. In an embodiment, the first path is isolated from the second path so that the oxidant and the organometallic do not mix within the showerhead. In an embodiment, the method further comprises that the oxidant and the organometallic react in the processing chamber to deposit the photoresist on the substrate.
Exemplary modular gas blocks may include a body having inlet and outlet ends. The body may define a portion of a first gas path along a length of the body and may define a second gas path along a width of the body. The first gas path may include channel segments defined within the body. The inlet end may define a gas inlet that is coupled with the first gas path. The body may define first fluid ports that are coupled with the first gas path. A fluid port of the first fluid ports may be coupled with the gas inlet. The first fluid ports may be coupled with one another via a respective channel segment. An upper surface may define a lateral fluid port that is spaced apart from a first fluid port along the width and is coupled with the first fluid port via the second gas path.
Embodiments disclosed within include a method for etching a hardmask layer includes forming a photoresist layer comprising an organometallic material on a hardmask layer comprising a metal-containing material, exposing the photoresist layer to ultraviolet radiation through a mask having a selected pattern, removing un-irradiated areas of the photoresist layer to pattern the photoresist layer, forming a passivation layer comprising a carbon-containing material selectively on a top surface of the patterned photoresist layer, including selectively depositing passivation material over a top surface of a patterned photoresist layer trimming undesired portions of the passivation material, and etching the hardmask layer exposed by the patterned photoresist layer having the passivation layer formed thereon.
G03F 7/11 - Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
Systems and methods for cutting substrates including metals, for example, lithium metals, which can be used in energy storage devices. In one aspect, a system for slitting a flexible support layer stack is provided. The system includes a laser source configured to generate a laser beam, the laser beam directed toward a first surface of a flexible support layer stack. The system further includes an optical scanner configured to direct the laser beam toward the first surface of the flexible support layer stack. The system further includes a pickup roller positioned opposite the laser beam, the pickup roller positioned to contact a second surface of the flexible support layer stack, the second surface opposite the first surface. The system further includes a cutting assembly positioned downstream of the laser beam.
B23K 26/00 - Working by laser beam, e.g. welding, cutting or boring
B23K 26/082 - Scanning systems, i.e. devices involving movement of the laser beam relative to the laser head
B23K 26/0622 - Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam by shaping pulses
B23D 45/06 - Sawing machines or sawing devices with circular saw blades or with friction saw discs with a circular saw blade arranged underneath a stationary work-table
B23K 26/322 - Bonding taking account of the properties of the material involved involving coated metal parts
Embodiments of the present disclosure relate to a method of forming a contact structure on a substrate. The method includes forming a high aspect ratio (HAR) feature within a substrate having a device formed thereon. The device includes a plurality of channels disposed through a polysilicon layer and extending in a first direction, and an isolation layer disposed on the substrate, the polysilicon layer separated from the isolation layer by a dielectric layer. The forming of the HAR feature is formed a first distance in a second direction from the plurality of channels and includes removing a portion of the isolation layer and the polysilicon layer. The method further includes etching the polysilicon layer to expose a top surface of the isolation layer that is opposite to a surface that is disposed on the surface of the substrate, and exposing a metal layer within the HAR feature.
A system includes a processing chamber configured to perform a plasma process with respect to one or more substrates. The system further includes an electrostatic chuck disposed within the processing chamber. The electrostatic chuck includes one or more electrodes. The system further includes an analog filter electrically coupled to at least one electrode of the one or more electrodes. The analog filter includes an air-core coil including a first coil and a second coil disposed within the first coil. The first coil and the second coil together form an inductor.
A process chamber is provided including: a chamber body and one or more liners disposed around an interior volume; a gas manifold including a plurality of inlet portions and a plurality of outlet portions, each inlet portion fluidly coupled to one of the outlet portions; a plurality of gas inlet channels, each gas inlet channel formed by one or surfaces of the one or more liners and each gas inlet channel fluidly coupled to the interior volume; a plurality of connectors, each connector extending from one of the gas inlet channels into one of the outlet portions of the gas manifold; and a seal positioned around each connector at a location inside one of the outlet portions of the gas manifold.
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
The present disclosure provides methods of gap fill deposition. The methods include forming a silicon-nitride based dielectric film by providing a substrate into a processing chamber. An amorphous silica layer is formed on a surface of the substrate by flowing a dielectric precursor on the substrate. A modified amorphous silica layer is formed by flowing a reactive gas into the processing chamber. A thermal etching process is performed on the modified amorphous silica layer by flowing a fluorine-containing compound at a temperature of about 400° C. to about 600° C. A silicon-nitride based dielectric film is formed by reacting the modified amorphous silica layer with one or more radicals generated by a remote plasma source. An etched silicon-nitride based dielectric film is formed by flowing a fluorine-containing compound to the processing chamber with plasma. The etched silicon-nitride based dielectric film is exposed to a hydrogen recovery process.
C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
A semiconductor processing system with improved plasma density is disclosed. The system includes a plasma chamber having a base, chamber walls and a top wall. An antenna is used to generate RF energy that is inductively coupled into the plasma chamber. The antenna comprises a plurality of coils that are proximate a dielectric window. One or more RF blockers are disposed adjacent to the dielectric window to block some of the RF energy from entering the plasma chamber. If the RF blocker is placed near a region of high plasma density, the density in that region may be reduced, improving the uniformity of the plasma density within the plasma chamber. Further, the RF blockers may have openings and may also be overlapped to create varying degrees of blocking.
A substrate cleaning system to remove particulates from multiple substrates includes a cleaning tank for applying a cleaning liquid to substrates, a rinse tank for applying a rinsing liquid to substrates, and a robot system. The cleaning tank includes a stationary lid, an input lid, and an output lid. The input and output lids allow a substrate carrier designed to carry an individual substrate to access an inner volume of the cleaning tank for processing. A transport system moves the substrate in the substrate carrier through the inner volume of the cleaning tank by creating a series of gaps between substrates to allow proper processing. The robot system transports substrates through the input and output lids of the cleaning tank, and transports substrates into the rinse tank.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
75.
REAL-TIME MEASUREMENT OF MICROWAVE RESONATORS AS PLASMA DIAGNOSTICS FOR PROCESS MONITORING
Embodiments disclosed herein include an apparatus that comprises a board with a signal generator for generating chirped signals on the board. In an embodiment, a first mixer is on the board and electrically coupled to the signal generator, and a circulator is on the board. In an embodiment, the circulator comprises a first port that is electrically coupled to the mixer, a second port that is electrically coupled to a connector, and a third port. In an embodiment, a second mixer is on the board and electrically coupled to the third port of the circulator. In an embodiment, an analog to digital converter (ADC) is on the board and electrically coupled to the second mixer.
G01N 22/00 - Investigating or analysing materials by the use of microwaves or radio waves, i.e. electromagnetic waves with a wavelength of one millimetre or more
An identification feature of a substrate in a substrate measurement subsystem is identified. The identification feature is located at a predefined location relative to a reference location of the substrate. A position of the substrate within the substrate measurement subsystem is determined based on the identified identification feature. Based on the determined position of the substrate, one or more sensing components of the substrate measurement subsystem is caused to capture spectral data representing features of at least one of the reference location of the substrate or another location of the substrate. A determination is made of whether to update a process recipe associated with the substrate based on the captured spectral data.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
G01B 11/00 - Measuring arrangements characterised by the use of optical techniques
G01N 21/27 - ColourSpectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands using photo-electric detection
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
77.
STRESS LAYER MODIFICATION USING ENERGETIC BEAM PROCESSING THROUGH PHOTORESIST MASK
A method may include providing a stress compensation stack on a main surface of the substrate, wherein the stress compensation stack comprises a patterned resist layer and a stress compensation layer, disposed subjacent the patterned resist layer. The patterned resist layer may be determined according to a surface map of the main surface of the substrate. The method may further include directing processing species to the stress compensation stack, wherein the stress compensation layer is selectively altered as a function of position across the substrate.
H01L 21/32 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers using masks
H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
A method, a system and computer program product for controlling exposure of a substrate positioned on a platen in an ion implantation system to an ion beam. A first current value determined based on a powering potential powering an ion source is received. A second current value determined based on an accelerating potential or a decelerating potential supplied to the ion implantation apparatus and affecting generation of the ion beam by the ion source for application to a substrate positioned on a platen is received. One or more energy filter supply current values are determined based on one or more energy filter supply potentials supplied to an energy filter positioned in the path of the ion beam. Platen position values are generated based on the first and second current values and energy filter supply current values. A position of the platen is adjusted using platen position values.
H01J 37/304 - Controlling tubes by information coming from the objects, e.g. correction signals
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
Provided are methods of forming a semiconductor device. The method includes exposing a top surface of a substrate to a reactant and a metal precursor to selectively deposit a capping layer on the top surface of the substrate, the substrate comprising at least one feature formed in a dielectric layer, the dielectric layer defining a filled gap including sidewalls and a bottom, a barrier layer on the sidewalls of the filled gap, and a metal liner on the barrier layer, the capping layer depositing on one or more of the filled gap, the barrier layer, and the metal liner.
A system includes a displacement sensor configured to measure one or more properties of a top surface of a substrate. The one or more properties are associated with at least one of substrate bow or substrate warpage. The system further includes a processing device communicatively coupled to the displacement sensor. The processing device is configured to receive, from the displacement sensor, sensor data indicative of the one or more properties of the top surface of the substrate, construct a substrate topology map based on the received sensor data, and cause management of the substrate based on the substrate topology map.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
B25J 11/00 - Manipulators not otherwise provided for
H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
81.
Method and Apparatus of Substrate Support Repair and Refurbishment
Methods of refurbishing ceramic heaters are provided herein. In some embodiments, a method of refurbishing a ceramic heater having one or more heating elements disposed therein includes: grinding off a top portion of the ceramic heater to form a ground ceramic heater having a first upper layer, wherein the ground ceramic heater includes the one or more heating elements disposed below the first upper layer; coupling a ceramic top to the first upper layer of the ground ceramic heater; and sealing one or more edge regions of an interface between the ceramic top and the ground ceramic heater to form a refurbished ceramic heater.
H05B 3/14 - Heating elements characterised by the composition or nature of the materials or by the arrangement of the conductor characterised by the composition or nature of the conductive material the material being non-metallic
C04B 41/53 - After-treatment of mortars, concrete, artificial stone or ceramicsTreatment of natural stone involving the removal of part of the materials of the treated article
H05B 3/28 - Heating elements having extended surface area substantially in a two-dimensional plane, e.g. plate-heater non-flexible heating conductor embedded in insulating material
A method, a system and computer program product for controlling exposure of a substrate positioned on a platen in an ion implantation system to an ion beam. A first current value determined based on a powering potential powering an ion source is received. A second current value determined based on an accelerating potential or a decelerating potential supplied to the ion implantation apparatus and affecting generation of the ion beam by the ion source for application to a substrate positioned on a platen is received. One or more energy filter supply current values are determined based on one or more energy filter supply potentials supplied to an energy filter positioned in the path of the ion beam. Platen position values are generated based on the first and second current values and energy filter supply current values. A position of the platen is adjusted using platen position values.
H01J 37/304 - Controlling tubes by information coming from the objects, e.g. correction signals
H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
83.
STRESS LAYER MODIFICATION USING ENERGETIC BEAM PROCESSING THROUGH PHOTORESIST MASK
A method may include providing a stress compensation stack on a main surface of the substrate, wherein the stress compensation stack comprises a patterned resist layer and a stress compensation layer, disposed subjacent the patterned resist layer. The patterned resist layer may be determined according to a surface map of the main surface of the substrate. The method may further include directing processing species to the stress compensation stack, wherein the stress compensation layer is selectively altered as a function of position across the substrate.
G03F 7/095 - Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
G03F 7/00 - Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfacesMaterials therefor, e.g. comprising photoresistsApparatus specially adapted therefor
A method may include providing a stress the substrate having a main surface, and forming a patterned stress compensation layer on the main surface, wherein the patterned stress compensation layer is formed by exposing the main surface to a processing beam while a movement of the ion beam with respect to the main surface takes place.
G05B 19/4155 - Numerical control [NC], i.e. automatically operating machines, in particular machine tools, e.g. in a manufacturing environment, so as to execute positioning, movement or co-ordinated operations by means of programme data in numerical form characterised by programme execution, i.e. part programme or machine function execution, e.g. selection of a programme
Provided are methods of forming a semiconductor device. The method includes exposing a top surface of a substrate to a reactant and a metal precursor to selectively deposit a capping layer on the top surface of the substrate, the substrate comprising at least one feature formed in a dielectric layer, the dielectric layer defining a filled gap including sidewalls and a bottom, a barrier layer on the sidewalls of the filled gap, and a metal liner on the barrier layer, the capping layer depositing on one or more of the filled gap, the barrier layer, and the metal liner.
A system includes a material removal apparatus including a laser. The material removal apparatus is configured to perform a material removal operation with respect to a workpiece. The system further includes a vacuum system configured to provide suction during the material removal operation. The system further includes a manifold configured to remove debris from the workpiece responsive to the suction provided by the vacuum system. The manifold includes a plurality of vanes arranged radially around an open center portion of the manifold. The manifold further includes a shell at least partially enclosing the plurality of vanes.
A method of identifying defective electrical connections of a substrate is provided, the substrate having a first surface contact and a first electrical connection extending from the first surface contact through the substrate. The method includes placing the substrate on a stage in a vacuum chamber; charging the first surface contact by directing an electron beam on the first surface contact and detecting secondary electrons emitted from the first surface contact during the charging for determining a secondary electron signal over time; and determining a state information about the first electrical connection depending on an occurrence of a drop or decline in the secondary electron signal. Further described is an apparatus for identifying defective electrical connections of a substrate according to the methods described herein.
A method of testing a packaging substrate with at least one electron beam column is described. The packaging substrate is a panel level packaging substrate or an advanced packaging substrate. The method includes: placing the packaging substrate on a stage in a vacuum chamber; directing an electron beam of the at least one electron beam column with a first landing energy on at least a first portion of the packaging substrate; directing the electron beam of the at least one electron beam column with a second landing energy different from the first landing energy on the packaging substrate; and detecting signal electrons emitted upon impingement of the electron beam for testing at least a first device-to-device electrical interconnect path of the packaging substrate.
Embodiments of the present disclosure relate to a method of forming a contact structure on a substrate. The method includes forming a high aspect ratio (HAR) feature within a substrate having a device formed thereon. The device includes a plurality of channels disposed through a polysilicon layer and extending in a first direction, and an isolation layer disposed on the substrate, the polysilicon layer separated from the isolation layer by a dielectric layer. The forming of the HAR feature is formed a first distance in a second direction from the plurality of channels and includes removing a portion of the isolation layer and the polysilicon layer. The method further includes etching the polysilicon layer to expose a top surface of the isolation layer that is opposite to a surface that is disposed on the surface of the substrate, and exposing a metal layer within the HAR feature.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
A reactor for coating particles includes a stationary vacuum chamber to hold a bed of particles to be coated, a chemical delivery system, and a paddle assembly. The paddle assembly includes a rotatable drive shaft and a first plurality of paddles and a second plurality of paddles that extend radially from the drive shaft. The spacing, cross-sections, and oblique angles of the paddles are such that orbiting of the paddles causes the first plurality of paddles and the second plurality of paddles to displace substantially equal volumes in opposite directions in the lower portion of the stationary vacuum chamber.
B01J 19/00 - Chemical, physical or physico-chemical processes in generalTheir relevant apparatus
B01J 8/00 - Chemical or physical processes in general, conducted in the presence of fluids and solid particlesApparatus for such processes
B05C 19/00 - Apparatus specially adapted for applying particulate materials to surfaces
B05C 19/02 - Apparatus specially adapted for applying particulate materials to surfaces using fluidised-bed technique
B05D 1/00 - Processes for applying liquids or other fluent materials
C23C 16/44 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
The present disclosure provides methods of gap fill deposition. The methods include forming a silicon-nitride based dielectric film by providing a substrate into a processing chamber. An amorphous silica layer is formed on a surface of the substrate by flowing a dielectric precursor on the substrate. A modified amorphous silica layer is formed by flowing a reactive gas into the processing chamber. A thermal etching process is performed on the modified amorphous silica layer by flowing a fluorine-containing compound at a temperature of about 400 °C to about 600 °C. A silicon-nitride based dielectric film is formed by reacting the modified amorphous silica layer with one or more radicals generated by a remote plasma source. An etched silicon-nitride based dielectric film is formed by flowing a fluorine-containing compound to the processing chamber with plasma. The etched silicon-nitride based dielectric film is exposed to a hydrogen recovery process.
A system includes a displacement sensor configured to measure one or more properties of a top surface of a substrate. The one or more properties are associated with at least one of substrate bow or substrate warpage. The system further includes a processing device communicatively coupled to the displacement sensor. The processing device is configured to receive, from the displacement sensor, sensor data indicative of the one or more properties of the top surface of the substrate, construct a substrate topology map based on the received sensor data, and cause management of the substrate based on the substrate topology map.
A semiconductor processing system with improved plasma density is disclosed. The system includes a plasma chamber having a base, chamber walls and a top wall. An antenna is used to generate RF energy that is inductively coupled into the plasma chamber. The antenna comprises a plurality of coils that are proximate a dielectric window. One or more RF blockers are disposed adjacent to the dielectric window to block some of the RF energy from entering the plasma chamber. If the RF blocker is placed near a region of high plasma density, the density in that region may be reduced, improving the uniformity of the plasma density within the plasma chamber. Further, the RF blockers may have openings and may also be overlapped to create varying degrees of blocking.
A method may include providing a stress the substrate having a main surface, and forming a patterned stress compensation layer on the main surface, wherein the patterned stress compensation layer is formed by exposing the main surface to a processing beam while a movement of the ion beam with respect to the main surface takes place.
A process chamber is provided including: a chamber body and one or more liners disposed around an interior volume; a gas manifold including a plurality of inlet portions and a plurality of outlet portions, each inlet portion fluidly coupled to one of the outlet portions; a plurality of gas inlet channels, each gas inlet channel formed by one or surfaces of the one or more liners and each gas inlet channel fluidly coupled to the interior volume; a plurality of connectors, each connector extending from one of the gas inlet channels into one of the outlet portions of the gas manifold; and a seal positioned around each connector at a location inside one of the outlet portions of the gas manifold.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
C23C 16/52 - Controlling or regulating the coating process
96.
REAL-TIME MEASUREMENT OF MICROWAVE RESONATORS AS PLASMA DIAGNOSTICS FOR PROCESS MONITORING
Embodiments disclosed herein include an apparatus that comprises a board with a signal generator for generating chirped signals on the board. In an embodiment, a first mixer is on the board and electrically coupled to the signal generator, and a circulator is on the board. In an embodiment, the circulator comprises a first port that is electrically coupled to the mixer, a second port that is electrically coupled to a connector, and a third port. In an embodiment, a second mixer is on the board and electrically coupled to the third port of the circulator. In an embodiment, an analog to digital converter (ADC) is on the board and electrically coupled to the second mixer.
Methods of refurbishing ceramic heaters are provided herein. In some embodiments, a method of refurbishing a ceramic heater having one or more heating elements disposed therein includes: grinding off a top portion of the ceramic heater to form a ground ceramic heater having a first upper layer, wherein the ground ceramic heater includes the one or more heating elements disposed below the first upper layer; coupling a ceramic top to the first upper layer of the ground ceramic heater; and sealing one or more edge regions of an interface between the ceramic top and the ground ceramic heater to form a refurbished ceramic heater.
H01L 21/687 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
98.
AIR-CORE COIL IN ANALOG CIRCUIT FILTERS FOR PLASMA PROCESSING
A system includes a processing chamber configured to perform a plasma process with respect to one or more substrates. The system further includes an electrostatic chuck disposed within the processing chamber. The electrostatic chuck includes one or more electrodes. The system further includes an analog filter electrically coupled to at least one electrode of the one or more electrodes. The analog filter includes an air-core coil including a first coil and a second coil disposed within the first coil. The first coil and the second coil together form an inductor.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
42 - Scientific, technological and industrial services, research and design
Goods & Services
Providing an online non-downloadable software suite for automating and optimizing manufacturing operations using artificial intelligence techniques; providing an online non-downloadable software suite using artificial intelligence for enhancing manufacturing control, efficiency and scalability in the field of materials for discrete manufacturing and process technologies manufacturing; providing an online non-downloadable software suite using artificial intelligence for production scheduling, predictive algorithms, advanced analytics, monitoring, quality control, data integration, simulation, predictive maintenance, detection, diagnostics, real-time decision-making, optimization workflow management, and supply chain planning in manufacturing environments; providing an online non-downloadable software suite using artificial intelligence for the inspection, review, measurement, and monitoring of manufacturing components, including wafers, reticles, die, packaged structures, assembled electronics, ingots, thin film, and flat panels; providing an online non-downloadable software suite using artificial intelligence for planning, analyzing, and managing manufacturing operations and supply chains
