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2025
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Invention
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Design tool for generation of deadlock free network-on-chip (noc) within a system-on-chip (soc). ... |
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Invention
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Design tool using machine learning for incremental placement of elements on floorplan.
A design ... |
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Invention
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Design tool using machine learning models for interactive route determination in a network-on-chi... |
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Invention
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Reinforced learning for topology generation of a network-on-chip.
A computer-implemented method ... |
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Invention
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Design tool for generation of a network-on-chip (noc) including insertion of adapters in a path. ... |
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Invention
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Deadlock-free modification to network-on-chip topology.
Designing a network-on-chip (NoC) includ... |
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Invention
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System and method for using interface protection parameters.
A system and method for adding inte... |
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Invention
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Broadcaster with buffering for network on chip (noc).
A system and methods of using a broadcaste... |
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Invention
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Modification of existing network-on-chips (nocs) using incremental modifications.
An existing ne... |
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Invention
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Performing transaction aggregation with an aggregator in a network-on-chip (noc).
System and met... |
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Invention
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Connectivity synthesis of network-on-chip (noc) in a multi-protocol system-on-chip (soc).
In acc... |
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Invention
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System and method for deadlock detection in network-on-chip (noc) having external dependencies.
... |
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Invention
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Electronic design toll for generation of a network-on-chip (noc).
Systems and methods are disclo... |
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Invention
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System and method for training a neural learning model for predicting performance, power and area... |
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Invention
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System and method to generate a network-on-chip topology using incremental synthesis.
Systems an... |
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2024
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Invention
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System and method to control tasks execution in a system-on-chip (soc) by observing packets in a ... |
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Invention
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System and method for managing event messages in a cache coherent interconnect.
A cache coherent... |
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Invention
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Tool for fault detection and classification in design and generation of network-on-chip (nocs).
... |
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Invention
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System and method for generation of networks-on-chip (nocs) using incremental topology synthesis ... |
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Invention
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System and method for generation of networks-on-chip (nocs).
System and methods are disclosed th... |
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Invention
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Automatic configuration of pipeline modules in a network-on-chip (noc).
Generation of a full reg... |
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Invention
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System and method for transaction broadcast in a network on chip. A broadcast adapter in a networ... |
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Invention
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Virtual bridge for design of an integrated circuit.
A computer-aided design method includes acce... |
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Invention
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Tool for supporting use of regular network topologies in generating a network-on-chip topology.
... |
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Invention
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System and method for generation of a network using physical awareness data from an image of a ch... |
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Invention
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Design tool for automated placement constraint generation, adapter insertion process, and local a... |
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Invention
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Design tool for interactive incremental placement of elements on floorplan.
A tool is disclosed ... |
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Invention
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Design tool for interactive wire routing during the generation of a network-on-chip.
System and ... |
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Invention
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Incremental topology modification of a network-on-chip. An initial Network on Chip (NoC) topology... |
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2023
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Invention
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System and method for using interface protection parameters. A system and method for generation o... |
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Invention
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Constraints and objectives used in synthesis of a network-on-chip (noc). A tool for executing per... |
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Invention
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System and method for predicting performance, power and area behavior of soft ip components in in... |
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Invention
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System and method to generate a network-on-chip (noc) description using incremental topology synt... |
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Invention
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Network-on-chip (noc) with a broadcast switch system. A system and methods of use for a broadcast... |
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P/S
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Computer software used as a development tool for use in the design of integrated circuits and sys... |
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Invention
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Process for generating physical implementation guidance during the synthesis of a network-on-chip... |
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P/S
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Downloadable computer software that provides information for use as an aid in testing the functio... |
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P/S
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Electrical and electronic components, namely, semiconductors, electronic circuits, microcircuits,... |
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Invention
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Model-driven approach for failure mode, effects, and diagnostic analysis (fmeda) automation for h... |
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Invention
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Quality metrics for optimization tasks in generation of a network. Qualifying networks properties... |
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Invention
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System and method for deterministic and incremental physically-aware network-on-chip generation. ... |
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2022
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Invention
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System and method for event messages in a cache coherent interconnect. A cache coherent interconn... |
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Invention
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Testbenches for electronic systems with automatic insertion of verification features. A system an... |
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Invention
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Network-on-chip (noc) using deadline based arbitration.
A system and method to arbitrate based o... |
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Invention
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Mechanism to control order of tasks execution in a system-on-chip (soc) by observing packets in a... |
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Invention
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System and method for deadlock detection in network-on-chip (noc) having external dependencies. D... |
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Invention
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Synthesis of a network-on-chip (noc) for insertion of pipeline stages.
A tool makes modification... |
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Invention
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System and method for editing a network-on-chip (noc). A system and method implemented by tool is... |
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Invention
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System and method for area and timing assessment of a network-on-chip (noc) implementation.
A sy... |
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Invention
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Broadcast adapters in a network-on-chip. A broadcast adapter in a network-on-chip (NoC) is used f... |
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P/S
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Development of new electronic technology for others in the fields of system-on-chip devices, inte... |
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P/S
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downloadable computer software used as a development tool for use
in the design of in... |
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Invention
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System and method to enter and exit a cache coherent interconnect. A cache coherent interconnect ... |
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Invention
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Automatic configuration of pipeline modules in an electronics system. Generation of a full regist... |
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Invention
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System and method for round robin arbiters in a network-on-chip (noc). In a network-on-chip (NoC)... |
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2021
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P/S
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Downloadable computer software used as a development tool for use in the design of integrated cir... |
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P/S
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Providing temporary use of online, non-downloadable software
for delivery and configuration of i... |
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2020
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P/S
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Providing temporary use of online, non-downloadable software for delivery and configuration of in... |
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P/S
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Providing temporary use of online, non-downloadable computer software for use as a development to... |
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2019
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P/S
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Electrical and electronic components, namely,
semiconductors, electronic circuits, microcircuits... |
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2018
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P/S
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Computer software, namely, software application design tools for use in configuring on-chip cache... |
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2015
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P/S
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Interconnect IP technology, namely, protocol adapters, switching elements, data path converters, ... |
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P/S
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Computer software used as a development tool for the design of integrated circuits and system-on-... |
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2012
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P/S
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Computer software used as a development tool for use in the
design of integrated circuits and sy... |
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2011
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P/S
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Computer software used as a simulation and analysis tool for use in the design of integrated circ... |
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2009
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P/S
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computer software used as a development tool for use in the design of integrated circuits and sys... |
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P/S
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[ computer software used as a development tool for use in the design of integrated circuits and s... |
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2002
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P/S
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Electric and electronic components, namely semiconductors, electronic circuits, microcircuits, in... |
