In a general aspect, execution of programs embodying greedy algorithms and, in more particular, to hybrid quantum systems capable of utilizing quantum computing to assist the execution of programs embodying greedy algorithms. In some cases, a method for generating an output of an optimization problem includes causing, via a communication channel, a quantum resource to execute a quantum-based algorithm corresponding to the optimization problem; obtaining, via the communication channel, quantum results based on data generated by the execution of the quantum-based algorithm, the quantum results being indicative of one or more solutions to the optimization problem as determined by the quantum-based algorithm; based on the quantum results, selecting, by a classical computing system, an unassigned element of the output; determining, by the classical computing system, a value for the selected unassigned element of the output; and returning the output with the determined value.
In a general aspect, a flexible cable communicates electromagnetic signals in a cryogenic system. In some aspects, the flexible cable includes a signal layer and a ground layer. The signal layer includes signal lines embedded in adhesive material. Each signal line includes a multilayer structure. The multilayer structure includes a layer of non-superconducting material and a layer of rhenium metal. The ground layer is laminated to the signal layer.
H01B 7/29 - Protection contre les dommages provoqués par des facteurs extérieurs, p. ex. gaines ou armatures par des températures extrêmes ou par les flammes
H01B 11/10 - Écrans particuliers pour réduire les perturbations provoquées par des sources extérieures
H01B 1/02 - Conducteurs ou corps conducteurs caractérisés par les matériaux conducteurs utilisésEmploi de matériaux spécifiés comme conducteurs composés principalement de métaux ou d'alliages
H02G 15/34 - Accessoires de câble pour câbles cryogéniques
3.
Low-frequency activation of single-qubit quantum logic gates
In a general aspect, a parametrically activated single-qubit quantum logic gate is performed in a quantum computing system. In some cases, a superconducting quantum processing unit includes a tunable qubit device. A single-qubit quantum logic gate is performed on a qubit defined by the tunable qubit device by communicating one or more control signals from a control system to the tunable qubit device. The tunable qubit device has a range of qubit operating frequencies, and the one or more control signals include only frequencies that are below the range of qubit operating frequencies.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
4.
Automated synthesizing and compilation of quantum programs
In a general aspect, a quantum program can be automatically synthesized or compiled. In some implementations, a discretized state space is obtained. The discretized state space includes a plurality of states for one or more qubits of a quantum processor. A discrete action space is obtained. The discrete action space includes a plurality of unitary operations for the one or more qubits of the quantum processor. A policy that uses the discretized state space and the discrete action space to generate quantum programs for quantum state preparation is defined. A dynamic programming process is used to improve the policy. An initial state and a target state of the one or more qubits is identified. The policy is used to generate a quantum program to produce the target state from the initial state. The quantum program include a subset of the unitary operations in the discrete action space.
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Providing temporary access to quantum computing data processors and hybrid quantum and classical computing platform through a global computer network; Providing access to superconducting qubit-based quantum data processors and hybrid quantum and classical computing platform through a global computer network for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing data processors and hybrid quantum and classical computing system through a global computer network accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs Quantum computer processor chips and quantum computer processors Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum and classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum and classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum and classical computing software development tools for use in developing and testing hybrid quantum and classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum and classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum and classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum and classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum and classical computing; Computer services, namely, providing quantum cloud computing processing and featuring temporary use of non-downloadable cloud computer software for use in accelerating research, design, development, and workflows; rental of quantum computer data processor
6.
VOLTAGE-ASSISTED ANNEALING TO ALTER TUNNEL JUNCTION PROPERTIES
In a general aspect, junction properties of tunnel junctions are altered by voltage-assisted annealing processes. In some cases, a method includes obtaining a circuit comprising a tunnel junction, modifying a junction resistance of the tunnel junction by applying a voltage across the tunnel junction, and obtaining a measured value of the junction resistance. The tunnel junction may include a metal and a metal oxide.
In a general aspect, hardware-efficient encoding schemes for optimization problems are presented. In some cases, a quantum computing method includes associating subsets of qubits including data qubits and label qubits with clusters of variables in an optimization problem; and mapping the variables in each cluster to the data qubits associated with the cluster, such that multiple variables are mapped to each of the data qubits. During mapping basis states of the label qubits associated with the cluster are identified; the cluster is divided into groups of variables, each group of variables being associated with a respective one of the basis states; and for each group of variables, each variable in the group is mapped to a respective one of the data qubits associated with the cluster. The method further includes causing a quantum processing unit to execute multiple iterations of a quantum program and generating a solution to the optimization problem based on processed measurements.
G06N 10/60 - Algorithmes quantiques, p. ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
8.
Voltage-Assisted Annealing to Alter Tunnel Junction Properties
In a general aspect, junction properties of tunnel junctions are altered by voltage-assisted annealing processes. In some cases, a method includes obtaining a circuit comprising a tunnel junction, modifying a junction resistance of the tunnel junction by applying a voltage across the tunnel junction, and obtaining a measured value of the junction resistance. The tunnel junction may include a metal and a metal oxide.
In a general aspect, a quantum process for execution by a quantum processor is generated. In some instances, test data representing a test output of a quantum process are obtained. The test data are obtained based on a value assigned to a variable parameter of the quantum process. An objective function is evaluated based on the test data, and an updated value is assigned to the variable parameter based on the evaluation of the objective function. The quantum process is provided for execution by a quantum processor, and the quantum process provided for execution has the updated value assigned to the variable parameter.
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
G01R 31/3177 - Tests de fonctionnement logique, p. ex. au moyen d'analyseurs logiques
A system and method for randomly accessing pairs of quantum gates associated with any given quantum gate included in a set of quantum instructions allows for the reduction of unitary errors when executing the quantum instructions. The system generates a set of modified quantum instructions using the randomly accessed pair of quantum gates. The modified quantum instructions produce the same result as the unmodified quantum instructions when executed on a quantum processing system that does not introduce error when executing the instructions. Additionally, the modified quantum instructions produce a more accurate result with less error than the unmodified quantum instructions when executed on a quantum processing system that introduces error.
In a general aspect, quantum-assisted preconditioning of optimization problems is described. In some cases, preconditioning an initial optimization problem includes causing a quantum computing resource to execute a quantum-based algorithm corresponding to the initial optimization problem. Quantum results are obtained based on the execution of the quantum-based algorithm; the quantum results are indicative of one or more solutions to the initial optimization problem as determined by the quantum-based algorithm. Based on the quantum results, a preconditioned optimization problem is generated; the preconditioned optimization problem includes elements indicative of correlations between variables associated with the initial optimization problem. Preconditioned problem results are obtained based on an execution of a solver on the preconditioned optimization problem. The preconditioned problem results may be returned as the output of the initial optimization problem.
In a general aspect, an assembly is configured for thermalizing quantum circuits at low temperature and providing them shielding from magnetic fields and infrared radiation. In some implementations, an assembly to house a component of a quantum processing unit in a cryogenic environment, includes a plate, a magnetic shielding structure, a first thermalization pathway, and a second, independent thermalization pathway. The plate is configured to reside in thermal contact with a thermalization stage of a cryostat. The magnetic shielding structure defines an interior volume to contain a component of a quantum processing unit. The component resides on a circuit board. A first thermalization pathway provides thermal contact between the plate and the magnetic shielding structure. The second, independent thermalization pathway provides thermal contact between the plate and the circuit board.
H05K 9/00 - Blindage d'appareils ou de composants contre les champs électriques ou magnétiques
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
13.
EXECUTING QUANTUM PROGRAMS ON MODULAR QUANTUM PROCESSING UNITS
In a general aspect, quantum programs are executed on modular quantum processing units in a quantum computing system. In some implementations, a method includes receiving a quantum program including a sequence of quantum logic operations; decomposing the sequence of quantum logic operations into an equivalent sequence of quantum logic gates; and segmenting the sequence of quantum logic gates into an equivalent sequence of quantum circuit widgets. Each quantum circuit widget includes a subset of the quantum logic gates in the sequence and corresponds to a time slice of the quantum program. The quantum circuit widgets are compiled to produce a set of compiled quantum circuit widgets to be executed on multiple quantum processor modules of the quantum computing system.
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/60 - Algorithmes quantiques, p. ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
14.
Quantum instruction compiler for optimizing hybrid algorithms
A compiler for a gate-based superconducting quantum computer compiles hybrid classical/quantum algorithms for quantum processing cells with different configurations. The compiler inputs the algorithm and outputs code in a target language executable by a quantum processing cell of a quantum processing system that can execute the algorithm. The compiler includes various functionality, such as: parsing, analyzing control flows, addressing, compressing, and translating. The compiler optimizes algorithms in various manners using the functionality. Some optimizations include addressing efficiently, compressing based on simulations, and translating for efficient execution of parametric functions. The compiler may function in the environment of a cloud quantum computing system. The cloud quantum computing system may receive algorithms from remote access nodes for execution on local classical and quantum computing systems.
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p. ex. pour le traitement simultané de plusieurs programmes
G06N 20/10 - Apprentissage automatique utilisant des méthodes à noyaux, p. ex. séparateurs à vaste marge [SVM]
15.
Heat switches for controlling a flow of heat between thermal stages of a cryostat
Heat switches are presented herein for controlling a flow of heat between thermal stages of a cryostat. In one aspect, a heat switch for a cryostat includes a thermal linkage configured to simultaneously contact a first thermal stage and a second thermal stage of the cryostat and define a thermal pathway therebetween. The thermal linkage includes a superconducting element disposed along a portion of the thermal pathway that is capable of transitioning between a superconducting state and a non-superconducting state. A thermal conductivity of the superconducting state is lower than a thermal conductivity of the non-superconducting state. Other types of heat switches are presented, including methods for controlling a flow of heat between thermal stages of a cryostat.
F25D 19/00 - Disposition ou montage des groupes frigorifiques dans les dispositifs
F25D 3/10 - Dispositifs utilisant d'autres agents froidsDispositifs utilisant des récipients conservant le froid utilisant des gaz liquéfiés, p. ex. de l'air liquide
F28F 13/00 - Dispositions pour modifier le transfert de chaleur, p. ex. accroissement, diminution
G05D 23/01 - Commande de la température sans source d'énergie auxiliaire
In a general aspect, a superconducting quantum processing unit (QPU) includes a plurality of multi-layered cap wafers. In some cases, a quantum processing unit includes quantum processor chips attached to multi-layered cap wafers. Each of the quantum processor chips includes a plurality of qubit devices. The multi-layered cap wafers are configured to provide communication between the quantum processor chips and a control system. Each of the multi-layered cap wafers includes a respective wafer stack that includes a plurality of layers. The plurality of layers of each respective wafer stack includes a first end layer residing closest to a respective quantum processor chip; a second end layer residing farthest from the respective quantum processor chip; and an intermediate layer residing between the first and second end layers. The intermediate layer includes at least one of: a plurality of Purcell filters, a plurality of reflective attenuators, or a plurality of frequency-specific filters.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
17.
TUNING COUPLING STRENGTH BETWEEN CONTROL LINES AND QUANTUM CIRCUIT DEVICES IN SUPERCONDUCTING QUANTUM PROCESSORS
In a general aspect, tuning the coupling strength between a qubit device and nearby control lines is described. In some implementations, a method includes identifying a design of first and second quantum processor wafers of a quantum processing system. The first quantum processor wafer includes a qubit device which includes two qubit electrodes and a SQUID loop. The second quantum processor wafer includes a control line which is configured to apply control signals to the qubit device and includes first and second control ports, a circuit loop inductively coupled to the SQUID loop, and conductive traces connected between the circuit loop and the respective first and second control ports. The control lines are capacitively coupled to the two qubit electrodes. The method includes obtaining simulation data and experimental data from measurements of the quantum processing system, and modifying the design based on the simulation data and the experimental data.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
In a general aspect, hybrid computing systems and hybrid computing methods are described. In some cases, a program to be executed in a hybrid computing system is identified. The hybrid computing system includes a control system that includes a classical processor. The hybrid computing system includes a quantum processor that defines qubits. By operation of the control system, a set of events to execute the program is identified. By operation of the control system, an event schedule that includes resource schedules for the respective qubits is generated. The event schedule is executed in the hybrid computing system. The event schedule, when executed in the hybrid computing system, coordinates operation of the quantum processor and the classical processor.
G06F 15/76 - Architectures de calculateurs universels à programmes enregistrés
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
19.
Performing a Calibration Process in a Quantum Computing System
In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
21.
Microwave integrated quantum circuits with cap wafers and their methods of manufacture
In a general aspect, an integrated quantum circuit includes a first substrate and a second substrate. The first substrate includes a first surface and a recess formed in the first substrate along the first surface. The recess has a recess surface and is configured to enclose a quantum circuit element. The first substrate includes a first electrically-conductive layer disposed on the first surface and covering at least a portion of the recess surface. The first electrically-conductive layer includes a first superconducting material. The second substrate includes a second surface and a quantum circuit element. The second substrate includes a second electrically-conductive layer on the second surface that includes a second superconducting material. The first substrate is adjacent the second substrate to enclose the quantum circuit device within the recess. The first electrically-conductive layer of the first substrate is electrically-coupled to the second electrically-coupled layer of the second substrate.
In a general aspect, a computer system includes a low-latency communication link between a classical computer and a quantum computing resource. In some cases, a quantum machine image operates on a classical computer system. The quantum machine image includes a virtualized execution environment for quantum programs. The quantum machine image is engaged with a quantum processing unit of a quantum computing system. A quantum program is communicated over a low-latency communication pathway from the classical computer system to the quantum computer system. The quantum program is executed at the quantum computer system.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
H04L 67/06 - Protocoles spécialement adaptés au transfert de fichiers, p. ex. protocole de transfert de fichier [FTP]
23.
Modifiable Quantum Error Correction Code for Logical Qubits
In a general aspect, a method of modifying a quantum error correction code for logical qubits is described. In some implementations, a method includes, by operation of classical computing systems, determining target values of logical errors associated with applying operations on logical qubits; by operation of the quantum computing system, measuring observed values of the logical errors associated with applying the operations on the logical qubits; and by operation of the classical computing systems, updating the quantum error correction code based on the target values and the observed values of the logical errors. Updating the quantum error correction code includes modifying a quantum error correction pattern for one or more of the logical qubits. The method further includes, by operation of the quantum computing system, applying the quantum error correction code using the modified quantum error correction pattern while executing a quantum computing routine.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
24.
Connecting Circuitry in a Cap Wafer of a Superconducting Quantum Processing Unit (QPU)
In a general aspect, a superconducting quantum processing unit (QPU) includes a cap wafer that has multiple connected circuitry portions. In some cases, a QPU includes first and second substrates. The first substrate includes a first surface, a recess, and first superconducting circuitry. The recess is defined by sidewalls and a recessed surface. The recessed surface resides at a depth in the first substrate. The first superconducting circuitry includes a first circuitry portion on the first surface of the first substrate; a second circuitry portion on the recessed surface of the first substrate; and a connection disposed on at least one of the sidewalls and connecting the first and second circuitry portions. The second substrate includes second superconducting circuitry, which includes a quantum circuit device. The first and second substrates are arranged such that the recess forms an enclosure that houses the quantum circuit device.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
25.
FABRICATION AND OPERATION OF QUANTUM PROCESSING CIRCUITS IN A QUANTUM COMPUTING SYSTEM
In a general aspect, qubit devices in a quantum computing system are fabricated and operated. In some cases, a method of fabricating a quantum processing circuit, includes forming a protective layer on a surface of a substrate; patterning the protective layer to form a protective structure covering a first region of the surface of the substrate; etching a second region of the surface of the substrate to define a recessed surface outside the first region of the surface of the substrate, the recessed surface residing at a depth in the substrate relative to the surface; revealing the covered first region on the surface of the substrate, the revealing comprising removing the protective layer from the first region of the surface of the substrate; and forming at least a portion of a Josephson junction on the revealed first region.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
27.
RANDOMIZED READOUT ERROR MITIGATION FOR QUANTUM COMPUTING
Provided are a method and system for readout error mitigation, the method comprising: obtaining, with a quantum computing system, a phase value representing a tetrahedral group or supergroup; applying to a qubit, with the quantum computing system, a signal corresponding to the phase value representing an element sampled from the tetrahedral group or supergroup; measuring, with the quantum computing system, an output of the qubit after applying the signal; determining, with the quantum computing system, a full specification of an error channel for the qubit based on selected group operations and the measured outputs, the error channel being specifiable based on the tetrahedral group or supergroup; and calculating, with the quantum computing system, a correction based on the determined error channel specification, for a further readout measurement result of the qubit to produce an error mitigated readout result for the qubit.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
28.
Calibration of iSWAP Gate on a Superconducting Quantum Processing Unit
In a general aspect, iSWAP gates are calibrated on a superconducting quantum processing unit. In some aspects, initial values of control parameters to apply the iSWAP gate on a pair of qubits defined by first and second qubit devices of the superconducting quantum processing unit are identified. Phase tracking devices associated with the first and second qubit devices of the superconducting quantum processing unit are initialized. After initiating the phase tracking devices, shifts in local phases of the pair of qubits are determined based on one or more applications of the iSWAP gate to the pair of qubits. The one or more applications of the iSWAP gate to the pair of qubits is performed using the initial values of the control parameters. Updated values of one or more of the control parameters are generated based on the shifts in local phases and outputs of the phase tracking devices.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
29.
Performing Parametric Dissipation Operations in a Quantum Computing System
In a general aspect, parametric dissipation operations are performed in a quantum computing system. In some implementations, a method includes executing a computer program in a computer system. Executing the computer program includes applying a quantum logic gate associated with a unitary operation to qubits defined by qubit devices on a quantum processing unit; obtaining an estimated value of a dissipation rate parameter; applying a parametric dissipation operation to one or more of the qubit devices; and measuring a state of one or more of the qubit devices. The parametric dissipation operation has a programmable dissipation rate that is controlled by the estimated value of the dissipation rate parameter; and the parametric dissipation operation is applied separately from the quantum logic gate.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
30.
Connecting Quantum Processor Chips in a Modular Quantum Processing Unit
In a general aspect, a modular quantum processing unit (QPU) includes quantum processor chips inter-connected by a cap structure. In some cases, a modular quantum processing unit includes a tunable-frequency coupler device, a first quantum processor chip, a second quantum processor chip, and a cap structure. The tunable-frequency coupler device includes a superconducting quantum interference device (SQUID) loop, a shunt capacitor, and a flux bias control line that controls a magnetic flux through the SQUID loop. The first quantum processor chip includes a first qubit device, the SQUID loop, the flux bias control line, and a first capacitive coupler device galvanically connected between the first qubit device and the tunable-frequency coupler device. The second quantum processor chip includes a second qubit device. The cap structure, which includes a microwave transmission line capacitively coupled between the tunable-frequency coupler device and the second qubit device, is bonded to the first and second quantum processor chips.
G01R 33/035 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs supraconducteurs
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
31.
Solving optimization problems using a hybrid computer system
In a general aspect, an optimization problem is solved using a hybrid computing system. A classical processor unit receives a first data structure that represents the optimization problem. The classical processor unit executes a branch-and-bound process on the first data structure to generate values for a first subset of elements of a solution to the optimization problem. A second data structure is generated based on the first data structure and the first subset of elements. The second data structure represents a reduced version of the optimization problem. A quantum processor unit and a classical processor unit are used to execute a quantum approximate optimization algorithm (QAOA) on the second data structure to generate values for a second subset of the elements of the solution to the optimization problem. The first subset and second subset are combined to obtain the solution to the optimization problem.
G06F 17/17 - Évaluation de fonctions par des procédés d'approximation, p. ex. par interpolation ou extrapolation, par lissage ou par le procédé des moindres carrés
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
In a general aspect, hybrid quantum/classical algorithms are executed in a computing system. A first set of values representing a measurement of a reduced density matrix (RDM) is obtained. The first set of values is based on sampling quantum states generated by a quantum processor. A classical processor generates a second, different set of values to represent the measurement of the RDM. The second set of values is constructed based on the first set of values by a process that imposes one or more n-representability conditions on the second set of values to represent the measurement of the RDM.
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06F 9/30 - Dispositions pour exécuter des instructions machines, p. ex. décodage d'instructions
In a general aspect, a quantum state transferring process is performed in a computing network. In some implementations, a method of transferring a quantum state between nodes in a computing network includes receiving a signal at a first node transmitted on a transmission line from a second node. The first node includes a superconducting quantum processing circuit including a tunable-frequency coupler device with a superconducting circuit loop and a first resonator device having a tunable linewidth. The first resonator device is capacitively coupled to the tunable-frequency coupler coupled to the transmission line. The second node includes a second resonator device having a fixed linewidth coupled to the transmission line. The method includes modifying the tunable linewidth of the first resonator device over time while the signal transfers a quantum state to the first resonator device from the second resonator device, by varying a magnetic flux pulse applied to the superconducting circuit loop.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
35.
Converting signals between regimes in a quantum computing system
In a general aspect, signals are converted between regimes in a quantum computing system. In some cases, a quantum computing system includes: a quantum processing unit, a control system, a transmission medium, and circuitry. The quantum processing unit includes a superconducting circuit, which includes a plurality of qubit devices. The control system includes a signal generator configured to generate a first control signal and encode qubit control information in the first control signal. The transmission medium is configured to couple the signal generator with a signal conversion system. The signal conversion system is configured to: receive the first control signal generated by the signal generator; and generate a second control signal based on the qubit control information encoded in the first control signal. The circuitry is configured to deliver the second control signal to the plurality of qubit devices.
In a general aspect, execution of programs embodying greedy algorithms and, in more particular, to hybrid quantum systems capable of utilizing quantum computing to assist the execution of programs embodying greedy algorithms. In some cases, a method for generating an output of an optimization problem includes causing, via a communication channel, a quantum resource to execute a quantum-based algorithm corresponding to the optimization problem; obtaining, via the communication channel, quantum results based on data generated by the execution of the quantum-based algorithm, the quantum results being indicative of one or more solutions to the optimization problem as determined by the quantum-based algorithm; based on the quantum results, selecting, by a classical computing system, an unassigned element of the output; determining, by the classical computing system, a value for the selected unassigned element of the output; and returning the output with the determined value.
In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
G06N 99/00 - Matière non prévue dans les autres groupes de la présente sous-classe
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
Provided are a method and system for readout error mitigation, the method comprising: obtaining, with a quantum computing system, a phase value representing a tetrahedral group or supergroup; applying to a qubit, with the quantum computing system, a signal corresponding to the phase value representing an element sampled from the tetrahedral group or supergroup; measuring, with the quantum computing system, an output of the qubit after applying the signal; determining, with the quantum computing system, a full specification of an error channel for the qubit based on selected group operations and the measured outputs, the error channel being specifiable based on the tetrahedral group or supergroup; and calculating, with the quantum computing system, a correction based on the determined error channel specification, for a further readout measurement result of the qubit to produce an error mitigated readout result for the qubit.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
In a general aspect, input data for a computer process are preprocessed by a preprocessor unit that includes a quantum processor. In some aspects, a preprocessor unit obtains input data for a computer process that is configured to run on a computer processing unit. Randomized parameter values are computed for variable parameters of a quantum logic circuit based on the input data. A classical processor in the preprocessor unit computes the randomized parameter values from the input data and a set of random numbers. A quantum processor in the preprocessor unit produces quantum processor output data by executing the quantum logic circuit having the randomized parameter values assigned to the variable parameters. Preprocessed data generated based on the quantum processor output data are then provided as the input for the computer process configured to run on the computer processing unit.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p. ex. pour le traitement simultané de plusieurs programmes
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
42.
COMMUNICATING ELECTRICAL SIGNALS IN A CRYOGENIC SYSTEM
In a general aspect, an apparatus is configured for communicating electrical signals in a cryogenic system. The apparatus includes a metal plate and a circuit board secured to the metal plate. The metal plate includes a first surface on a first side, a second surface on a second, opposite side; and a slot that extends through the metal plate from the first surface to the second surface. The circuit board includes a central portion residing in the slot, first and second end portions residing outside the slot. The first and second end portions include electrical connectors that are configured to interface with one or more electrical cables. The circuit board further includes electrical circuitry configured to communicate electrical signals between the electrical connectors on the first and second end portions. The electrical circuitry includes signal lines each extends from the first end portion, through the central portion, into the second end portion.
H05K 7/14 - Montage de la structure de support dans l'enveloppe, sur cadre ou sur bâti
H01R 12/79 - Dispositifs de couplage pour circuits imprimés flexibles, câbles plats ou à rubans ou structures similaires se raccordant à des circuits imprimés rigides ou à des structures similaires
43.
Hardware-Optimized Parity-check (HOP) Gates for Superconducting Surface Codes
In a general aspect, a surface code syndrome measurement is performed on a superconducting quantum processing unit. In some implementations, the superconducting quantum processing unit is caused to apply a quantum error correction code including X-type and Z-type stabilizer check patches. Each of the X-type and Z-type stabilizer check patches includes a stabilizer check qubit device and data qubit devices of the superconducting quantum processing unit. Applying the quantum error correction code includes iteratively twirling the data qubit devices in a stabilizer check patch; and evolving the stabilizer check qubit device in the stabilizer check patch and the data qubit devices in the stabilizer check patch under an interaction Hamiltonian. The interaction Hamiltonian includes a plurality of terms interactions between the stabilizer check qubit device in the stabilizer check patch and a respective one of the data qubit devices in the stabilizer check patch.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
H03M 13/15 - Codes cycliques, c.-à-d. décalages cycliques de mots de code produisant d'autres mots de code, p. ex. codes définis par un générateur polynomial, codes de Bose-Chaudhuri-Hocquenghen [BCH]
44.
Operating a quantum processor in a heterogeneous computing architecture
In some aspects, a heterogeneous computing system includes a quantum processor unit and a classical processor unit. In some instances, variables defined by a computer program are stored in a classical memory in the heterogeneous computing system. The computer program is executed in the heterogeneous computing system by operation of the quantum processor unit and the classical processor unit. Instructions are generated for the quantum processor by a host processor unit based on values of the variables stored in the classical memory. The instructions are configured to cause the quantum processor unit to perform a data processing task defined by the computer program. The values of the variables are updated in the classical memory based on output values generated by the quantum processor unit. The classical processor unit processes the updated values of the variables.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 9/30 - Dispositions pour exécuter des instructions machines, p. ex. décodage d'instructions
G06F 9/38 - Exécution simultanée d'instructions, p. ex. pipeline ou lecture en mémoire
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p. ex. pour le traitement simultané de plusieurs programmes
45.
Parametric Amplification in a Quantum Computing System
In a general aspect, parametric amplification is performed in a quantum computing system. In some cases, a traveling wave parametric amplifier (TWPA) includes a plurality of Josephson junctions connected in series. The plurality of Josephson junctions includes a first Josephson junction, which includes a first superconducting electrode on a surface of a substrate, a second superconducting electrode that overlaps the first superconducting electrode, and a barrier sandwiched between overlapping sections of the first and second superconducting electrodes. The barrier defines a footprint with a tapered shape over the surface of the substrate.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
In a general aspect, quantum computer clusters are configured for large-scale applications. In some implementations, a quantum computer cluster includes a global controller, a first quantum computer system including a first qubit device, and a second quantum computer system including a second qubit device. Each of the first and second quantum computer systems are communicably connected to the global controller. The first and second quantum computer systems include respective quantum processing units housed in distinct cryostats. Operating the global controller includes obtaining respective local frames from the first and second quantum computer systems; determining respective values of phase compensation for the quantum computer systems based on the respective local frames; transmitting the respective values of the phase compensation to the quantum computer systems; and causing the quantum computer systems to apply phase shifts to phases of control signals.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
47.
MODULAR QUANTUM PROCESSOR CONFIGURATIONS AND MODULE INTEGRATION PLATE WITH INTER-MODULE CONNECTIONS FOR THE SAME
In a general aspect, modular quantum processor configurations and methods, including integrating superconducting circuit quantum processor chips with a module integration plate that includes inter-module connections to form modular quantum processors are presented. In some cases, a quantum processing unit includes quantum processor chips, a module integration plate, and one or more caps. Each quantum processor chip includes a plurality of qubit devices. The quantum processor chips are disposed between the module integration plate and the one or more caps. The module integration plate includes recesses that house respective subsets of the quantum processor chips; and inter-module coupler devices that provide communication between the subsets of quantum processor chips housed in distinct recesses. The one or more cap wafers each includes signal lines that provide communication between at least one of the quantum processor chips and a control system.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
In a general aspect, a method of modifying a quantum error correction code for logical qubits is described. In some implementations, a method includes, by operation of classical computing systems, determining target values of logical errors associated with applying operations on logical qubits; by operation of the quantum computing system, measuring observed values of the logical errors associated with applying the operations on the logical qubits; and by operation of the classical computing systems, updating the quantum error correction code based on the target values and the observed values of the logical errors. Updating the quantum error correction code includes modifying a quantum error correction pattern for one or more of the logical qubits. The method further includes, by operation of the quantum computing system, applying the quantum error correction code using the modified quantum error correction pattern while executing a quantum computing routine.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06N 10/60 - Algorithmes quantiques, p. ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
49.
Parallel Data Processing using Hybrid Computing System for Machine Learning Applications
In a general aspect, a machine learning process is performed using data-parallel quantum processing. In some cases, a machine learning model is operated in a hybrid computing system. The hybrid computing system includes a quantum computing resource and a classical computing resource. The quantum computing resource includes quantum processing unit (QPU) sublattices, each including a subset of qubit devices. Methods for operating a machine learning model include defining quantum logic circuits to be executed on the respective QPU sublattices, wherein each quantum logic circuit is configured according to parameters of the machine learning model; translating the quantum logic circuits into quantum control programs for the respective QPU sublattices; determining control parameters for the respective quantum control programs; executing the quantum control programs on the respective QPU sublattices to obtain readout samples from the respective QPU sublattices; and calculating activation parameters of the machine learning model based on the readout samples.
In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
G06F 9/48 - Lancement de programmes Commutation de programmes, p. ex. par interruption
In a general aspect, a quantum process for execution by a quantum processor is generated. In some instances, test data representing a test output of a quantum process are obtained. The test data are obtained based on a value assigned to a variable parameter of the quantum process. An objective function is evaluated based on the test data, and an updated value is assigned to the variable parameter based on the evaluation of the objective function. The quantum process is provided for execution by a quantum processor, and the quantum process provided for execution has the updated value assigned to the variable parameter.
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
G11C 16/26 - Circuits de détection ou de lectureCircuits de sortie de données
G11C 16/20 - InitialisationPrésélection de donnéesIdentification de puces
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G01R 31/3177 - Tests de fonctionnement logique, p. ex. au moyen d'analyseurs logiques
In a general aspect, information is encoded in data qubits in a three-dimensional device lattice. The data qubits reside in multiple layers of the three-dimensional device lattice, and each layer includes a respective two-dimensional device lattice. A three-dimensional color code is applied in the three-dimensional device lattice to detect errors in the data qubits residing in the multiple layers. A two-dimensional color code is applied in the two-dimensional device lattice in each respective layer to detect errors in one or more of the data qubits residing in the respective layer.
G06F 11/00 - Détection d'erreursCorrection d'erreursContrôle de fonctionnement
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06F 11/10 - Détection ou correction d'erreur par introduction de redondance dans la représentation des données, p. ex. en utilisant des codes de contrôle en ajoutant des chiffres binaires ou des symboles particuliers aux données exprimées suivant un code, p. ex. contrôle de parité, exclusion des 9 ou des 11
53.
Maintaining calibration in a quantum computing system
In a general aspect, a method executed in a quantum computing system includes performing a calibration process in the quantum computing system to identify a value of a parameter of the quantum computing system. The method also includes analyzing a variation of the value in response to a change in a condition of the quantum computing system, thereby determining a stability of the parameter. The method additionally includes scheduling a recalibration of the parameter based on the stability of the parameter and executing a quantum algorithm in the quantum computing system based on the value of the parameter identified by the calibration process.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
In a general aspect, user requests for access distributed quantum computing resources in a distributed quantum computing system are managed. In a general aspect, a job request for accessing a quantum computing resource is received. The job request includes a user id and a program. On authentication of a user associated with the job request, a job identifier is assigned to the job request, and a particular quantum computing resource is selected for the job request. The job request is individualized based on user permissions and pushed onto a queue to be processed for execution by the quantum computing resource.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
55.
Applying Two-qubit Quantum Logic Gates in a Superconducting Quantum Processing Unit
In a general aspect, two-qubit quantum gate operations are performed in a superconducting quantum processing unit. In some cases, a flux modulation signal is generated. The flux modulation signal is configured to modulate a transition frequency of a first tunable-frequency qubit device in a superconducting quantum processing unit such that a time average of the transition frequency of the first tunable-frequency qubit device over a duration of the flux modulation signal is on resonance with a transition frequency of a second qubit device in the superconducting quantum processing unit. A two-qubit quantum logic gate is applied to a pair of qubits defined by the first tunable-frequency qubit device and the second qubit device. Applying the two-qubit quantum logic gate includes communicating the flux modulation signal to a flux bias control line coupled to the first tunable-frequency qubit device.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
56.
Performing a calibration process in a quantum computing system
In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
57.
Streaming execution for a quantum processing system
Interactions between a classical computing system and a quantum computing system can be structured to increase the effective memory available to hold instructions for a quantum processor. The system stores a schedule of compiled quantum processing instructions in a memory storage location on a classical computing system. A small program memory is included in close proximity to a control system for the quantum processor on the quantum computing system. The classical computing system sends a subset of instructions from the schedule of quantum instructions to the program memory. The control system manages execution of the instructions by accessing them at the program memory and configuring the quantum processor accordingly. While the quantum processor executes the instructions, additional instructions are transferred from the classical computing system to the program memory to await execution. The quantum system can execute many instructions quickly without idling while instructions are fetched from a large memory.
In a general aspect, a superconducting quantum processing unit (QPU) includes a plurality of multi-layered cap wafers. In some cases, a quantum processing unit includes quantum processor chips attached to multi-layered cap wafers. Each of the quantum processor chips includes a plurality of qubit devices. The multi-layered cap wafers are configured to provide communication between the quantum processor chips and a control system. Each of the multi-layered cap wafers includes a respective wafer stack that includes a plurality of layers. The plurality of layers of each respective wafer stack includes a first end layer residing closest to a respective quantum processor chip; a second end layer residing farthest from the respective quantum processor chip; and an intermediate layer residing between the first and second end layers. The intermediate layer includes at least one of: a plurality of Purcell filters, a plurality of reflective attenuators, or a plurality of frequency-specific filters.
H10N 69/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comportant au moins un élément supraconducteur couvert par le groupe
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01L 23/552 - Protection contre les radiations, p. ex. la lumière
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
In a general aspect, a quantum streaming kernel processes a data stream. In some aspects, an input stream of data is converted to an output stream of data by repeatedly receiving new portions of the input stream; encoding each new portion into an internal quantum state of a quantum processor; measuring a first part of the internal quantum state while maintaining coherence of a second part of the internal quantum state; and producing the output stream of data based on the measurements. In some cases, a history of the input stream is preserved by the coherence of the internal quantum state, and the measurements contain information based on the history of the input stream.
H03K 19/19 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des éléments diélectriques avec une constante diélectrique variable, p. ex. condensateurs ferro-électriques utilisant des dispositifs ferrorésonnants
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
In a general aspect, a modular quantum processing unit (QPU) includes quantum processor chips inter-connected by a cap structure. In some cases, a modular quantum processing unit includes a tunable-frequency coupler device, a first quantum processor chip, a second quantum processor chip, and a cap structure. The tunable-frequency coupler device includes a superconducting quantum interference device (SQUID) loop, a shunt capacitor, and a flux bias control line that controls a magnetic flux through the SQUID loop. The first quantum processor chip includes a first qubit device, the SQUID loop, the flux bias control line, and a first capacitive coupler device galvanically connected between the first qubit device and the tunable-frequency coupler device. The second quantum processor chip includes a second qubit device. The cap structure, which includes a microwave transmission line capacitively coupled between the tunable-frequency coupler device and the second qubit device, is bonded to the first and second quantum processor chips.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
62.
Microwave integrated quantum circuits with cap wafers and their methods of manufacture
In a general aspect, an integrated quantum circuit includes a first substrate and a second substrate. The first substrate includes a first surface and a recess formed in the first substrate along the first surface. The recess has a recess surface and is configured to enclose a quantum circuit element. The first substrate includes a first electrically-conductive layer disposed on the first surface and covering at least a portion of the recess surface. The first electrically-conductive layer includes a first superconducting material. The second substrate includes a second surface and a quantum circuit element. The second substrate includes a second electrically-conductive layer on the second surface that includes a second superconducting material. The first substrate is adjacent the second substrate to enclose the quantum circuit device within the recess. The first electrically-conductive layer of the first substrate is electrically-coupled to the second electrically-coupled layer of the second substrate.
In a general aspect, a modular quantum processing unit with quantum processing hardware modules is described. In some implementations, a computing system includes a modular quantum processing unit and a control system communicably coupled to the modular quantum processing unit. The modular quantum processing unit includes quantum processor chips, a substrate that supports the quantum processor chips. Each quantum processor chip includes a superconducting quantum circuit; and each superconducting quantum circuit includes quantum circuit devices and intra-chip circuit connections between respective pairs of the quantum circuit devices within the superconducting quantum circuit. The quantum circuit devices include a plurality of qubit devices. The substrate includes circuitry which includes inter-chip circuit connections between respective pairs of the quantum circuit devices in distinct superconducting quantum processor chips. The control system is configured to process quantum information by operation of the modular quantum processing unit. The control system is configured to process the quantum information by processing logical qubits, and operation of the modular quantum processing unit includes a definition of each of the logical qubits on a respective subset of the quantum processor chips; and an application of quantum error correction to the logical qubits defined by each respective subset of the quantum processor chips.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
In a general aspect, quantum computing system performance is tested. Systems and methods for testing hardware in a quantum computing system are described. The methods may include certification/decertification of data produced by the quantum computing system, detection of faults, correction of errors and/or recalibration/replacement of the quantum computing system or a quantum computing subsystem.
In a general aspect, a multi-qubit quantum logic gate for a multi-qubit hardware-efficient stabilizer measurement is performed. In some implementations, a superconducting quantum processing unit includes a stabilizer check qubit device and two or more data qubit devices operably coupled to the stabilizer check qubit device through respective tunable-frequency coupler devices. A method includes applying a multi-qubit quantum logic gate on the stabilizer check qubit device and the two or more data qubit devices. Applying the multi-qubit quantum logic gate includes evolving the stabilizer check qubit device and the two or more data qubit devices under an interaction Hamiltonian with a plurality of terms. Each of the plurality of terms corresponding to an interaction between the stabilizer check qubit device and a respective one of the two or more data qubit devices, includes a phase combined with a Pauli operator applied to the stabilizer check qubit device and the Pauli operator applied to the respective one of the two or more data qubit devices.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
In a general aspect, a quantum program is automatically synthesized. In some implementations, artificial intelligence systems are used to generate a quantum program to run on a quantum computer. In some aspects, quantum processor output data are generated by a quantum resource executing an initial version of a quantum program, and quantum state information is computed from the quantum processor output data. Neural network input data, which include the quantum state information and a representation of a problem to be solved by the quantum program, are provided to a neural network. Neural network output data are generated by the neural network processing the neural network input data. A quantum logic gate is selected based on the neural network output data. An updated version of the quantum program that includes the selected quantum logic gate is generated.
In a general aspect, parametric dissipation operations are performed in a quantum computing system. In some implementations, a method includes executing a computer program in a computer system. Executing the computer program includes applying a quantum logic gate associated with a unitary operation to qubits defined by qubit devices on a quantum processing unit; obtaining an estimated value of a dissipation rate parameter; applying a parametric dissipation operation to one or more of the qubit devices; and measuring a state of one or more of the qubit devices. The parametric dissipation operation has a programmable dissipation rate that is controlled by the estimated value of the dissipation rate parameter; and the parametric dissipation operation is applied separately from the quantum logic gate.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
68.
CALIBRATION OF ISWAP GATES ON A SUPERCONDUCTING QUANTUM PROCESSING UNIT
In a general aspect, iSWAP gates are calibrated on a superconducting quantum processing unit. In some aspects, initial values of control parameters to apply the iSWAP gate on a pair of qubits defined by first and second qubit devices of the superconducting quantum processing unit are identified. Phase tracking devices associated with the first and second qubit devices of the superconducting quantum processing unit are initialized. After initiating the phase tracking devices, shifts in local phases of the pair of qubits are determined based on one or more applications of the iSWAP gate to the pair of qubits. The one or more applications of the iSWAP gate to the pair of qubits is performed using the initial values of the control parameters. Updated values of one or more of the control parameters are generated based on the shifts in local phases and outputs of the phase tracking devices.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
09 - Appareils et instruments scientifiques et électriques
38 - Services de télécommunications
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Quantum computer processor chips and quantum computer processors; none of the aforementioned relating to software for computer-controlled machine tools. Providing temporary access to quantum computing processors and quantum/classical computing platform; Providing access to superconducting qubit-based quantum processors and quantum/classical computing platform for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing processors and quantum/classical computing system accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs. Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum/classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum/classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum/classical computing software development tools, integrated circuits, microprocessors, and computer hardware for use in developing and testing hybrid quantum/classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum/classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum/classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum/classical computing; Computer services, namely, providing quantum computing processing accessed via the cloud for use in accelerating research, design, development, and workflows; none of the aforementioned relating to software for computer-controlled machine tools.
09 - Appareils et instruments scientifiques et électriques
38 - Services de télécommunications
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Quantum computer processor chips and quantum computer processors. Providing temporary access to quantum computing processors and quantum/classical computing platform; Providing access to superconducting qubit-based quantum processors and quantum/classical computing platform for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing processors and quantum/classical computing system accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs. Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum/classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum/classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum/classical computing software development tools, integrated circuits, microprocessors, and computer hardware for use in developing and testing hybrid quantum/classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum/classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum/classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum/classical computing; Computer services, namely, providing quantum computing processing accessed via the cloud for use in accelerating research, design, development, and workflows.
09 - Appareils et instruments scientifiques et électriques
38 - Services de télécommunications
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Quantum computer processor chips and quantum computer processors; none of the aforementioned in relation to software for hospital management, medical records management, and electronic health records management. Providing temporary access to quantum computing processors and quantum/classical computing platform; Providing access to superconducting qubit-based quantum processors and quantum/classical computing platform for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing processors and quantum/classical computing system accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs; none of the aforementioned in relation to software for hospital management, medical records management, and electronic health records management. Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum/classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum/classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum/classical computing software development tools, integrated circuits, microprocessors, and computer hardware for use in developing and testing hybrid quantum/classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum/classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum/classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum/classical computing; Computer services, namely, providing quantum computing processing accessed via the cloud for use in accelerating research, design, development, and workflows; none of the aforementioned in relation to software for hospital management, medical records management, and electronic health records management.
09 - Appareils et instruments scientifiques et électriques
38 - Services de télécommunications
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Quantum computer processor chips and quantum computer processors. Providing temporary access to quantum computing processors and quantum/classical computing platform; Providing access to superconducting qubit-based quantum processors and quantum/classical computing platform for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing processors and quantum/classical computing system accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs. Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum/classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum/classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum/classical computing software development tools, integrated circuits, microprocessors, and computer hardware for use in developing and testing hybrid quantum/classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum/classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum/classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum/classical computing; Computer services, namely, providing quantum computing processing accessed via the cloud for use in accelerating research, design, development, and workflows.
In a general aspect, hybrid quantum/classical algorithms are executed in a computing system. A first set of values representing a measurement of a reduced density matrix (RDM) is obtained. The first set of values is based on sampling quantum states generated by a quantum processor. A classical processor generates a second, different set of values to represent the measurement of the RDM. The second set of values is constructed based on the first set of values by a process that imposes one or more n-representability conditions on the second set of values to represent the measurement of the RDM.
In some aspects, a flexible cable may comprise: a flexible strip with first and second parallel surfaces and first and second ends, said flexible strip being electrically insulating; a metal stripline within said flexible strip; first and second metallic grounding planes on said first and second surfaces, respectively; and a first circuit board mechanically attached to at least one of said first end of said flexible strip and said first and second metallic grounding planes at said first end, said first circuit board being mechanically stiff, said metal stripline being electrically connected to electrical circuitry on said first circuit board.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01B 7/04 - Câbles, conducteurs ou cordons flexibles, p. ex. câbles traînants
H01P 1/30 - Dispositifs de compensation des effets de la température ou de l'humidité ou de protection contre ces effets
H01R 12/79 - Dispositifs de couplage pour circuits imprimés flexibles, câbles plats ou à rubans ou structures similaires se raccordant à des circuits imprimés rigides ou à des structures similaires
In a general aspect, an optimization problem is solved using a hybrid computing system. A classical processor unit receives a first data structure that represents the optimization problem. The classical processor unit executes a branch-and-bound process on the first data structure to generate values for a first subset of elements of a solution to the optimization problem. A second data structure is generated based on the first data structure and the first subset of elements. The second data structure represents a reduced version of the optimization problem. A quantum processor unit and a classical processor unit are used to execute a quantum approximate optimization algorithm (QAOA) on the second data structure to generate values for a second subset of the elements of the solution to the optimization problem. The first subset and second subset are combined to obtain the solution to the optimization problem.
G06F 17/11 - Opérations mathématiques complexes pour la résolution d'équations
G06F 17/17 - Évaluation de fonctions par des procédés d'approximation, p. ex. par interpolation ou extrapolation, par lissage ou par le procédé des moindres carrés
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.
G01R 31/00 - Dispositions pour tester les propriétés électriquesDispositions pour la localisation des pannes électriquesDispositions pour tests électriques caractérisées par ce qui est testé, non prévues ailleurs
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
77.
Microwave integrated quantum circuits with vias and methods for making the same
A quantum computing system that includes a quantum circuit device having at least one operating frequency; a first substrate having a first surface on which the quantum circuit device is disposed; a second substrate having a first surface that defines a recess of the second substrate, the first and second substrates being arranged such that the recess of the second substrate forms an enclosure that houses the quantum circuit device; and an electrically conducting layer that covers at least a portion of the recess of the second substrate.
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
78.
Streaming execution for a quantum processing system
Interactions between a classical computing system and a quantum computing system can be structured to increase the effective memory available to hold instructions for a quantum processor. The system stores a schedule of compiled quantum processing instructions in a memory storage location on a classical computing system. A small program memory is included in close proximity to a control system for the quantum processor on the quantum computing system. The classical computing system sends a subset of instructions from the schedule of quantum instructions to the program memory. The control system manages execution of the instructions by accessing them at the program memory and configuring the quantum processor accordingly. While the quantum processor executes the instructions, additional instructions are transferred from the classical computing system to the program memory to await execution. The quantum system can execute many instructions quickly without idling while instructions are fetched from a large memory.
In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
G06F 9/48 - Lancement de programmes Commutation de programmes, p. ex. par interruption
In a general aspect, a quantum logic circuit is executed on multiple processing nodes in a computing system that includes quantum computing resources. In some aspects, methods of operating the computing system may include obtaining a computer program that includes a quantum logic circuit. The methods may include obtaining hardware resource metadata specifying properties of processing nodes in the computing system. The processing nodes include at least a subset of the quantum computing resources, and the hardware resource metadata includes error rate information and availability information for the respective processing nodes. The methods may include generating execution tasks configured to execute the quantum logic circuit on the processing nodes based on the hardware resource metadata; dispatching the execution tasks to the processing nodes; receiving output data generated by the processing nodes; and producing an output of the computer program based on the output data.
In a general aspect, input data for a computer process are preprocessed by a preprocessor unit that includes a quantum processor. In some aspects, a preprocessor unit obtains input data for a computer process that is configured to run on a computer processing unit. Randomized parameter values are computed for variable parameters of a quantum logic circuit based on the input data. A classical processor in the preprocessor unit computes the randomized parameter values from the input data and a set of random numbers. A quantum processor in the preprocessor unit produces quantum processor output data by executing the quantum logic circuit having the randomized parameter values assigned to the variable parameters. Preprocessed data generated based on the quantum processor output data are then provided as the input for the computer process configured to run on the computer processing unit.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p. ex. pour le traitement simultané de plusieurs programmes
G06F 17/18 - Opérations mathématiques complexes pour l'évaluation de données statistiques
82.
Controlling a Tunable Floating Coupler Device in a Superconducting Quantum Processing Unit
In a general aspect, a superconducting quantum processing unit includes a first qubit device, a second qubit device, and a tunable floating coupler device coupled between the first and second qubit devices. Values of a coupling strength of the first and second qubit devices at a plurality of operating points of the tunable floating coupler device are measured. The operating points correspond to respective values of a magnetic flux applied to the tunable floating coupler device. Based on the measured values of the coupling strength, a parking value of the magnetic flux is identified. The parking value of the magnetic flux corresponds to a magnitude of the coupling strength being less than or equal to a threshold value; the threshold value is associated with a target gate fidelity for the superconducting quantum processing unit.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
83.
Utilizing multiple quantum processor unit (QPU) instances
In a general aspect, a plurality of distinct quantum processor unit (QPU) instances are utilized to execute a quantum computation. Hybrid classical-quantum computing methods and systems are described which utilize the plurality of QPU instances in the execution of quantum computations.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/80 - Architectures de calculateurs universels à programmes enregistrés comprenant un ensemble d'unités de traitement à commande commune, p. ex. plusieurs processeurs de données à instruction unique
84.
Quantum Control by Modulating Tunable Devices in a Superconducting Circuit
In a general aspect, quantum control is performed by modulating tunable devices in a superconducting circuit. In some implementations, values of parameters for a control signal are identified. The control signal is to apply a control operation to a qubit defined by a tunable qubit device in a superconducting quantum processing unit. The control signal is generated according to the values of the parameters. The control signal includes a plurality of modulation tones. The control operation is applied to the qubit by delivering the control signal to a flux bias device associated with the tunable qubit device. The control signal controls a magnetic flux applied to the tunable qubit device by the flux bias device and renders the qubit insensitive to flux noise.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
In a general aspect, a quantum computing method is described. In some aspects, a control system in a quantum computing system assigns subsets of qubit devices in a quantum processor to respective cores. The control system identifies boundary qubit devices residing between the cores in the quantum processor and generates control sequences for each respective core. A signal delivery system in communication with the control system and the quantum processor receives control signals to execute the control sequences, and the control signals are applied to the respective cores in the quantum processor.
G06F 15/76 - Architectures de calculateurs universels à programmes enregistrés
G06F 15/82 - Architectures de calculateurs universels à programmes enregistrés commandés par des données ou à la demande
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
86.
Quantum instruction compiler for optimizing hybrid algorithms
A compiler for a gate-based superconducting quantum computer compiles hybrid classical/quantum algorithms for quantum processing cells with different configurations. The compiler inputs the algorithm and outputs code in a target language executable by a quantum processing cell of a quantum processing system that can execute the algorithm. The compiler includes various functionality, such as: parsing, analyzing control flows, addressing, compressing, and translating. The compiler optimizes algorithms in various manners using the functionality. Some optimizations include addressing efficiently, compressing based on simulations, and translating for efficient execution of parametric functions. The compiler may function in the environment of a cloud quantum computing system. The cloud quantum computing system may receive algorithms from remote access nodes for execution on local classical and quantum computing systems.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G06F 15/16 - Associations de plusieurs calculateurs numériques comportant chacun au moins une unité arithmétique, une unité programme et un registre, p. ex. pour le traitement simultané de plusieurs programmes
In a general aspect, a machine learning process is performed using data-parallel quantum processing. In some cases, a machine learning model is operated in a hybrid computing system. The hybrid computing system includes a quantum computing resource and a classical computing resource. The quantum computing resource includes quantum processing unit (QPU) sublattices, each including a subset of qubit devices. Methods for operating a machine learning model include defining quantum logic circuits to be executed on the respective QPU sublattices, wherein each quantum logic circuit is configured according to parameters of the machine learning model; translating the quantum logic circuits into quantum control programs for the respective QPU sublattices; determining control parameters for the respective quantum control programs; executing the quantum control programs on the respective QPU sublattices to obtain readout samples from the respective QPU sublattices; and calculating activation parameters of the machine learning model based on the readout samples.
G06N 10/60 - Algorithmes quantiques, p. ex. fondés sur l'optimisation quantique ou les transformées quantiques de Fourier ou de Hadamard
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
In some embodiments, a computing system may comprise a memory for storing a ledger; a computer processor for verification of the ledger, wherein the computer processor comprises at least one of a classical computer processor configured to run a virtual quantum machine and a quantum computer comprising a plurality of qubits; wherein the ledger is configured to store arbitrary classical information and quantum information which is verifiable using the computer processor. Furthermore, in some embodiments the computing system is configured to perform operations comprising: adding to the ledger using the computer processor to solve a mathematically difficult problem which is Quantum-Merlin-Arthur-complete (QMA-complete). In embodiments, a blockchain includes a quantum state. In some aspects, a unitary operator corresponding to a quantum rotation is found when new transaction data are to be secured in the blockchain.
G05D 1/00 - Commande de la position, du cap, de l'altitude ou de l'attitude des véhicules terrestres, aquatiques, aériens ou spatiaux, p. ex. utilisant des pilotes automatiques
H04L 9/06 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité l'appareil de chiffrement utilisant des registres à décalage ou des mémoires pour le codage par blocs, p. ex. système DES
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Providing temporary access to quantum computing data processors and hybrid quantum and classical computing platform through a global computer network; Providing access to superconducting qubit-based quantum data processors and hybrid quantum and classical computing platform through a global computer network for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing data processors and hybrid quantum and classical computing system through a global computer network accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs; none of the aforementioned in relation to conducting, facilitating or processing financial payments and transactions, secure payments, financial management, financial and asset evaluations, computerized financial payment and transaction services Quantum computer processor chips and quantum computer data processors; none of the aforementioned in relation to conducting, facilitating or processing financial payments and transactions, secure payments, financial management, financial and asset evaluations, computerized financial payment and transaction services Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum and classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum and classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum and classical computing software development tools for use in developing and testing hybrid quantum and classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum and classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum and classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum and classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum and classical computing; Computer services, namely, providing quantum cloud computing processing and featuring temporary use of non-downloadable cloud computer software for use in accelerating research, design, development, and workflows; rental of quantum computer data processors; none of the aforementioned in relation to conducting, facilitating or processing financial payments and transactions, secure payments, financial management, financial and asset evaluations, computerized financial payment and transaction services
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Providing temporary access to quantum computing data processors and hybrid quantum and classical computing platform through a global computer network; Providing access to superconducting qubit-based quantum data processors and hybrid quantum and classical computing platform through a global computer network for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing data processors and hybrid quantum and classical computing system through a global computer network accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs Quantum computer processor chips and quantum computer processors Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum and classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum and classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum and classical computing software development tools for use in developing and testing hybrid quantum and classical computing computer program; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum and classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum and classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum and classical computing; Computer services, namely, providing quantum cloud computing processing and featuring temporary use of non-downloadable cloud computer software for use in accelerating research, design, development, and workflows
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Providing temporary access to quantum computing data processors and hybrid quantum and classical computing platform through a global computer network; Providing access to superconducting qubit-based quantum data processors and hybrid quantum and classical computing platform through a global computer network for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing data processors and hybrid quantum and classical computing system through a global computer network accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs Quantum computer processor chips and quantum computer processors Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum and classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum and classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum and classical computing software development tools for use in developing and testing hybrid quantum and classical computing computer programs; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum and classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum and classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum and classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum and classical computing; Computer services, namely, providing quantum cloud computing processing and featuring temporary use of non-downloadable cloud computer software for use in accelerating research, design, development, and workflows; rental of quantum computer data processors
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Providing temporary access to quantum computing data processors and hybrid quantum and classical computing platform through a global computer network; Providing access to superconducting qubit-based quantum data processors and hybrid quantum and classical computing platform through a global computer network for use in accelerating research, design, development and workflows via quantum computing; Providing temporary access to quantum computing data processors and hybrid quantum and classical computing system through a global computer network accessed via the cloud; Providing temporary access to a supercomputer for the purpose of running software programs Quantum computer processor chips and quantum computer processors Research and development services, namely, providing research information and electronic research data in the field of hybrid quantum and classical computing; providing temporary use of non-downloadable quantum computing software development tools, in the nature of software code libraries and software interfaces; platform as a service (PAAS) featuring computer hybrid quantum and classical computing software platforms for providing online access to a software development environment, software libraries and software interfaces; providing temporary use of non-downloadable hybrid quantum and classical computing software development tools for use in developing and testing hybrid quantum and classical computing computer program; Providing a web site featuring online non-downloadable open source software and software development toolkits for use in developing and testing hybrid quantum and classical computing computer programs; software as a service (SaaS) services featuring software for use as hybrid quantum and classical computing software development tools and programming language for constructing, analyzing and running computer programs; Software as a service (SaaS) services, namely, providing an interactive web site featuring technology that enables users to enter and access emulators and simulators for developing and testing hybrid quantum/classical computing computer programs; application service provider featuring application programming interface (API) software for use in programming and developing and testing algorithms in the field of hybrid quantum and classical computing; Computer services, namely, providing quantum cloud computing processing and featuring temporary use of non-downloadable cloud computer software for use in accelerating research, design, development, and workflows
93.
CONNECTING CIRCUITRY IN A CAP WAFER OF A SUPERCONDUCTING QUANTUM PROCESSING UNIT(QPU)
In a general aspect, a superconducting quantum processing unit (QPU) includes a cap wafer that has multiple connected circuitry portions. In some cases, a QPU includes first and second substrates. The first substrate includes a first surface, a recess, and first superconducting circuitry. The recess is defined by sidewalls and a recessed surface. The recessed surface resides at a depth in the first substrate. The first superconducting circuitry includes a first circuitry portion on the first surface of the first substrate; a second circuitry portion on the recessed surface of the first substrate; and a connection disposed on at least one of the sidewalls and connecting the first and second circuitry portions. The second substrate includes second superconducting circuitry, which includes a quantum circuit device. The first and second substrates are arranged such that the recess forms an enclosure that houses the quantum circuit device.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
95.
Photonic quantum networking for large superconducting qubit modules
In a general aspect, a photonic quantum network is disclosed. In some implementations, microwave modes and optical modes are generated on first and second quantum processing units (QPUs) by operation of a first transducer device of the first QPU and a second transducer device of the second QPU. The microwave modes are transmitted within the first and second QPUs from the first and second transducer devices to respective first and second qubit devices. The optical modes are transmitted from the first and second QPUs to an interferometer device. By operation of the interferometer device, output signals are generated on respective output channels based on the optical modes from the first and second QPUs. Based on the output signals detected by operation of photodetector devices coupled to the respective output channels, quantum entanglement transferred to the first and second qubit devices by the microwave modes is identified.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G01B 9/02015 - Interféromètres caractérisés par la configuration du parcours du faisceau
H10N 60/20 - Dispositifs à supraconductivité permanente
96.
Quantum computing in a three-dimensional device lattice
In a general aspect, information is encoded in data qubits in a three-dimensional device lattice. The data qubits reside in multiple layers of the three-dimensional device lattice, and each layer includes a respective two-dimensional device lattice. A three-dimensional color code is applied in the three-dimensional device lattice to detect errors in the data qubits residing in the multiple layers. A two-dimensional color code is applied in the two-dimensional device lattice in each respective layer to detect errors in one or more of the data qubits residing in the respective layer.
In a general aspect, two-qubit quantum gate operations are performed in a superconducting quantum processing unit. In some cases, a flux modulation signal is generated. The flux modulation signal is configured to modulate a transition frequency of a first tunable-frequency qubit device in a superconducting quantum processing unit such that a time average of the transition frequency of the first tunable-frequency qubit device over a duration of the flux modulation signal is on resonance with a transition frequency of a second qubit device in the superconducting quantum processing unit. A two-qubit quantum logic gate is applied to a pair of qubits defined by the first tunable-frequency qubit device and the second qubit device. Applying the two-qubit quantum logic gate includes communicating the flux modulation signal to a flux bias control line coupled to the first tunable-frequency qubit device.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
99.
PARAMETRIC AMPLIFICATION IN A QUANTUM COMPUTING SYSTEM
In a general aspect, parametric amplification is performed in a quantum computing system. In some cases, a traveling wave parametric amplifier (TWPA) includes a plurality of Josephson junctions connected in series. The plurality of Josephson junctions includes a first Josephson junction, which includes a first superconducting electrode on a surface of a substrate, a second superconducting electrode that overlaps the first superconducting electrode, and a barrier sandwiched between overlapping sections of the first and second superconducting electrodes. The barrier defines a footprint with a tapered shape over the surface of the substrate.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
B82Y 10/00 - Nanotechnologie pour le traitement, le stockage ou la transmission d’informations, p. ex. calcul quantique ou logique à un électron
In a general aspect, a quantum streaming kernel processes a data stream. In some aspects, an input stream of data is converted to an output stream of data by repeatedly receiving new portions of the input stream; encoding each new portion into an internal quantum state of a quantum processor; measuring a first part of the internal quantum state while maintaining coherence of a second part of the internal quantum state; and producing the output stream of data based on the measurements. In some cases, a history of the input stream is preserved by the coherence of the internal quantum state, and the measurements contain information based on the history of the input stream.
H03K 19/19 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des éléments diélectriques avec une constante diélectrique variable, p. ex. condensateurs ferro-électriques utilisant des dispositifs ferrorésonnants
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
