A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
A superconducting controller for a superconducting qubit to execute high fidelity quantum gates using magnetic flux drive. The controller comprises: an inductance forming an inductive loop and configured to be inductively coupled to a qubit with a small mutual inductance; a pulse shaping circuit configured to apply a current pulse with a predefined shape across the inductance. The pulse shaping circuit comprises: a superconducting circuit configured to output single flux quanta (SFQ) pulses and a digital counter circuit configured to produce the shape of the current (magnetic flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current across the inductance by one SFQ pulse at a time.
H03K 17/92 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
3.
Memory cells based on superconducting and magnetic materials and methods of their control in arrays
A memory cell having a Josephson junction and a magnetic junction situated in a close proximity to the Josephson junction. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The so obtained memory cell can be integrated into the large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 11/00 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
A superconducting integrated circuits (ICs) design based on Josephson junctions, wherein the junctions are biased using a digital phase source (DPS), rather than the standard DC or AC current bias. This DPS enables the use of underdamped junctions, which in turn leads to more compact, lower power, more reliable ICs applied to digital computing, digital signal processing, and readout and control for cryogenic sensor arrays and for quantum computers. This design approach, called Superconducting Sustainable Ballistic Fluxon (SSBF), can be integrated with all logic families based on single-flux-quanta (SFQ), synchronous and asynchronous clocking protocols, and both DC and AC power supplies. SSBF can also be incorporated in automated design tools for scaling superconducting ICs to millions of junctions.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 29/52 - Protection du contenu des mémoiresDétection d'erreurs dans le contenu des mémoires
This patent document provides superconducting magnetic sensors for sensing magnetic fields and for being used in various applications including quantum computing. One example of such a sensor includes a multilayer structure that includes at least one magnetic layer and at least one non-magnetic layer; and two superconducting electrodes coupled to the multilayer structure so that the multilayer structure and the two superconducting electrodes transmit a superconducting current through the multilayer structure.
G01R 33/035 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs supraconducteurs
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
6.
SYSTEM AND METHOD OF FLUX BIAS FOR SUPERCONDUCTING QUANTUM CIRCUITS
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
A superconducting controller for a superconducting qubit to execute high fidelity quantum gates using magnetic flux drive. The controller comprises: an inductance forming an inductive loop and configured to be inductively coupled to a qubit with a small mutual inductance; a pulse shaping circuit configured to apply a current pulse with a predefined shape across the inductance. The pulse shaping circuit comprises: a superconducting circuit configured to output single flux quanta (SFQ) pulses and a digital counter circuit configured to produce the shape of the current (magnetic flux) pulse by controlling the number of SFQ pulses applied to the inductive loop by incrementing or decrementing the current across the inductance by one SFQ pulse at a time.
H03K 17/92 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
8.
COMPUTING SYSTEM WITH GRAPHICS PROCESSING UNIT (GPU) OVERLAY WITH QUANTUM PROCESSING UNIT (QPU)
This patent document provides designs of efficient hybrid quantum classical computing systems capable of information processing based on both quantum computing using different quantum states of quantum bits and classical digital computing using digital processors including one or more graphics processing unit (GPU) processors.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/80 - Programmation quantique, p. ex. interfaces, langages ou boîtes à outils de développement logiciel pour la création ou la manipulation de programmes capables de fonctionner sur des ordinateurs quantiquesPlate-formes pour la simulation ou l’accès aux ordinateurs quantiques, p. ex. informatique quantique en nuage
G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
9.
Integrated superconducting nanowire digital photon detector
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
A memory cell having a Josephson junction and a magnetic junction in close proximity. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The memory cell can be integrated into large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
The technology disclosed in this patent document can be implemented to combine quantum computing and classical digital computing in a scalable computing system based on superconducting qubits using Josephson junctions that exhibit low dissipation long coherence times and can be fabricated with well-developed integrated circuit fabrication techniques. More specifically, the disclosed technology can be implemented by using two radio frequency (RF) superconducting quantum interference device (SQUID) circuits coupled in balance to preserve general symmetry and form a quantum readout circuit for reading and digitizing a superconducting qubit state with improved readout fidelity and sensitivity.
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
13.
System and method for superconducting multi-chip module
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 31/0256 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails caractérisés par leurs corps semi-conducteurs caractérisés par les matériaux
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
A memory cell having a Josephson junction and a magnetic junction situated in a close proximity to the Josephson junction. The two junctions may be vertically integrated. The magnetic junction has at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween, to form a spin valve or pseudo-spin valve. A magnetization direction of a magnetic layer with lower coercive force can be rotated with respect to the larger coercive force magnetic layer(s). Magnetic fields produced by appropriately configured control lines carrying electric current, or spin-polarized current through the magnetic junction, can result in rotation. The magnetic junction influences the Josephson critical current of the Josephson junction, leading to distinct values of critical current which can serve as digital logic states. The so obtained memory cell can be integrated into the large arrays containing a plurality of the cells, to enable the selective READ and WRITE operations.
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
H10N 60/84 - Moyens de commutation entre les états supraconducteur et normal
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G01R 33/035 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs supraconducteurs
G01R 33/12 - Mesure de propriétés magnétiques des articles ou échantillons de solides ou de fluides
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
G11C 11/18 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des dispositifs à effet Hall
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 7/10 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p. ex. circuits de commande E/S de données, mémoires tampon de données E/S
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
19.
System and method for cryogenic optoelectronic data link
Center for Technology Licensing at Cornell University (USA)
The Trustees of Columbia University in the City of New York (USA)
Inventeur(s)
Vernik, Igor V.
Mukhanov, Oleg A.
Kadin, Alan M.
Phare, Christopher T.
Lipson, Michal
Bergman, Keren
Abrégé
A cryogenic optoelectronic data link, comprising a sending module operating at a cryogenic temperature less than 100 K. An ultrasensitive electro-optic modulator, sensitive to input voltages of less than 10 mV, may include at least one optically active layer of graphene, which may be part of a microscale resonator, which in turn may be integrated with an optical waveguide or an optical fiber. The optoelectronic data link enables optical output of weak electrical signals from superconducting or other cryogenic electronic devices in either digital or analog form. The modulator may be integrated on the same chip as the cryogenic electrical devices. A plurality of cryogenic electrical devices may generate a plurality of electrical signals, each coupled to its own modulator. The plurality of modulators may be resonant at different frequencies, and coupled to a common optical output line to transmit a combined wavelength-division-multiplexed (WDM) optical signal.
H04B 10/80 - Aspects optiques concernant l’utilisation de la transmission optique pour des applications spécifiques non prévues dans les groupes , p. ex. alimentation par faisceau optique ou transmission optique dans l’eau
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
Quantum computing systems require methods to control energies of qubits and couplers for quantum operations. Flux biasing of qubits and quantum couplers is provided for a superconducting quantum computer using single-flux-quantum (SFQ) technology. This method is applicable to a wide range of superconducting qubit structures and couplers, including transmons, fluxoniums, flux qubits, phase qubits and other superconducting qubits. This method enables arbitrary-amplitude time-varying flux biasing of qubits and couplers, due to a sequence of high-speed SFQ pulses. Several preferred embodiments are disclosed which provide high-fidelity control of fast single-qubit and multi-qubit operations.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
26.
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
G01R 33/035 - Mesure de la direction ou de l'intensité de champs magnétiques ou de flux magnétiques en utilisant des dispositifs supraconducteurs
G01R 33/12 - Mesure de propriétés magnétiques des articles ou échantillons de solides ou de fluides
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
G11C 11/18 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des dispositifs à effet Hall
G11C 7/10 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p. ex. circuits de commande E/S de données, mémoires tampon de données E/S
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
27.
CRYOGENIC CLASSICAL SUPERCONDUCTING CIRCUITRY FOR ERROR CORRECTION IN QUANTUM COMPUTING
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
G06N 5/00 - Agencements informatiques utilisant des modèles fondés sur la connaissance
G06N 7/00 - Agencements informatiques fondés sur des modèles mathématiques spécifiques
G06N 20/20 - Techniques d’ensemble en apprentissage automatique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
28.
CRYOGENIC CLASSICAL SUPERCONDUCTING CIRCUITRY FOR ERROR CORRECTION IN QUANTUM COMPUTING
This patent document is directed to implementations of embodiments of an error correction module or gadget using a cryogenic classical superconducting circuit that can be used as a decoder of quantum error correcting codes correcting errors in quantum computing.
G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
G06N 5/00 - Agencements informatiques utilisant des modèles fondés sur la connaissance
G06N 7/00 - Agencements informatiques fondés sur des modèles mathématiques spécifiques
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
G06N 20/20 - Techniques d’ensemble en apprentissage automatique
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
29.
INTERCONNECTIONS BETWEEN QUANTUM COMPUTING MODULE AND NON-QUANTUM PROCESSING MODULES IN QUANTUM COMPUTING SYSTEMS
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
G06N 10/20 - Modèles d’informatique quantique, p. ex. circuits quantiques ou ordinateurs quantiques universels
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
Superconducting nanowire single photon detectors have recently been developed for a wide range of applications, including imaging and communications. An improved detection system is disclosed, whereby the detectors are monolithically integrated on the same chip with Josephson junctions for control and data processing. This enables an enhanced data rate, thereby facilitating several new and improved applications. A preferred embodiment comprises integrated digital processing based on single-flux-quantum pulses. An integrated multilayer fabrication method for manufacturing these integrated detectors is also disclosed. Preferred examples of systems comprising such integrated nanowire photon detectors include a time-correlated single photon counter, a quantum random number generator, an integrated single-photon imaging array, a sensitive digital communication receiver, and quantum-key distribution for a quantum communication system.
H01L 39/10 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails caractérisés par les moyens de commutation
32.
INTERCONNECTIONS BETWEEN QUANTUM COMPUTING MODULE AND NON-QUANTUM PROCESSING MODULES IN QUANTUM COMPUTING SYSTEMS
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
33.
INTERCONNECTIONS BETWEEN QUANTUM COMPUTING MODULE AND NON-QUANTUM PROCESSING MODULES IN QUANTUM COMPUTING SYSTEMS
The technology disclosed in this patent document can be implemented to combine quantum computing, classical qubit control/readout, and classical digital computing in a scalable computing system based on superconducting qubits and special interconnection designs for connecting hardware components within a multi-stage cryogenic system to provide fast communications between the quantum computing module and its controller while allowing efficient management of wiring with other modules.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
The technology disclosed in this patent document can be implemented to combine quantum computing and classical digital computing in a scalable computing system based on superconducting qubits using Josephson junctions that exhibit low dissipation long coherence times and can be fabricated with well-developed integrated circuit fabrication techniques. More specifically, the disclosed technology can be implemented by using two radio frequency (RF) superconducting quantum interference device (SQUID) circuits coupled in balance to preserve general symmetry and form a quantum readout circuit for reading and digitizing a superconducting qubit state with improved readout fidelity and sensitivity.
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
37.
System and method for superconducting multi-chip module
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 31/0256 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails caractérisés par leurs corps semi-conducteurs caractérisés par les matériaux
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 ?A/µm2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
Materials and methods are disclosed for fabricating superconducting integrated circuits for quantum computing at millikelvin temperatures, comprising both quantum circuits and classical control circuits, which may be located on the same integrated circuit or on different chips of a multi-chip module. The materials may include components that reduce defect densities and increase quantum coherence times. Multilayer fabrication techniques provide low-power and a path to large scale computing systems. An integrated circuit system for quantum computing is provided, comprising: a substrate; a kinetic inductance layer having a kinetic inductance of at least 5 pH/square; a plurality of stacked planarized superconducting layers and intervening insulating layers, formed into a plurality of Josephson junctions having a critical current of less than 100 μA/µm2; and a resistive layer that remains non-superconducting at a temperature below 1 K, configured to damp the plurality of Josephson junctions.
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
A system and method are disclosed for a superconducting traveling-wave parametric amplifier (TWPA) with improved control and performance. In a preferred embodiment, the amplifier comprises an integrated array of symmetric rf-SQUIDs in a transmission line structure. A device was fabricated using niobium superconducting integrated circuits, and confirmed predicted performance, with a maximum gain up to 17 dB and a bandwidth of 4 GHz. A similar device can be applied as a low-noise, low-dissipation microwave amplifier for output from a superconducting quantum computer, or as a preamplifier, switch, or frequency converter for a sensitive microwave receiver, or as an output amplifier for a frequency-multiplexed superconducting detector array.
H03F 19/00 - Amplificateurs utilisant les effets de supraconductivité
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H03F 7/02 - Amplificateurs paramétriques utilisant un élément à inductance variableAmplificateurs paramétriques utilisant un élément à perméabilité variable
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H01B 12/02 - Conducteurs, câbles ou lignes de transmission supraconducteurs ou hyperconducteurs caractérisés par leurs formes
H01B 12/16 - Conducteurs, câbles ou lignes de transmission supraconducteurs ou hyperconducteurs caractérisés par le refroidissement
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
G11C 11/18 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des dispositifs à effet Hall
G01R 33/12 - Mesure de propriétés magnétiques des articles ou échantillons de solides ou de fluides
G11C 7/10 - Dispositions d'interface d'entrée/sortie [E/S, I/O] de données, p. ex. circuits de commande E/S de données, mémoires tampon de données E/S
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
44.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
45.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
A system and method are disclosed for a superconducting traveling-wave parametric amplifier (TWPA) with improved control and performance. In a preferred embodiment, the amplifier comprises an integrated array of symmetric rf-SQUIDs in a transmission line structure. A device was fabricated using niobium superconducting integrated circuits, and confirmed predicted performance, with a maximum gain up to 17 dB and a bandwidth of 4 GHz. A similar device can be applied as a low-noise, low-dissipation microwave amplifier for output from a superconducting quantum computer, or as a preamplifier, switch, or frequency converter for a sensitive microwave receiver, or as an output amplifier for a frequency-multiplexed superconducting detector array.
H03F 19/00 - Amplificateurs utilisant les effets de supraconductivité
G06N 10/00 - Informatique quantique, c.-à-d. traitement de l’information fondé sur des phénomènes de mécanique quantique
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H03F 7/02 - Amplificateurs paramétriques utilisant un élément à inductance variableAmplificateurs paramétriques utilisant un élément à perméabilité variable
47.
Superconducting devices with ferromagnetic barrier junctions
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
A system and method to convert a wideband optical signal to a multi-bit digital electrical signal using a superconducting integrated circuit. In a preferred embodiment, the optical signal modulates the phase (i.e., adjusts the timing) of a sequence of single-flux-quantum voltage pulses. The optoelectronic modulator may comprise an optically tunable Josephson junction, superconducting inductor, or bolometric detector, with switching speeds approaching 100 ps or less. The optical signal may comprise a plurality of optical signals such as a wavelength-division multiplexed signal. The optical-to-digital converter may be applied to high-speed digital communication switches, broadband digital input/output for superconducting or quantum computing, and control/readout of detector arrays.
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 31/0256 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails caractérisés par leurs corps semi-conducteurs caractérisés par les matériaux
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
50.
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
51.
Superconducting magnetic field programmable gate array
A superconducting field programmable gate array (SuperFPGA) apparatus for implementing a superconducting electronic circuit includes a superconducting logic core that includes a plurality of superconducting single flux quantum configurable logic blocks having regular Josephson junctions and inductors that are interconnectible to each other and to input/output terminals of the superconducting electronic circuit. The SuperFPGA apparatus also includes a superconducting routing network, a zero-static-power dissipation biasing network, magnetic Josephson junctions, and a magnetic Josephson junction programming layer.
H03K 19/17736 - Détails structurels des ressources de routage
G06F 1/04 - Génération ou distribution de signaux d'horloge ou de signaux dérivés directement de ceux-ci
H03K 19/17728 - Blocs logiques reconfigurables, p. ex. tables de consultation
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
52.
Method for electrically interconnecting at least two substrates and multichip module
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 25/04 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés
H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
53.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
09 - Appareils et instruments scientifiques et électriques
Produits et services
Circuit boards; Circuit boards provided with integrated circuits; Computer central processing units; Computer chips; Computer chipset for use in transmitting data to and from a central processing unit; Computer circuit boards; Computer expansion boards; Computer hardware; Computer hardware and computer peripheral devices; Computer hardware and computer peripherals; Computer hardware and peripheral devices; Computer hardware and peripherals; Computer hardware and peripherals therefor; Computer hardware for quantum computing, superconducting computers, interfaces for quantum computers, interfaces for superconducting computers, controlling operational conditions of quantum computing devices, controlling operational conditions of superconducting computing devices, data storage and retrieval for quantum computing, data storage and retrieval for superconducting computing, high speed communications, optical communications with cryogenic environments; Computer interface boards; Computer memory devices; Computer memory hardware; Computer mounts; Computer peripheral apparatus; Computer peripheral devices; Computer peripheral equipment; Computer peripherals; Computer peripherals and parts thereof; Computer software and hardware for quantum computing, superconducting computers, interfaces for quantum computers, interfaces for superconducting computers, controlling operational conditions of quantum computing devices, controlling operational conditions of superconducting computing devices, data storage and retrieval for quantum computing, data storage and retrieval for superconducting computing, high speed communications, optical communications with cryogenic environments; Computers; Computers and computer hardware; Computers and computer peripherals; Computers and instructional manuals sold as a unit; Electronic circuits for controlling quantum computers, interfacing with quantum computational devices and systems, data storage and retrieval for quantum computing devices, data storage and retrieval for superconducting computing devices, environmental control of superconducting computer systems, environmental control of quantum computer systems; Electronic components in the nature of superconducting logic, superconducting computers, support circuits for superconducting logic, clock generators for superconducting logic, controls for superconducting systems, controls for quantum computing systems, quantum computing chips, quantum computers, support circuits for quantum computers, interfaces for quantum computers; Electronic controllers for controlling quantum computing systems, controlling superconducting computer systems, interfaces between quantum computing devices and logic computing devices; Electronic indicator panels; Electronic memories; Power cables; Power connectors; Power controllers; Power supplies for computer systems, computer racks, server racks, superconducting computer systems, quantum computing systems; Scientific instrumentation for measuring magnetic fields, environmental conditions in a cryogenic computing environment, voltage; Backplanes; Central processing unit (CPU) clocks; Central processing units (CPU); Chipsets; Clock generators for computers; Communications computers; Computer hardware for high-speed processing and storage of data using multiple CPU's; Connectors for electronic circuits; Electric and electronic circuits; Electric or electronic sensors for sensing magnetic fields, sensing environmental conditions in a cryogenic computing environment; Electrical and electronic connectors; Electronic circuit board; Electronic circuits; Electronic computers; Electronic components for computers; Electronic control circuits for controlling quantum computers, interfacing with quantum computational devices and systems, environmental control of superconducting computer systems, environmental control of quantum computer systems; Electronic integrated circuits; Integrated circuit cards and components; Integrated circuit module; Integrated circuit modules; Integrated circuits; Interfaces and peripheral devices for computers; Interfaces for computers; Logic circuits; Memories for use with computers; Microprocessors; Mounting racks for computer hardware; Multiprocessor chips; Semiconductor wafers; Sensor chips for scientific use; Wafers for integrated circuits
55.
System and method for cryogenic hybrid technology computing and memory
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
56.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
57.
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers.
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
58.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
59.
Double-masking technique for increasing fabrication yield in superconducting electronics
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/12 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails caractérisés par le matériau
60.
Superconductive multi-chip module for high speed digital circuits
An electrical module having electrically interconnecting substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
61.
Superconducting devices with ferromagnetic barrier junctions
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
62.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A system and method for high-speed, low-power cryogenic computing are presented, comprising ultrafast energy-efficient RSFQ superconducting computing circuits, and hybrid magnetic/superconducting memory arrays and interface circuits, operating together in the same cryogenic environment. An arithmetic logic unit and register file with an ultrafast asynchronous wave-pipelined datapath is also provided. The superconducting circuits may comprise inductive elements fabricated using both a high-inductance layer and a low-inductance layer. The memory cells may comprise superconducting tunnel junctions that incorporate magnetic layers. Alternatively, the memory cells may comprise superconducting spin transfer magnetic devices (such as orthogonal spin transfer and spin-Hall effect devices). Together, these technologies may enable the production of an advanced superconducting computer that operates at clock speeds up to 100 GHz.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
64.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H01B 12/00 - Conducteurs, câbles ou lignes de transmission supraconducteurs ou hyperconducteurs
65.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H01B 12/02 - Conducteurs, câbles ou lignes de transmission supraconducteurs ou hyperconducteurs caractérisés par leurs formes
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
H01B 12/16 - Conducteurs, câbles ou lignes de transmission supraconducteurs ou hyperconducteurs caractérisés par le refroidissement
66.
Double-masking technique for increasing fabrication yield in superconducting electronics
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/12 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails caractérisés par le matériau
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
67.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 39/00 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
68.
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
A method for increasing the integration level of superconducting electronic circuits, comprising fabricating a series of planarized electrically conductive layers patterned into wiring, separated by planarized insulating layers, with vias communicating between the conductive layers. Contrary to the standard sequence of patterning from the bottom up, the pattern of vias in at least one insulating layer is formed prior to the pattern of wiring in the underlying conductive layer. This enables a reduction in the number of planarization steps, leading to a fabrication process which is faster and more reliable. In a preferred embodiment, the superconductor is niobium and the insulator is silicon dioxide. This method can provide 10 or more wiring layers in a complex integrated circuit, and is compatible with non-planarized circuits placed above the planarized wiring layers.
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 27/18 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants présentant un effet de supraconductivité
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
69.
Superconductive multi-chip module for high speed digital circuits
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
H05K 1/16 - Circuits imprimés comprenant des composants électriques imprimés incorporés, p. ex. une résistance, un condensateur, une inductance imprimés
70.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 39/02 - Dispositifs utilisant la supraconductivité ou l'hyperconductivité; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives - Détails
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
73.
Low-power biasing networks for superconducting integrated circuits
A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 27/00 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun
75.
Double-masking technique for increasing fabrication yield in superconducting electronics
An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
76.
System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 27/00 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun
77.
Superconducting devices with ferromagnetic barrier junctions
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 39/24 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement des dispositifs couverts par ou de leurs parties constitutives
78.
High linearity superconducting radio frequency magnetic field detector
A superconducting quantum interference devices (SQUID) comprises a superconducting inductive loop with at least two Josephson junction, whereby a magnetic flux coupled into the inductive loop produces a modulated response up through radio frequencies. Series and parallel arrays of SQUIDs can increase the dynamic range, output, and linearity, while maintaining bandwidth. Several approaches to achieving a linear triangle-wave transfer function are presented, including harmonic superposition of SQUID cells, differential serial arrays with magnetic frustration, and a novel bi-SQUID cell comprised of a nonlinear Josephson inductance shunting the linear coupling inductance. Total harmonic distortion of less than −120 dB can be achieved in optimum cases.
A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
Digital mixers which permit mixing of asynchronous signals may be constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
H04B 7/216 - Accès multiple par répartition de codage ou par étalement de spectre
H04B 10/00 - Systèmes de transmission utilisant des ondes électromagnétiques autres que les ondes hertziennes, p. ex. les infrarouges, la lumière visible ou ultraviolette, ou utilisant des radiations corpusculaires, p. ex. les communications quantiques
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H03K 19/21 - Circuits OU EXCLUSIF, c.-à-d. donnant un signal de sortie si un signal n'existe qu'à une seule entréeCircuits à COÏNCIDENCES, c.-à-d. ne donnant un signal de sortie que si tous les signaux d'entrée sont identiques
H03K 3/289 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de transistors bipolaires avec réaction positive interne ou externe utilisant un moyen de réaction autre qu'un transformateur utilisant au moins deux transistors couplés de façon que l'entrée de l'un dérive de la sortie de l'autre, p. ex. multivibrateur bistable du type primaire-secondaire
H03K 17/00 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts
G06F 15/00 - Calculateurs numériques en généralÉquipement de traitement de données en général
H03B 19/00 - Production d'oscillations par multiplication ou division de la fréquence d'un signal issu d'une source séparée, n'utilisant pas de réaction positive
H03B 15/00 - Production d'oscillations par effets galvanomagnétiques, p. ex. dispositifs à effet Hall, dispositifs utilisant les effets de spin de transfert, dispositifs utilisant la magnétorésistance géante, ou par effets de supraconduction
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
G11C 11/00 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants
H01L 39/22 - Dispositifs comportant une jonction de matériaux différents, p.ex. dispositifs à effet Josephson
H04L 25/03 - Réseaux de mise en forme pour émetteur ou récepteur, p. ex. réseaux de mise en forme adaptatifs
H04L 25/49 - Circuits d'émissionCircuits de réception à conversion de code au transmetteurCircuits d'émissionCircuits de réception à pré-distorsionCircuits d'émissionCircuits de réception à insertion d'intervalles morts pour obtenir un spectre de fréquence désiréCircuits d'émissionCircuits de réception à au moins trois niveaux d'amplitude
H04L 27/06 - Circuits de démodulationCircuits récepteurs
H04K 1/02 - Communications secrètes par addition d'un second signal pour rendre le signal désiré inintelligible
n states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
H03B 19/00 - Production d'oscillations par multiplication ou division de la fréquence d'un signal issu d'une source séparée, n'utilisant pas de réaction positive
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
83.
Superconducting circuit for high-speed lookup table
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
H03B 19/00 - Production d'oscillations par multiplication ou division de la fréquence d'un signal issu d'une source séparée, n'utilisant pas de réaction positive
85.
Double-masking technique for increasing fabrication yield in superconducting electronics
A new technique is presented for improving the microfabrication yield of Josephson junctions in superconducting integrated circuits. This is based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so as to a) maximize adhesion between the resist and the underlying superconducting layer, b) be etch-compatible with the underlying superconducting layer, and c) be insoluble in the resist and anodization processing chemistries. In a preferred embodiment of the invention, the superconductor is niobium, the material on top of this is silicon dioxide, and the top layer is conventional photoresist or electron-beam resist. The use of this combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits due to increase in junction uniformity and reduction in defect density. An additional improvement over the prior art involves the replacement of a wet-etch step with a dry etch more compatible with microlithography.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
86.
Superconducting circuit for high-speed lookup table
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
G11C 11/44 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des éléments supraconducteurs, p. ex. des cryotrons
Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.
N states that can be represented by the digital word. The RSFQ logic elements utilize Josephson junctions which operate in the superconducting temperature domain.
H03K 19/195 - Circuits logiques, c.-à-d. ayant au moins deux entrées agissant sur une sortieCircuits d'inversion utilisant des éléments spécifiés utilisant des dispositifs supraconducteurs
H03K 3/38 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs supraconducteurs
