Systems and methods for performing 3D photoresist profile generation for a semiconductor device fabrication environment are discussed. The methods comprise receiving in a virtual fabrication environment a top contour mask and a bottom contour mask, creating a loading map using a subset of density information extracted from the top contour mask and the bottom contour mask, performing an etch operation using the loading map to generate the 3D photoresist profile, and outputting a result of the etch operation.
G05B 19/4093 - Commande numérique [CN], c.-à-d. machines fonctionnant automatiquement, en particulier machines-outils, p. ex. dans un milieu de fabrication industriel, afin d'effectuer un positionnement, un mouvement ou des actions coordonnées au moyen de données d'un programme sous forme numérique caractérisée par la programmation de pièce, p. ex. introduction d'une information géométrique dérivée d'un dessin technique, combinaison de cette information avec l'information d'usinage et de matériau pour obtenir une information de commande, appelée programme de pièce, pour la machine à commande numérique [CN]
2.
SYSTEM AND METHOD FOR PERFORMING PROCESS MODEL CALIBRATION IN A VIRTUAL SEMICONDUCTOR DEVICE FABRICATION ENVIRONMENT
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for performing key parameter identification, process model calibration and variability analysis is discussed.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 3/04815 - Interaction s’effectuant dans un environnement basé sur des métaphores ou des objets avec un affichage tridimensionnel, p. ex. modification du point de vue de l’utilisateur par rapport à l’environnement ou l’objet
G06F 3/04847 - Techniques d’interaction pour la commande des valeurs des paramètres, p. ex. interaction avec des règles ou des cadrans
G06T 19/20 - Édition d'images tridimensionnelles [3D], p. ex. modification de formes ou de couleurs, alignement d'objets ou positionnements de parties
3.
SYSTEM AND METHOD FOR PERFORMING DEFORMATION AND STRESS ANALYSIS MODELING IN A VIRTUAL FABRICATION ENVIRONMENT
Embodiments of the present invention provide the ability to perform deformation and stress analysis modeling in a virtual fabrication environment. More particularly, embodiments enable the virtual fabrication environment to model deformation and stress analysis directly from a voxel-based model without requiring generation of an interface conforming mesh. Stress fields for semiconductor device structures may be determined at designated points in the process sequence used to fabricate the semiconductor device.
Systems and methods for performing 3D photoresist profile generation for a semiconductor device fabrication environment are discussed. The methods comprise receiving in a virtual fabrication environment a top contour mask and a bottom contour mask, creating a loading map using a subset of density information extracted from the top contour mask and the bottom contour mask, performing an etch operation using the loading map to generate the 3D photoresist profile, and outputting a result of the etch operation.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
5.
SYSTEMS AND METHODS FOR DETERMINING SPECIFICATION LIMITS IN A SEMICONDUCTOR DEVICE VIRTUAL FABRICATION ENVIRONMENT
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for determining specification limits using a fitting algorithm for non-normally distributed virtual metrology data is discussed.
Systems and methods for performing local Critical Dimension Uniformity (CDU) modeling in a virtual fabrication environment are discussed. More particularly, local CD variance is replicated in the virtual fabrication environment in order to produce a CDU mask that can be used during a virtual fabrication sequence to produce more accurate results reflecting the CD variance of features that occurs in a pattern for a semiconductor device being physically fabricated.
G03F 1/70 - Adaptation du tracé ou de la conception de base du masque aux exigences du procédé lithographique, p. ex. correction par deuxième itération d'un motif de masque pour l'imagerie
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
7.
SYSTEM AND METHOD FOR PERFORMING HOLE PROFILE MODELING IN A VIRTUAL FABRICATION ENVIRONMENT
Systems and methods for performing hole profile modeling in a semiconductor device virtual fabrication environment are discussed. More particularly, hole profiling modeling may be performed for complicated holes used in fabricating semiconductor devices to support DOEs to optimize the fabrication process.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
Systems and methods for performing reflow modeling in a virtual fabrication environment are discussed. More particularly, the virtual fabrication environment may determine metal or material “reflow” or movement during fabrication of a semiconductor device structure. A reflow modeling step with user-specified parameters may be inserted into a process sequence used during fabrication of the semiconductor device structure.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
9.
System and method for performing depth-dependent oxidation modeling in a virtual fabrication environment
Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment are discussed. More particularly, a virtual fabrication environment models, as part of a process sequence, oxidant dispersion in a depth-dependent manner and simulates the subsequent oxidation reaction based on the determined oxidant thickness along an air/silicon interface. Further the virtual fabrication environment performs depth-dependent etch modeling as part of a process sequence to determine etchant concentration and simulate the etching of material along an air/material interface.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 30/392 - Conception de plans ou d’agencements, p. ex. partitionnement ou positionnement
Embodiments of the present invention provide the ability to perform deformation and stress analysis modeling in a virtual fabrication environment. More particularly, embodiments enable the virtual fabrication environment to model deformation and stress analysis directly from a voxel-based model without requiring generation of an interface conforming mesh. Stress fields for semiconductor device structures may be determined at designated points in the process sequence used to fabricate the semiconductor device.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
G06F 119/14 - Analyse des forces ou optimisation des forces, p. ex. forces statiques ou dynamiques
G06F 111/18 - Détails concernant les techniques de conception assistée par ordinateur utilisant la réalité virtuelle ou augmentée
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for performing key parameter identification, process model calibration and variability analysis is discussed.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 3/04815 - Interaction s’effectuant dans un environnement basé sur des métaphores ou des objets avec un affichage tridimensionnel, p. ex. modification du point de vue de l’utilisateur par rapport à l’environnement ou l’objet
G06T 19/20 - Édition d'images tridimensionnelles [3D], p. ex. modification de formes ou de couleurs, alignement d'objets ou positionnements de parties
G06F 3/04847 - Techniques d’interaction pour la commande des valeurs des paramètres, p. ex. interaction avec des règles ou des cadrans
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for determining specification limits using a fitting algorithm for non-normally distributed virtual metrology data is discussed.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
Systems and methods for performing local Critical Dimension Uniformity (CDU) modeling in a virtual fabrication environment are discussed. More particularly, local CD variance is replicated in the virtual fabrication environment in order to produce a CDU mask that can be used during a virtual fabrication sequence to produce more accurate results reflecting the CD variance of features that occurs in a pattern for a semiconductor device being physically fabricated.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 119/18 - Analyse de fabricabilité ou optimisation de fabricabilité
G06F 119/22 - Analyse de rendement ou optimisation de rendement
14.
System and method for predictive 3-D virtual fabrication
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology measurement data from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.
09 - Appareils et instruments scientifiques et électriques
Produits et services
Computer software comprising a library of 3D models and
design tools for use in computer-aided design and
development and computer-aided manufacturing of
micro-electro-mechanical systems (MEMS).
Systems and methods for performing depth-dependent oxidation modeling and depth-dependent etch modeling in a virtual fabrication environment are discussed. More particularly, a virtual fabrication environment models, as part of a process sequence, oxidant dispersion in a depth-dependent manner and simulates the subsequent oxidation reaction based on the determined oxidant thickness along an air/silicon interface. Further the virtual fabrication environment performs depth-dependent etch modeling as part of a process sequence to determine etchant concentration and simulate the etching of material along an air/material interface.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 30/392 - Conception de plans ou d’agencements, p. ex. partitionnement ou positionnement
Systems and methods for performing reflow modeling in a virtual fabrication environment are discussed. More particularly, the virtual fabrication environment may determine metal or material "reflow" or movement during fabrication of a semiconductor device structure. A reflow modeling step with user-specified parameters may be inserted into a process sequence used during fabrication of the semiconductor device structure.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
G06F 111/18 - Détails concernant les techniques de conception assistée par ordinateur utilisant la réalité virtuelle ou augmentée
G06F 115/00 - Détails concernant le type du circuit
G06F 119/18 - Analyse de fabricabilité ou optimisation de fabricabilité
A six transistor SRAM memory cell design is discussed. An SRAM memory cell includes criss-crossed transistors in cross-coupled inverters to achieve a more compact form factor and simplify fabrication.
G11C 11/412 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules avec réaction positive, c.-à-d. des cellules ne nécessitant pas de rafraîchissement ou de régénération de la charge, p. ex. multivibrateur bistable, déclencheur de Schmitt utilisant uniquement des transistors à effet de champ
H01L 27/11 - Structures de mémoires statiques à accès aléatoire
G11C 11/417 - Circuits auxiliaires, p. ex. pour l'adressage, le décodage, la commande, l'écriture, la lecture, la synchronisation ou la réduction de la consommation pour des cellules de mémoire du type à effet de champ
09 - Appareils et instruments scientifiques et électriques
Produits et services
Recorded computer software for use with and operation of a thermal plasma simulation tool for simulation of chemically reactive, non-equilibrium, multi-species, multi-temperature plasma discharge phenomena and the analysis, design, and optimization of thermal plasmas for manufacturing and plasma coatings uses in the aerospace, automotive, electrical device, solar cell, and semiconductor industries
23.
System and method for multi-material mesh generation from fill-fraction voxel data
Systems and methods for multi-material mesh generation from fill-fraction voxel model data are discussed. Voxel representations of model data are used to generate robust and accurate multi-material meshes. More particularly, a mesh generation pipeline in a virtual fabrication environment is described that robustly generates high-quality triangle surface and tetrahedral volume meshes from multi-material fill-fraction voxel data. Multi-material topology is accurately captured while preserving characteristic feature edges of the model.
G06F 30/3308 - Vérification de la conception, p. ex. simulation fonctionnelle ou vérification du modèle par simulation
G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for performing process window optimization is discussed.
Systems and methods for creating 3D MEMS device models from a 2D polygonal description are described. Embodiments enable the identification of corresponding 3D model components from a library of parameterized MEMS model components using 2D polygonal descriptions of a MEMS device. Embodiments further enable the inclusion of meshed components into created MEMS device models.
G06F 30/17 - Conception mécanique paramétrique ou variationnelle
G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]
G06F 30/12 - CAO géométrique caractérisée par des moyens d’entrée spécialement adaptés à la CAO, p. ex. interfaces utilisateur graphiques [UIG] spécialement adaptées à la CAO
26.
System and method for determining dimensional range of repairable defects by deposition and etching in a virtual fabrication environment
A virtual fabrication environment for semiconductor device fabrication that determines a lowest lithography exposure dose range in which one or more defects are still reparable by deposition and etch operations is discussed. Further techniques for repairing line edge roughness caused by lithography are described.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
G06T 17/10 - Description de volumes, p. ex. de cylindres, de cubes ou utilisant la GSC [géométrie solide constructive]
G03F 7/00 - Production par voie photomécanique, p. ex. photolithographique, de surfaces texturées, p. ex. surfaces impriméesMatériaux à cet effet, p. ex. comportant des photoréservesAppareillages spécialement adaptés à cet effet
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.
Systems and methods for multi-material mesh generation from fill-fraction voxel model data are discussed. Voxel representations of model data are used to generate robust and accurate multi-material meshes. More particularly, a mesh generation pipeline in a virtual fabrication environment is described that robustly generates high-quality triangle surface and tetrahedral volume meshes from multi-material fill- fraction voxel data. Multi- material topology is accurately captured while preserving characteristic feature edges of the model.
Systems and methods for creating 3D compact MEMS device models from a 2D polygonal description are described. Embodiments enable the identification of corresponding 3D model components from a library of parameterized MEMS model components using 2D polygonal descriptions of a MEMS device.
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software for designing and manufacturing
semiconductors and micro-electro-mechanical systems (MEMS). Consultation services in the field of software for designing
and manufacturing semiconductors and
micro-electro-mechanical systems (MEMS); technological
consultation in the field of semiconductors and
micro-electro-mechanical systems (MEMS).
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software for designing and manufacturing
semiconductors and micro-electro-mechanical systems (MEMS). Consultation services in the field of software for designing
and manufacturing semiconductors and
micro-electro-mechanical systems (MEMS); technology
consultation in the field of semiconductors and
micro-electro-mechanical systems (MEMS).
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software for designing and manufacturing
semiconductors and micro-electro-mechanical systems (MEMS). Consultation services in the field of software for designing
and manufacturing semiconductors and
micro-electro-mechanical systems (MEMS); technology
consultation in the field of semiconductors and
micro-electro-mechanical systems (MEMS).
34.
System and method for key parameter identification, process model calibration and variability analysis in a virtual semiconductor device fabrication environment
A virtual fabrication environment for semiconductor device fabrication that includes an analytics module for performing key parameter identification, process model calibration and variability analysis is discussed.
G06F 30/398 - Vérification ou optimisation de la conception, p. ex. par vérification des règles de conception [DRC], vérification de correspondance entre géométrie et schéma [LVS] ou par les méthodes à éléments finis [MEF]
G06F 3/0481 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] fondées sur des propriétés spécifiques de l’objet d’interaction affiché ou sur un environnement basé sur les métaphores, p. ex. interaction avec des éléments du bureau telles les fenêtres ou les icônes, ou avec l’aide d’un curseur changeant de comportement ou d’aspect
G06T 19/20 - Édition d'images tridimensionnelles [3D], p. ex. modification de formes ou de couleurs, alignement d'objets ou positionnements de parties
G06F 3/0484 - Techniques d’interaction fondées sur les interfaces utilisateur graphiques [GUI] pour la commande de fonctions ou d’opérations spécifiques, p. ex. sélection ou transformation d’un objet, d’une image ou d’un élément de texte affiché, détermination d’une valeur de paramètre ou sélection d’une plage de valeurs
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Consultation services in the field of software for designing and manufacturing semiconductors and micro-electro-mechanical systems (MEMS); Technology consultation in the field of semiconductors and micro-electro-mechanical systems (MEMS)
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Consultation services in the field of software for designing and manufacturing semiconductors and micro-electro-mechanical systems (MEMS); Technology consultation in the field of semiconductors and micro-electro-mechanical systems (MEMS)
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Consultation services in the field of software for designing and manufacturing semiconductors and micro-electro-mechanical systems (MEMS); Technology consultation in the field of semiconductors and micro-electro-mechanical systems (MEMS)
41.
SYSTEM AND METHOD FOR ELECTRICAL BEHAVIOR MODELING IN A 3D VIRTUAL FABRICATION ENVIRONMENT
Modeling of electrical behavior during the virtual fabrication of a semiconductor device structure is discussed. Electrical behavior occurring in a designated region of a semiconductor device structure may be determined during the virtual fabrication process. For example, resistance or capacitance values may be determined within a modeling domain of interest.
Modeling of electrical behavior during the virtual fabrication of a semiconductor device structure is discussed. Electrical behavior occurring in a designated region of a semiconductor device structure may be determined during the virtual fabrication process. For example, resistance or capacitance values may be determined within a modeling domain of interest.
G06F 30/367 - Vérification de la conception, p. ex. par simulation, programme de simulation avec emphase de circuit intégré [SPICE], méthodes directes ou de relaxation
G06F 30/23 - Optimisation, vérification ou simulation de l’objet conçu utilisant les méthodes des éléments finis [MEF] ou les méthodes à différences finies [MDF]
G06F 30/39 - Conception de circuits au niveau physique
G06F 119/18 - Analyse de fabricabilité ou optimisation de fabricabilité
The modeling of a DSA step within a virtual fabrication process sequence for a semiconductor device structure is discussed. A 3D model is created by the virtual fabrication that represents and depicts the possible variation that can result from applying the DSA step as part of the larger fabrication sequence for the semiconductor device structure of interest. Embodiments capture the relevant behavior caused by polymer segregation into separate domains thereby allowing the modeling of the DSA step to take place with a speed appropriate for a virtual fabrication flow.
G03F 7/00 - Production par voie photomécanique, p. ex. photolithographique, de surfaces texturées, p. ex. surfaces impriméesMatériaux à cet effet, p. ex. comportant des photoréservesAppareillages spécialement adaptés à cet effet
09 - Appareils et instruments scientifiques et électriques
Produits et services
Computer software for use with and operation of a thermal plasma simulation tool for the analysis, design, and optimization of thermal plasmas, parallel, multiprocessor modeling of three dimensional systems with fluid flow and electromagnetic physics, equilibrium gas kinetics, radiation transport, solid surface conjugate heat transfer and solid surface material/vapor ablation for use in the welding, spark-plug igniters, plasma spraying and coating, HID lamps and circuit breakers industries
46.
Modeling pattern dependent effects for a 3-D virtual semiconductor fabrication environment
Improving semiconductor device fabrication by enabling the identification and modeling of pattern dependent effects of fabrication processes is discussed. In one embodiment a local mask is generated from a 3-D model of a semiconductor device structure that was created in a 3-D virtual semiconductor fabrication environment from 2-D design layout data and a fabrication process sequence. The local mask is combined with a global mask based on the original design layout data to create a combined mask. The combined mask is convolved with at least one proximity function to generate a loading map which may be used to modify the behavior of one or more processes in the process sequence. This behavior modification enables the 3-D virtual semiconductor fabrication environment to deliver more accurate 3-D models that better predict the 3-D device structure when performing the virtual semiconductor device fabrication that serves as a prelude to physical fabrication.
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.
A virtual fabrication environment for semiconductor device structure development is discussed that enables the use of a selective epitaxy process to virtually model epitaxial growth of a crystalline material layer. The epitaxial growth occurs on a crystalline substrate surface of a virtually fabricated model device structure. A surface growth rate may be defined over possible 3D surface orientations of the virtually fabricated device structure by modeling the growth rates of the three major families of crystal planes. Growth rates along neighboring non-crystalline material may also be modeled.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale
50.
DESIGN RULE CHECKS IN 3-D VIRTUAL FABRICATION ENVIRONMENT
A virtual fabrication environment that enables 3D Design Rule Checks (DRCs) or Optical Rule Checks (ORCs) on 3D structural models of semiconductor devices to be performed is discussed. The virtual fabrication environment may perform 3D design rule checks, such as minimum line width, minimum space between features, and minimum contact area between adjacent materials, directly in 3D without making assumptions about the translation from 2D design data to a 3D structure effected by an integrated process flow for semiconductor devices. The required number of 3D design rule checks may therefore be significantly reduced from the number of design rule checks required in 2D environments. Embodiments may also perform the 3D design rule checks for a range of statistical variations in process and design parameters.
A virtual fabrication environment for semiconductor device structure development is discussed. The insertion of a multi-etch process step using material-specific behavioral parameters into a process sequence enables a multi-physics, multi- material etching process to be simulated using a suitable numerical technique. The multi-etch process step accurately and realistically captures a wide range of etch behavior and geometry to provide in a virtual fabrication system a semi-physical approach to modeling multi-material etches based on a small set of input parameters that characterize the etch behavior.
A virtual fabrication environment for semiconductor device structure development is discussed that enables the use of a selective epitaxy process to virtually model epitaxial growth of a crystalline material layer. The epitaxial growth occurs on a crystalline substrate surface of a virtually fabricated model device structure. A surface growth rate may be defined over possible 3D surface orientations of the virtually fabricated device structure by modeling the growth rates of the three major families of crystal planes. Growth rates along neighboring non-crystalline material may also be modeled.
A virtual fabrication environment for semiconductor device structures that includes the use of virtual metrology measurement data to optimize a virtual fabrication sequence is described. Further, calibration of the virtual fabrication environment is performed by comparing virtual metrology data generated from a virtual fabrication run with a subset of measurements performed in a physical fabrication environment. Additionally, virtual experiments conducted in the virtual fabrication environment of the present invention generate multiple device structure models using ranges of process and design parameter variations for an integrated process flow and design space of interest.
A virtual fabrication environment for semiconductor device structure development is discussed. The insertion of a multi-etch process step using material-specific behavioral parameters into a process sequence enables a multi-physics, multi-material etching process to be simulated using a suitable numerical technique. The multi-etch process step accurately and realistically captures a wide range of etch behavior and geometry to provide in a virtual fabrication system a semi-physical approach to modeling multi-material etches based on a small set of input parameters that characterize the etch behavior.
A virtual fabrication environment that enables 3D Design Rule Checks (DRCs) or Optical Rule Checks (ORCs) on 3D structural models of semiconductor devices to be performed is discussed. The virtual fabrication environment may perform 3D design rule checks, such as minimum line width, minimum space between features, and minimum contact area between adjacent materials, directly in 3D without making assumptions about the translation from 2D design data to a 3D structure effected by an integrated process flow for semiconductor devices. The required number of 3D design rule checks may therefore be significantly reduced from the number of design rule checks required in 2D environments. Embodiments may also perform the 3D design rule checks for a range of statistical variations in process and design parameters.
A 3-D multi-physics design environment ("3-D design environment") for designing and simulating multi-physics devices such as MEMS devices is discussed. The 3-D design environment is programmatically integrated with a system modeling environment that is suitable for system-level design and simulation of analog-signal ICs, mixed-signal ICs and multi-physics systems. A parameterized MEMS device model is created in a 3-D graphical view in the 3-D design environment using parameterized model components that are each associated with an underlying behavioral model. After the MEMS device model is completed, it may be exported to a system modeling environment without subjecting the model to preliminary finite element meshing.
A 3-D multi-physics design environment (“3-D design environment”) for designing and simulating multi-physics devices such as MEMS devices is discussed. The 3-D design environment is programmatically integrated with a system modeling environment that is suitable for system-level design and simulation of analog-signal ICs, mixed-signal ICs and multi-physics systems. A parameterized MEMS device model is created in a 3-D graphical view in the 3-D design environment using parameterized model components that are each associated with an underlying behavioral model. After the MEMS device model is completed, it may be exported to a system modeling environment without subjecting the model to preliminary finite element meshing.
09 - Appareils et instruments scientifiques et électriques
Produits et services
Computer software, namely, software and software design libraries for computer-aided design and computer-aided manufacturing for use in the fields of micro-systems-technology (MST), micro-electro-mechanical systems (MEMS), and micro-machining.
09 - Appareils et instruments scientifiques et électriques
Produits et services
Computer software comprising a library of 3D models and design tools for use in computer-aided design and development and computer-aided manufacturing of micro-electro-mechanical systems (MEMS)
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software, namely, software and software design libraries for use in the field of micro-electro-mechanical systems (MEMS). Design, development and consulting services for others in the field of micro-electro-mechanical systems (MEMS).
09 - Appareils et instruments scientifiques et électriques
42 - Services scientifiques, technologiques et industriels, recherche et conception
Produits et services
Computer software comprising a library of 3D models and design tools for use in computer-aided design and development and computer-aided manufacturing of micro-electro-mechanical systems (MEMS) Design, development and consulting services for others in the field of micro-electro-mechanical systems (MEMS)
