According to one embodiment, a semiconductor device includes a lead frame, a semiconductor chip, a lead terminal and a package. The package includes an upper surface, a lower surface, and first and second side surfaces between the upper surface and the lower surface. The first side surface has a first surface, a second surface and a third surface. The first surface is continuous with the upper surface and is provided in an oblique direction with respect to the upper surface. The second surface is continuous with the first surface and is provided in a direction parallel to the upper surface. The third surface is continuous with the second surface and is provided in a direction orthogonal to the upper surface. The lead terminal protrudes from the first side surface and does not protrude from the second side surface.
H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
2.
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE
A semiconductor device manufacturing method according to this embodiment includes forming a first insulation film, on a first face of a semiconductor substrate, such that a film thickness of the first insulation film at a step portion of a protrusion portion provided in a first region of the first face is thinner than a film thickness of the first insulation film at an upper surface of the protrusion portion or a film thickness of the first insulation film at a second region of the first face, the second region different from the first region. The manufacturing method includes removing part of the first insulation film using a mask material as a mask to form an opening portion of the first insulation film and a projection portion of the first insulation film. The manufacturing method includes removing the second insulation film together with part of the projection portion.
A semiconductor device according to an embodiment includes a first electrode, a semiconductor layer, a second electrode, a first insulating portion, and a second insulating portion. The semiconductor layer is provided on the first electrode. The second electrode is provided on the semiconductor layer and contains aluminum. The first insulating portion includes a first portion and a second portion. The first portion is provided between the semiconductor layer and an outer peripheral portion of the second electrode. The second portion is provided around the first portion along a first plane perpendicular to a first direction, the first direction being a direction from the first electrode toward the semiconductor layer, the second portion being provided with a protruding portion on an upper surface thereof. The second insulating portion is provided on the outer peripheral portion of the second electrode and on the second portion.
H10D 62/832 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé étant des matériaux du groupe IV comprenant deux éléments ou plus, p. ex. SiGe
H10D 64/62 - Électrodes couplées de manière ohmique à un semi-conducteur
A plurality of mesas includes a plurality of cell mesas, and a termination mesa. A plurality of trench structures includes a plurality of gate trench parts, and a first termination trench part. A width in a first direction of the first termination trench part is greater than a width in the first direction of the gate trench part. A lower end of the first termination trench part is positioned lower than a lower end of the gate trench part.
According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, and a conductor. The conductor includes first and second gate electrode portions, a first wiring portion, and first and second connection portions. The first connection portion is connected between a first end portion of the first gate electrode portion and an end portion of the first wiring portion. The second connection portion is connected between a second end portion of the second gate electrode portion and the end portion of the first wiring portion. In the second direction, a position of the first wiring portion is between a position of the first gate electrode portion and a position of the second gate electrode portion. The first connection portion and the second connection portion have inclined surfaces that are inclined with respect to the second direction and the third direction.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
According to one embodiment, a semiconductor device includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a gate electrode, and a third semiconductor layer. The first semiconductor layer contains Alx1Ga1-x1N (0≤x1<1). The second semiconductor layer is provided on the first semiconductor layer and contains Alx2Ga1-x2N (0
H01L 29/267 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, des éléments couverts par plusieurs des groupes , , , , dans différentes régions semi-conductrices
H01L 29/36 - Corps semi-conducteurs caractérisés par la concentration ou la distribution des impuretés
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
7.
CONTROL DEVICE, ELECTRIC APPARATUS, AND CONTROL METHOD OF ELECTRIC APPARATUS
According to one embodiment, a control device includes: a control circuitry configured to control an electric motor; and a failure sensing circuitry configured to sense a failure of the electric motor, wherein the failure sensing circuitry executes frequency analysis concerning an electric signal for driving the electric motor, calculates a phase of the electric signal, calculates a phase difference between a phase of a fundamental wave of a power supply frequency of the electric signal and the calculated phase of the electric signal, extracts a first signal indicating an outflow component from the electric motor based on a calculation result of the phase difference, extracts a second signal indicating an inflow component to the electric motor based on the calculation result of the phase difference, and senses the failure based on the first signal.
H02H 7/08 - Circuits de protection de sécurité spécialement adaptés aux machines ou aux appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou de ligne, et effectuant une commutation automatique dans le cas d'un changement indésirable des conditions normales de travail pour moteurs dynamo-électriques
G01R 23/12 - Dispositions pour procéder à la mesure de fréquences, p. ex. taux de répétition d'impulsionsDispositions pour procéder à la mesure de la période d'un courant ou d'une tension par conversion de la fréquence en déphasage
A semiconductor device includes: a first electrode; a semiconductor layer provided on the first electrode; a second electrode provided on the semiconductor layer; a control electrode provided in the semiconductor layer via an insulating region; a first conductive portion facing the control electrode, electrically connected to the second electrode, and having a first work function; a first semiconductor region of a first conductivity type provided in the semiconductor layer, sandwiched between the insulating region and the first conductive portion, and forming a Schottky junction with the first conductive portion; a second semiconductor region of a first conductivity type provided in the semiconductor layer, located on the first semiconductor region, and having an impurity concentration higher than the first semiconductor region; and a second conductive portion electrically connected to the second electrode, having a second work function, and forming an ohmic junction with the second semiconductor region.
According to one embodiment, a semiconductor device includes: a substrate including a first surface extending in a first direction and a second direction; a first transistor; a light receiver; a light emitter provided on the light receiver; an input terminal provided on the first surface of the substrate; a first conductor configured to electrically couple a source electrode of the first transistor and a first electrode of the light receiver; a second conductor configured to electrically couple a gate electrode of the first transistor and a second electrode of the light receiver; and a third conductor configured to couple a third electrode of the light emitter and the input terminal, wherein the light emitter and the input terminal are provided at positions overlapping with each other in a third direction, and the third conductor is provided inside the substrate.
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
H01L 31/12 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails structurellement associés, p.ex. formés dans ou sur un substrat commun, avec une ou plusieurs sources lumineuses électriques, p.ex. avec des sources lumineuses électroluminescentes, et en outre électriquement ou optiquement couplés avec lesdites sour
H01L 31/153 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails structurellement associés, p.ex. formés dans ou sur un substrat commun, avec une ou plusieurs sources lumineuses électriques, p.ex. avec des sources lumineuses électroluminescentes, et en outre électriquement ou optiquement couplés avec lesdites sour la ou les sources lumineuses étant commandées par le dispositif à semi-conducteur sensible au rayonnement, p.ex. convertisseurs d'images, amplificateurs d'images ou dispositifs de stockage d'image les sources lumineuses et les dispositifs sensibles au rayonnement étant tous des dispositifs semi-conducteurs caractérisés par au moins une barrière de potentiel ou de surface formés dans, ou sur un substrat commun
According to one embodiment, a semiconductor device includes first and second electrodes, first to fifth semiconductor regions, and first and second conductive portions. A first depth in a first direction from an upper surface of the fourth semiconductor region to a lower end of a first insulating layer is 1.05 μm or less. A distance in the first direction from the upper surface of the fourth semiconductor region to a boundary between the first semiconductor region and the second semiconductor region is 2.8 μm or more. A ratio of the distance to the first depth is between 2.15 to 3.05. A second depth in the first direction from the upper surface of the fourth semiconductor region to a lower end of a second insulating layer is 1.05 μm or more. A ratio of the distance to the second depth is between 2.15 to 3.05.
A semiconductor device according to the present embodiment includes a semiconductor member, an interlayer film, a metallic layer, and a passivation film. The interlayer film is located on a side of an upper surface of the semiconductor member. The metallic layer is located to cover at least a part of a region on a side of an upper surface of the interlayer film. The passivation film is formed on the upper surface of the interlayer film where the metallic film is not located, and on side surfaces and upper surfaces at end portions of the metallic layer. An upper part of the end portions of the metallic layer has a curved surface.
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
A semiconductor device includes a first electrode; a first semiconductor layer including a plurality of mesa parts; a second electrode positioned in a recess provided in an upper portion of the mesa part; a gate electrode adjacent to the mesa part; an insulating film located between the gate electrode and the mesa part; and a second semiconductor layer contacting an end portion of the second electrode. The mesa part includes a first side surface facing the gate electrode via the insulating film in the first direction, and a second side surface positioned at a side opposite to the first side surface. The second electrode contacts the second side surface.
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
According to one embodiment, a magnetic disk device includes a rotatable recording medium including concentric recording tracks, a magnetic head including a recording element having a first width, a reproducing element having a second width, and a thermal resistance sensor having a third width wider than the first width and the second width, a head actuator that positions the magnetic head on any recording track, a detection circuit that detects defects on a surface of the recording medium based on a sensor output of the thermal resistance sensor, and a controller that, when inspecting the surface condition of the recording medium by the thermal resistance sensor, sets a feed pitch of the magnetic head to within ½ of the third width and three or more recording tracks.
According to one embodiment, an input circuit is provided that inputs a voltage to each of drive terminals of a pair of differential transistors constituting a differential pair. The input circuit includes: a first input wiring section to which a first voltage is applied; a second input wiring section to which a second voltage; a first output wiring section to which a voltage is output to one of the pair of differential transistors; a second output wiring section to which a voltage is output to the other of the pair of differential transistors; a voltage generation circuit section that generates a third voltage based on at least one of the first voltage and the second voltage; a first transistor disposed between the first input wiring section and the first output wiring section; and a second transistor disposed between the second input wiring section and the second output wiring section.
H03K 3/313 - Générateurs caractérisés par le type de circuit ou par les moyens utilisés pour produire des impulsions par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs avec deux électrodes, une ou deux barrières de potentiel, et présentant une caractéristique de résistance négative
According to one embodiment, a memory of a magnetic disk device includes a plurality of control queues respectively corresponding to a plurality of actuator systems. A controller receives a plurality of first commands from a host, and stores the plurality of first commands in one of the plurality of control queues. The controller generates a second command for internal processing, and stores the second command in a first control queue that stores a smallest number of commands among the plurality of control queues. The controller executes, for each of the plurality of control queues, processing one or more commands stored in one control queue of the plurality of control queues by using an actuator system corresponding to the one control queue among the plurality of actuator systems.
According to one embodiment, a magnetic disk drive includes a flash memory adopting a Serial NAND that includes a plurality of Blocks. The magnetic disk drive determines one or more first Blocks to be used for write at backup, among the plurality of Blocks, based on a write time per the Block in the Serial NAND. The magnetic disk drive backs up data in a nonvolatile memory to the Serial NAND using a counter electromotive force of a spindle motor.
G06F 11/14 - Détection ou correction d'erreur dans les données par redondance dans les opérations, p. ex. en utilisant différentes séquences d'opérations aboutissant au même résultat
G11B 19/04 - Dispositions prévenant, évitant ou signalant la surimpression sur le même support, ou d'autres fonctionnements défectueux de l'enregistrement ou de la reproduction
According to one embodiment, an input circuit is connected to an output circuit that outputs an output value based on a first voltage and a second voltage, to which the first voltage and the second voltage are applied. The input circuit includes: a first differential transistor section including a plurality of first transistors connected in parallel with each other; a second differential transistor section including a plurality of second transistors connected in parallel with each other; and a selectable cutoff section capable of selecting a state in which a current is cut off. The output circuit includes a first current path section and a second current path section arranged in parallel with each other between ground and a power supply voltage wiring. The first differential transistor section and the second differential transistor section are arranged in parallel with each other between the ground and the power supply voltage wiring.
H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
H03F 3/16 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs avec dispositifs à effet de champ
According to one embodiment, a magnetic head executes a magnetization operation of magnetizing a magnetic disk to one of a first polarity and a second polarity opposite the first polarity. The magnetization operation includes a first magnetization operation of magnetizing the disk with a first recording width and a second magnetization operation of magnetizing the disk with a second recording width larger than the first recording width. The controller magnetizes a first area unit to the first or second polarity in the first or second magnetization operation, and then magnetizes a second area unit to a polarity opposite to that of the first area unit in the second magnetization operation. The second area unit is an area unit, radially adjacent to the first area unit, included in a second track that is a track adjacent to a first track among tracks and to be written after the first track.
A method for manufacturing an electronic device includes forming a recess on a first surface side of a substrate. The substrate has the first surface and a second surface opposite to the first surface. The method includes forming a protective film inside the recess. An end portion of the protective film covers a bottom surface of the recess. A height of the protective film from the bottom surface is lower than a height of the first surface. The method includes processing the substrate from the second surface side to expose the end portion of the protective film to form a through hole in the substrate from at least a part of the recess. An opening of the through hole on a side opposite to the first surface is closed by the protective film. The method includes removing the protective film provided in the through hole.
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
According to one embodiment, a semiconductor circuit includes a first transimpedance amplifier and a second transimpedance amplifier. The first transimpedance amplifier is configured to convert an input current to a first output voltage and output the first output voltage from a first output terminal when a reference voltage is supplied to a first input terminal and the input current is supplied to a second input terminal. The second transimpedance amplifier has a circuit configuration similar to a circuit configuration of the first transimpedance amplifier. The second transimpedance amplifier is configured to output a second output voltage from a second output terminal when the reference voltage is supplied to a third input terminal.
H03F 3/08 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs commandés par la lumière
H03F 1/52 - Circuits pour la protection de ces amplificateurs
According to one embodiment, there is provided a disk device including a head, a disk medium and a controller. The disk medium includes multiple zones concentrically provided. The controller, when two servo patterns corresponding to two adjacent zones are written by the head on a track of a boundary area between the two adjacent zones of the multiple zones, generates timing correction data according to a radial position of the boundary area. The controller writes one servo pattern of the two servo patterns on the track of the boundary area. The controller writes the other servo pattern of the two servo patterns, at a position circumferentially shifted from the one servo pattern in the track of the boundary area, according to the timing correction data.
According to one embodiment, a disk device including a head, a disk, and a controller is provided. The disk includes at least one band. When a target track is written while being partially overlapped with a track adjacent to the target track in each of the at least one band, the controller writes a plurality of tracks in the band such that a track pitch on the head side of the band is larger than the other track pitches in at least a part of a circumferential position range.
According to one embodiment, a disk device includes a disk-shaped recording medium, an actuator assembly provided to be rotatable and supporting a magnetic head, and a first stopper and a second stopper, arranged contactable with the actuator assembly. At least one of the first stopper and the second stopper includes a cushioning member having a contact surface contactable with the actuator assembly, and a gas adsorption member provided to surround the cushioning member except for the contact surface.
G11B 5/48 - Disposition ou montage des têtes par rapport aux supports d'enregistrement
G11B 5/54 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour amener la tête dans sa position de travail, pour l'en écarter ou pour la déplacer en travers des pistes
According to one embodiment, there is provided a method of manufacturing a disk device. The method includes acquiring information on a write width of a head. The method includes adjusting a seek speed of the head at a time of writing a spiral pattern to a disk according to the acquired write width.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
A disk device is controlled using system data. The disk device includes a disk, a non-volatile memory, and a controller. The controller is configured to record a set of system data on both the non-volatile memory and the disk.
According to one embodiment, a code recognition method includes: receiving a color image including a portion in which a code is inscribed; generating a first image where a first color correction is applied to the color image so as to change at least one of a ratio of RGB and a combination of HSV; generating a second image in which a first preprocessing digital filter that performs digital filter correction is applied to the first image; generating a third image in which a second color correction different from the first color correction is applied to the color image so as to change at least one of a ratio of RGB or a combination of HSV; generating a fourth image in which a second preprocessing digital filter that performs digital filter correction is applied to the third image; and performing recognition of the code using the second and the fourth images.
According to one embodiment, a semiconductor device has a semiconductor chip. It has a terminal which is connected to the semiconductor chip and which comprises a first surface region containing copper. It has a functional film formed on at least a portion of a surface of the first surface region. It has a resin which covers a portion of the terminal and the semiconductor chip. The functional film comprises an organic film containing oxygen atoms. The organic film is bonded to the resin.
According to one embodiment, a semiconductor device includes: a first transistor; a light receiving element that is in contact with the first transistor in a first direction, with a light receiving surface of the light receiving element being provided to face in the first direction; a light emitting element including a radiation surface that is provided to face the light receiving surface of the light receiving element in the first direction; and a first resin member that seals the first transistor, the light receiving element and the light emitting element, and has light transmissivity, wherein a vertex of a surface that is in contact with the first transistor in the light receiving element is provided at a position that does not overlap the first transistor in the first direction.
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
H01L 31/167 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails structurellement associés, p.ex. formés dans ou sur un substrat commun, avec une ou plusieurs sources lumineuses électriques, p.ex. avec des sources lumineuses électroluminescentes, et en outre électriquement ou optiquement couplés avec lesdites sour le dispositif à semi-conducteur sensible au rayonnement étant commandé par la ou les sources lumineuses les sources lumineuses et les dispositifs sensibles au rayonnement étant tous des dispositifs semi-conducteurs caractérisés par au moins une barrière de potentiel ou de surface
According to one embodiment, a semiconductor device includes first and second electrodes, first to fifth semiconductor regions, and first and second conductive portions. The first semiconductor region includes a first portion and a second portion located around the first portion. The second semiconductor region is provided on the first portion. The first conductive portion faces the second semiconductor region via a first insulating layer. The fourth semiconductor region is provided on the second portion. The second conductive portion faces the fourth semiconductor region via a second insulating layer. A lower end of the second conductive portion is positioned lower than a lower end of the first conductive portion. The fifth semiconductor region is provided between the second portion and the lower end of the second conductive portion. An impurity concentration of the first conductivity type in the fifth semiconductor region is greater than the one in the second portion.
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
30.
MAGNETIC DISK DEVICE AND METHOD OF CONTROLLING THE SAME
According to one embodiment, a magnetic disk device includes an actuator which holds a magnetic head to move in a radial direction of a magnetic disk with voice coil motor drive, and a controller. The controller moves a magnetic head from a current position to a target position by controlling the voice coil motor drive. The controller calculates an acceleration of the magnetic head, based on a position history of the magnetic head, and calculates an acceleration of the magnetic head, based on a value of a drive current of the voice coil motor. The controller detects vibration occurring in the actuator, based on a difference between the calculated accelerations.
G11B 21/21 - Supports de têtesSupports des douilles pour les têtes embrochables agissant pendant que la tête est en position de travail, mais immobile, ou permettant de petits déplacements pour suivre les irrégularités de la surface du support d'enregistrement avec des dispositions pour maintenir un écartement désiré entre la tête et le support d'enregistrement, p. ex. maintien dynamique de l'écartement à l'aide d'un fluide, à l'aide d'un coulisseau
G11B 5/48 - Disposition ou montage des têtes par rapport aux supports d'enregistrement
According to one embodiment, a magnetic head includes a first magnetic pole including a medium facing face and a first face crossing the medium facing face, a second magnetic pole including a second face, and a magnetic element. The first face faces the second face in a first direction. The magnetic element includes first and second magnetic layers. The first face includes first and second portions. A second direction crosses the medium facing face and the first direction. The first and second portions satisfy one of first and second conditions. In the first condition, a first portion position of the first portion is between a medium facing face position of the medium facing face and a second portion position of the second portion in the second direction. In the second condition, the second portion position is between the medium facing face position and the first portion position.
A second surface-side region includes a fourth semiconductor layer facing at least one of a plurality of second gate electrodes via a second insulating film, a fifth semiconductor layer contacting a second electrode, a sixth semiconductor layer contacting the second electrode, the sixth semiconductor layer being of a first conductivity type and having a higher first-conductivity-type impurity concentration than a first semiconductor layer, and a seventh semiconductor layer contacting the second electrode, the seventh semiconductor layer being of the second conductivity type and having a lower second-conductivity-type impurity concentration than the fourth and fifth semiconductor layers. The seventh semiconductor layer is positioned between the plurality of second gate electrodes in a second direction orthogonal to the first direction.
According to one embodiment, a semiconductor device includes a first element, a second element, a first terminal, a second terminal, a third terminal, a fourth terminal, a fifth terminal, a sixth terminal, and a circuit section. Each of the first element and the second element includes a first electrode, a second electrode, a third electrode, a fourth electrode, and a semiconductor member. The semiconductor member includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a third semiconductor region of a second conductivity type, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a sixth semiconductor region of the second conductivity type. The first semiconductor region includes a first partial region, a second partial region, a third partial region, and a fourth partial region.
A semiconductor device includes first and second electrodes, a semiconductor layer, first and second gate electrodes, and first and second insulating regions. The first gate electrode is provided on a side of the semiconductor layer facing the first electrode. The second gate electrode is provided on a side of the semiconductor layer facing the second electrode. The semiconductor layer includes first to sixth semiconductor regions. The second semiconductor region is provided between the first semiconductor region and the first electrode. The third semiconductor region is electrically connected to the first electrode. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is separated from the fourth semiconductor region. The sixth semiconductor region includes a first region. The first region is provided between the fourth semiconductor region and the fifth semiconductor region, and is opposed to the second gate electrode.
A plurality of mesas each includes a channel part positioned between recess and a gate electrode in a first direction, and a contact part located on the channel part, the contact part having a higher first-conductivity-type impurity concentration than the channel part. The channel part includes a first side surface facing the gate electrode in the first direction, and a second side surface positioned at a side opposite to the first side surface in the first direction. The insulating film is located at the second side surface. A second electrode contacts the contact part and the insulating film in the recess.
According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor layer, and a gate electrode. The semiconductor layer contains silicon carbide. The semiconductor layer includes first to third semiconductor regions. The gate electrode faces the second semiconductor region via a gate insulating layer. The gate electrode includes a first portion, a second portion, and a third portion. The first portion further faces the third semiconductor region. The second portion is positioned at an end of the gate electrode in a third direction. The third direction is perpendicular to the first direction and the second direction. The third portion is positioned between the first portion and the second portion in the third direction. The impurity concentration of the second portion is less than that of the third portion. The third electrode includes a wiring portion provided on the third portion.
H10D 30/66 - Transistors FET DMOS verticaux [VDMOS]
H10D 62/13 - Régions semi-conductrices connectées à des électrodes transportant le courant à redresser, amplifier ou commuter, p. ex. régions de source ou de drain
H10D 62/17 - Régions semi-conductrices connectées à des électrodes ne transportant pas de courant à redresser, amplifier ou commuter, p. ex. régions de canal
H10D 62/60 - Distribution ou concentrations d’impuretés
H10D 62/832 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé étant des matériaux du groupe IV comprenant deux éléments ou plus, p. ex. SiGe
H10D 64/27 - Électrodes ne transportant pas le courant à redresser, à amplifier, à faire osciller ou à commuter, p. ex. grilles
This semiconductor device according to one embodiment comprises a semiconductor layer, a first electrode, a second electrode, and a gate electrode. The semiconductor layer includes a first region, a second region, a third region located between the first region and the second region in a first direction from the first region toward the second region, and a fourth region located between the second region and the third region. The semiconductor layer contains gallium nitride. The hydrogen concentration in the fourth region is higher than the hydrogen concentration in the third region. The first electrode is provided on the first region. The second electrode is provided on the second region. The gate electrode is provided on the third region with a first insulating layer therebetween.
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 21/338 - Transistors à effet de champ à grille Schottky
H01L 29/812 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à grille Schottky
A controller of a magnetic disk device executes an integration operation each time a magnetic head passes through a servo sector during a write operation for a write target section of a first track among a plurality of tracks, so long as a positioning error amount in a servo sector that was most recently passed through by the magnetic head is within a range of an error threshold. The integration operation includes calculating an integrated offset amount by adding up positioning error amounts in two or more servo sectors including at least the servo sector that was most recently passed through by the magnetic head among all servo sectors that were passed through by the magnetic head during the write operation. The controller executes a protection operation for protecting data of a second track adjacent to the first track among the plurality of tracks based on the integrated offset amount.
A first connection part includes a first metal part electrically connected with a wiring layer, and a second metal part located on a second surface of a second substrate. The second metal part faces the first metal part in a first direction. A second connection part includes a third metal part electrically connected with the wiring layer, and a fourth metal part located on the second surface of the second substrate. The fourth metal part faces the third metal part in the first direction. One of the first connection part or the second connection part has a metal part-metal part bond structure. The other of the first connection part or the second connection part is capacitively coupled via a gap.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
According to one embodiment, a magnetic disk drive includes rotatable disks, heads, microactuators, a voice coil motor (VCM), and a control system, wherein the control system determines a final set of heads of target for simultaneously positioned on their respective target tracks from among the heads, by using at least a displacement amount of the microactuators, determines a target position of the VCM when the heads in the final set are simultaneously positioned on their respective target tracks, switches a controller of the VCM when the heads in the final set are simultaneously positioned on their respective target tracks, and switches controller of the microactuators included in each of the heads in the final set.
G11B 5/56 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de régler la position relative de la tête et du support d'enregistrement, p. ex. réglage manuel pour la correction d'azimuth ou pour le centrage de la piste
G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques
G11B 5/55 - Changement, sélection ou acquisition de la piste par déplacement de la tête
According to an embodiment, a controller executes a determination operation when a magnetic head passes over a servo sector during a write operation. In the determination operation, a first cumulative amount is calculated by accumulating, for a first section, evaluation amounts each corresponding to an amount by which the width of an adjacent track is narrowed due to the write operation, and determination is made as to whether the first cumulative amount is smaller or larger than a threshold value corresponding to a limit of error correction. When the first cumulative amount is determined to be larger than the threshold value, the controller interrupts the write operation and re-executes the determination operation after executing a rotational delay. The controller resumes the write operation when the first cumulative amount is determined to be smaller than the threshold value as a result of the re-executed determination operation.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 27/36 - Contrôle, c.-à-d. surveillance du déroulement de l'enregistrement ou de la reproduction
According to one embodiment, a semiconductor device includes a first terminal, a second terminal, a first transistor, a first circuit including a second transistor, and a second circuit including a first resistance element, a second resistance element, and a first switch element. A gate of the first transistor are coupled to a first node. A gate of the second transistor are coupled to a second node. One end and the other end of the first resistance element are coupled to the second node and the first node, respectively. One end and the other end of the second resistance element are coupled to a third node and the first node, respectively. The first switch element switches coupling and uncoupling between the second and third nodes. The second circuit adjusts a voltage difference between a gate voltage of the second transistor and a gate voltage of the first transistor by switching.
H03K 17/0812 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension sans réaction du circuit de sortie vers le circuit de commande par des dispositions prises dans le circuit de commande
H02H 3/08 - Circuits de protection de sécurité pour déconnexion automatique due directement à un changement indésirable des conditions électriques normales de travail avec ou sans reconnexion sensibles à une surcharge
43.
LEARNING CONTROL DEVICE, LEARNING CONTROL METHOD, AND MAGNETIC DISK DEVICE
A learning-control device includes a feedback-control unit 30 and a learning-control unit 40. The feedback-control unit 30 outputs, based on an input signal according to a tracking error between an operation-result-state of a control target operating according to an input-control-signal based on a feedback-signal and a target-state, the feedback-signal causing the operation-result-state of the control target 34 to track the target-state. The learning-control unit 40 outputs to the feedback-path F, through which the input signal according to the tracking error is input to the feedback-control unit 30, the learning-control input updated according to the tracking error causing the tracking error to approach zero asymptotically. The evaluation section length of an evaluation section by the learning-control unit 40 for the tracking error is longer than the output section length of the output section in which the learning-control unit 40 outputs the learning-control inputs to the feedback-path F.
G05B 13/02 - Systèmes de commande adaptatifs, c.-à-d. systèmes se réglant eux-mêmes automatiquement pour obtenir un rendement optimal suivant un critère prédéterminé électriques
G05B 19/16 - Commande à programme autre que la commande numérique, c.-à-d. dans des automatismes à séquence ou dans des automates à logique utilisant des supports d'enregistrement utilisant des supports d'enregistrement magnétiques
In a magnetic disk apparatus according to an embodiment, a power supply circuit generates second power from first power supplied by an external power supply, and generates third power when the first power is cut off. The third power is generated based on regenerative energy generated by stoppage of a motor. A controller writes data received from a host device to a magnetic disk via a cache area by the second power while the first power is supplied, and executes a backup process when the first power is cut off. The backup process is executed by disabling communication with the host device and saving content of the cache area to the first memory by the third power. A monitoring circuit keeps connection with the external power supply even when the first power is cut off. The controller enables communication with the host device when the first power is restored.
According to one embodiment, a disk apparatus includes plural magnetic disks, a spindle motor that rotates the plural magnetic disks, and a housing. The housing has a bottom wall to which the spindle motor is attached and a side wall molded integrally with the bottom wall. Further, the disk apparatus includes a first board attached to the side wall and a first connector attached to the first board for connection with an external device. The first connector has a housing portion with a first surface at least partially facing the bottom wall and a second surface crossing the first surface and a contact portion provided in contact with at least one of the first surface and the second surface, and the contact portion has one end for electric connection with the external device and the other end provided immediately below the first connector.
H01R 12/72 - Dispositifs de couplage pour circuits imprimés rigides ou structures similaires se couplant avec la bordure des circuits imprimés rigides ou des structures similaires
H01R 13/621 - Boulon, vis de serrage ou attache à vis
46.
ELECTRONIC DEVICE AND METHOD FOR OPERATING ELECTRONIC DEVICE
A first chip includes a first substrate. The first substrate includes a first surface and a control circuit. A second chip includes a second substrate and an electrode. The second substrate includes a second surface facing the first surface. A plurality of bonding parts is located between the first surface and the second surface. One of the plurality of bonding parts electrically connects the control circuit and the electrode. The second substrate includes a diode electrically connected with the electrode and the plurality of bonding parts. A direction from the diode toward the electrode is a forward direction of the diode. A direction from the control circuit toward the diode via the one of the plurality of bonding parts is a reverse direction of the diode.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
A semiconductor device includes a semiconductor substrate, an interlayer insulating film that is provided on the semiconductor substrate, a first electrode that is provided on the interlayer insulating film, a second electrode that is provided below the semiconductor substrate, a plurality of gate regions extending from the interlayer insulating film in a first direction, which is a thickness direction of the semiconductor substrate, to reach the semiconductor substrate, provided in a second direction intersecting the first direction, and extending in a third direction intersecting the first direction and the second direction, and a plurality of plugs located between the gate regions in the second direction, longer in the second direction than in the third direction, spaced apart from each other in the third direction, and electrically connecting the first electrode to the semiconductor substrate.
H10D 62/10 - Formes, dimensions relatives ou dispositions des régions des corps semi-conducteursFormes des corps semi-conducteurs
H10D 62/83 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé
A disk device includes a magnetic disk, a base, a film, an inner cover, and an outer cover. The base is provided with an internal space, and has a first inner surface surrounding the magnetic disk, a supporting surface connected to an end of the first inner surface in a first direction, a second inner surface further away from a rotation axis of the magnetic disk than the first inner surface and connected to the supporting surface, and an end face connected to an end of the second inner surface in the first direction. The film covers a covered region in the second inner surface and is spaced apart from the end face and an exposed region of the second inner surface. The inner cover is supported by the supporting surface and surrounded by the second inner surface. The outer cover is coupled to a portion of the base.
According to one embodiment, a magnetic disk device includes a magnetic disk, a gimbal, and a controller. The magnetic disk rotates around a first axis. The gimbal includes a magnetic head and a piezoelectric element. The piezoelectric element is deformed in accordance with an applied drive voltage to move the magnetic head. The controller applies a polarization voltage to the piezoelectric element to give spontaneous polarization to the piezoelectric element. The polarization voltage satisfies a relationship of ΔV=(2πf)A·ΔT<ΔVmax, where “ΔV” is a voltage change amount of the polarization voltage per unit time, “f” is a frequency of the polarization voltage, “A” is an amplitude of the polarization voltage, “ΔT” is a time resolution of the polarization voltage, and “ΔVmax” is a voltage change amount per unit time that excites resonance of the gimbal in application to the piezoelectric element.
According to an embodiment, a controller corrects an instruction value of a VCM current by a first feedforward control based on a first detection value obtained by a first sensor. The controller executes a first operation in accordance with occurrence of a set event. In the first operation, the controller acquires a first waveform that is a waveform of a deviation amount of a detection position from a target position of a magnetic head, and acquires from the first waveform a first frequency band that is a frequency band whose amplitude is greater than a first threshold. The controller adjusts a coefficient of a transfer function of the first feedforward control to suppress the first detection value in a second frequency band different from the first frequency band and output a correction amount for a first instruction value based on the first detection value in the first frequency band.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
51.
SEMICONDUCTOR ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT
A semiconductor element includes: a semiconductor layer having a front surface on which a circuit pattern is formed; an electrode layer disposed on a back surface of the semiconductor layer; and a covering layer covering a back surface of the electrode layer, and a side surface of the semiconductor layer and the electrode layer.
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 21/78 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels
According to one embodiment, a semiconductor device has a first terminal, and a second terminal in which a first groove portion is formed through an upper face thereof. Also, the semiconductor device has a first transistor that has a first drain electrode electrically connected to the first terminal, a first source electrode, and a nitride semiconductor layer, and is provided in the first groove portion. Further still, the semiconductor device includes a second transistor that has a second drain electrode electrically connected to the second terminal and a second source electrode electrically connected to the first source electrode.
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
A semiconductor device includes: a second electrode, located in a semiconductor part, extending in a first direction; a third electrode, located in the semiconductor part, including a first portion, a second portion, and a first middle portion positioned below the second electrode between the first portion and the second portion, the second electrode being located between the first portion and the second portion in the first direction; a fourth electrode, located above the semiconductor part, including a pad portion separated from the second electrode and the second portion in a second direction, and a protrusion protruding from the pad portion and covering the second electrode and being connected to the second electrode; and a fifth electrode, located above the semiconductor part, including a first covering portion being connected to the first contact portion and a second covering portion being connected to the first portion.
A semiconductor device according to the present embodiment includes a first insulating substrate having a first surface and a second surface opposite the first surface. First and second electrically conductive layers are provided on a side of the first surface. A plurality of semiconductor chips each have a third surface facing the first surface, a fourth surface opposite the third surface, a first electrode provided on the third surface, and a second electrode provided on the fourth surface. The first electrode is electrically connected to the first electrically conductive layer. A common electrode plate has a fifth surface facing the fourth surface, is electrically connected to the second electrodes of the semiconductor chips in common, and is electrically connected to the second electrically conductive layer. A second insulating substrate is provided on a side of the second surface of the first insulating substrate.
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
A semiconductor device includes first and second semiconductor layers of a first conductivity type, a third semiconductor layer of a second conductivity type, a plurality of electrodes, and a first insulating film. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer with a first surface at a side opposite to the first semiconductor layer. The electrodes extend from the first surface into the second semiconductor layer. A first insulating film provided between the second and third semiconductor layers and each of electrodes. The electrodes include first and second electrode groups. The first electrode group is arranged in one column in the first direction and apart from each other by a first distance. The first and second electrode groups are apart from each other by a second distance in the second direction.
H10D 12/00 - Dispositifs bipolaires contrôlés par effet de champ, p. ex. transistors bipolaires à grille isolée [IGBT]
H10D 64/00 - Électrodes de dispositifs ayant des barrières de potentiel
H10D 84/60 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors BJT
56.
Magnetic disk device and method of controlling the same
According to one embodiment, a magnetic disk device includes a first write control section of writing first data and second data to each of the sectors of a predetermined track among the tracks, a second write control section of writing the first data to each of the sectors of a predetermined track among the tracks, and a selection control section of, when receiving a write command, estimating the time required from start of a process of the first write control section to end of the process, and selectively executing the process of the first write control section or a process of the second write control section by comparing the estimated time with a time limit specified in advance.
G11B 5/54 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour amener la tête dans sa position de travail, pour l'en écarter ou pour la déplacer en travers des pistes
G11B 19/04 - Dispositions prévenant, évitant ou signalant la surimpression sur le même support, ou d'autres fonctionnements défectueux de l'enregistrement ou de la reproduction
G11B 27/30 - IndexationAdressageMinutage ou synchronisationMesure de l'avancement d'une bande en utilisant une information détectable sur le support d'enregistrement en utilisant des signaux d'information enregistrés par le même procédé que pour l'enregistrement principal sur la même piste que l'enregistrement principal
57.
WAFER SUPPORT DEVICE AND SiC EPITAXIAL GROWTH APPARATUS
A wafer support device of an embodiment includes a support base and a wafer guide portion. The support base has a support surface supporting a wafer. The support base rotates with a central axis extending in a normal direction of the support surface as a center. The wafer guide portion includes a first chamfered portion and a second chamfered portion. The wafer guide portion has an annular shape surrounding a circumference of the wafer supported on the support surface with the central axis as a center. The first chamfered portion is inclined downward going radially inward from an upper surface with the central axis as a center. The second chamfered portion has a first inclined region facing downward at an inclination angle larger than an inclination angle of the first chamfered portion with respect to the support surface going radially inward.
C23C 16/458 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] caractérisé par le procédé de revêtement caractérisé par le procédé utilisé pour supporter les substrats dans la chambre de réaction
A semiconductor manufacturing device includes a table having an upper face on which a frame having a first opening to which a substrate is fixed by an adhesive is disposed, the table having a plurality of first through holes penetrating the table in a vertical direction and provided side by side in a first direction parallel to the upper face and a plurality of second through holes each provided between the adjacent first through holes and penetrating the table in the vertical direction; and a container provided on the table, the container including a first sidewall provided on the frame, a second sidewall provided on the frame, the second sidewall facing the first sidewall, a distance between the second sidewall and the first sidewall being larger than a first inner diameter of the first opening, and a joint allowing an outside of the container and an inside of the container to communicate with each other.
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
H01L 21/78 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels
59.
MAGNETIC DISK DEVICE AND METHOD OF MANUFACTURING MAGNETIC DISK DEVICE
A magnetic disk device of an embodiment includes: a housing in which a base and a cover are combined and airtightly closed; a magnetic disk housed in the housing; a needle protruding upward in an internal space of the housing; and a desiccant assembly provided on the cover so as to face the base away from the base by a predetermined distance, in which the desiccant assembly includes: a case including an opening on a surface facing the base, a sealing film provided at the opening, a division filter that divides space of the case into a first chamber and a second chamber, the second chamber including the opening, and a desiccant filled in the first chamber, and the second chamber communicates with the internal space of the housing by the needle penetrating the sealing film.
According to an embodiment, in a magnetic disk device, a current detection circuit detects an amount of a first current that is generated by a drive circuit and drives a motor. In a seek operation, a controller acquires a commanded value based on a deviation amount of the amount of the first current detected by the current detection circuit from the commanded value. Then, the controller inputs the acquired commanded value to the drive circuit.
According to one embodiment, a magnetic recording device includes a magnetic recording medium, a magnetic head configured to record information on the magnetic recording medium, and a controller configured to control the magnetic recording medium and the magnetic head. The magnetic head includes a coil, a first magnetic pole configured to generate a magnetic field according to a recording current supplied to the coil, and a light emitting section configured to irradiate the magnetic recording medium with a light to locally increase a temperature of the magnetic recording medium. The controller is configured to perform a first operation and a second operation. In the first operation, the controller is configured to record a first servo position information in a first region of the magnetic recording medium. In the second operation, the controller is configured to perform a repair operation if a first condition is not satisfied.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
A magnetic disk device includes a housing, a disk rotatably provided in the housing, a head provided in the housing and capable of writing and reading information to and from the disk, a voice coil motor provided in the housing and driving the head, and a filter structure provided in the housing and having a porous body including a first porous body with an average pore diameter of 0.4 nm or more and 1.0 nm or less, that is optimized for adsorbing glycol ether.
A semiconductor device according to an embodiment includes: a transistor, the transistor including a first electrode, a second electrode, semiconductor regions provided between the first electrode and the second electrode, and a gate electrode; a detector detecting a voltage of the first electrode or a current flowing from the first electrode to the second electrode in a state where the voltage of the first electrode is a positive voltage higher than a voltage of the second electrode; a comparison circuit comparing a measurement value measured by the detector with a first threshold; and a gate driver circuit applying a first positive voltage higher than a threshold voltage of the transistor to the gate electrode, and applying a first negative voltage to the gate electrode when the measurement value exceeds the first threshold as a result of comparison in the comparison circuit.
H03K 17/16 - Modifications pour éliminer les tensions ou courants parasites
H03K 17/0812 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension sans réaction du circuit de sortie vers le circuit de commande par des dispositions prises dans le circuit de commande
H10D 62/832 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé étant des matériaux du groupe IV comprenant deux éléments ou plus, p. ex. SiGe
H10D 84/00 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si
According to one embodiment, a disk device includes a recording medium, a magnetic head including a recording head, an assist element, and a heater, and a controller including a heater voltage supply circuit, a drive voltage supply circuit configured to supply a drive voltage to the assist element, and a contact detection circuit. The controller adjusts a set value of the drive voltage based on an amount of protrusion of the assist element when contact is detected by the contact detection circuit.
G11B 5/127 - Structure ou fabrication des têtes, p. ex. têtes à variation d'induction
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
According to one embodiment, an isolator device includes a rigid substrate and a flexible printed circuit board stacked on the rigid substrate in a first direction. A first coil is in the flexible printed circuit board. A second coil is also in the flexible printed circuit board, but spaced from and aligned with the first coil in the first direction. A first semiconductor chip is connected to the first coil by a first wiring. A second semiconductor chip is connected to the second coil by a second wiring.
H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 23/498 - Connexions électriques sur des substrats isolants
H01L 23/538 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre la structure d'interconnexion entre une pluralité de puces semi-conductrices se trouvant au-dessus ou à l'intérieur de substrats isolants
A disk device according to an embodiment includes a housing, a magnetic disk, a printed wiring board, and a film. The housing is provided with an internal space filled with gas different from air and a penetration hole that makes the internal space communicate with an outside. The magnetic disk is disposed in the internal space. The printed wiring board includes a first surface attached to the housing, a second surface located opposite to the first surface, and a side surface provided between an outer edge of the first surface and an outer edge of the second surface. The printed wiring board is configured to seal the penetration hole. The film covers the side surface.
First and second transistors are on a substrate. A first end of the first transistor and a second end of the second transistor are coupled to each other. A first terminal includes a first portion contacting a first conductor coupled to a third end of the first transistor, a second portion connected to the first portion, and a third portion connected to the second portion. A complex includes a second terminal and a first insulator partially covering the second terminal. The second terminal includes a fourth portion, a fifth portion, and a sixth portion. The fourth portion contacts a second conductor coupled to a fourth end of the second transistor. The fifth portion is connected to the fourth portion and aligned with the second portion of the first terminal. The sixth portion is connected to the fifth portion. The first insulator covers the fifth portion.
H10D 89/60 - Dispositifs intégrés comprenant des dispositions pour la protection électrique ou thermique, p. ex. circuits de protection contre les décharges électrostatiques [ESD].
H10D 12/00 - Dispositifs bipolaires contrôlés par effet de champ, p. ex. transistors bipolaires à grille isolée [IGBT]
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
According to one embodiment, a motor control device includes a sensor, a detection circuit, and a controller. The sensor is at a position between a winding of a first phase and a winding of a second phase in a motor. The motor includes windings of three phases. The detection circuit detects when a magnitude relationship between an induced voltage amplitude of the first phase and an induced voltage amplitude of the second phase is switched. The controller detects a rotational direction based on a sensor signal from the sensor and a detection result sensor from the detection circuit.
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and a first insulating member. The third electrode includes silicon. The third electrode includes first and second electrode regions. The semiconductor member includes first and semiconductor layers. The first semiconductor layer includes Alx1Ga1−x1N (0≤x1<1), and includes first to fifth partial regions. The second semiconductor layer includes Alx2Ga1−x2N (0
H10D 62/854 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe III-V, p. ex. GaAs caractérisés en outre par les dopants
H10D 62/85 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe III-V, p. ex. GaAs
H10D 64/27 - Électrodes ne transportant pas le courant à redresser, à amplifier, à faire osciller ou à commuter, p. ex. grilles
Embodiments provide a motor control device configured to perform on/off control on a plurality of switching elements connected to each other in a three-phase bridge according to a PWM signal and to drive a motor via an inverter circuit that converts a direct current (DC) into a three-phase alternating current (AC), the motor control device including: a current detection element connected to a DC side of the inverter circuit to generate a signal corresponding to a current value; a PWM signal generation unit configured to determine a rotor position based on at least a phase current of the motor and to generate a PWM signal to follow the rotor position; and a current detection unit configured to detect the phase current of the motor based on the signal generated by the current detection element and the PWM signal; the PWM signal generation unit being capable of executing a first output method of outputting a phase-shifted PWM signal with three phases and causing the current detection unit to detect a current at fixed timing, a second output method of outputting a phase-shifted PWM signal with two phases and causing the current detection unit to detect a current at fixed timing, and a third output method of outputting a symmetrical PWM signal with three phases or two phases and causing the current detection unit to detect a current at fixed or variable timing, such that the current detection unit is capable of detecting two-phase currents at two timing points within a carrier wave cycle of the PWM signal, the motor control device further including: a magnetic flux estimation unit configured to estimate a magnetic flux interlinkage of an armature coil of the motor based on the phase current of the motor and an output voltage command; a signal switching output unit configured to estimate a rotating magnetic field angle and a speed of the motor based on the magnetic flux interlinkage, and to output a switching command such that the PWM signal generation unit executes the first output method when a modulation rate of a motor applied voltage is less than a first threshold value, executes the second output method when the modulation rate is the first threshold value or greater or less than a second threshold value, and executes the third output method when the modulation rate is the second threshold value or greater; and an angle compensation unit configured to use a speed estimated in a previous control cycle and to generate an angle computed based on the speed estimated in the previous control cycle when the motor current is not detectable in one cycle of an electrical angle.
H02P 27/12 - Dispositions ou procédés pour la commande de moteurs à courant alternatif caractérisés par le type de tension d'alimentation utilisant une tension d’alimentation à fréquence variable, p. ex. tension d’alimentation d’onduleurs ou de convertisseurs utilisant des convertisseurs de courant continu en courant alternatif ou des onduleurs avec modulation de largeur d'impulsions appliquant des impulsions en guidant le vecteur-flux, le vecteur-courant, ou le vecteur-tension sur un cercle ou une courbe fermée, p. ex. pour commande directe du couple
H02P 21/14 - Estimation ou adaptation des paramètres des machines, p. ex. flux, courant ou tension
H02P 21/18 - Estimation de la position ou de la vitesse
H02P 21/22 - Commande du courant, p. ex. en utilisant une boucle de commande
H02P 21/30 - Commande directe du couple [DTC] ou méthode d’accélération du champ [FAM]
72.
WIRE BONDING APPARATUS, CONTROL DEVICE, AND CONTROL METHOD
According to one embodiment, a wire bonding apparatus includes a bonding tool configured to feed a wire, a driver configured to drive the bonding tool, and a controller. The controller performs a bonding process of causing a ball formed at a tip of the wire to contact a first bonding point, deforming the ball into a bump, and bonding the bump to the first bonding point. The controller further performs a lowering process of raising the bonding tool while the bonding tool holds the wire connected with the bump, changing a position of the bonding tool in a horizontal direction, and subsequently lowering the bonding tool toward the first bonding point. The controller determines a goodness of the bonding of the bump to the first bonding point based on a detected value detected in the lowering process, the detected value being prescribed.
A semiconductor device according to an embodiment includes an insulating board having a circuit pattern, a semiconductor chip fixed on the insulating board and electrically-connected with the circuit pattern, and a power terminal that includes metal of a same type as the circuit pattern, and is electrically-connected with the circuit pattern, in which the power terminal includes a bond portion to be bonded with the circuit pattern, the bond portion having a plate shape, a penetrating portion penetrating through the bond portion in a thickness direction of the bond portion, and an extending portion that extends upward by bending from one end portion of the bond portion, and is configured to be able to connect the circuit pattern and an external device, and the bond portion and the circuit pattern are bonded by a bonding material containing particles of metal of a same type as the power terminal and the circuit pattern.
According to one embodiment, a magnetic disk device includes a disk, a write head, a write processing unit selecting a shingled magnetic recording, a determination unit, and a refresh processing unit. The determination unit determines whether a quality-degraded recording sector exists in all recording sectors in each of the bands. If it is determined that a target band including the quality-degraded recording sector exists in the bands, the refresh processing unit refreshes target recording sectors. The target recording sectors include the quality-degraded recording sector. In the target band, the number of the target recording sectors is less than the number of all recording sectors.
According to one embodiment, electronic circuitry includes: transmitting circuitry to output a first waveform including N pulse waveforms (N is a natural number larger than 1) in response to an input signal; transfer circuitry to transfer the first waveform as a second waveform that includes at least N+1 pulse waveforms, via electromagnetic coupling; and receiving circuitry configured to receive the second waveform and determine the input signal based on the at least N+1 pulse waveforms.
According to one embodiment, there is provided a detection circuit including a comparison circuit and a signal generation circuit. The comparison circuit has a first input node, a second input node, and an output node. The first input node is connected to one end of a power device. The second input node is connected to a threshold voltage. The signal generation circuit has a first input node and an output node. The first input node is connected to the output node of the comparison circuit. The output node is connected to a control node of a protection circuit of the power device.
A disk device according to an embodiment includes an electronic component, a first adhesive, a plate, and a first bonding layer. The flexible printed circuit board has a first surface facing the electronic component, a second surface located opposite to the first surface, and a pad provided on the first surface and connected to the electronic component by a conductive adhesive. The first adhesive is provided on the second surface. The plate has a third surface facing the second surface. The first bonding layer is provided on the third surface, enters a recess of the third surface, and is fixed to the second surface by the first adhesive.
According to one embodiment, a temperature compensation circuit that includes a correction circuit and a voltage supply circuit is provided. The correction circuit includes a first input node, a second input node, and an output node. The first input node is connected to a temperature sensor near a power device. The second input node is connected to a control terminal of the power device. The voltage supply circuit includes an input node and an output node. The input node is connected to the output node of the correction circuit. The output node is connected to a second input node of a comparator circuit. The comparator circuit includes a first input node and the second input node. The first input node is connected to one end of the power device.
H02H 7/125 - Circuits de protection de sécurité spécialement adaptés aux machines ou aux appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou de ligne, et effectuant une commutation automatique dans le cas d'un changement indésirable des conditions normales de travail pour convertisseursCircuits de protection de sécurité spécialement adaptés aux machines ou aux appareils électriques de types particuliers ou pour la protection sectionnelle de systèmes de câble ou de ligne, et effectuant une commutation automatique dans le cas d'un changement indésirable des conditions normales de travail pour redresseurs pour convertisseurs ou redresseurs statiques pour redresseurs
79.
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SUBSTRATE
In a manufacturing method of a semiconductor device according to the present embodiment, there is formed a first mark that is concave from a first direction substantially perpendicular to a first face of an SiC substrate and surrounded by first and third sides extending in a second direction orthogonal to the first direction on the first face and second and fourth sides extending in a third direction orthogonal to the first and second directions, and includes at least one recessed pattern recessed in the third direction from the first side toward the third side opposite to the first side on the first side. An SiC layer is epitaxially grown on the first mark of the SiC substrate.
H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p. ex. marques de repérage, schémas de test
H01L 21/04 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives les dispositifs ayant des barrières de potentiel, p. ex. une jonction PN, une région d'appauvrissement ou une région de concentration de porteurs de charges
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a third semiconductor member, and a fourth semiconductor member. The first semiconductor member is of a first conductivity type, and includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The fifth partial region is in Schottky contact with the second electrode. The second semiconductor member is of a second conductivity type, and includes a first portion and a second portion. The third semiconductor member is of the second conductivity type, and includes a first semiconductor portion, a second semiconductor portion, and a third semiconductor portion. The fourth semiconductor member is of the first conductivity type, and includes a first semiconductor region and a second semiconductor region.
H10D 84/00 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si
H10D 62/10 - Formes, dimensions relatives ou dispositions des régions des corps semi-conducteursFormes des corps semi-conducteurs
H10D 62/60 - Distribution ou concentrations d’impuretés
H10D 62/832 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé étant des matériaux du groupe IV comprenant deux éléments ou plus, p. ex. SiGe
H10D 64/64 - Électrodes comprenant une barrière de Schottky à un semi-conducteur
A disk device according to an embodiment includes a housing, a holding member, a moisture absorption unit, and an adsorption unit. The housing includes a base with an internal space filled with a first gas, and a cover closing the internal space. The holding member is attached to the base in the internal space. The moisture absorption unit includes a moisture absorbent having a composition to adsorb moisture, and a case attached to the cover in the internal space. The case accommodates the moisture absorbent. The adsorption unit includes an adsorbent having a composition to adsorb a second gas different from the first gas. The adsorption unit is held by at least one of the holding member and the case outside the case in the internal space. The absorption member is exposed to the internal space.
A semiconductor element extends along a first plane, includes opposing first and second surfaces and a third surface extending between respective ends of the first and second surfaces, and includes first and second electrode pads respectively provided in regions including the first and second surfaces. A first conductor is in contact with a first electrode pad and a first electrode. A second conductor is in contact with the second electrode pad and a second electrode. An insulating cover includes a first portion covering the third surface, a second portion connected to the first portion and opposing the first surface, and a third portion connected to the first portion, opposing the second surface, and sandwiching the semiconductor element with the second portion.
H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
A semiconductor device of embodiments includes: a semiconductor layer including a first trench, a second trench, a first semiconductor region of a first conductive type, a second semiconductor region of a second conductive type provided between a first face and the first semiconductor region, between the first trench and the second trench, and in contact with the second trench, a third semiconductor region of a first conductive type provided between the first trench and the second semiconductor region, a fourth semiconductor region of a second conductive type provided between the third semiconductor region and the first face, and a fifth semiconductor region of a second conductive type provided between the second semiconductor region and the first face, spaced from the fourth semiconductor region, in contact with the second trench; a first electrode on a first face side; and a second electrode on a second face side.
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H03K 17/0812 - Modifications pour protéger le circuit de commutation contre la surintensité ou la surtension sans réaction du circuit de sortie vers le circuit de commande par des dispositions prises dans le circuit de commande
A transmission buffer of a signal transmission device according to the embodiment includes: a differential circuit portion that is connected between the first potential and the second potential; a variable current source portion that supplies current to the differential circuit portion; a switch port that switches between a conductive state and a disconnected state between the first transmission terminal and the fixed potential and between the second transmission terminal and the fixed potential; and a controller that controls the current supplied by the variable current source portion to the differential circuit portion, and that controls the operation of the switch portion.
G05F 1/607 - Régulation de la tension ou de l'intensité là où la variable effectivement régulée par le dispositif de réglage final est du type continu utilisant des tubes à décharge en parallèle avec la charge comme dispositifs de réglage final
H03K 17/687 - Commutation ou ouverture de porte électronique, c.-à-d. par d'autres moyens que la fermeture et l'ouverture de contacts caractérisée par l'utilisation de composants spécifiés par l'utilisation, comme éléments actifs, de dispositifs à semi-conducteurs les dispositifs étant des transistors à effet de champ
H03K 19/01 - Modifications pour accélérer la commutation
According to one embodiment, a magnetic recording device includes a magnetic recording medium, a plurality of magnetic heads for recording information on the magnetic recording medium, and a controller for controlling the magnetic heads. Each of the magnetic heads includes a coil, a first magnetic pole for generating a magnetic field according to a recording current supplied to the coil, and a light emitting section for irradiating the magnetic recording medium with light to locally increase a temperature of the magnetic recording medium. The controller performs a first operation, in which a lifetime information related to a remaining life time of one of the magnetic heads is calculated based on a first information related to a failure probability of a magnetic head group including the magnetic heads and a second information related to a remaining time based on a history of the one of the magnetic heads.
A method for manufacturing a silicon carbide epitaxial wafer includes forming a first silicon carbide layer on a silicon carbide wafer by epitaxially growing silicon carbide at a first growth rate of not less than 0.5 μm/h and not more than 2 μm/h to have a film thickness of not less than 1 nm and not more than 100 nm, a bump density of the first silicon carbide layer being a first density; and forming a second silicon carbide layer on the first silicon carbide layer by epitaxially growing silicon carbide at a second growth rate of greater than 2 μm/h and not more than 100 μm/h to have a film thickness of not less than 4 μm and not more than 100 μm, a bump density of the second silicon carbide layer being a second density that is less than the first density.
C30B 29/68 - Cristaux avec une structure multicouche, p. ex. superréseaux
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H10D 62/60 - Distribution ou concentrations d’impuretés
H10D 62/832 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé étant des matériaux du groupe IV comprenant deux éléments ou plus, p. ex. SiGe
According to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element provided between the first and the second magnetic poles. The magnetic element includes first to fifth magnetic layers. A differential electric resistance of the magnetic element when a voltage between the first magnetic pole and the second magnetic pole being changed includes a first positive peak and a second positive peak. The voltage corresponding to the first positive peak is a first positive peak voltage. The voltage corresponding to the second positive peak is a second positive peak voltage. The second positive peak voltage is higher than the first positive peak voltage. An element voltage applied between the first magnetic pole and the second magnetic pole in a recording operation is higher than the second positive peak voltage.
According to one embodiment, a magnetic head includes a first magnetic pole, a second magnetic pole, and a magnetic element. The magnetic element is provided between the first magnetic pole and the second magnetic pole in a first direction from the first magnetic pole to the second magnetic pole. The magnetic element includes a first magnetic layer provided between the first magnetic pole and the second magnetic pole, a second magnetic layer provided between the first magnetic layer and the second magnetic pole, a third magnetic layer provided between the second magnetic layer and the second magnetic pole, and a fourth magnetic layer provided between the third magnetic layer and the second magnetic pole. The first magnetic layer includes a first face facing the first magnetic pole. The fourth magnetic layer includes a second face facing the second magnetic pole.
G11B 5/147 - Structure ou fabrication des têtes, p. ex. têtes à variation d'induction comportant des noyaux formés de feuilles métalliques, c.-à-d. noyaux en lamelles
G11B 5/02 - Procédés d'enregistrement, de reproduction ou d'effacementCircuits correspondants pour la lecture, l'écriture ou l'effacement
A semiconductor device includes a first electrode, a first conductive part, a semiconductor part, a second conductive part, a gate electrode and an insulating part. The first conductive part includes at least one of a metal, a metal oxide, or a metal nitride. The at least one of the metal, the metal oxide, or the metal nitride includes at least one selected from the group consisting of Ti, Ta, W, Cr, and Ru. The semiconductor part includes a first semiconductor region and a second semiconductor region. The first conductive part has a Schottky contact with the first semiconductor region. The second conductive part has a Schottky contact with the second semiconductor region. The second conductive part includes at least one selected from the group consisting of Pt, Ni, Ir, Pd, Au, and Co.
A method of manufacturing a magnetic disk device of an embodiment includes: adjusting relative heights of a spindle and a plurality of ramps, the spindle being allowed to rotate in a state in which center axes of a plurality of magnetic disks having ends deviating from a geometrical plane with a center point as a reference are aligned, the plurality of ramps being arranged at end positions of the plurality of magnetic disks; and assembling the plurality of magnetic disks along an axial direction of the spindle in a state in which directions of deviations of the ends from the center point are aligned.
A magnetic disk apparatus according to an embodiment includes a magnetic disk, a magnetic head, a second memory, and a controller. On the magnetic disk, a servo sector where first servo data is recorded is provided. The magnetic head writes data and reads data to and from the magnetic disk. The first memory stores data to be written and stores data read from the magnetic disk. The second memory stores second servo data. The controller acquires the second servo data corresponding to the first servo data from the second memory based on the first servo data read by the magnetic head when passing over the servo sector. The controller executes positioning control of the magnetic head by using the first servo data and the second servo data.
G11B 5/596 - Disposition ou montage des têtes par rapport aux supports d'enregistrement comportant des dispositions pour déplacer la tête dans le but de maintenir l'alignement relatif de la tête et du support d'enregistrement pendant l'opération de transduction, p. ex. pour compenser les irrégularités de surface ou pour suivre les pistes du support pour suivre les pistes d'un disque
G11B 5/00 - Enregistrement par magnétisation ou démagnétisation d'un support d'enregistrementReproduction par des moyens magnétiquesSupports d'enregistrement correspondants
G11B 5/012 - Enregistrement, reproduction ou effacement sur des disques magnétiques
G11B 5/02 - Procédés d'enregistrement, de reproduction ou d'effacementCircuits correspondants pour la lecture, l'écriture ou l'effacement
According to one embodiment, a magnetic head includes a reproducing section including a medium facing face. The reproducing section includes a first magnetic element including a first magnetic layer, a second magnetic layer, and a third magnetic layer. The first magnetic layer is provided between the third magnetic layer and the second magnetic layer in a first direction along the medium facing face. A first magnetic layer magnetization of the first magnetic layer includes a first component along a second direction crossing the medium facing face. A second magnetic layer magnetization of the second magnetic layer includes a second component along the second direction. A direction of the second component is opposite to a direction of the first component. A third magnetic layer magnetization of the third magnetic layer includes a third component along a third direction crossing a plane including the first direction and the second direction.
An on-period of a second gate electrode is shorter than an on-period of a first gate electrode in a period from when the first gate electrode is turned on until the first gate electrode is turned off. An on-period of a third gate electrode is shorter than the on-period of the second gate electrode in the period from when the first gate electrode is turned on until the first gate electrode is turned off. A timing at which a third gate voltage of the third gate electrode reaches a third threshold voltage and a start timing of a third Miller period of the third gate voltage are within a first Miller period of a first gate voltage of the first gate electrode and within a second Miller period of a second gate voltage of the second gate electrode.
H03K 17/567 - Circuits caractérisés par l'utilisation d'au moins deux types de dispositifs à semi-conducteurs, p. ex. BIMOS, dispositifs composites tels que IGBT
A control device includes a controller, a predictor, and a corrector. The controller generates a control value on the basis of a command value and an output value output from a control target. The predictor predicts the output value on the basis of an input value input to the control target and a predictive model of the control target and generates a prediction value indicating a result of predicting the output value. The corrector corrects the control value on the basis of the command value, the output value, and the prediction value. The input value input to the control target is the control value corrected by the corrector.
G05B 13/04 - Systèmes de commande adaptatifs, c.-à-d. systèmes se réglant eux-mêmes automatiquement pour obtenir un rendement optimal suivant un critère prédéterminé électriques impliquant l'usage de modèles ou de simulateurs
G05B 13/02 - Systèmes de commande adaptatifs, c.-à-d. systèmes se réglant eux-mêmes automatiquement pour obtenir un rendement optimal suivant un critère prédéterminé électriques
An inspection device for performing operation inspection of a circuit including a transistor may include, but is not limited to, a standard calculating circuitry and a standard determining circuitry. The standard calculating circuitry is configured to calculate an electrical standard of the transistor on the basis of information on specifications of the transistor. The standard determining circuitry is configured to determine whether an inspection data group including temporal data of a value of current flowing in the transistor in a predetermined time range and of a value of voltage applied to the transistor satisfies the electrical standard and to output data which is determined not to satisfy the electrical standard in the inspection data group.
A noise model generating method includes calculating a transfer function from inside of an integrated circuit of an electric circuit to a measurement point in the electric circuit; acquiring a noise level waveform of a frequency with a high correlation with a trigger signal from measurement results of noise when the integrated circuit is caused to output the trigger signal; and generating the noise model of the integrated circuit on the basis of the transfer function calculated and the noise level waveform acquired. Acquiring the noise level waveform further includes: causing the integrated circuit to output a trigger signal; measuring the trigger signal and noise at the measurement point at time intervals to obtain measured values at the measurement point and at the time intervals; performing a conversion operation to generate, for each frequency, the noise level waveform indicating a change of the noise over time on the basis of the measured values at the measurement point; calculating, for each frequency, a correlation value indicating a correlation between the noise level waveform and a change of the trigger signal over time; and performing a filtering operation to extract the noise level waveform of a frequency with a high correlation from the correlation value.
According to one embodiment, a control method is provided. The control method includes: precharging, in a state where both of a first switching element and a second switching element in a power conversion device are turned off when the first and second switching elements perform a synchronous rectification operation, one end of the first switching element, the first and second switching elements being half-bridge connected between an input node and an output node, and the power conversion device converting an AC voltage into a DC voltage; and turning on the second switching element after the precharging the one end of the first switching element is completed.
H02M 7/219 - Transformation d'une puissance d'entrée en courant alternatif en une puissance de sortie en courant continu sans possibilité de réversibilité par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrode de commande utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs dans une configuration en pont
H02M 1/00 - Détails d'appareils pour transformation
99.
Shingled magnetic recording drive with efficient skip-sequential writing
Non-sequential write commands in a shingled magnetic recording (SMR) drive are efficiently executed using a skip-bypass mode. When certain conditions are detected in the command history of the drive, the drive changes to the skip-bypass mode. In skip-bypass mode, data associated with the write commands are received into memory of the drive and written directly to a new SMR band in a sequential write operation, thereby bypassing storage in a media cache of the SMR drive. Prior to the sequential write operation, data associated with logical block addresses (LBAs) disposed between the LBAs referenced by the non-sequential write commands are read into the memory by a sequential read operation. The data associated with the non-sequential write commands can then be written, along with the data read in the sequential read operation, in a single sequential write operation to the new SMR band.
A method according to one embodiment includes acquiring a result of quality inspection related to recording quality of first sectors included in a first storage area of a magnetic disk. The method includes calculating a first number being the number of sectors corresponding to a capacity obtained by subtracting a set capacity from an actual capacity of the first storage area. The first number is calculated based on the set capacity of the first storage area and a set value of recording density of the first storage area. The method includes selecting a second number of sectors from the first sectors based on the result of quality inspection. The method includes assigning addresses to a group of sectors that are not included in the second number of sectors among the first sectors. The group of sectors consists of sectors with the number corresponding to the set capacity.
