Marvell Asia PTE, Ltd.

Singapore


Create a watch for Marvell Asia PTE, Ltd.
Total IP 6,401
Total IP Rank # 164
IP Activity Score 3.9/5.0    1,668
IP Activity Rank # 421
Parent Entity Marvell Technology Group Ltd.
Dominant Nice Class Scientific and electric apparatu...

Patents

Trademarks

6,107 57
3 41
121 3
69
 
Last Patent 2026 - Circuit and method for translati...
First Patent 1988 - Cylinder defect management syste...
Last Trademark 2025 - COMPASS
First Trademark 1993 - QLOGIC

Industry (Nice Classification)

Latest Inventions, Goods, Services

2025 G/S semiconductors; Microprocessors; Semiconductor chips; Semiconductor computer chips; Semiconductor...
G/S Downloadable computer software for use in monitoring circuit compliance with CMIS; Downloadable t...
G/S Computer hardware; Computer chips; Computer memory hardware; Electronic circuits; semiconductors;...
Invention Associatively indexed circular buffer. Some embodiments of the present disclosure provide an ass...
Invention Multistage compiler architecture. A system includes a compiler including a plurality of compiler...
Invention Method and system to support data streaming for matrix operations via a machine learning hardware...
Invention Method of using unit vectors to allow expansion and collapse of header layers within packets for ...
Invention Communication protocol for machine learning. A leaf network switch in a machine learning system r...
Invention Communication protocol for machine learning. A leaf network switch in a machine learning system ...
Invention Link monitor for unretimed interfaces. Linear unretimed interfaces lack clock and data recovery ...
Invention Serdes sampling scope debug mode. A clock recovery loop in a digital signal processor for a seri...
Invention Substrate package with efficient support for signal routing for high data rate applications. A d...
Invention Method and apparatus for secured key distribution between a host and a resource constrained ether...
Invention Method and apparatus to support timer synchronization among multiple chips. A new approach is pr...
Invention All-digital phase locked loop phase tracking techniques. An ADPLL circuit includes a phase compa...
Invention Integration of bga package on pcb with reduced crosstalk. A device includes an electrical board i...
Invention Forward error correction encoding using intermediate information corresponding to multiple modula...
Invention Multi-decision feedback equalization in a receiver device. A receiver device receives a signal tr...
Invention Double seal ring and electrical connection of multiple chiplets. A package connecting first and ...
Invention Integration of bga package on pcb with reduced crosstalk. A device includes an electrical board ...
Invention Multi-decision feedback equalization in a receiver device. A receiver device receives a signal t...
Invention Differential voltage-mode driver for microwave-assisted magnetic recording. This disclosure desc...
Invention Differential current-mode driver for microwave assisted magnetic recording. The present disclosu...
Invention Shared memory controller with direct memory access architecture for on-chip memory. The present d...
Invention Shared memory controller with direct memory access architecture for on-chip memory. The present ...
G/S Data processors used in computers, security sub-systems networking equipment, namely, hardware ac...
Invention Low-latency decompressor. An example method of low-latency decompression includes receiving a da...
Invention Method and system for reconfigurable parallel lookups using multiple shared memories. Embodiment...
Invention Warpage mitigation in a cluster of multiple high bandwidth memory stacks. An electronic device i...
Invention Hybrid logical to physical address mapping cross reference to related application. The present di...
Invention Hybrid logical to physical address mapping. The present disclosure describes apparatuses and met...
Invention Method and apparatus for multi-stage equalization for reading data from storage media. Data read ...
Invention Encoding and decoding using probabilistic shaping. A transmitter generates a set of transmission...
2024 G/S Electronic circuits; semiconductors; semiconductor chips; semiconductor computer chips; integrate...
G/S Electronic circuits; Semiconductors; Semiconductor chips; Semiconductor computer chips; Integrate...
Invention Circuit and method for translation lookaside buffer (tlb) implementation. A circuit and correspon...
Invention Traffic characteristics for target wake time (twt) negotiation. A first communication device gene...
2023 G/S Clothing, namely, shirts, pants, clothing jerseys, clothing jackets, vests, and hooded pullovers;...
Invention Optimized path selection for multi-path groups. A packet to be forwarded over a computer network ...
Invention Decoder-assisted llr calculation. A method for decoding data in a memory device includes attempti...
Invention Clock gating for scan shift clock in a mesh clock environment. Clock distribution circuitry, for ...
Invention Xor-gate-based quadrature phase detector with compensation for device offsets. A circuit includes...
Invention Polar codes for error correction in non-volatile memory devices. A solid state drive (SSD) device...
G/S Computer hardware; computer chips; semiconductors; semiconductor chips and chip sets; microproces...
Invention Skew detection and correction of complementary clock signals. A first network device includes a p...
Invention Controlling uniformity of electrical current distribution in device for power delivery to integra...
Invention Setup and training of links between host devices and optical modules including menu-based and mul...
G/S Semiconductors, integrated circuits, computer networking switches, and computer networking interf...
Invention Wakeup mechanism for energy efficient ethernet (eee) with time-sensitive communications. A commun...
Invention Receiver compensation for low extinction ratio at transmitter. A digital signal processor (DSP) o...
Invention Shielded ball-out and via patterns for land grid array (lga) devices. An electronic network devic...
Invention Silicon nitride-to-silicon waveguide assembly for broadband communication including concurrent pr...
2022 Invention Quick floorplanning tool. A system for designing placement locations for Input/Output (I/O) block...
Invention Dll-based clocking architecture with programmable delay at phase detector inputs. A delay-locked ...
Invention Power terminal sharing with noise isolation. An integrated circuit device, having a first number ...
G/S Computer hardware; computer chips; semiconductors; semiconductor chips; integrated circuits; mic...
Invention Software/firware updates during network link establishment. A link establishment process for esta...
Invention Physical layer transceiver with collision avoidance in high noise and interference environment. S...
2021 G/S Computer hardware; computer chips; semiconductors; semiconductor chips; integrated circuits; micr...
Invention System and methods for firmware update mechanism. A new approach is proposed to support hardware-...
2020 G/S Integrated circuits and semiconductor devices
G/S Scientific, optical, signalling and checking apparatus and instruments; apparatus for recording, ...
G/S Computer hardware; semiconductors; semiconductor chips and chip sets for use in transmitting data...
G/S Computer hardware; semiconductors; semiconductor chips and chip sets; integrated circuits in the ...
G/S Designing computer hardware in the nature of semiconductors, semiconductor chips and chip sets, i...
G/S Computer hardware; semiconductors; semiconductor chips and chip sets; Integrated circuits, integr...
G/S Designing semiconductors, semiconductor chips and chip sets, integrated circuits, integrated circ...
2018 G/S Semiconductors and integrated circuits incorporating error correction mechanisms for use in flash...
G/S Semiconductors; integrated circuits; circuit boards; formatter boards; microprocessors; microcont...
G/S Network appliances in the nature of computer hardware; server adapters; network adapters; applica...
G/S Semiconductor chips; Multi-core RISC system on chip processors for data center and cloud applicat...
G/S Computer hardware; computer hardware and peripherals; computer networking hardware; computer memo...
G/S Semiconductors, semiconductor chip sets, microprocessors, customized microprocessors and related ...
2017 G/S Feature of an Ethernet switch which automatically links a network or storage adapter to the Ether...
G/S Semiconductors; semiconductor chips and chip sets; microprocessors; customized microprocessors; c...
G/S Semiconductor chips; Multi-core risc system on chip processors for data center and cloud applicat...