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2025
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Invention
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Flexible metadata allocation and caching.
An apparatus and method for flexible metadata allocati... |
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Invention
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Monitor circuitry for decision feedback equalized receiver.
Decision feedback equalization (DFE)... |
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Invention
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Multi-modal refresh of dynamic, random-access memory.
A memory system includes two or more memor... |
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Invention
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Memory module with persistent calibration.
A memory module includes one or more memory devices a... |
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Invention
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Memory device with command/address (ca) failure recovery. An integrated circuit (IC) memory devic... |
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Invention
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Multiplexing memory module. Memory devices on a memory module may include two (or more) interface... |
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Invention
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Quad-channel memory module with interleaved data communication.
A four-channel by two ranks-per-... |
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Invention
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Buffered dynamic random access memory device.
A DRAM device may be configured to retransmit or n... |
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Invention
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Shared unidirectional timing signals. A multi-channel (e.g., two channel) memory device (e.g., dy... |
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Invention
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Multi-element memory device with power for individual elements.
An integrated circuit host devic... |
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Invention
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Interleaved bank accesses. CCD_LCCD_L/2 |
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Invention
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Partial array refresh timing.
A memory controller combines information about which memory compon... |
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Invention
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Selectable multi-stage error detection and correction.
When writing a block (e.g., cache line) o... |
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Invention
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Memory system with multiple open rows per bank.
A dynamic random access memory (DRAM) component ... |
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Invention
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Stacked device communication.
An interconnected stack of one or more Dynamic Random Access Memor... |
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Invention
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Command-triggered data clock distribution.
An integrated circuit includes a physical layer inter... |
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Invention
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Dram module. Designs of a memory module can be configured for multiple rank configurations by var... |
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Invention
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Wide parallel access. CCD_SCCD_SCCD_S) per pin bitrate. |
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Invention
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Stacked memory device with paired channels.
A stacked memory device includes memory dies over a ... |
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Invention
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High level instructions with lower-level assembly code style primitives within a memory appliance... |
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Invention
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Row address mapping. A memory device is operated using a reduced row address space (e.g., 48k row... |
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Invention
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Circuits and methods for self-adaptive decision-feedback equalization in a memory system.
Descri... |
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Invention
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Memory with data loop-back.
A memory controller component of a memory system stores memory acces... |
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Invention
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On-die termination.
Local on-die termination controllers for effecting termination of a high-spe... |
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Invention
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Memory module register access.
During system initialization, each data buffer device and/or memo... |
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Invention
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Direct attached memory assembly. Multiple stacks of dynamic random access memory devices are coup... |
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Invention
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Integrity and data encryption (ide) shared across multiple interconnect controllers. Technologies... |
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Invention
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Failover methods and systems in three-dimensional memory device.
Described are memory systems an... |
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Invention
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Bus distribution using multiwavelength multiplexing.
Command/address and timing information is d... |
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Invention
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Row and column page accesses.
A memory device has a row access page mode that concurrently activ... |
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Invention
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Variable memory access granularity.
An integrated-circuit memory component receives, as part of ... |
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Invention
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Forwarding signal supply voltage in data transmission system.
In a data transmission system, one... |
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Invention
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Dynamically changing data access bandwidth by selectively enabling and disabling data links.
Ban... |
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Invention
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Emulated-architecture memory.
Stacked-die memory components are programmably configurable to emu... |
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Invention
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Memory system with threaded transaction support.
Memory modules, systems, memory controllers and... |
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Invention
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Memory component having internal read-modify-write operation.
An memory component includes a mem... |
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Invention
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Regulator offset voltage cancelation.
A target voltage is compared to a feedback voltage from a ... |
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Invention
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Dram cache cleaning.
A dynamic random access memory (DRAM) device includes functions configured ... |
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Invention
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Multi-die layer memory device.
A memory device (e.g., a dynamic random access memory—DRAM) is co... |
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2024
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Invention
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Protocol for refresh between a memory controller and a memory device.
The present embodiments pr... |
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Invention
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Clocking architecture supporting multiple data rates and reference edge selection. A clocking arc... |
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2023
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Invention
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Latency-controlled integrity and data encryption (ide).
Technologies for providing integrity and... |
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Invention
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Multi-channel memory stack with shared die.
An interconnected stack of Dynamic Random Access Mem... |
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Invention
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Strobeless dynamic ransom access memory (dram) data interface with drift tracking circuitry.
Mem... |
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Invention
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Memory with interleaved preset.
A memory system includes a host controller that issues access co... |
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Invention
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A high-speed, low-power, and area-efficient transmitter.
A transmitter employs simple inverters ... |
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Invention
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Dynamic, random-access memory with interleaved refresh.
A memory includes a local control circui... |
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Invention
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Memory management with implicit identification of cryptographic keys using error correction data.... |
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Invention
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3d memory device with local column decoding.
A 3D memory device includes a plurality of mats tha... |
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2020
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Invention
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Stall-driven multi-processing. In a microprocessor having an instruction execution unit and first... |
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2014
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G/S
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computer hardware and software for electronic design interface validation and testing; computer h... |
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G/S
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Computer hardware and software for validation and testing of electronic circuitry and chips; comp... |
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2012
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G/S
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Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di... |
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2011
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G/S
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Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'... |
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G/S
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Apparatus and instruments for recording, transmitting,
processing, storing and exchanging data, ... |
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G/S
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Apparatus and instruments for the recording, transmission, processing, storage and exchange of da... |
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2008
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G/S
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Computers; computer hardware; computer memories; application-specific integrated circuits and gra... |
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2004
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G/S
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Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste... |
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G/S
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Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys... |
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2003
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G/S
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Licensing of intellectual property and technology; patent licensing |
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G/S
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Computer hardware; computer software; computer peripherals; computer memory components; microproc... |
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2002
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G/S
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LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS |
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G/S
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Licensing of intellectual property and technology |
|
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G/S
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Computer software and hardware, especially in the field of encrypted and secure communication as ... |
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1996
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G/S
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Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas... |
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1995
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G/S
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microprocessor components, peripheral controller components and computer memory components, namel... |
