|
2025
|
Invention
|
Stacked semiconductor device assembly in computer system.
This application is directed to a stac... |
|
2024
|
Invention
|
Data-buffer controller/control-signal redriver.
In a memory system having multiple memory socket... |
|
|
Invention
|
Memory modules and systems with variable-width data ranks and configurable data-rank timing.
A m... |
|
|
Invention
|
Power efficient circuits and methods for phase alignment.
A timing-calibration circuit uses an a... |
|
|
Invention
|
Load reduced memory module.
The embodiments described herein describe technologies for memory sy... |
|
|
Invention
|
Command-differentiated storage of internally and externally sourced data.
A memory device having... |
|
|
Invention
|
Impedance compensation circuit. An integrated circuit (IC) chip is disclosed. The IC chip include... |
|
|
Invention
|
Memory controllers, systems and methods supporting multiple request modes.
A memory system inclu... |
|
|
Invention
|
Access granularity refresh control.
A system and method of operation in a dynamic random access ... |
|
|
Invention
|
Asymmetric-channel memory system.
An expandable memory system that enables a fixed signaling ban... |
|
|
Invention
|
Hot data detection for disaggregated memory using bloom filters.
A system includes a memory syst... |
|
|
Invention
|
Memory with deferred fractional row activation.
Row activation operations within a memory compon... |
|
|
Invention
|
Calibration of process, temperature, and supply compensated regulator. A control value controllab... |
|
|
Invention
|
Deterministic operation of storage class memory.
Memory controllers, devices, modules, systems a... |
|
|
Invention
|
Multi-port memory device with built-in configurable logic block to perform a parallel computing o... |
|
|
Invention
|
Off-module data buffer.
In a modular memory system, a memory control component, first and second... |
|
|
Invention
|
Memory apparatus and method for improved write-read turnaround times. A memory includes interface... |
|
|
Invention
|
Methods and circuits for slew-rate calibration.
Described is an integrated circuit with a drivin... |
|
|
Invention
|
Quad-data-rate (qdr) host interface in a memory system.
Technologies for converting quad data ra... |
|
|
Invention
|
Dynamically configurable multi-ported dram. A memory device has a relatively wide, multi-pad data... |
|
|
Invention
|
Memory-integrated neural network.
An integrated-circuit neural network includes chain of multipl... |
|
|
Invention
|
Page detection using recency score filters.
A memory buffer device and memory module for accurat... |
|
|
Invention
|
Memory device assisted error correction. A memory controller includes a memory interface configur... |
|
|
Invention
|
Clock buffer.
A phase-locked loop or delay locked loop provides a coarse alignment between an in... |
|
|
Invention
|
Hardware tracking of memory accesses.
Technologies for hardware-based memory access telemetry tr... |
|
|
Invention
|
Protocol including timing calibration between memory request and data transfer.
The described em... |
|
|
Invention
|
Memory device with staggered access.
A memory device supports low power operation by facilitatin... |
|
|
Invention
|
Joint command dynamic random access memory (dram) apparatus and methods.
Memory controllers, dev... |
|
|
Invention
|
Method and apparatus for calibrating write timing in a memory system.
A system that calibrates t... |
|
|
Invention
|
Memory module with reduced read/write turnaround overhead.
A memory module includes a substrate,... |
|
|
Invention
|
Multi-processor device with external interface failover.
A multi-processor device is disclosed. ... |
|
|
Invention
|
Folded memory modules.
A memory module comprises a data interface including a plurality of data ... |
|
|
Invention
|
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die.
A pa... |
|
|
Invention
|
Row hammer event tracking. A random access memory device includes memory cells associated with ea... |
|
|
Invention
|
Power management integrated circuit device having multiple initialization/power up modes.
Disclo... |
|
|
Invention
|
Memory device comprising programmable command-and-address and/or data interfaces.
A memory devic... |
|
|
Invention
|
Training and operations with a double buffered memory topology.
System and method for training a... |
|
|
Invention
|
Memory device with configurable adaptive double device data correction.
Technologies for configu... |
|
|
Invention
|
Device assisted cold page tracking.
Disclosed are techniques for a memory buffer to track access... |
|
|
Invention
|
High capacity memory system using standard controller component.
The embodiments described herei... |
|
|
Invention
|
Memory component with error-detect-correct code interface.
A memory component internally generat... |
|
|
Invention
|
Data buffer for memory devices with memory address remapping.
A memory system includes a memory ... |
|
|
Invention
|
Memory repair method and apparatus based on error code tracking.
A memory module is disclosed th... |
|
|
Invention
|
Memory system for flexibly allocating compressed storage.
A memory system enables a host device ... |
|
|
Invention
|
Stacked memory component. An assembly comprises a single face up base die (a.k.a., logic die) tha... |
|
|
Invention
|
Mitigation of refresh management row hammer.
A controller periodically (based on, for example, c... |
|
|
Invention
|
Reordering memory controller.
A memory controller includes a request queue and associated logic ... |
|
|
Invention
|
High-capacity memory module with high command-bandwidth utilization and consistent latency. A mem... |
|
|
Invention
|
Memory module with memory-ownership exchange.
Described are computational systems in which hosts... |
|
2022
|
Invention
|
Split-path equalizer and related methods, devices and systems. This disclosure provides a split-p... |
|
2015
|
G/S
|
Computer hardware; integrated circuits; computer chips; microprocessors; computer memories; compu... |
|
2014
|
G/S
|
Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas... |
|
|
G/S
|
computer hardware and software for electronic design interface validation and testing; computer h... |
|
|
G/S
|
Computer hardware and software for validation and testing of electronic circuitry and chips; comp... |
|
2012
|
G/S
|
Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di... |
|
2011
|
G/S
|
Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'... |
|
|
G/S
|
Apparatus and instruments for recording, transmitting,
processing, storing and exchanging data, ... |
|
|
G/S
|
Apparatus and instruments for the recording, transmission, processing, storage and exchange of da... |
|
2008
|
G/S
|
Computers; computer hardware; computer memories; application-specific integrated circuits and gra... |
|
2004
|
G/S
|
Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste... |
|
|
G/S
|
Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys... |
|
2003
|
G/S
|
Semiconductor devices and integrated circuits |
|
|
G/S
|
Licensing of intellectual property and technology; patent licensing |
|
|
G/S
|
Computer hardware; computer software; computer peripherals; computer memory components; microproc... |
|
2002
|
G/S
|
LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS |
|
|
G/S
|
Licensing of intellectual property and technology |
|
|
G/S
|
Computer software and hardware, especially in the field of encrypted and secure communication as ... |
|
1995
|
G/S
|
microprocessor components, peripheral controller components and computer memory components, namel... |
