Rambus Inc.

United States of America


 
Total IP 2,372
Total IP incl. subs 2,685 (+ 313 for subs)
Total IP Rank # 548
IP Activity Score 3.7/5.0    1,233
IP Activity Rank # 603
IP AS incl. subs 3.5/5.0    1,448
Stock Symbol
ISIN US7509171069
Market Cap. 6,200M  (USD)
Industry Semiconductor Memory
Sector Technology
Dominant Nice Class Scientific and electric apparatu...

Patents

Trademarks

1,877 8
0 1
474 1
11
 
Last Patent 2025 - Protocol for refresh between a m...
First Patent 1990 - Optical display
Last Trademark 2015 - FASTPOINT
First Trademark 1995 - RAMBUS

Subsidiaries

2 subsidiaries with IP (303 patents, 10 trademarks)

1 subsidiaries without IP

 Register for free to unlock the subsidiary list

Industry (Nice Classification)

Latest Inventions, Goods, Services

2025 Invention Stacked semiconductor device assembly in computer system. This application is directed to a stac...
Invention Maintenance operations in a dram. A system includes a memory controller and a memory device havi...
Invention On-die termination of address and command signals. A memory device includes a set of inputs, and...
Invention Memory system with threaded transaction support. Memory modules, systems, memory controllers and...
Invention Memory component having internal read-modify-write operation. An memory component includes a mem...
Invention Memory component with input/output data rate alignment. First data is read out of a core storage...
Invention Controller to detect malfunctioning address of memory device. A dynamic random access memory (DR...
Invention Memory system using asymmetric source-synchronous clocking. The disclosed embodiments relate to ...
Invention Low power memory with on-demand bandwidth boost. In a memory component having a command/address ...
Invention Hierarchical bank group timing. The memory banks of a memory device are arranged and operated in...
Invention Integrated circuit with configurable on-die termination. Described are integrated-circuit die wi...
Invention Multi-die layer memory device. A memory device (e.g., a dynamic random access memory—DRAM) is co...
Invention Boosted writeback voltage. The dynamic memory array of a DRAM device is operated using at least ...
2024 Invention Protocol for refresh between a memory controller and a memory device. The present embodiments pr...
Invention Memory module threading with staggered data transfers. A method of transferring data between a m...
Invention Dram retention test method for dynamic error correction. A method of operation in an integrated ...
Invention Data-buffer controller/control-signal redriver. In a memory system having multiple memory socket...
Invention Memory modules and systems with variable-width data ranks and configurable data-rank timing. A m...
Invention Data chunk grouping for memory device with misaligned burst length. A memory device includes an a...
Invention Power efficient circuits and methods for phase alignment. A timing-calibration circuit uses an a...
Invention Configurable dram chiplet. A configurable assembly comprises a stack of dynamic random access mem...
Invention Autoranging configuration. Circuitry on an integrated circuit has performance characteristics tha...
Invention Load reduced memory module. The embodiments described herein describe technologies for memory sy...
Invention Memory device with internal ranks and interleaved access. A memory device operates with multiple ...
Invention Command-differentiated storage of internally and externally sourced data. A memory device having...
Invention Stacked dram device and method of manufacture. A memory device includes a first dynamic random a...
Invention Secure cross-host memory sharing. Techniques for providing secure cross-host memory sharing are ...
Invention Rowhammer mitigation for a memory die. Technologies for Rowhammer mitigation in a memory die are...
Invention Reduced latency clock domain crossing circuit. A clock domain crossing (CDC) circuit receives a ...
Invention Impedance compensation circuit. An integrated circuit (IC) chip is disclosed. The IC chip include...
Invention Memory controllers, systems and methods supporting multiple request modes. A memory system inclu...
Invention Access granularity refresh control. A system and method of operation in a dynamic random access ...
Invention Asymmetric-channel memory system. An expandable memory system that enables a fixed signaling ban...
Invention Hot data detection for disaggregated memory using bloom filters. A system includes a memory syst...
Invention Memory with deferred fractional row activation. Row activation operations within a memory compon...
Invention Calibration of process, temperature, and supply compensated regulator. A control value controllab...
Invention Deterministic operation of storage class memory. Memory controllers, devices, modules, systems a...
Invention Multi-port memory device with built-in configurable logic block to perform a parallel computing o...
Invention Off-module data buffer. In a modular memory system, a memory control component, first and second...
Invention Memory apparatus and method for improved write-read turnaround times. A memory includes interface...
Invention Methods and circuits for slew-rate calibration. Described is an integrated circuit with a drivin...
Invention Dynamically configurable multi-ported dram. A memory device has a relatively wide, multi-pad data...
Invention Page detection using recency score filters. A memory buffer device and memory module for accurat...
Invention Memory device assisted error correction. A memory controller includes a memory interface configur...
Invention Hardware tracking of memory accesses. Technologies for hardware-based memory access telemetry tr...
Invention Protocol including timing calibration between memory request and data transfer. The described em...
Invention Memory device with staggered access. A memory device supports low power operation by facilitatin...
Invention Joint command dynamic random access memory (dram) apparatus and methods. Memory controllers, dev...
Invention Row hammer event tracking. A random access memory device includes memory cells associated with ea...
2023 Invention Wireline link with crosstalk reduction based on controlled channel delay. Semiconductor devices, ...
2015 G/S Computer hardware; integrated circuits; computer chips; microprocessors; computer memories; compu...
2014 G/S computer hardware and software for electronic design interface validation and testing; computer h...
G/S Computer hardware and software for validation and testing of electronic circuitry and chips; comp...
2012 G/S Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di...
2011 G/S Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'...
G/S Apparatus and instruments for recording, transmitting, processing, storing and exchanging data, ...
G/S Apparatus and instruments for the recording, transmission, processing, storage and exchange of da...
2008 G/S Computers; computer hardware; computer memories; application-specific integrated circuits and gra...
2004 G/S Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste...
G/S Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys...
2003 G/S Semiconductor devices and integrated circuits
G/S Licensing of intellectual property and technology; patent licensing
G/S Computer hardware; computer software; computer peripherals; computer memory components; microproc...
2002 G/S LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS
G/S Licensing of intellectual property and technology
G/S Computer software and hardware, especially in the field of encrypted and secure communication as ...
1996 G/S Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas...
1995 G/S microprocessor components, peripheral controller components and computer memory components, namel...