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2025
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Invention
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Variable memory access granularity.
An integrated-circuit memory component receives, as part of ... |
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Invention
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Forwarding signal supply voltage in data transmission system.
In a data transmission system, one... |
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Invention
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Stacked semiconductor device assembly in computer system.
This application is directed to a stac... |
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Invention
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Maintenance operations in a dram.
A system includes a memory controller and a memory device havi... |
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Invention
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On-die termination of address and command signals.
A memory device includes a set of inputs, and... |
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Invention
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Dynamically changing data access bandwidth by selectively enabling and disabling data links.
Ban... |
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Invention
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Emulated-architecture memory.
Stacked-die memory components are programmably configurable to emu... |
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Invention
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Memory system with threaded transaction support.
Memory modules, systems, memory controllers and... |
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Invention
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Memory component having internal read-modify-write operation.
An memory component includes a mem... |
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Invention
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Memory component with input/output data rate alignment.
First data is read out of a core storage... |
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Invention
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Controller that receives a cyclic redundancy check (crc) code for both read and write data transm... |
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Invention
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Controller to detect malfunctioning address of memory device.
A dynamic random access memory (DR... |
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Invention
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Memory system using asymmetric source-synchronous clocking.
The disclosed embodiments relate to ... |
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Invention
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Low power memory with on-demand bandwidth boost.
In a memory component having a command/address ... |
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Invention
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Hierarchical bank group timing.
The memory banks of a memory device are arranged and operated in... |
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Invention
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Dram cache cleaning.
A dynamic random access memory (DRAM) device includes functions configured ... |
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Invention
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Integrated circuit with configurable on-die termination.
Described are integrated-circuit die wi... |
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Invention
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Multi-die layer memory device.
A memory device (e.g., a dynamic random access memory—DRAM) is co... |
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Invention
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Boosted writeback voltage.
The dynamic memory array of a DRAM device is operated using at least ... |
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2024
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Invention
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Protocol for refresh between a memory controller and a memory device.
The present embodiments pr... |
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Invention
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Memory module threading with staggered data transfers.
A method of transferring data between a m... |
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Invention
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Dram retention test method for dynamic error correction.
A method of operation in an integrated ... |
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Invention
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Data-buffer controller/control-signal redriver.
In a memory system having multiple memory socket... |
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Invention
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Memory modules and systems with variable-width data ranks and configurable data-rank timing.
A m... |
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Invention
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Data chunk grouping for memory device with misaligned burst length. A memory device includes an a... |
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Invention
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Power efficient circuits and methods for phase alignment.
A timing-calibration circuit uses an a... |
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Invention
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Configurable dram chiplet. A configurable assembly comprises a stack of dynamic random access mem... |
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Invention
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Autoranging configuration. Circuitry on an integrated circuit has performance characteristics tha... |
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Invention
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Load reduced memory module.
The embodiments described herein describe technologies for memory sy... |
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Invention
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Memory device with internal ranks and interleaved access. A memory device operates with multiple ... |
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Invention
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Command-differentiated storage of internally and externally sourced data.
A memory device having... |
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Invention
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Stacked dram device and method of manufacture.
A memory device includes a first dynamic random a... |
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Invention
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Secure cross-host memory sharing.
Techniques for providing secure cross-host memory sharing are ... |
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Invention
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Rowhammer mitigation for a memory die.
Technologies for Rowhammer mitigation in a memory die are... |
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Invention
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Reduced latency clock domain crossing circuit.
A clock domain crossing (CDC) circuit receives a ... |
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Invention
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Impedance compensation circuit. An integrated circuit (IC) chip is disclosed. The IC chip include... |
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Invention
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Memory controllers, systems and methods supporting multiple request modes.
A memory system inclu... |
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Invention
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Access granularity refresh control.
A system and method of operation in a dynamic random access ... |
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Invention
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Asymmetric-channel memory system.
An expandable memory system that enables a fixed signaling ban... |
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Invention
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Hot data detection for disaggregated memory using bloom filters.
A system includes a memory syst... |
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Invention
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Memory with deferred fractional row activation.
Row activation operations within a memory compon... |
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Invention
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Calibration of process, temperature, and supply compensated regulator. A control value controllab... |
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Invention
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Multi-port memory device with built-in configurable logic block to perform a parallel computing o... |
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Invention
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Memory apparatus and method for improved write-read turnaround times. A memory includes interface... |
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Invention
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Dynamically configurable multi-ported dram. A memory device has a relatively wide, multi-pad data... |
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Invention
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Protocol including timing calibration between memory request and data transfer.
The described em... |
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Invention
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Memory device with staggered access.
A memory device supports low power operation by facilitatin... |
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2023
|
Invention
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Wireline link with crosstalk reduction based on controlled channel delay. Semiconductor devices, ... |
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Invention
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Memory management with implicit identification of cryptographic keys using error correction data.... |
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2020
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Invention
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Stall-driven multi-processing. In a microprocessor having an instruction execution unit and first... |
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2015
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G/S
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Computer hardware; integrated circuits; computer chips; microprocessors; computer memories; compu... |
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2014
|
G/S
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computer hardware and software for electronic design interface validation and testing; computer h... |
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G/S
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Computer hardware and software for validation and testing of electronic circuitry and chips; comp... |
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2012
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G/S
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Light emitting diode (LED) light controls; light emitting diode (LED) displays; light emitting di... |
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2011
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G/S
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Appareils et instruments pour l'enregistrement, la transmission, le traitement, le stockage et l'... |
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G/S
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Apparatus and instruments for recording, transmitting,
processing, storing and exchanging data, ... |
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G/S
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Apparatus and instruments for the recording, transmission, processing, storage and exchange of da... |
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2008
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G/S
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Computers; computer hardware; computer memories; application-specific integrated circuits and gra... |
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2004
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G/S
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Computers; computer hardware; computer memories; memory devices; memory controllers; memory syste... |
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G/S
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Computer memories; memory devices, namely, [ dynamic random access memories (DRAMS), ] memory sys... |
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2003
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G/S
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Semiconductor devices and integrated circuits |
|
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G/S
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Licensing of intellectual property and technology; patent licensing |
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G/S
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Computer hardware; computer software; computer peripherals; computer memory components; microproc... |
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2002
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G/S
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LICENSING OF INTELLECTUAL PROPERTY AND PATENTED TECHNOLOGY TO OTHERS |
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G/S
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Licensing of intellectual property and technology |
|
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G/S
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Computer software and hardware, especially in the field of encrypted and secure communication as ... |
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1996
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G/S
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Scientific, nautical, surveying, electric, photographic, cinematographic, optical, weighing, meas... |
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1995
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G/S
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microprocessor components, peripheral controller components and computer memory components, namel... |
