|
|
Found results for
patents
1.
|
INTEGRATED SYSTEMS AND METHODS FOR MANUFACTURING MULTILAYER CAPACITOR ELEMENTS
| Application Number |
US2026011124 |
| Publication Number |
2026/152148 |
| Status |
In Force |
| Filing Date |
2026-01-13 |
| Publication Date |
2026-07-16 |
| Owner |
CAPORUS TECHNOLOGIES, INC. (USA)
|
| Inventor |
- O'Connor, Kevin A.
- Traynor, Carl M.
- Boehme, Michael A.
- Acosta, Eric M.
|
Abstract
Systems and methods of integrated manufacturing a plurality of multilayer capacitor elements are disclosed. The integrated system includes an unwinding unit configured to dispense a source roll of metallized film coated with a dielectric coating; a patterning unit configured to pattern a conductor of the metallized film coated with the dielectric coating, wherein patterning comprises forming electrode geometries margin locations, defect-isolation regions, alternating electrode layers, or a combination of any two or more thereof for capacitor formation; a slitting mechanism comprising a plurality of adjustable blades configured to slit the metallized film with the dielectric coating into a plurality of narrow strips of patterned metallized film with the dielectric coating; and a rewinding unit configured to wind an individual narrow strip, forming the plurality of multilayer capacitor elements with aligned margins, defect-isolation regions, alternating electrode layers, or a combination of any two or more thereof.
IPC Classes ?
- H01G 13/00 - Apparatus specially adapted for manufacturing capacitorsProcesses specially adapted for manufacturing capacitors not provided for in groups
- H01G 13/02 - Machines for winding capacitors
- H01G 4/232 - Terminals electrically connecting two or more layers of a stacked or rolled capacitor
- H01G 4/30 - Stacked capacitors
- H01G 4/32 - Wound capacitors
- H01G 4/33 - Thin- or thick-film capacitors
- H01G 4/38 - Multiple capacitors, i.e. structural combinations of fixed capacitors
- H01G 4/012 - Form of non-self-supporting electrodes
|
2.
|
CAPACITIVE STRUCTURES AND POROUS SEMICONDUCTORS IN ENGINEERED SUBSTRATES
| Application Number |
US2025041678 |
| Publication Number |
2026/039452 |
| Status |
In Force |
| Filing Date |
2025-08-12 |
| Publication Date |
2026-02-19 |
| Owner |
CAPORUS TECHNOLOGIES, INC. (USA)
|
| Inventor |
- O'Connor, Kevin Andrew
- Cable, James
|
Abstract
An article includes a crystalline semiconductor substrate, a structured dielectric region disposed on the crystalline semiconductor substrate, the structured dielectric region including a plurality of pillars extending from the crystalline semiconductor substrate, and a filler material including a porous dielectric material, a nonporous dielectric material, vacuum, a gas, or a combination of two or more thereof disposed in regions separating the plurality of pillars; an insulating oxide layer disposed on the structured dielectric region; and a device layer comprising a crystalline semiconductor or piezoelectric material; where: each of the plurality of pillars has a width of about 100 nm to about 40 μm; the plurality of pillars are formed of the crystalline semiconductor substrate; and the structured dielectric region exhibits an effective resistivity higher than a resistivity of the crystalline semiconductor substrate, or the filler material exhibits an effective permittivity lower than a permittivity of the crystalline semiconductor substrate.
IPC Classes ?
- H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
- H01L 21/762 - Dielectric regions
- H10N 30/073 - Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by laminating or bonding of piezoelectric or electrostrictive bodies by fusion of metals or by adhesives
|
3.
|
Dielectric structures for electrical insulation with vacuum or gas
| Application Number |
16576438 |
| Grant Number |
10726995 |
| Status |
In Force |
| Filing Date |
2019-09-19 |
| First Publication Date |
2020-03-19 |
| Grant Date |
2020-07-28 |
| Owner |
CAPORUS TECHNOLOGIES, INC. (USA)
|
| Inventor |
O'Connor, Kevin Andrew
|
Abstract
A dielectric structure including solid dielectric regions incorporating a plurality of regions of vacuum or gas is provided. The dielectric constant of the regions of solid dielectrics can have a dielectric constant greater than 4. Each of the plurality of regions of vacuum or gas or the regions of solid dielectrics may be anisotropic with an aspect ratio of at least four. The smallest average dimension of a plurality of regions of vacuum or gas and/or solid dielectrics can have a length of less than 1 micron. The dielectric structure may have a higher electrical energy density in the regions of vacuum or gas than in the solid matrix. One or more electrodes of the capacitive structure can be coated with a solid insulating layer without an interface between a region of vacuum or gas and electrode.
IPC Classes ?
- H01G 4/20 - Dielectrics using combinations of dielectrics from more than one of groups
- H01G 4/10 - Metal-oxide dielectrics
- H01G 4/02 - Gas or vapour dielectrics
- H01B 3/16 - Insulators or insulating bodies characterised by the insulating materialsSelection of materials for their insulating or dielectric properties mainly consisting of inorganic substances gases
|
|