Integrated Technology Corporation

United States of America

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        Patent 5
        Trademark 1
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        United States 5
        World 1
IPC Class
G01R 31/26 - Testing of individual semiconductor devices 4
G01R 1/067 - Measuring probes 2
G01R 1/36 - Overload-protection arrangements or circuits for electric measuring instruments 2
G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection 2
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer 2
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1.

Apparatus and method for energy recovery

      
Application Number 15455810
Grant Number 11009540
Status In Force
Filing Date 2017-03-10
First Publication Date 2018-09-13
Grant Date 2021-05-18
Owner Integrated Technology Corporation (USA)
Inventor
  • Clauter, Steven T.
  • Rogers, Gary B.
  • Austin, Norvell Eric
  • Wolford, Bradley T.

Abstract

An energy supply for a test device includes an energy source configured to provide energy via an inductive element for use by test circuitry; and an energy recovery circuit electrically couplable to the energy source and configured to direct unused energy from the inductive element to the energy source.

IPC Classes  ?

  • G01R 31/26 - Testing of individual semiconductor devices
  • G01R 1/36 - Overload-protection arrangements or circuits for electric measuring instruments

2.

Loop-back probe test and verification method

      
Application Number 15188024
Grant Number 10768206
Status In Force
Filing Date 2016-06-21
First Publication Date 2016-12-29
Grant Date 2020-09-08
Owner Integrated Technology Corporation (USA)
Inventor
  • Schwartz, Rodney E.
  • Geist, John K.
  • Kosecki, Daniel

Abstract

A method is provided for using a loop-back test device to verify continuity between loop-back probes electrically connected to each other on a probe card, the loop-back test device including a first conductive region electrically connected to a substrate, a second conductive region electrically isolated from the substrate, the second conductive region spaced apart from the first conductive region such that when a first loop-back probe contacts the first conductive region a second loop-back probe contacts the second conductive region, The method includes placing the first loop-back probe in electrical contact with the first conductive region, and placing the second loop-back probe in electrical contact with the second conductive region. Continuity between the substrate and the second conductive region is then measured.

IPC Classes  ?

3.

Damage reduction method and apparatus for destructive testing of power semiconductors

      
Application Number 13560233
Grant Number 09759763
Status In Force
Filing Date 2012-07-27
First Publication Date 2013-01-31
Grant Date 2017-09-12
Owner Integrated Technology Corporation (USA)
Inventor
  • Schwartz, Rodney E.
  • Clauter, Steve
  • Lohr, David
  • Rogers, Gary
  • Baggiore, James

Abstract

A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.

IPC Classes  ?

  • G01R 1/067 - Measuring probes
  • G01R 1/36 - Overload-protection arrangements or circuits for electric measuring instruments
  • G01R 31/12 - Testing dielectric strength or breakdown voltage
  • G01R 31/27 - Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects due to surrounding elements
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • G01R 31/26 - Testing of individual semiconductor devices
  • G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection

4.

DAMAGE REDUCTION METHOD AND APPARATUS FOR DESTRUCTIVE TESTING OF POWER SEMICONDUCTORS

      
Application Number US2012048563
Publication Number 2013/016643
Status In Force
Filing Date 2012-07-27
Publication Date 2013-01-31
Owner INTEGRATED TECHNOLOGY CORPORATION (USA)
Inventor
  • Schwartz, Rodney, E.
  • Clauter, Steve
  • Lohr, David
  • Rogers, Gary
  • Baggiore, James

Abstract

A device and method for limiting damage to a semiconductor device under test when the semiconductor device fails during a high current, or high power test is provided. The occurrence of a failure of the device under test is detected, and power applied to the semiconductor device is diverted through a parallel path element upon detection of failure of the semiconductor device.

IPC Classes  ?

  • G01R 31/26 - Testing of individual semiconductor devices

5.

Probe needle protection method for high current probe testing of power devices

      
Application Number 11752526
Grant Number 07521947
Status In Force
Filing Date 2007-05-23
First Publication Date 2008-11-27
Grant Date 2009-04-21
Owner Integrated Technology Corporation (USA)
Inventor
  • Rogers, Gary
  • Clauter, Steve
  • Schwartz, Rodney
  • Ukai, Taichi
  • Lambright, Joe
  • Lohr, Dave

Abstract

A test system, apparatus and method for applying high current test stimuli to a semiconductor device in wafer or chip form includes a plurality of probes for electrically coupling to respective contact points on the semiconductor device, a plurality of current limiters electrically coupled to respective ones of the plurality of probes, and a current sensor electrically coupled to the plurality of probes. The current limiters are operative to limit current flow passing through a respective probe, and the current sensor is operative to provide a signal when detected current in any contact of the plurality of probes exceeds a threshold level.

IPC Classes  ?

  • G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection
  • G01R 31/26 - Testing of individual semiconductor devices
  • G01R 1/00 - Details of instruments or arrangements of the types covered by groups or

6.

PROBILT

      
Serial Number 76176457
Status Registered
Filing Date 2000-12-05
Registration Date 2002-09-24
Owner Integrated Technology Corporation ()
NICE Classes  ? 20 - Furniture and decorative products

Goods & Services

commercial work stations including accessories and components therefor for building, testing and repairing probe cards for use in semiconductor manufacture