Abstract

A bonding structure is provided. The bonding structure includes a first substrate, a dielectric layer, a second substrate, a reflowable element, and a dielectric adhesive element. The dielectric layer is over the first substrate. The second substrate is over the first substrate. The reflowable element connects the first substrate to the second substrate. The dielectric adhesive element encapsulates the reflowable element and partially horizontally overlaps the dielectric layer.

IPC Classes  ?

• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/02 - Printed circuits Details

Abstract

An electronic package is provided. The electronic package includes an amplifier component, a control component, and a first circuit layer. The control component is disposed above the amplifier component. The first circuit layer is disposed between the amplifier component and the control component. The control component is configured to transmit a first signal to the amplifier component and to output a second signal amplified by the amplifier component.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/498 - Leads on insulating substrates
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H03F 3/04 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only

Abstract

The present disclosure provides a substrate structure. The substrate structure includes an interconnection structure, a dielectric layer on the interconnection structure, an electronic component embedded in the dielectric layer, and a first conductive via penetrating through the dielectric layer and disposed adjacent to the electronic component. The interconnection structure includes a carrier having a first surface and a second surface opposite to the first surface, a first conductive layer disposed on the first surface of the carrier, and a second conductive layer disposed on the second surface of the carrier. The first conductive via and at least one of the first conductive layer and the second conductive layer define a first shielding structure surrounding the electronic component. A method of manufacturing a substrate structure is also disclosed.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A package structure is provided. The package structure includes a processing module, a storage module, and a power regulating module. The processing module includes a processing element having a first side configured to receive power. The power regulating module is disposed adjacent to the processing module. The power regulating module includes a first portion and a second portion. The first portion is configured to decouple a first noise from a first power signal and transmit the first power signal to the first side of the processing element. The second portion is configured to transmit a second power signal to the storage module.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

A semiconductor substrate includes a substrate and a plurality of electronic components. The substrate defines a cavity. A total number of the electronic components is N, the electronic components are divided into M groups, M and N are positive integers, and M is smaller than N. The electronic components in each group are encapsulated by a first insulation layer to form a respective component module. Each of the component modules is disposed in the cavity. A second insulation layer fills the cavity and encapsulates the component modules.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body

Abstract

The present disclosure relates to a power module. The power module includes a first die having an upper surface; a second die adjacent to the first die and having an upper surface at an elevation different from the upper surface of the first die; a circuit structure disposed over the first die and the second die and having a surface; and an elastic structure connecting the first die and the second die to the first circuit structure and configured to keep the surface of the circuit structure being substantially horizontal.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons

Abstract

A package structure is provided. The package structure includes a first electronic component and a second electronic component, and a data access structure. The data access structure is disposed partially in a gap between the first electronic component and the second electronic component. The data access structure includes a logic portion and a storage portion. One of the logic portion and the storage portion is in the gap, and the other one of the logic portion and the storage portion is outside of the gap.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H10B 12/00 - Dynamic random access memory [DRAM] devices
• H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

Abstract

An electronic device is provided. The electronic device includes a plurality of electronic components, a plurality of first waveguides, and a switch element. The first waveguides are disposed under the electronic components. The switch element is disposed under the electronic components and at an elevation different from the first waveguides, wherein the switch element is configured to optically connect a first one of the first waveguides to a second one of the first waveguides.

IPC Classes  ?

• G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
• G02F 1/313 - Digital deflection devices in an optical waveguide structure

Abstract

A method of forming a package structure is provided. The method includes providing a carrier; forming a first conductive layer over the carrier; forming a barrier material layer over a surface the first conductive layer; melting the barrier material layer to allow the barrier material layer to flow from an upper side toward lateral sides of the first conductive layer to form a barrier layer over the first conductive layer and configured to reduce a lateral diffusion of the first conductive layer; and depositing a second conductive layer over the first conductive layer.

IPC Classes  ?

• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or

Abstract

An electronic device is provided. The electronic device includes an electronic device includes an electronic component, and an interposer. The interposer is coupled to the electronic component, which includes first signal transmission vias, power transmission structures, and a circuit within the interposer. The circuit includes an active component, a passive component, or both.

IPC Classes  ?

• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

Abstract

The present disclosure relates to a sensing module and a flexible sensing module. The flexible sensing module includes a first sensing element configured to detect a bio-signal of a surface of a user; a second sensing element configured to detect a deformation of the flexible sensing module and to generate a first signal; and a processing element configured to calibrate the bio-signal in response to the first signal.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons

Abstract

An electronic device and a method of manufacturing an electronic device are provided. The electronic device includes a first conductive layer and a first power die. The first conductive layer including a first part and a second part separated from the first part. The first power die is disposed above the first conductive layer and has a first surface. The first power die includes a first terminal exposed from the first surface and a second terminal exposed from the first surface. The first part is electrically connected to the first terminal and the second part is electrically connected to the second terminal.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, an electronic component, a flexible conductive layer, and a conductive element. The circuit structure has a first surface and a second surface opposite to the first surface. The electronic component is under the first surface. The flexible conductive layer is over the second surface. The conductive element extends toward a direction far away from the second surface and connected to the flexible conductive layer. The conductive element is embedded within at least two different materials.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 5/00 - Casings, cabinets or drawers for electric apparatus

Abstract

An optoelectronic package structure is provided. The optoelectronic package structure includes a carrier and a photonic component. The carrier includes an upper surface and a first lateral surface. The photonic component is disposed over an upper surface of the carrier and includes an optical portion. The carrier includes a recessed portion recessed from the first lateral surface of the carrier, and the optical portion of the photonic component is located within the recessed portion of the carrier from a top view perspective.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape

Abstract

An electronic device and method of manufacturing the same are provided. The electronic device includes a temperature-sensitive structure, a first multilayer structure, and a second multilayer structure. The temperature-sensitive structure has a first surface and a second surface opposite to the first surface. The first multilayer structure is disposed under the first surface of the temperature-sensitive structure and configured to cause a first residual stress in response to a first temperature change. The second multilayer structure is disposed over the second surface and configured to cause a second residual stress in response to a second temperature change. The second residual stress substantially eliminates the first residual stress so that the temperature-sensitive structure, the first multilayer structure and the second multilayer structure constitute a less-temperature-sensitive structure.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation

Abstract

The present disclosure relates to an electronic device package that includes a first substrate, a second substrate over the first substrate, and an integrated circuit (IC) connected between the first substrate and the second substrate. The IC is configured to regulate a power signal, wherein a projection of a power signal path between the IC and the second substrate on the first substrate is entirely within a projection of the IC on the first substrate.

IPC Classes  ?

• H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/49 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions wire-like
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An electronic device is disclosed. The electronic device includes a carrier, a computing element disposed over the carrier, and a first data storage element disposed over the carrier and electrically connected with the computing element through the carrier. The computing element is configured to receive a first power provided from the first data storage element.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 1/14 - Structural association of two or more printed circuits

Abstract

An optical module is disclosed. The optical module includes a carrier and a lid disposed over the carrier. The carrier and the lid are collaboratively define a first cavity for accommodating a photonic component. The optical module also includes a first electrical contact disposed over a first side of the lid and configured to provide an electronic connection for the optical module. A first aperture penetrating the lid is formed at the first side of the lid and corresponds to a light transmission/reception area of the photonic component.

IPC Classes  ?

• G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means

Abstract

The present disclosure provides a wearable device. The wearable device includes a first element and a second element. The first element is configured to sense a bio-signal from a user. The second element is configured to transmit the bio-signal to a processor. The second element has a first surface and a second surface non-coplanar with the first surface. The first element is in contact with the first surface and the second surface of the second element.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• A61B 5/25 - Bioelectric electrodes therefor
• H04R 1/10 - EarpiecesAttachments therefor

Abstract

An electronic device is provided. The electronic device includes a carrier, an antenna component, and a transceiver. The carrier has a first surface. The antenna component is disposed over the first surface of the carrier. The transceiver is disposed over the first surface of the carrier and configured to transmit signals to the antenna component by the carrier.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 23/66 - High-frequency adaptations
• H01Q 9/04 - Resonant antennas
• H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
• H04B 1/40 - Circuits

Abstract

An electronic device is provided. The electronic device includes a directing structure and a first antenna. The directing structure includes a central region and a peripheral region. An equivalent dielectric constant of the central region is greater than that of the peripheral region. The first antenna is configured to transceive first radio-frequency (RF) signals through the directing structure.

IPC Classes  ?

• H01Q 19/00 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 19/06 - Combinations of primary active antenna elements and units with secondary devices, e.g. with quasi-optical devices, for giving the antenna a desired directional characteristic using refracting or diffracting devices, e.g. lens

Abstract

A semiconductor device package includes a substrate and a conductive lid. The conductive lid is disposed within the substrate. The conductive lid defines a waveguide having a cavity. The waveguide is configured to transmit a signal from a first electronic component to a second electronic component through the cavity.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.

IPC Classes  ?

• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 23/485 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
• H01L 23/498 - Leads on insulating substrates
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier configured to be stretchable and a first electronic component disposed over the carrier. The electronic device also includes a structure at least partially disposed within the carrier and connected to the first electronic component. The structure is configured to reduce displacement between the carrier and the first electronic component.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 1/02 - Printed circuits Details
• H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

Abstract

An electronic device is provided. The electronic device includes an electronic component and a first group of conductive vias. The electronic component has a first group of terminals disposed on a lower surface of the electronic component and a second group of terminals disposed on an upper surface of the electronic component. The first group of terminals includes a first terminal and a second terminal disposed at different elevations. The first group of conductive vias is electrically connected to the first group of terminals.

IPC Classes  ?

• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
• H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• H05K 3/42 - Plated through-holes

Abstract

An electronic device is provided. The electronic device includes an electronic component, a first encapsulant, a second encapsulant, and a first power regulating component. The encapsulant has an active surface and a backside surface configured to receive a first power. The first encapsulant at least partially encapsulates the electronic component. The second encapsulant is disposed under the first encapsulant. The first power regulating component is configured to transmit the first power to the electronic component and at least partially embedded within the second encapsulant.

IPC Classes  ?

• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates

Abstract

An electronic system and a semiconductor module is provided. The semiconductor module includes a carrier, a plurality of passive components, an electronic component, and an encapsulation layer. The plurality of passive components is disposed over the carrier. The electronic component is disposed over the carrier and configured to clamp a voltage of the semiconductor module. The encapsulation layer covers and contacts the plurality of passive components and the electronic component.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 23/64 - Impedance arrangements

Abstract

The present disclosure provides an electronic package. The electronic package includes an antenna structure having a first antenna and a second antenna at least partially covered by the first antenna. The electronic package also includes a directing element covering the antenna structure. The directing element has a first portion configured to direct a first electromagnetic wave having a first frequency to transmit via the first antenna and a second portion configured to direct a second electromagnetic wave having a second frequency different from the first frequency to transmit via the second antenna. A method of manufacturing an electronic package is also provided.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/40 - Radiating elements coated with, or embedded in, protective material
• H01Q 9/04 - Resonant antennas
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart
• H01Q 21/08 - Arrays of individually energised antenna units similarly polarised and spaced apart the units being spaced along, or adjacent to, a rectilinear path

Abstract

An electronic package is provided. The electronic package includes a first processing component, a second processing component, and a first memory unit. The first memory unit is over the first processing component and the second processing component. The first processing component and the second processing component are configured to access data stored in the first memory unit.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor package structure is provided. The semiconductor package structure includes a carrier, a first electronic component, a second electronic component, a third electronic component, a fourth electronic component, and a connection element. The first electronic component is disposed over a surface of the carrier. The second electronic component is disposed over the first electronic component. The third electronic component is spaced apart from the first electronic component and disposed over the surface of the carrier. The fourth electronic component is disposed over the third electronic component. The connection element is electrically connecting the second electronic component to the fourth electronic component.

IPC Classes  ?

• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.

IPC Classes  ?

• H10D 86/01 - Manufacture or treatment
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
• H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
• H10H 20/01 - Manufacture or treatment
• H10H 20/853 - Encapsulations characterised by their shape
• H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls

Abstract

An electronic device is provided. The electronic device includes a carrier having a first conductive element, an electronic component, and a second conductive element. The first conductive element is exposed by a lower surface of the carrier. The electronic component is disposed over the carrier and configured to receive a power from the first conductive element. The second conductive element is disposed at a lateral side of the carrier and protruding downwardly below the lower surface of the carrier.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/498 - Leads on insulating substrates

Abstract

An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.

IPC Classes  ?

• G01C 3/08 - Use of electric radiation detectors

Abstract

An electronic device is provided. The electronic device includes a photonic component, a first optical element, and a second optical element. The photonic component includes an optical channel. The first optical element is configured to optically couple with the optical channel. The second optical element is self-aligned with the optical channel and defined at a specific position to be configured to direct an optical signal between the optical channel and the first optical element.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

An electronic device is provided. The electronic device includes a photonic component, a plurality of optical elements, a connection layer, and a cover. The photonic component defines a predetermined region. The optical elements are disposed at the predetermined region and configured to optically couple with the photonic component. The connection layer is connected to the photonic component and the optical elements. The cover is configured to protect the optical elements and configured to vent.

IPC Classes  ?

• G02B 6/30 - Optical coupling means for use between fibre and thin-film device
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

An electronic package is provided in the present disclosure. The electronic package comprises: an electronic component; a thermal conductive element above the electronic component, wherein thermal conductive element includes a first metal; an adhesive layer between the electronic component and the thermal conductive element, wherein the first adhesive layer includes a second metal; and an intermetallic compound (IMC) between the first metal and the second metal.

IPC Classes  ?

• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/373 - Cooling facilitated by selection of materials for the device

Abstract

An electronic device is provided. The electronic device includes a first photonic component, a memory module, and a plurality of processing units. The memory module includes a plurality of memory components supported by the first photonic component. The processing units are distributed at a periphery of the memory module, wherein the memory module is configured to be accessed by at least two of the processing units through the first photonic component.

IPC Classes  ?

• G11C 13/04 - Digital stores characterised by the use of storage elements not covered by groups , , or using optical elements
• G02B 6/26 - Optical coupling means

Abstract

An electronic device is provided. The electronic device includes a carrier and a protection layer. The carrier has a predetermined region and includes a pad disposed in the predetermined region. The protection layer is disposed over the carrier and defines the predetermined region. The protection layer is configured to block an encapsulation layer from covering the pad.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

An optoelectronic package structure and a method of manufacturing an optoelectronic package structure are provided. The optoelectronic package structure includes a photonic component. The photonic component has an electrical connection region, a blocking region and a region for accommodating a device. The blocking region is located between the electrical connection region and the region for accommodating a device.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/488 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An electronic device is provided. The electronic device includes a substrate, a first pad, and a second pad. The substrate defines a trench extending along a first direction. The first pad is disposed adjacent to the trench. The second pad is disposed next to the first pad. The first pad and the second pad are disposed at a same side of the trench and are arranged along the first direction. The first pad and the second pad define a first gap and a second gap therebetween along the first direction. The first gap is closer to the trench than the second gap is. A width of the first gap along the first direction is greater than a width of the second gap along the first direction.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

The present disclosure provides an electronic device. The electronic device includes an electronic component configured to laterally receive a power and configured to non-laterally transmit a signal. The electronic component includes an integrated circuit layer configured to receive the power.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier and an antenna unit. The antenna unit includes a base portion and an extension portion protruding downwardly from the base portion. The carrier supports the extension portion and is configured to reduce a frequency offset of signals from the antenna unit.

IPC Classes  ?

• H01Q 1/50 - Structural association of antennas with earthing switches, lead-in devices or lightning protectors
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a pliable encapsulant, a first electronic component, and a first conductive connection. The pliable encapsulant has a first predetermined pattern. The first electronic component includes a terminal exposed by the first predetermined pattern. The first conductive connection is disposed within the first predetermined pattern and electrically connected to the terminal of the first electronic component.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/495 - Lead-frames
• H01L 23/66 - High-frequency adaptations

Abstract

An electronic device is provided. The electronic device includes a flexible circuit structure, a package structure, and a flexible encapsulation layer. The package structure is supported by the flexible circuit structure and includes a first stress-dissipating part at a periphery region of the package structure. The flexible encapsulation layer encapsulates the package structure.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 3/28 - Applying non-metallic protective coatings
• H05K 5/00 - Casings, cabinets or drawers for electric apparatus

Abstract

A package structure is provided. The package structure includes a substrate structure, a chip, an encapsulant, and an adhesive element. The substrate structure defines a cavity. The chip is disposed in the cavity. The encapsulant encapsulates the chip. The adhesive element is disposed over a top surface of the substrate structure, wherein the substrate structure includes a barring structure between the encapsulant and the adhesive element and configured to reduce a contact between the encapsulant and the adhesive element.

IPC Classes  ?

• B81B 7/00 - Microstructural systems
• B81C 1/00 - Manufacture or treatment of devices or systems in or on a substrate
• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

A semiconductor device package includes a carrier, a first conductive post and a first adhesive layer. The first conductive post is disposed on the carrier. The first conductive post includes a lower surface facing the carrier, an upper surface opposite to the lower surface and a lateral surface extended between the upper surface and the lower surface. The first adhesive layer surrounds a portion of the lateral surface of the first conductive post. The first adhesive layer comprises conductive particles and an adhesive. The first conductive post has a height measured from the upper surface to the lower surface and a width. The height is greater than the width.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/495 - Lead-frames
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Abstract

An optoelectronic structure is provided. The optoelectronic structure includes an optical device; and a housing covering the optical device. The optical device is configured to transmit at least one optical signal to an outside of the housing in different directions.

IPC Classes  ?

• G01S 7/486 - Receivers
• G01S 7/484 - Transmitters

Abstract

A semiconductor device package includes a first conductive structure, a stress buffering layer and a second conductive structure. The first conductive structure includes a substrate, at least one first electronic component embedded in the substrate, and a first circuit layer disposed on the substrate and electrically connected to the first electronic component. The first circuit layer includes a conductive wiring pattern. The stress buffering layer is disposed on the substrate. The conductive wiring pattern of the first circuit layer extends through the stress buffering layer. The second conductive structure is disposed on the stress buffering layer and the first circuit layer.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• H01L 23/528 - Layout of the interconnection structure

Abstract

An electronic structure includes a package structure, a first heat dissipating structure and a second heat dissipating structure. The package structure has a top surface including a first region and a second region. A first predetermined temperature at the first region is higher than a second predetermined temperature at the second region. The first heat dissipating structure includes a first portion disposed on the first region. The second heat dissipating structure includes a first portion disposed on the second region. The first portion of the first heat dissipating structure and the first portion of the second heat dissipating structure are concurrently formed through a 3D printing technique. A thickness of the first portion of the first heat dissipating structure is greater than a thickness of the first portion of the second heat dissipating structure.

IPC Classes  ?

• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device package includes a first substrate, a second substrate, and a first electronic component between the first substrate and the second substrate. The first electronic component has a first surface facing the first substrate and a second surface facing the second substrate. The semiconductor device package also includes a first electrical contact disposed on the first surface of the first electronic component and electrically connecting the first surface of the first electronic component with the first substrate. The semiconductor device package also includes a second electrical contact disposed on the second surface of the first electronic component and electrically connecting the second surface of the first electronic component with the second substrate. A method of manufacturing a semiconductor device package is also disclosed.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Abstract

The present disclosure relates to an electronic device that includes a circuit structure and an antenna component attached to the circuit structure by a connection layer. The connection layer includes a plurality of portions spaced apart from each other and configured to mitigate stress between the circuit structure and the antenna component.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure
• H01Q 21/00 - Antenna arrays or systems
• H01Q 21/28 - Combinations of substantially independent non-interacting antenna units or systems

Abstract

A package structure includes a lead frame, an electronic device and a level-maintaining structure. The electronic device is disposed adjacent to the lead frame. The level-maintaining structure is disposed between the electronic device and the lead frame, and is configured to prevent the electronic device from tilting with respect to the lead frame. The electronic device includes at least one via protruding from a bottom surface of the electronic device.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A package structure includes: 1) a circuit substrate; 2) a first semiconductor device disposed on the circuit substrate; 3) a first insulation layer covering a sidewall of the first semiconductor device; 4) a second insulation layer covering the first insulation layer; and 5) a third insulation layer disposed on the circuit substrate and in contact with the second insulation layer.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device package includes a first semiconductor device having a first surface, an interconnection element having a surface substantially coplanar with the first surface of the first semiconductor device, a first encapsulant encapsulating the first semiconductor device and the interconnection element, and a second semiconductor device disposed on and across the first semiconductor device and the interconnection element.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H10H 20/852 - Encapsulations
• H10H 20/855 - Optical field-shaping means, e.g. lenses

Abstract

The present disclosure provides an electronic device. The electronic device includes a carrier, an electronic component, a first antenna, and a conductive element. The carrier has a first surface and a second surface opposite to the first surface. The electronic component abuts the second surface. The first antenna is connected with the carrier. The conductive element abuts the first surface of the carrier and configured to test the first antenna.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

Abstract

At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.

IPC Classes  ?

• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices

Abstract

A package structure is provided. The package structure includes a substrate, an electronic component, and a stop layer. The substrate has a through hole including a stepped sidewall structure including a tread. The electronic component is disposed supported by the tread of the stepped sidewall structure. The stop layer is disposed on the top surface of the tread.

IPC Classes  ?

• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light

Abstract

An electronic device is provided. The electronic device includes a plurality of electronic components and a circuit structure connected to the plurality of electronic components. The circuit structure is configured to connect the electronic components adjacent to each other along a first path, and the circuit structure is further configured to connect the electronic components that are not adjacent to each other along a second path having a greater length and a higher speed than the first path.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An electronic device is provided. The electronic device includes a plurality of processing units constituting a processing array having a first area, a surface supporting the processing array, and an optical channel. The surface has a second area, and the first area is greater than 80 percent of the second area. The optical channel is configured to transmit a first signal between at least two of the plurality of processing units in a first direction that is nonparallel with a normal direction of the surface.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

Abstract

An electronic package is provided in the present disclosure. The electronic package comprises: a heat spreading component; a first electronic component disposed on the heat spreading component; and a second electronic component disposed on the first electronic component, wherein the second electronic component comprises an interconnection structure passing through the second electronic component and electrically connecting the first electronic component. In this way, through the use of the interconnection structure, the heat dissipation of the electronic components in the package can be improved. Also, through the use of the encapsulant, the stacked electronic components can be protected by the encapsulant so as to avoid being damaged.

IPC Classes  ?

• H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device includes: a substrate having a first surface and a second surface opposite to the first surface; an electronic component disposed on the first surface of the substrate; a sensor disposed adjacent to the second surface of the substrate; an electrical contact disposed on the first surface of the substrate; and a package body exposing a portion of the electrical contact.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• G06V 40/13 - Sensors therefor
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns
• H10F 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group , e.g. radiation detectors comprising photodiode arrays

Abstract

A package structure is provided. The package structure includes a substrate, a chip, and an adhesive layer. The substrate defines a through hole. The chip is disposed in the through hole and has a top surface and a bottom surface opposite to the top surface. The adhesive layer connects the chip to the through hole. The top surface and the bottom surface of the chip are exposed by the adhesive layer, and the chip is protruded beyond the substrate.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H04R 1/04 - Structural association of microphone with electric circuitry therefor
• H05K 3/32 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits

Abstract

A package structure is provided. The package structure includes a lower substrate, an upper substrate, and a chip. The lower substrate defines a lower through hole. The upper substrate is over the lower substrate and defines an upper through hole connected to the lower through hole. A portion of a top surface of the lower substrate is exposed by the upper through hole. The chip is at least partially accommodated by the upper through hole and supported by the portion of the top surface of the lower substrate.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

The present disclosure provides a semiconductor device. The semiconductor device includes a carrier having a first side and a second side adjacent to the first side. The semiconductor device also includes a first antenna adjacent to the first side and configured to operate at a first frequency and a second antenna adjacent to the second side and configured to operate at a second frequency different from the first frequency. An method of manufacturing a semiconductor device is also provided.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

An electronic device is disclosed. The electronic device includes a first pattern, a second pattern adjacent to the first pattern, and a third pattern disposed between the first pattern and the second pattern. The electronic device also includes a first feeding element and a second feeding element. The first feeding element is spaced apart from the first pattern and the third pattern and configured to electrically couple the first pattern and the third pattern to constitute a first antenna. The second feeding element is configured to electrically couple the second pattern and the third pattern to constitute a second antenna.

IPC Classes  ?

• H01Q 9/04 - Resonant antennas
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 3/26 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture
• H01Q 21/29 - Combinations of different interacting antenna units for giving a desired directional characteristic

Abstract

A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.

IPC Classes  ?

• H10H 20/816 - Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
• H10H 20/01 - Manufacture or treatment
• H10H 20/822 - Materials of the light-emitting regions

Abstract

A package structure is provided. The package structure includes a substrate and a power module. The substrate defines a cavity. The power module includes a power regulation portion and a noise filter portion, wherein the power regulation portion and the noise filter portion are disposed in the cavity of the substrate.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/498 - Leads on insulating substrates
• H01L 23/64 - Impedance arrangements

Abstract

A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.

IPC Classes  ?

• H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• G01L 19/14 - Housings
• H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/04 - ContainersSeals characterised by the shape
• H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
• H10H 20/85 - Packages

Abstract

A bonding structure and a package structure are provided. The bonding structure includes a first pad and a wire bundle structure. The wire bundle structure is protruded from the first pad and tapering away from the first pad. The wire bundle structure includes a first portion and a second portion, the first portion is closer to the first pad than the second portion is, and in a cross-sectional view perspective, a width of a first void in the first portion is less than a width of a second void in the second portion.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/498 - Leads on insulating substrates
• H01L 23/66 - High-frequency adaptations
• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

A manufacturing method of an embedded component package structure includes the following steps: providing a carrier and forming a semi-cured first dielectric layer on the carrier, the semi-cured first dielectric layer having a first surface; providing a component on the semi-cured first dielectric layer, and respectively providing heat energies from a top and a bottom of the component to cure the semi-cured first dielectric layer; forming a second dielectric layer on the first dielectric layer to cover the component; and forming a patterned circuit layer on the second dielectric layer, the patterned circuit layer being electrically connected to the component.

IPC Classes  ?

• H05K 1/18 - Printed circuits structurally associated with non-printed electric components
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The present disclosure provides an electronic device. The electronic device includes a circuit structure, a plurality of receiving components, and a plurality of transmitting components. The receiving components are disposed over the circuit structure and arranged along a first direction. The transmitting components are supported by the circuit structure. A portion of the transmitting components is misaligned along the first direction.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure

Abstract

An electronic device is disclosed. The electronic device includes a carrier having a first surface and a first lateral surface, an antenna adjacent to the first surface of the carrier, and a shielding layer covering a portion of the first lateral surface of the carrier. The shielding layer is configured to allow a gain of the antenna to be greater than 20 dB.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

The present disclosure provides a semiconductor device package. The semiconductor device package includes an antenna layer, a first circuit layer and a second circuit layer. The antenna layer has a first coefficient of thermal expansion (CTE). The first circuit layer is disposed over the antenna layer. The first circuit layer has a second CTE. The second circuit layer is disposed over the antenna layer. The second circuit layer has a third CTE. A difference between the first CTE and the second CTE is less than a difference between the first CTE and the third CTE.

IPC Classes  ?

• H01L 23/66 - High-frequency adaptations
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The present disclosure provides an electronic device. The electronic device includes a flexible element, and a sensing element adjacent to the flexible element and configured to detect a biosignal. The electronic device also includes an active component in the flexible element and electrically connected with the sensing element. A method of manufacturing an electronic device is also disclosed.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• A61B 5/024 - Measuring pulse rate or heart rate
• A61B 5/0531 - Measuring skin impedance
• A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
• A61B 5/318 - Heart-related electrical modalities, e.g. electrocardiography [ECG]
• A61B 5/369 - Electroencephalography [EEG]
• A61B 5/389 - Electromyography [EMG]
• A61B 5/398 - Electrooculography [EOG], e.g. detecting nystagmusElectroretinography [ERG]
• H05K 1/02 - Printed circuits Details

Abstract

A package structure includes an interconnector, a first encapsulation layer, a second encapsulation layer. The interconnector includes a lower portion and an upper portion located on the lower portion. The first encapsulation layer encapsulates the lower portion, and has a first top surface adjacent to the upper portion. The first top surface includes a first region and a second region different from the first region. The second encapsulation layer encapsulates the upper portion, and has a second bottom surface and a second top surface. The second bottom surface faces the first top surface. The second top surface is opposite to the second bottom surface. The second top surface includes a third region and a fourth region different from the third region. A first elevation difference between a first elevation of the first region and a second elevation of the second region is greater than a second elevation difference between a third elevation of the third region and a fourth elevation of the fourth region.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 23/498 - Leads on insulating substrates

Abstract

A bonding structure and a pre-bonding structure are provided. The bonding structure includes a lower substrate; a low melting point conductive layer disposed over the lower substrate; a high melting point conductive layer including a lower portion and an upper portion, wherein the low melting point conductive layer is between the upper portion and the lower portion of the high melting point conductive layer; a dielectric layer encapsulating the low melting point conductive layer and the high melting point conductive layer; and an upper substrate disposed on the upper portion of the high melting point conductive layer, wherein an interface between the upper substrate and the high melting point conductive layer is substantially co-level with an interface between the dielectric layer and the upper substrate.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

An optoelectronic package is provided. The optoelectronic package includes a photonic component, an optical component, and a connection element. The photonic component includes an optical transmission portion, which includes a plurality of first terminals exposed from a first surface of the photonic component. The optical component faces the first surface of the photonic component. The optical component is configured to transmit optical signals to or receive optical signals from the optical transmission portion. The connection element is disposed between the first surface of the photonic component and the optical component. The connection element is configured to reshape the optical signals.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• B82Y 20/00 - Nanooptics, e.g. quantum optics or photonic crystals
• G02B 6/10 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• G02B 6/122 - Basic optical elements, e.g. light-guiding paths
• G02B 6/26 - Optical coupling means
• G02B 6/30 - Optical coupling means for use between fibre and thin-film device
• G02B 6/36 - Mechanical coupling means

Abstract

The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.

IPC Classes  ?

• H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.

IPC Classes  ?

• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/66 - High-frequency adaptations
• H01Q 1/40 - Radiating elements coated with, or embedded in, protective material
• H01Q 21/00 - Antenna arrays or systems
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

A package structure and a circuit layer structure are provided in the present disclosure. The package structure includes a wiring structure, a first electronic device, a second electronic device and at least one dummy trace. The wiring structure includes a plurality of interconnection traces. The first electronic device and the second electronic device are disposed on the wiring structure, and electrically connected to each other through the interconnection traces. The dummy trace is adjacent to the interconnection traces. A mechanical strength of the at least one dummy trace is less than a mechanical strength of one of the interconnection traces.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides an electronic device and a method of manufacturing the same. The electronic device includes a power die and a patterned layer. The power die has a front surface, a backside surface, and a lateral surface extending between the front surface and the backside surface. The patterned layer is disposed on the backside surface. The patterned layer is indented from the lateral surface of the power die.

IPC Classes  ?

• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
• H01L 23/495 - Lead-frames
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

The present disclosure provides an antenna device. The antenna device includes a dielectric element including a first region and a second region, a first antenna disposed on the first region, and a second antenna disposed on the second region. The first antenna and the second antenna are configured to operate in different frequencies. The first antenna and the second antenna are misaligned in directions perpendicular and parallel to a surface of the dielectric element on which the first antenna or the second antenna is disposed.

IPC Classes  ?

• H01Q 5/378 - Combination of fed elements with parasitic elements
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 23/00 - Antennas with active circuits or circuit elements integrated within them or attached to them

Abstract

An electronic package structure is provided. The electronic package structure includes a first carrier, a first electronic component, a first optical channel, and a second electronic component. The first electronic component is disposed on or within the first carrier. The first optical channel is disposed within the first carrier. The first optical channel is configured to provide optical communication between the first electronic component and the second electronic component. The first carrier is configured to electrically connect the first electronic component.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

The present disclosure provides a semiconductor device package including a first device, a second device, and a spacer. The first device includes a substrate having a first dielectric constant. The second device includes a dielectric element, an antenna, and a reinforcing element. The dielectric element has a second dielectric constant less than the first dielectric constant. The antenna is at least partially within the dielectric element. The reinforcing element is disposed on the dielectric element, and the reinforcing element has a third dielectric constant greater than the first dielectric constant. The spacer is disposed between the first device and the second device and configured to define a distance between the first device and the second device

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/66 - High-frequency adaptations

Abstract

An electronic device is disclosed. The electronic device includes a first module having a first electronic component, a second module at least partially overlapped with the first module and having an encapsulant, and a first power path penetrating through the encapsulant and providing a first power signal to a backside surface of the first electronic component.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A semiconductor device package includes a substrate, a first antenna pattern and a second antenna pattern. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The second antenna pattern is disposed over the first antenna pattern. The second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are at least partially overlapping in a direction perpendicular to the first surface of the substrate.

IPC Classes  ?

• H01Q 1/52 - Means for reducing coupling between antennas Means for reducing coupling between an antenna and another structure
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
• H01Q 1/24 - SupportsMounting means by structural association with other equipment or articles with receiving set
• H01Q 1/48 - Earthing meansEarth screensCounterpoises
• H01Q 5/378 - Combination of fed elements with parasitic elements
• H01Q 21/06 - Arrays of individually energised antenna units similarly polarised and spaced apart

Abstract

An optical package structure is provided. The optical package structure includes a first substrate, a second substrate, a first optical component, a second optical component, and an electrical shielding element. The second substrate is over the first substrate. The first substrate and the second substrate collectively define a first cavity. The first optical component is disposed in the first cavity. The second optical component is disposed over the first substrate. The electrical shielding element is disposed adjacent to a sidewall of the first cavity and between the first optical component and the second optical component.

IPC Classes  ?

• H01L 23/552 - Protection against radiation, e.g. light
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

An optoelectronic structure is provided. The optoelectronic structure includes a carrier, a first optical component, and a second optical component. The first optical component is supported by the carrier. The second optical component is supported by the first optical component and optically coupled to the first optical component.

IPC Classes  ?

• G02B 6/42 - Coupling light guides with opto-electronic elements
• H01S 5/00 - Semiconductor lasers
• H01S 5/02315 - Support members, e.g. bases or carriers

Abstract

The present disclosure provides an electronic device. The electronic device includes a substrate, an electronic component, a circuit structure, and a shielding layer. The electronic component is disposed under the substrate. The circuit structure is disposed under the substrate. The shielding layer is disposed under the substrate and covers the electronic component and connected to the circuit structure. The circuit structure and the shielding layer are collectively configured to block the electronic component from electromagnetic interference.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details

Abstract

A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

IPC Classes  ?

• G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/498 - Leads on insulating substrates
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A wiring structure includes an upper conductive structure, a lower conductive structure, an intermediate layer and at least one through via. The upper conductive structure includes at least one upper dielectric layer and at least one upper circuit layer in contact with the upper dielectric layer. The lower conductive structure includes at least one lower dielectric layer and at least one lower circuit layer in contact with the lower dielectric layer. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure and bonds the upper conductive structure and the lower conductive structure together. The through via extends through the upper conductive structure, the intermediate layer and the lower conductive structure.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/367 - Cooling facilitated by shape of device
• H01L 23/498 - Leads on insulating substrates
• H01L 23/552 - Protection against radiation, e.g. light

Abstract

An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates

Abstract

An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a reinforcing component. The first electronic component is fabricated by a first technology node. The second electronic component is fabricated by a second technology node different from the first technology node. The reinforcing component supports the first electronic component and the second electronic component. The first electronic component has an upper surface facing the reinforcing component and a lower surface configured to receive a first power.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates

Abstract

The present disclosure relates to an electronic device that includes a first electronic component, a second electronic component, an interconnection structure below the first electronic component and the second electronic component and electrically connecting the first electronic component to the second electronic component, and a first waveguide below the first electronic component and the second electronic component and configured to transmit electromagnetic waves.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01P 3/00 - WaveguidesTransmission lines of the waveguide type
• H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles

Abstract

A package structure is provided. The package structure includes a substrate, a first electronic component, a first electrical connector, and a protective layer. The first electronic component is over the substrate. The first electrical connector is between the substrate and the first electronic component. The protective layer encapsulates the first electrical connector. The protective layer has a first curved lateral surface concave toward the first electrical connector and recessed with respect to a lateral surface of the first electronic component.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers

Abstract

A wearable device is provided. The wearable device includes an electronic component and an encapsulant. The encapsulant includes a low-penetrability region encapsulating the electronic component and a high-penetrability region physically separated from the electronic component.

IPC Classes  ?

• A61B 5/00 - Measuring for diagnostic purposes Identification of persons
• H05K 5/00 - Casings, cabinets or drawers for electric apparatus
• H05K 5/06 - Hermetically-sealed casings