A method, system and computer program product for finding the optimal solution for multi-objective computational problems without being computationally expensive. The output of a parameterized quantum circuit is measured multiple times to obtain a set of samples, where each sample of the set of samples represents a point within a potential solution space of the multi-objective computational problem. An expectation value, which acts as a cost function, is calculated using the set of samples. The classical computer may then be utilized to adjust the parameters of the parameterized quantum circuit to minimize the cost function. A set of solutions on the Pareto front corresponding to a set of samples is then outputted by the classical computer in response to a convergence of the cost function, where such a set of samples was used to calculate the expectation value which acted as the cost function.
Power accounting for logical partitions using power proxy according to an example includes generating, for each core in a multi-core computer system, a power proxy value indicating an amount of power consumed by the core during a time interval. The power accounting includes retrieving, from each core of the multi-core computer system during the time interval, an identification of a logical partition to which the core is allocated. The power accounting includes generating a power consumption distribution based on the power proxy value for each core and the identification from each core, wherein the power consumption distribution indicates a power consumption value for each of a plurality of logical partitions.
A TEE may store a connection credential (CC). The TEE may receive a request from a secVM for data to open a connection based on the CC with an HSM. The TEE may provide the data to open the connection based on the CC to the secVM. The TEE may derive a KTK using the CC, a host private key, and an HSM public key. The TEE may provide a KTK handle to the secVM. The TEE may receive, from the secVM, the KTK handle and a KTK(K), wherein the plaintext key (K) corresponds to the HSM protected key. The TEE may unwrap the KTK(K) using the KTK referenced by the KTK handle to produce the K. The TEE may wrap the K with a secVM specific host FW wrapping key (FWWK) to create the FWWK(K). The TEE may provide the FWWK(K) to the secVM.
The present disclosure describes a differential charge pump that includes a first switching circuit, a second switching circuit, a first current source, a second current source, a third current source, a first amplifier, and a second amplifier. The first switching circuit produces a first output (FILT). The second switching circuit produces a second output (FILTN) and a third output (SENSEN). The first current source is electrically connected to a first port of the first switching circuit. The second current source is electrically connected to a second port of the first switching circuit. The third current source is electrically connected to the second switching circuit. The first amplifier controls the second current source and the third current source based on FILTN and SENSEN. The second amplifier controls the first current source based on FILT and FILTN.
H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
Server placement is provided. An amount of workload traffic is detected between each candidate area unit in a list of candidate area units of a plurality of area units comprising an interconnected system environment in a digital twin and each of a set of destination server segments having a probability density value for server workload access less than a defined probability density threshold value for server workload access. Candidate area units are removed from the list of candidate area units having an amount of workload traffic to the set of destination server segments greater than a workload traffic threshold. A set of recommended candidate area units to place a server within the interconnected system environment is generated based on removing those candidate area units from the list of candidate area units having the amount of workload traffic to the set of destination server segments greater than the workload traffic threshold.
Optical system and devices facilitating bidirectional, non-crossing optical node communications for high-speed, high bandwidth communication system architectures. The system includes an array of bi-directional (or even tri- or quad-directional) optical signal/light turning elements, each light turning element including one or more turning mirrors that can be inserted into an optical PCBs. Each light turning element of the array includes: a set of waveguide structures, each waveguide structure of said set for receiving and channeling optical signals; a set of internal light reflective surfaces, each internal light reflective surface associated with each waveguide structure, and one or more light focusing lenses disposed above said set of internal light reflective surfaces, each internal light reflective surface receiving optical signals through one light focusing lens for re-direction to a waveguide structure, or receiving optical signals from a waveguide structure for re-direction through the one light focusing lens.
A trusted execution environment (TEE) may store a connection credential (CC) for accessing a remote hardware security module (HSM). The TEE may negotiate a CC wrapping key (CCWK) with the remote HSM. The TEE may encrypt the CC using the CCWK to generate a wrapped connection credential. The TEE may derive a transport key (TKCC) from the CC. The TEE may provide the wrapped connection credential and a protected version of the transport key to a secure virtual machine (secVM), where the secVM is configured to establish a secure connection with the remote HSM using the wrapped connection credential.
In some implementations, a computer system may quiet a computer system configured for symmetric multiprocessing by blocking traffic that is not associated with a link down protocol for bringing down a link. The computer system may move a coherency point from a first chip associated with the link to a second chip associated with an alternative link. The computer system may unquiet the computer system to allow the traffic to resume.
Embodiments relate to low resistance backside contact with an epitaxial liner. An aspect includes a semiconductor structure having a first transistor including first channels and a first source/drain region and a second transistor including second channels and second source/drain region, the first and second channels being over a bottom dielectric isolation layer. The first source/drain region and the second source/drain region extend beyond a bottom surface of the bottom dielectric isolation layer. A trench-shaped epitaxial liner is formed on the first source/drain region. Backside conductive material is formed in the trench-shaped epitaxial liner.
H10D 30/43 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
H10D 62/834 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
H10D 64/23 - Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
H10D 64/62 - Electrodes ohmically coupled to a semiconductor
Configuration recommendation generation using Combinatorial Test Design (CTD) modeling according to an example includes generating, by one or more processing devices, a Combinatorial Test Design (CTD) model for identifying possible combinations of stack components for a computing environment stack. The one or more processing devices modify the CTD model based on restrictions indicating invalid stack component combinations. The one or more processing devices apply to the CTD model a plurality of context weights to generate a weighted CTD model. The one or more processing devices generate, based on the weighted CTD model and one or more input parameters, a recommended computing environment stack configuration that includes a valid stack component combination.
A device comprises a superconducting parametric gyrator circuit comprising a first I/O port, a second I/O port, and a parametric multipole bandpass filter circuit coupled between the first I/O port and the second I/O port. The parametric multipole bandpass filter circuit is responsive to a first control signal and a second control signal, which have a same frequency but different phases, to perform parametric frequency mixing of the first and second control signals with an input signal applied to the first I/O port or the second I/O port, to generate an output signal which has a same frequency as the input signal and a non-reciprocal phase shift based on a phase difference between the first control signal and the second control signal, and based on a direction of propagation of the input signal between the first I/O port and the second I/O port.
Systems/techniques that facilitate quantum error correction decoding via block-and-cycle feasibility checking are provided. In various embodiments, a system can measure a syndrome measurement associated with a quantum error correction circuit and a parity check matrix. In various aspects, the system can identify a logical action caused by an error afflicting the quantum error correction circuit, based on performing block-and-cycle feasibility checking on a first linear system derived from the syndrome measurement and from the parity check matrix. In various instances, the system can correct the error, based on applying an inverse of the logical action to the quantum error correction circuit.
A computer-implemented method to improve the performance of transformers in learning molecular representations from SMILES/SELFIES strings is presented. More specifically, an illustrative embodiment includes transformers learning high-order interaction between important substructures of molecules, and thus enhancing the ability of those transformers to learn and predict drug-related properties from molecular representations. According to other illustrative embodiments, a computer system and computer program product for improving the performance of transformers in learning molecular representations from SMILES/SELFIES strings are provided.
In some implementations, a computer system may determine that a first net has experienced a timing failure in a circuit of a hierarchical large block synthesis (HLBS) system. The computer system may select a second net in the circuit that has better timing properties than the first net. The computer system may swap, in a stored netlist, a first net name of the first net a second net name of the second net in association with swapping endpoint connection locations of the first net and endpoint connection locations of the second net. The computer system may update routing information in the stored netlist to connect endpoints of the first net and endpoints of the second net.
A method, according to one approach, comprises causing an artificial intelligence (AI) model to ingest a database associated with use of user data, and causing the AI model to, based on the ingestion, generate first classifications for the user data. The method further comprises causing the AI model to enforce security measures associated with the first classifications during a first collaboration event of a plurality of user devices, where the AI model determines and incorporates contextual information into the enforcement of the security measures. In response to receiving feedback associated with the enforcement of the security measures, the first classifications of the user data are updated to second classifications of the user data. A computer program product, according to another approach, comprises one or more computer-readable storage media, and program instructions stored on the one or more storage media to perform the foregoing method.
In some embodiments, a method to determine a sampling frequency of input/output (I/O) requests for ransomware detection in a computational storage device (CSD). The method can comprise receiving, from a computational storage device (CSD), a plurality of features and a sampling rate, the plurality of features extracted from a plurality of I/O requests sampled by the CSD using the sampling rate. The method can further comprise providing the sample rate and the plurality of sampled I/O operations to a plurality of machine learning (ML) models. Each ML model can be trained on a training dataset comprising a plurality of training sampled operations, and a training sampling rate. The method can further comprise receiving, from each of the plurality of ML models, a compatibility metric associated with the training sampling rate of that ML model.
Reducing voltage droop in voltage domains using an activation signal including receiving, by a memory controller within an integrated circuit, an instruction to read a memory array; sending, by the memory controller, a read initiation signal to the memory array; and sending, by the memory controller, an activation signal to a voltage regulator associated with the memory array, wherein the activation signal activates the voltage regulator before reading the memory array is initiated by the read initiation signal.
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
18.
DYNAMIC THERMAL MANAGEMENT SYSTEM FOR TRACTION BATTERY PACKS IN ELECTRIC VEHICLES
An approach for dynamically adjusting cooling elements for a traction battery of an EV(electric vehicle), in order to manage thermal conditions and minimize lithium dendrite growth may be provided. The approach continuously monitors the temperature generated by the individual battery cells inside the traction battery (sequentially connected or in parallel). Furthermore, the embodiment optimizes airflow path for effectively managing, enhance thermal efficiency and utilizing the generated heat from the individual battery cells.
H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
Stacked field effect transistor (FET) static random access memory (SRAM) structures, circuits, and associated fabrication methods are presented. Recently there has been an emerging interest in considering stacked field effect transistor static random access memory bit-cell device designs that locate their pass-gate transistors on a top layer. This disclosure provides such designs. In particular, two x-couple implementations are presented that have their pass-gate transistors on a top layer. One implementation locates its x-couple between a top FET and a bottom FET. The other implementation locates its x-couple on the backside of the wafer.
G11C 11/412 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
H10B 10/00 - Static random access memory [SRAM] devices
H10D 30/43 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 30/62 - Fin field-effect transistors [FinFET]
An approach for improving communications for hearing challenged individuals by dynamically optimizing presentation of speech-derived captions. The approach captures audio communication associated with a speaker presentation. The approach converts the audio communication to text. The approach presents the text as captions on an augmented reality (AR) device. The approach monitors user processing behavior associated with consumption of the captions. The approach dynamically modifies, in real time and based on the monitored user processing behavior, at least one presentation parameter of the captions to improve comprehension of the audio communication.
Systems, methods, and computer program products for training a machine learning model are disclosed. A method may comprise accessing a relational database comprising a first table, the first table comprising an array of entries, wherein each entry is associated with a record; providing the plurality of entries as input to an encoder model; reading a plurality of embeddings generated by the encoder model based on the input thereto such that an embedding characterizing each entry is read; identifying an array of labels based on the plurality of embeddings, wherein the array of labels comprises a label for each entry; generating a training relational database based on the relational database and the identified labels, the training relational database comprising a second table, the second table comprising the array of entries and the array of labels; and training a first machine learning model based on at least the training relational database.
Stacked field effect transistor (FET) static random access memory (SRAM) structures, circuits, and associated fabrication methods are presented. Recently there has been an emerging interest in considering stacked field effect transistor static random access memory bit-cell device designs that locate their pass-gate transistors on a top layer. This disclosure provides such designs. In particular, two x-couple implementations are presented that have their pass-gate transistors on a top layer. One implementation locates its x-couple between a top FET and a bottom FET. The other implementation locates its x-couple on the backside of the wafer.
Management of licenses in container platforms is provided and includes retrieving a set of licenses associated with a container application hosted on a container platform. Consumption data selected from the group consisting of traffic data associated with the container application, transaction data associated with the container application, configuration data associated with the container application, and resource utilization data associated with the container application, is retrieved. A machine learning (ML) model is applied to the set of licenses and the consumption data. Based on the application of the ML model to the set of licenses and the consumption data, the set of licenses is modified, and an allocation of the modified set of licenses to the container application is controlled based on input data associated with the modification of the set of licenses.
An embodiment includes receiving trace data by a receiving interface of an anomaly detection system, the trace data queued in a start node queue and an end node queue. The embodiment includes issuing an instruction via an interface of the anomaly detection system, the instruction executing to provision a data store comprising the start node queue and the end node queue. The embodiment includes executing a modifying instruction modifying a start trace in the start node queue and an end trace in the end node queue to result in a grouped trace for an interval, grouped by a relationship between the start trace and the end trace. The embodiment includes executing a quota metric instruction to determine a quota metric for the interval from the grouped trace based on an uncompleted transaction count, to determine whether an anomaly, comprising a change in the trace data exists in the trace data.
A semiconductor structure includes a first wiring layer having a first metal wire, the first metal wire having a recess defined therein; a second wiring layer having a second metal wire spaced a first distance from the first metal wire, and a third metal wire spaced a second distance from the first metal wire, the third metal wire being opposite the recess of the first metal wire; and an interlayer dielectric (ILD) separating the first wiring layer from the second wiring layer and the second metal wire from the third metal wire, in which a voltage differential tolerance between the first metal wire and the third metal wire is greater than a voltage differential tolerance between the first metal wire and the second metal wire.
A voltage potential is equalized between rows or columns of a static random access memory (SRAM) array using an equalize component of a quick-set component. A plurality of the memory cells in the SRAM array are simultaneously set or reset using the quick-set component. The equalize component may be configured to mitigate cell biasing during a normal operation.
G11C 11/412 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
Detecting distributed voltage regulator failures including providing an integrated circuit having a plurality of voltage regulators in a voltage domain, a voltage detector, and a voltage comparator; enabling only a first voltage regulator from the plurality of voltage regulators; with only the first voltage regulator enabled, measuring an output voltage from the voltage domain by the voltage detector; and determining the first voltage regulator has failed by the voltage comparator finding that a difference between the output voltage and an expected voltage from the voltage domain is greater than a threshold.
G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
G05F 1/56 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
28.
DYNAMICALLY GENERATING 3D PRINTABLE FORM FACTOR STORAGE UNITS
A method, system, and computer program product configured to perform operations including: receiving input data comprising visual scan data of a workspace and object information associated with an object to be stored in the workspace; generating specification data based on the input data; and creating a three-dimensional (3D) printable blueprint of a storage unit based on the specification data.
A method, according to one embodiment, includes generating data templates. The generating comprises: identifying anonymized fields within an anonymized dataset, and determining field types of the identified anonymized fields. The method further includes generating first replacement values for the anonymized fields, and producing a de-anonymized dataset, where the producing the first de-anonymized dataset comprises replacing the anonymized fields in the data templates with the generated first replacement values. The method further includes training an artificial intelligence (AI) model with the first de-anonymized dataset. A computer program product, according to another embodiment, includes one or more computer-readable storage media, and program instructions stored on the one or more computer-readable storage media to perform the foregoing method.
A semiconductor device includes a vertical bipolar junction device, having a collector, a base over the collector, an emitter over the base, one or more source/drain region/dummy and dummy gate alternatively and laterally extended over the emitter, and a contact over source/drain regions of the one or more source/drain region/dummy gate.
H10D 84/03 - Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
H10D 84/60 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of BJTs
31.
SAMPLING INPUT/OUTPUT (I/O) REQUESTS FOR RANSOMWARE DETECTION IN STORAGE SYSTEMS
A method for sampling I/O requests for ransomware detection in a computational storage system can include reading a first stream of features extracted from Input/Output (I/O) operations. The method can comprise sampling the first stream of features using a plurality of sampling rates, and for each sampling rate, a plurality of sampling methods, thereby resulting in a plurality of sampled streams of features, each stream associated with a sampling rate and a sampling method. The method can comprise training a plurality of (ML) models, each ML model of the plurality trained on the plurality of sampled streams of features, the training thereby outputting a plurality of ML models. Each of the plurality of models provides a compatibility metric for an inputted stream of features for the sampling rate and sampling method associated with that model.
A method includes initializing an artificial intelligence (AI) agent configured to host and facilitate meetings; and integrating the AI agent with one or more external tools. Responsive to a request to host and facilitate a meeting, the AI agent generates meeting details including a meeting topic, participants, and a start time. The AI agent using a generative machine learning model generates a meeting plan based on the request. The AI agent executes the meeting plan by interacting with meeting participants using natural language processing, accessing relevant information from the one or more external tools, and updating meeting-related data using the one or more external tools. The AI agent using the generative machine learning model generates a meeting summary based on the executed meeting plan.
A system includes a processor that executes computer executable components stored in a memory. The computer executable components can comprise an indexing component that generates and stores a first text representation and a first vector representation of a reference document. The computer executable components can further comprise a query processing component that generates a second text representation and a second vector representation of a query pertaining to a designated target content. The computer executable components can further comprise a matching component that the second text representation and the second vector representation of the query against the first text representation and the first vector representation of the reference dataset using vector-based filtering and applies text-based similarity scoring to identify potential attribution against the designated target content.
A method, system, and computer program product configured to perform operations including: responsive to receiving a natural language description of an application, generating corresponding computer code utilizing a code generation large language model (LLM) that includes a planning-guided transformer decoding (PG-TD) algorithm, wherein the PG-TD algorithm uses tree search-based planning in a decoding process of a code generation transformer that is trained using test cases generated by a test case generation transformer, and wherein the test case generation transformer is trained based on results generated by the code generation transformer.
A semiconductor interconnect structure and formation thereof. The semiconductor interconnect structure includes: a set of lower-level metal lines, the set of lower-level metal lines formed by subtractive etching; a thermal conductive layer formed above the set of lower-level metal lines; an interlayer dielectric layer surrounding sidewalls of the set of lower-level metal lines and the thermal conductive layer formed above the set of lower-level metal lines; a via formed above a first metal line in the set of lower-level metal lines; and a set of upper-level metal lines formed above the thermal conductive layer, where a thermal conductivity of the thermal conductive layer is greater than a thermal conductivity of the interlayer dielectric layer.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
36.
USING A FOUNDATION MODEL THAT HAS BEEN DYNAMICALLY UPDATED BASED ON EXTERNAL MARKERS
Provided are techniques for using a foundation model that has been dynamically updated based on external markers. Data in data sources is monitored for changes to the data, where the data comprises primary data that is used to train a foundation model and secondary data. Artificial Intelligence (AI) governance metrics of the trained foundation model are automatically captured. One or more thresholds for the AI governance metrics are determined, where each of the one or more thresholds is associated with a trigger action to be taken on the foundation model. Based on meeting or exceeding a threshold of the one or more thresholds, the trigger action associated with the threshold is performed to update the foundation model. The updated foundation model is used to generate a prediction in response to receiving an input.
G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
37.
CRYPTOGRAPHIC SERVICE PROVIDER API WITH NON-NATIVE KEY EMULATION
A computer system employs a native cryptographic service provider (CSP) application interface (API) that parses a full cryptographic key token from a non-native CSP API, into a functional key object and a non-functional metadata object. The native CSP API cryptographically links the functional key object and the non-functional metadata object to form a linked object pair representing the full cryptographic key token. In response to a CSP API call, such as a modify key call or a derive key call, the native CSP API generates an updated cryptographically linked object pair by updating at least one of either the cryptographically linked functional key object or the non-functional metadata object of the linked object pair. The native CSP API exports a fully formed modified cryptographic key token based on the updated cryptographically linked object pair.
A numerical value is obtained and the numerical value is preprocessed by adding a digit count before the numerical value to generate a modified numerical value, the digit count indicating a count of digits in the numerical value. The modified numerical value is provided to a machine learning model pretrained to understand the modified numerical value that comprises the digit count and the modified numerical value is processed using the pre-trained machine learning model.
A method, computer program product, and computer system infer phylogenic relationships concurrently with a sequencing operation. The inferring includes, while sequencing data is in production by a sequencing machine, accessing the sequencing data, mapping sequence reads from the accessed sequencing data to identify sequence reads corresponding to orthologous genes of interest, and placing the identified sequence reads into respective namespaces for the corresponding orthologous genes in the in-memory database.
Embodiments receive raw data from an external application, create structured log data by removing noise from the received raw data, perform event merging on the structured log data, perform pattern extraction on the event merged structured log data, create sparse log data by performing field reduction on the pattern extraction, create compressed logs by applying a first set of large language model (LLM) compression on the sparse log data, and create recovered logs by applying a second set of LLM recovery on the compressed logs.
A system of authenticating secure package delivery is provided which includes a client memory and a client processor, The client processor is configured to acquire encoded package data representing package information which identifies a package and encoded location data representing location information which identifies a delivery location, determine whether or not the delivery location identified by the location information is a target delivery location for the package based on a plurality of portions of package information each identifying a package and a plurality of portions of location information each identifying a target delivery location and associated with a corresponding portion of package information, and provide a notification that the delivery location is the target delivery location, or is not the delivery location, based on the determination.
A semiconductor structure includes a field effect transistor with a first drain-source region, a second drain-source region, at least one channel region connecting the first drain-source region and the second drain-source region, and a gate at least partially contacting the at least one channel region. A backside power delivery network is below the field effect transistor; a backside contact is connected to the backside power delivery network; a backside via is coupled directly to the backside contact and runs vertically upward next to the field effect transistor; and a frontside contact includes a frontside contact conductive fill coupled directly to the backside via and a frontside contact liner between the frontside contact conductive fill and one of the first drain-source region and the second drain-source region.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H10D 30/43 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 62/13 - Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
H10D 64/23 - Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
43.
DETECTING POWER GRID SHORTS ON REGULATED VOLTAGE DOMAINS
Detecting power grid shorts on regulated voltage domains including providing an integrated circuit having a first voltage regulator in a voltage domain, a first circuit under test, a regulator disable logic unit, and a short detection logic unit; applying a voltage to the first circuit under test via the first voltage regulator; disabling the first voltage regulator by the regulator disable logic unit; after disabling the first voltage regulator, comparing, by the short detection logic unit, an output voltage of the first voltage regulator to a circuit leakage voltage value expected for the first circuit under test; and determining that a short exists by detecting that a difference between the output voltage of the first voltage regulator and the circuit leakage voltage value is greater than a threshold.
An embodiment includes receiving trace data by a receiving interface of an anomaly detection system, the trace data queued in a start node queue and an end node queue. The embodiment includes issuing an instruction via an interface of the anomaly detection system, the instruction executing to provision a data store comprising the start node queue and the end node queue. The embodiment includes executing a modifying instruction modifying a start trace in the start node queue and an end trace in the end node queue to result in a grouped trace for an interval, grouped by a relationship between the start trace and the end trace. The embodiment includes executing a quota metric instruction to determine a quota metric for the interval from the grouped trace based on an uncompleted transaction count, to determine whether an anomaly, comprising a change in the trace data exists in the trace data.
In some implementations, a device may generate, based on different large-language models (LLMs), prompts that are diverse. The device may adjust a level of perplexity in the generated prompts to correspond to one or more communication styles of a target population.
A method, computer program product, and computer system for enhancing a large language model (LLM) with domain context. The method includes: accessing a domain-specific ontology and generating a knowledge graph based on a domain-specific ontology of concepts and relationships; extracting ontological semantics and factors from the knowledge graph using a semantic query; enhancing an input prompt with the extracted ontological semantics and factors; generating key performance indicators and conditional parameters from the ontology; during training of the LLM, infusing the LLM with key performance indicators and conditional parameters; generating one or more infused input prompts based on the enhanced input prompt infused with the key performance indicators and conditional parameters for fine-tuning the LLM output to obtain a response; and comparing the response of the LLM against feedback.
A computer-implemented method is provided. A processor set creates a number of groups for a number of pods in an orchestration platform. Each group from the number of groups comprises a subset of pods from the number of pods. The processor set assigns computational resources to each group from the number of groups for the number of pods. The processor set attaches the subset of pods from the number of pods to each group from the number of groups. The processor set adjusts computational resources for each group from the number of groups based on pod behavior and resource consumption patterns for the subset of pods for each group from the number of groups.
Sacrificial test structures for testing with advanced packaging are provided. In one aspect, a device includes: a product structure having vias; and an etch-stop layer disposed on the product structure in between the vias, such that a surface of the etch-stop layer is coplanar with surfaces of the vias. A sacrificial test structure can be employed over the product structure, with the etch-stop layer therebetween. A method for using the present product structures is also provided.
Devices and methods of making the same include a first conductive line on an underlying layer. A first via is on the first conductive line. An interlayer dielectric is around the first via, with an air gap between the interlayer dielectric and the first via.
In some implementations, a method includes receiving a database schema identifying a set of characteristics of a target database. The method includes determining or generating a group of database concept sets for the target database, wherein each database concept set includes a primary concept and a set of secondary concepts. The method includes generating a group of first query parts relating to the group of database concept sets. The method includes generating a group of second query parts corresponding to the group of first query parts, wherein the group of first query parts includes one or more natural language query parts and wherein the group of second query parts includes one or more corresponding query language query parts.
In some implementations, a method includes receiving a database schema identifying a set of characteristics of a target database. The method includes determining or generating a group of database concept sets for the target database, wherein each database concept set includes a primary concept and a set of secondary concepts. The method includes generating a group of first query parts relating to the group of database concept sets. The method includes generating a group of second query parts corresponding to the group of first query parts, wherein the group of first query parts includes one or more natural language query parts and wherein the group of second query parts includes one or more corresponding query language query parts.
The method includes outputting a dataset identifying the group of first query parts and the group of second query parts corresponding to the group of first query parts.
In some implementations, a computer system may receive user input in a conversational context. The computer system may search a vector database for relevant example conversations between experts and users based on semantic similarity between the user input and indexed user utterances in the vector database. The computer system may retrieve a set of relevant example conversations from the vector database based on the searching. The computer system may adapt a response style of a response to the user input based on the set of relevant example conversations and using a large language model. The computer system may output the response.
G06F 16/383 - Retrieval characterised by using metadata, e.g. metadata not derived from the content or metadata generated manually using metadata automatically derived from the content
Systems, methods, and computer program products for distributed generation of inferences using hosted machine learning models are disclosed. A method may comprise fetching, from a remote server, a first checklist comprising one or more pre-processing steps and a second checklist comprising one or more post-processing steps; performing the one or more pre-processing steps at a client on an input dataset to generate a pre-processed input dataset; transmitting, from the client to the remote server, the pre-processed input dataset to be processed by the machine learning model; receiving, at the client from the remote server, an output dataset; performing the one or more post-processing steps at the client on the output dataset to generate a post-processed output dataset; and presenting the post-processed output dataset via a client computing platform at the client..
A method, system, and computer program product configured to perform operations including: generating a data structure comprising a command field and a dynamic parameter field; retrieving a first command from a command history repository; determining that a first dynamic resource associated with the first command in the data structure is unavailable; determining that a second dynamic resource not associated with the first command in the data structure is available, where the second dynamic resource is operable to execute the first command; generating an updated data structure by updating the dynamic parameter field to include the second dynamic resource; and rendering, at a user device in real time, an updated command history based on the updated data structure.
An embodiment decomposes, within a decomposition module of a security agent manager application, a signal received at a data input interface of the security agent manager application into a set of attributes. The embodiment generates within an investigation plan module an investigation plan based on the set of attributes, the investigation plan comprising a set of actionable tasks. The embodiment identifies within an agent registry module a first agent capable of executing a first task of the set of actionable tasks. The embodiment assigns within an agent deployment module the first agent to the first task, where executing the first task produces a first execution result. The embodiment performs within a response module a responsive action based on the first execution result.
H04L 41/16 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using machine learning or artificial intelligence
55.
CONTAINER IMAGE OPTIMIZATION TO ACCELERATE CONTAINER DEPLOYMENT
Described are techniques for container deployment acceleration. The techniques include extracting information from layers of an initial container image in the form of a set of nodes. The techniques further include building an image-layer analysis graph to represent relationships between nodes in the set of nodes. The techniques further include identifying adjustments to the image-layer analysis graph that, when applied to the initial container image, are expected to improve a containerized application deploy-time. The techniques further include building an optimized container image according to the adjustments identified for the image-layer analysis graph, and deploying a primary containerized application using the optimized container image and a secondary containerized application using the initial container image, where the secondary containerized application serves as a backup to the primary containerized application.
G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
A time when a given manufacturing unit of a plurality of manufacturing units located at a corresponding manufacturing station will require a specified part is estimated based on a progress of manufacturing operations of different manufacturing units of the plurality of manufacturing units and a need for parts by each manufacturing unit of the plurality of manufacturing units. An automated guided vehicle (AGV) of a plurality of automated guided vehicles is identified for transporting the specified part and a priority is assigned to the identified automated guided vehicle based on the estimated time. Traffic on an industrial floor is dynamically controlled to enable the identified automated guided vehicle to deliver the specified part.
G05B 19/418 - Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
A method, system, and computer program product that is configured to: receive training data from an external application; train a deep learning model at a first server based on the received trained data; save a plurality of checkpoints in an external memory device during the training of the deep learning model; determine that there is an interruption of the training of the deep learning model; resume and complete training of the deep learning model at a second server in response to determining that there the interruption of the training of the deep learning model; and deploy a trained deep learning model in response to completing training of the deep learning model.
G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
G06N 3/10 - Interfaces, programming languages or software development kits, e.g. for simulating neural networks
Contextual bandit for replica autoscaling is provided. This includes receiving a scaling request for the application, which comprises a set of component microservices operational on a computing system. Context information, including workload level information for multiple transactions of the application, is received based on the scaling request. Transaction-level predictors are applied to the context information, generating prediction values for a performance indicator associated with the application. A discrete constrained optimization formulation is solved based on these prediction values to generate a diverse solution pool of scaling actions. A scaling action is sampled from this pool, comprising a service replica count for at least one component microservice. Finally, a scaling recommendation is generated, including the respective service replica count for the at least one component microservice.
A connector structure for coupling optical signals to a semiconductor device includes a connector body comprising a recessed portion extending from a first side of the connector body to a second side of the connector body, an optical waveguide structure comprising one or more waveguides, the optical waveguide structure being positioned in the recessed portion of the connector body and extending from the first side of the connector body and out through the second side of the connector body, and a lid positioned over the optical waveguide structure, the lid securing the optical waveguide structure in the recessed portion of the connector body, the lid having a first edge and a second edge, the first edge of the lid being proximate to the first side of the connector body, the second edge of the lid being offset from an edge at the second side of the connector body.
A computer system employs a native cryptographic service provider (CSP) application interface (API) that parses a full cryptographic key token from a non-native CSP API, into a functional key object and a non-functional metadata object. The native CSP API cryptographically links the functional key object and the non-functional metadata object to form a linked object pair representing the full cryptographic key token. In response to a CSP API call, such as a modify key call or a derive key call, the native CSP API generates an updated cryptographically linked object pair by updating at least one of either the cryptographically linked functional key object or the non-functional metadata object of the linked object pair. The native CSP API exports a fully formed modified cryptographic key token based on the updated cryptographically linked object pair.
A method, according to one approach, includes: storing pointers in a vector database, the pointers referencing respective source data chunks on a storage device. Moreover, similar ones of the source data chunks are collocated in the storage device. In response to executing a similarity search, a pointer is received from the vector database. The received pointer is used to return a respective one of the source data chunks from the storage device. Furthermore, the returned source data chunk is transparently provided to an upstream application.
Artificial intelligence-based processing is provided which includes facilitating one or more computer processes by automatically classifying, by an artificial intelligence system, electronic documents. The classifying includes scanning an electronic document to generate electronic document layout data and identifying, via data analysis of the electronic document layout data, document layout features. Further, the classifying includes automatically selecting, based on layout features of a particular document type, one or more document layout features of the identified document layout features, and generating respective electronic feature descriptions for the one or more selected document layout features. Further, the processing includes classifying the electronic document as the particular document type based on exceeding a matching threshold with comparison of the respective electronic feature descriptions to one or more specified electronic feature descriptions for the particular document type.
An apparatus includes a plurality of conductive members and a first expandable band of a conductive sheath, wherein the plurality of conductive members are coupled to the first expandable band. The apparatus further includes a cable connector disposed in an aperture of the first expandable band of the conductive sheath, wherein the plurality of conductive members surround the cable connector along a perimeter of the first expandable band.
Generation of user-specific routing data includes receiving user-preference data associated with a user and request data associated with a routing operation. The user-preference data indicates sustainable routing condition data or unsustainable routing condition data. The request data includes message data for the routing operation and destination data associated with a destination of the routing operation. Routing zone data is determined based on the request data. The routing zone data indicates routing zones for the routing operation, latency data associated with the routing zones, or sustainability score data associated with the routing zones. User-specific routing data is generated for the routing operation based on the routing zone data and the user-preference data. The user-specific routing data indicates a routing zone of the one or more routing zones. The user-specific routing data is output.
According to one embodiment, a method, computer system, and computer program product for improving robustness of a large language model (LLM) is provided. The embodiment may include receiving a set of user prompts to the LLM; generating, via the LLM, a respective associated response to each user prompt; determining a user-approved, associated response to a final user prompt; defining a respective tuple mapping for each user prompt to the user-approved, associated response; generating, via the LLM, an internal prompt representation of the final user prompt using a topic-guided reverse prompt; generating, via the LLM, an associated response to the internal prompt representation; defining respective tuple mappings for the internal prompt representation to the user-approved, associated response and to the associated response; defining a respective tuple mapping for each user prompt to the associated response; and fine-tuning the LLM based on defined tuple mappings.
A computer-implemented method to dynamically adjust prioritization in a message system. A message manager may receive, by a message system and from a producer, a plurality of messages. A message manager may determine, based on a set of prioritization rules; a priority score for each message of the plurality of messages, wherein the set of prioritization rules is based on feedback from a set of messages previously processed by the message system. A message manager may send, selectively and based on the priority, each message to a consumer for each message to be processed.
Provided are a computer implemented method, system, and processor for decreasing voltage to a processor core based on throttling at the processor core. A first sensor in a processor core generates a first output value based on an operational margin at the processor core. Execution at the processor core is throttled in response to the first output value satisfying a threshold condition. A second sensor in the processor core, operating at an offset margin from when the first sensor operates, generates a second output value based on the operational margin at the processor core. A determination is made of a voltage change based on the second output value. A voltage supplied to the processing unit is modified by the voltage change.
A system comprises a logical control unit (LCU) operably couplable to a quantum computer system and operating an instruction interface for logical control over an operation of a quantum program at the quantum computer system. The LCU comprises a programmable processor, a memory, operably coupled to the programable processor and comprising dedicated memory regions comprising an instruction element storage, and a circuit execution unit (CEU) that interprets the quantum program and generates, using an instruction element of the instruction element storage, a logical instruction that comprises a discrete higher-level instruction for the operation of the quantum program at the quantum computer system. The CEU interfaces with a code control unit (CCU) for provision of the logical instruction for use by the CCU in generating a physical instruction that comprises a lower-level instruction for execution of a specified quantum hardware of the quantum computer system.
Systems for place and route methodology integrating resistors into CMOS circuits includes: a processor, memory operatively coupled to the processor, and a place and route module included within the memory and configured to: determine that a CMOS circuit requires one or more resistors, determine, for each of the one or more resistors, a layout for a pcres device to include within the CMOS circuit, and add the one or more resistors to the CMOS circuit, including placing and routing, for each of the one or more resistors, components of the pcres device within the CMOS circuit.
Embodiments receive a SQL query; determine a first execution time of the SQL query; create a linear regression graph with a fitted linear regression line by utilizing a linear regression model; determine that there is a new query with a clause; determine a second execution time of the new query; create a CTE based version of the new query; create a result set of the CTE based version on the new query; predict a third execution time of the CTE based version of the new query; and replace the SQL query with the CTE based version of the new query in response to the predicted third execution time of the CTE based version of the new query being less than the first execution time of the SQL query.
The present disclosure provides a computer-implemented method comprising receiving information regarding an information technology (IT) system, automatically providing context identification information, wherein the context identification information considers both technical metrics and human observations, inputting the information into an artificial intelligence (AI) assistant that analyzes the information, wherein the AI assistant includes multiple AI agents, wherein at least one of the multiple AI agents comprises a large language model (LLM) agent, managing information related to the AI assistant's interactions and decision-making processes, and generating an assessment, from the AI assistant, regarding the IT system. The assessment may comprise a root cause analysis or at least one mitigation step for the IT system.
G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
Policy enforcement with regard to original outputs of a large language model. A computing device accesses an original output generated by a large language model. The computing device triggers a large language model policy enforcer to check the original output of the large language model for compliance with one or more policies associated with the large language model. The computing device executes one or more policy enforcement actions associated with the large language model policy enforcer if the original output generated by the large language model does not comply with the one or more of the policies associated with the large language model. The computing device presents a new output generated by the large language model, the new output based upon execution of one or more policy enforcement actions and conforming to the one or more policies associated with the large language model.
According to the embodiment of the present invention, a semiconductor device includes a first nanodevice including a plurality of first upper transistors and a plurality of first lower transistors. The first nanodevice includes a first upper source/drain and a first lower source/drain that are offset from each other across the plurality of first upper transistors and the plurality of first lower transistors. The first upper source/drain includes a frontside surface and a backside surface and the first lower source/drain includes two separate horizontal frontside surfaces and a vertical inner sidewall. The vertical inner sidewall is located between the two separate horizontal frontside surfaces. A silicide layer is contiguous and conformal with the two separate horizontal frontside surfaces and the vertical inner sidewall.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H10D 30/43 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 62/13 - Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
Techniques to recharge a battery of a humanoid robot operating in a work venue include aligning boots of a humanoid robot to a location on a floor in a work venue. A power receiver in the boots can be aligned to a power transmitter in the floor, and an RFID reader in the boots can be aligned to an RFID tag in the floor. Further, an electromagnet in each of the boots can be aligned to an electromagnet in the floor at the location which secures the boots to the floor in a locked position when the electromagnet is turned on.
H02J 7/12 - Regulation of the charging current or voltage using magnetic devices having controllable degree of saturation, i.e. transductors
B25J 11/00 - Manipulators not otherwise provided for
G06K 7/10 - Methods or arrangements for sensing record carriers by electromagnetic radiation, e.g. optical sensingMethods or arrangements for sensing record carriers by corpuscular radiation
75.
VALIDATION OF RESPONSES GENERATED BY LANGUAGE MODELS
Validation of responses generated by a language model is provided and includes identifying, via machine learning, first entity action pairs from a first response of a generative language machine learning model. Each of the first entity action pairs includes a respective entity and a respective action associated with the respective entity. A first validation score is determined based on whether the first entity action pairs are present within a first knowledge base and a second set of validation scores is determined based on whether the first entity action pairs are present within a second knowledge base. A first final validation score is generated based on the first validation score and the second set of validation scores. A first recommendation from the first response is presented based on the first final validation score and operations are controlled based on the presented first recommendation.
A digital twin model of a given industrial system is created and a propagation of different services from one point to another point in the given industrial system is identified. An industrial workflow implemented by the given industrial system is analyzed using the identified propagation of different services and different types of points of failure in the given industrial system are identified based on the analyzed industrial workflow. The given industrial system is configured based on the identified points of failure to facilitate mitigation of at least one of the identified points of failure.
G05B 13/02 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric
77.
MOBILITY MANAGEMENT OF EDGE SERVERS IN A COMPUTING ENVIRONMENT
Managing the mobility of the edge servers includes detecting a trigger to a trigger to initiate management of a set of IoT devices via at least one first mobile edge server. A system obtains a set of attributes associated with each IoT device of the set of IoT devices and determines a weighting factor for each IoT device of the set of IoT devices. The system obtains a first set of spatial coordinates of each IoT device of the set of IoT devices and determines a first weighted centroid of the set of IoT devices based on the weighting factor and the first set of spatial coordinates. The system generates a deployment command to deploy the at least one first mobile edge server at the first weighted centroid.
A connector structure for coupling optical signals to a semiconductor device includes a connector body comprising a recessed portion extending from a first side of the connector body to a second side of the connector body, an optical waveguide structure comprising one or more waveguides, the optical waveguide structure being positioned in the recessed portion of the connector body and extending from the first side of the connector body and out through the second side of the connector body, and a lid positioned over the optical waveguide structure, the lid securing the optical waveguide structure in the recessed portion of the connector body, the lid having a first edge and a second edge, the first edge of the lid being proximate to the first side of the connector body, the second edge of the lid being offset from an edge at the second side of the connector body.
In real-time streaming environments, continuous forecasting allows businesses to anticipate changes, optimize operations, and detect deviations as data flows in. Anomaly detection identifies unexpected deviations, helping improve data quality, detect operational issues instantly, and enable faster decision-making. Instead of waiting for batch processing, real-time anomaly detection continuously monitors data as it arrives, detecting outliers the moment they occur. Using a forecasting model, a prediction interval is determined for each element of received data. If the received data falls outside of the prediction interval, an alert may be generated. The real-time anomaly detection can be accessed via a Structured Query Language (SQL) interface. Thus, real-time anomaly detection can be integrated into a database that receives the data stream.
G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
G06Q 10/04 - Forecasting or optimisation specially adapted for administrative or management purposes, e.g. linear programming or "cutting stock problem"
80.
QUESTION FRAMING EVALUATION USING A VECTOR DATABASE
A method, computer program product, and computer system for question framing evaluation using a vector database. A question is received. A prompt is generated from the question. The prompt, which may be enhanced via RAG or agentic RAG, is converted to an embedding. N embeddings which are closest to the embedding of the prompt are retrieved from the vector database. N is at least 2. The vector database includes multiple embeddings converted from multiple sample questions generated from document chunks by a language model. Each embedding is an embedding of a question relating to a chunk of multiple chunks of one or more documents. N closeness metrics are calculated. Each closeness metric is a measure of a closeness of the prompt to a respective question associated with each embedding. A closeness metric score equal to an average of the N closeness metrics is computed.
A system comprises a memory that stores and a processor that executes computer executable components stored in the memory, wherein the computer executable components comprise an encoding component that encodes hierarchical control layers into a quantum control system for a quantum processor, wherein at least one upper layer comprises a sequence table that maps commands from upper layers to subcommands in lower layers. The computer executable components can further comprise a sequencing component that processes entries of the sequence table to trigger, from an upper layer, subcommands in a lower layer.
G06N 10/70 - Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
G06N 10/80 - Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computersPlatforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing
A nanosheet semiconductor structure including a backside contact structure beneath a first source drain region, and a bottom inner spacer directly beneath a second source drain region adjacent to the backside contact structure.
A stacked transistor structure including a bottom transistor comprising a bottom source drain region, where the bottom source drain region directly contacts a gate structure, and a top transistor including a top source drain region, where the top source drain region is physically separated from the gate structure.
Verification of vehicle data includes receiving first data associated with a vehicle. Further, second data associated with the vehicle is retrieved. The second data include sensor data, historical driving data, and multi-dimensional reference data. A set of attributes are extracted from the first data. The set of attributes are verified based on at least one of dynamic contextual data or the second data. The verification of the set of attributes includes at least one of integrity verification associated with the vehicle, route verification of the vehicle, or alignment verification associated with the vehicle. Additionally, a result is generated based on the verification of the set of attributes.
H04W 12/65 - Environment-dependent, e.g. using captured environmental data
G07C 5/08 - Registering or indicating performance data other than driving, working, idle, or waiting time, with or without registering driving, working, idle, or waiting time
85.
PLACE AND ROUTE METHODOLOGIES FOR RESISTORS IN CMOS CIRCUITS
Systems for place and route methodology integrating resistors into CMOS circuits includes: a processor, memory operatively coupled to the processor, and a place and route module included within the memory and configured to: determine that a CMOS circuit requires one or more resistors, determine, for each of the one or more resistors, a layout for a pcres device to include within the CMOS circuit, and add the one or more resistors to the CMOS circuit, including placing and routing, for each of the one or more resistors, components of the pcres device within the CMOS circuit.
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
A method, system, and computer program product can determine an access frequency for a data element in a target database based on a number of access events for the data element in a reference time window of a defined time-length. The data element can be updated from a data source according to a refresh pattern determined based on the access frequency, wherein the updating comprises updating the data element with an update frequency at least twice the access frequency.
G06F 16/27 - Replication, distribution or synchronisation of data between databases or within a distributed database systemDistributed database system architectures therefor
There is provided a computer program product including one or more computer readable storage media having program instructions collectively stored on the one or more computer readable storage media. The program instructions are executable to: determine that at least one microservice in a cloud native based application is updated, determine a delta between the at least one microservice in the cloud native based application that is updated and the at least one microservice in the cloud native based application before being updated in response to a determination that the at least one microservice in the cloud native based application is updated, derive an updated fault subset using sequential pattern mining based on the delta between the at least one microservice in the cloud native based application that is updated and the at least one microservice in the cloud native based application before being updated, and inject the derived updated fault subset into the at least one microservice in the cloud native based application and log behavior of the at least one microservice in the cloud native based application with the injected derived updated fault subset.
Methods and apparatus are provided for facilitating cooling of an electronic device. The apparatus includes a first fan pod, a second fan pod, and the electronic device. The first fan pod includes a first fan, which is configured to pull air from an external environment into a chassis, and a first anti-recirculation flapper, which is positioned adjacent to the first fan within the first fan pod. The second fan pod includes a second fan, which is configured to exhaust air within the chassis to the external environment, and a second anti-recirculation flapper, which is positioned adjacent to the second fan within the second fan pod. The electronic device is positioned between the first fan pod and the second fan pod, where airflow generated by the first pan pod passes the electronic device before being exhausted by the second fan pod.
Generation of values trees for business includes a determination of a set of value pools, a set of value drivers, and a set of value levers based on an application of a set of language models on first input data and a second input data. The first input data includes at least a count of a set of strategic initiatives, a domain of the business, and a focus area. The second input data includes a count of a set of value pools, a count of a set of value drivers, and a count of a set of value levers. A value tree is generated that includes a set of nodes associated with the at least one strategic initiative of the set of strategic initiatives, the determined set of value pools, the determined set of value drivers, and the determined set of value levers.
G06Q 10/0637 - Strategic management or analysis, e.g. setting a goal or target of an organisationPlanning actions based on goalsAnalysis or evaluation of effectiveness of goals
A nanosheet semiconductor structure including a backside contact structure beneath a first source drain region, and a bottom inner spacer directly beneath a second source drain region adjacent to the backside contact structure.
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
91.
INTELLIGENT MANAGEMENT OF PERMISSIONS WHILE FIXING BUGS
Provided are techniques for intelligent management of permissions while fixing bugs. A description and comments associated with a bug are sent as input to a permissions Artificial Intelligence (AI) model. One or more permissions to at least one of a system and data for use in fixing the bug are received from the permissions AI model. Approval of the one or more permissions is obtained. An access token is created to associate the one or more permissions with the bug. The one or more permissions of the access token are assigned to a bug fixer. The bug fixer is invoked to fix the bug. An indication is received that the bug has been fixed. The one or more permissions are revoked from the bug fixer.
Method and apparatus for providing a user with conditional access to a computing system log. Users may request access to a computing system log, but allowing any user unconditional access poses security risks, as the computing system log can contain sensitive information. Embodiments herein relate to a computing system control center using a provided policy to evaluate whether a user should be granted access to a computing system log. The policy can determine a time frame, or certain circumstances, that the user should satisfy to be granted access to the computing system log.
A computer-implemented method includes assigning a bit of a segmented bitmap to at least one tuple. A buffer association to the bit is determined and a buffer is created when no buffer is associated with the bit. A key and payload of the at least one tuple is allocated to the buffer. The method determines if the buffer is full when the bit is associated with a buffer and responds to the buffer not being full by allocating the key and payload of the at least one tuple into the buffer.
Generating logging code in program files includes: retrieving, from a version control system, a program code file, analyzing the program code file for functions, statements, and decision points included within code of the program code file, generating, based on the analyzing, one or more log statements, and adding, based on the analyzing, the one or more log statements into the program code file, thereby revising the program code file for deployment.
The present disclosure provides a semiconductor device comprising a first standard cell column comprising three first N and P transistor pairs and a second standard cell column horizontally adjacent to the first standard cell column comprising two second N and P transistor pairs, wherein a top edge and a bottom edge of the first standard cell column is horizontally aligned with a respective top edge and a respective bottom edge of the second standard cell column.
H10D 80/20 - Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups , e.g. assemblies comprising capacitors, power FETs or Schottky diodes
A stacked transistor structure including a bottom transistor comprising a bottom source drain region, where the bottom source drain region directly contacts a gate structure, and a top transistor including a top source drain region, where the top source drain region is physically separated from the gate structure.
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
Verification of vehicle data includes receiving first data associated with a vehicle. Further, second data associated with the vehicle is retrieved. The second data include sensor data, historical driving data, and multi-dimensional reference data. A set of attributes are extracted from the first data. The set of attributes are verified based on at least one of dynamic contextual data or the second data. The verification of the set of attributes includes at least one of integrity verification associated with the vehicle, route verification of the vehicle, or alignment verification associated with the vehicle. Additionally, a result is generated based on the verification of the set of attributes.
Management of licenses in container platforms is provided and includes retrieving a set of licenses associated with a container application hosted on a container platform. Consumption data selected from the group consisting of traffic data associated with the container application, transaction data associated with the container application, configuration data associated with the container application, and resource utilization data associated with the container application, is retrieved. A machine learning (ML) model is applied to the set of licenses and the consumption data. Based on the application of the ML model to the set of licenses and the consumption data, the set of licenses is modified, and an allocation of the modified set of licenses to the container application is controlled based on input data associated with the modification of the set of licenses.
A gate merge connection assembly of a stacked field effect transistor (FET) device is provided. The gate merge connection assembly includes lower gate metal of a lower FET, upper gate metal of an upper FET and an L-shaped gate merge connection. The L-shaped gate merge connection includes a vertical section disposed in contact with the lower gate metal and extending upwardly through oxide vertically interposed between the lower and upper FETs and a horizontal section disposed in contact with the vertical section and extending horizontally to the upper gate metal.
H01L 23/535 - Arrangements for conducting electric current within the device in operation from one component to another including internal interconnections, e.g. cross-under constructions
H10D 30/43 - FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 1D charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
H10D 64/27 - Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
A key is generated for each vector of a plurality of vectors to be stored. Each vector of the plurality of vectors is bound with the corresponding key to create a 2-dimensional distributed representation via an outer product operation. The 2-dimensional distributed representation is put in a superposition with another 2-dimensional distributed representation to create an aggregated 2-dimensional distributed representation. The aggregated 2-dimensional distributed representation is stored in an in-memory compute unit. A retrieval key of the plurality of keys corresponding to a requested vector is requested and the retrieval key corresponding to the requested vector is generated. The retrieval key is used to retrieve the requested vector from the stored aggregated 2-dimensional distributed representation.
