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Type PI
        Brevet 35
        Marque 4
Juridiction
        États-Unis 28
        International 11
Date
2025 juillet 5
2025 (AACJ) 9
2024 7
2023 10
2022 4
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Classe IPC
G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques 14
G06N 3/065 - Moyens analogiques 14
G06F 30/39 - Conception de circuits au niveau physique 8
G06N 3/04 - Architecture, p. ex. topologie d'interconnexion 8
G06N 3/08 - Méthodes d'apprentissage 7
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Classe NICE
09 - Appareils et instruments scientifiques et électriques 4
42 - Services scientifiques, technologiques et industriels, recherche et conception 1
Statut
En Instance 21
Enregistré / En vigueur 18

1.

Neural Network Circuit for Vehicle Sensor Signal Processing

      
Numéro d'application 18418212
Statut En instance
Date de dépôt 2024-01-19
Date de la première publication 2025-07-24
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

Systems, devices, integrated circuits, and methods are directed to on-vehicle data processing using analog hardware realization of neural networks. A vehicle obtains a temporal sequence of sensor data samples that is collected by a sensor system including a tire pressure sensor and/or a three-axis accelerometer. The sensor system is physically coupled to a tire of a vehicle. The temporal sequence of sensor data samples is converted into a plurality of first parallel data items, which is applied as a plurality of first inputs to a neural network circuit. The neural network circuit generates one or more output data items based on the plurality of first parallel data items. The one or more output data items indicate a condition of the road, the vehicle, or a component of the vehicle.

Classes IPC  ?

  • B60C 23/04 - Dispositifs avertisseurs actionnés par la pression du pneumatique montés sur la roue ou le pneumatique
  • G06N 3/10 - Interfaces, langages de programmation ou boîtes à outils de développement logiciel, p. ex. pour la simulation de réseaux neuronaux

2.

Systems and Methods for Automotive Sensing

      
Numéro d'application 18797499
Statut En instance
Date de dépôt 2024-08-07
Date de la première publication 2025-07-24
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

Systems, devices, integrated circuits, and methods are directed to on-vehicle data processing using analog hardware realization of neural networks. A vehicle obtains a temporal sequence of sensor data that is collected by a microphone of a sensor system. The sensor system is physically coupled to a tire of a vehicle. The neural network circuit generates one or more output data items based on the sensor data, and the one or more output data items indicate the condition of a road, the vehicle, or a component of the vehicle. The sensor system, including an electronic device that includes the microphone, is also described herein. A method of training the neural network is also described herein.

Classes IPC  ?

  • B60W 40/06 - Calcul ou estimation des paramètres de fonctionnement pour les systèmes d'aide à la conduite de véhicules routiers qui ne sont pas liés à la commande d'un sous-ensemble particulier liés aux conditions ambiantes liés à l'état de la route
  • G06N 3/045 - Combinaisons de réseaux

3.

SYSTEMS AND METHODS FOR AUTOMOTIVE SENSING

      
Numéro d'application US2025011913
Numéro de publication 2025/155745
Statut Délivré - en vigueur
Date de dépôt 2025-01-16
Date de publication 2025-07-24
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Timofejevs, Aleksandrs

Abrégé

Systems, devices, integrated circuits, and methods are directed to on-vehicle data processing using analog hardware realization of neural networks. A vehicle obtains a temporal sequence of sensor data that is collected by a microphone of a sensor system. The sensor system is physically coupled to a tire of a vehicle. The neural network circuit generates one or more output data items based on the sensor data, and the one or more output data items indicate the condition of a road, the vehicle, or a component of the vehicle. The sensor system, including an electronic device that includes the microphone, is also described herein. A method of training the neural network is also described herein.

Classes IPC  ?

  • B60W 40/12 - Calcul ou estimation des paramètres de fonctionnement pour les systèmes d'aide à la conduite de véhicules routiers qui ne sont pas liés à la commande d'un sous-ensemble particulier liés à des paramètres du véhicule lui-même
  • B60C 23/04 - Dispositifs avertisseurs actionnés par la pression du pneumatique montés sur la roue ou le pneumatique
  • B60C 23/06 - Dispositifs avertisseurs actionnés par la déformation du pneumatique
  • G01M 17/02 - Pneumatiques
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion

4.

Layer-Based Analog Hardware Realization of Neural Networks

      
Numéro d'application 18401256
Statut En instance
Date de dépôt 2023-12-29
Date de la première publication 2025-07-03
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

Systems, devices, integrated circuits, and methods are provided for layer-based analog hardware realization of neural networks. An electronic device includes a collection of resistors, a collection of amplifiers, and a controller. The controller is configured to implement each of the plurality of layers sequentially. For each of the plurality of layers, the controller extracts, from memory, a plurality of layer parameters corresponding to a plurality of weights of the respective layer, and in accordance with the plurality of layer parameters, selects a plurality of resistors and a plurality of amplifiers and forms a set of input resistors from the plurality of resistors. The set of input resistors are electrically coupled to the plurality of amplifiers to form a neural layer circuit. The neural layer circuit may obtain a plurality of input signals via the plurality of resistors and generate a plurality of output signals from the plurality of input signals.

Classes IPC  ?

  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
  • H01C 1/16 - Réseaux de résistances non prévus ailleurs
  • H03F 3/16 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs avec dispositifs à effet de champ

5.

LAYER-BASED ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS

      
Numéro d'application US2024057992
Numéro de publication 2025/144548
Statut Délivré - en vigueur
Date de dépôt 2024-11-29
Date de publication 2025-07-03
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

Systems, devices, integrated circuits, and methods are provided for layer-based analog hardware realization of neural networks. An electronic device includes a collection of resistors, a collection of amplifiers, and a controller. The controller is configured to implement each of the plurality of layers sequentially. For each of the plurality of layers, the controller extracts, from memory, a plurality of layer parameters corresponding to a plurality of weights of the respective layer, and in accordance with the plurality of layer parameters, selects a plurality of resistors and a plurality of amplifiers and forms a set of input resistors from the plurality of resistors. The set of input resistors are electrically coupled to the plurality of amplifiers to form a neural layer circuit. The neural layer circuit may obtain a plurality of input signals via the plurality of resistors and generate a plurality of output signals from the plurality of input signals.

Classes IPC  ?

  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions
  • G06N 3/065 - Moyens analogiques
  • G06N 3/0495 - Réseaux quantifiésRéseaux parcimonieuxRéseaux compressés
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion

6.

NEUROCOMM

      
Numéro de série 99239144
Statut En instance
Date de dépôt 2025-06-17
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Classes de Nice  ? 09 - Appareils et instruments scientifiques et électriques

Produits et services

Semiconductor chips

7.

Systems and Methods for Enhancing the Signal-to-Noise Ratio in Analog Implementations of Trained Neural Networks

      
Numéro d'application 18975129
Statut En instance
Date de dépôt 2024-12-10
Date de la première publication 2025-03-27
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

The various implementations described herein include methods for improving signal-to-noise ratios of analog circuit implementations of neural networks. In one aspect, a method includes quantizing weights of a trained neural network to form a quantized neural network having a quantized output neuron in a final nth layer. The method also includes forming a second neural network having: n+1 layers; layers 1, . . . , n−1 identical to respective layers 1, . . . , n−1 of the trained neural network; an nth layer that includes a plurality of neurons identical to the output neuron; and an (n+1)th layer that includes one neuron that computes the average from the plurality of neurons in the nth layer. The method further includes transforming the quantized second neural network into an analog network by computing a weight matrix for the analog network, and generating a schematic for the analog network.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06N 3/0495 - Réseaux quantifiésRéseaux parcimonieuxRéseaux compressés

8.

ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS HAVING VARIABLE WEIGHTS

      
Numéro d'application US2024039916
Numéro de publication 2025/029693
Statut Délivré - en vigueur
Date de dépôt 2024-07-26
Date de publication 2025-02-06
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems, devices, integrated circuits, and methods are provided for analog hardware realization of neural networks. An electronic device includes a plurality of resistors corresponding to a plurality of weights of a neural network and one or more amplifiers coupled to the plurality of resistors. The plurality of resistors includes a first resistor corresponding to a first weight of the neural network. The one or more amplifiers and the plurality of resistors are configured to form a neural network circuit associated with the neural network. The first resistor has a variable resistance. In some embodiments, the first resistor is formed based on a crossbar array of resistive elements or a crossbar array of memory cells. Each resistive element or memory cell is located at a cross point of, and electrically coupled between, a respective word line and a respective bit line.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G11C 11/54 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments simulateurs de cellules biologiques, p. ex. neurone
  • H10B 63/00 - Dispositifs de mémoire par changement de résistance, p. ex. dispositifs RAM résistifs [ReRAM]
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion

9.

Analog hardware realization of neural networks having variable weights

      
Numéro d'application 18227901
Numéro de brevet 12424278
Statut Délivré - en vigueur
Date de dépôt 2023-07-28
Date de la première publication 2025-01-30
Date d'octroi 2025-09-23
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Godovskii, Dmitrii
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems, devices, integrated circuits, and methods are provided for analog hardware realization of neural networks. An electronic device includes a plurality of resistors corresponding to a plurality of weights of a neural network and one or more amplifiers coupled to the plurality of resistors. The plurality of resistors includes a first resistor corresponding to a first weight of the neural network. The one or more amplifiers and the plurality of resistors are configured to form a neural network circuit associated with the neural network. The first resistor has a variable resistance. In some embodiments, the first resistor is formed based on a crossbar array of resistive elements or a crossbar array of memory cells. Each resistive element or memory cell is located at a cross point of, and electrically coupled between, a respective word line and a respective bit line.

Classes IPC  ?

  • G11C 13/00 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage non couverts par les groupes , ou
  • G06N 3/065 - Moyens analogiques
  • G11C 11/54 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments simulateurs de cellules biologiques, p. ex. neurone

10.

HYBRID FIXED/FLEXIBLE NEURAL NETWORK ARCHITECTURE

      
Numéro d'application US2024028993
Numéro de publication 2024/233986
Statut Délivré - en vigueur
Date de dépôt 2024-05-10
Date de publication 2024-11-14
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Godovskiy, Dmitri
  • Timofejevs, Aleksandrs
  • Kovshov, Nikolai

Abrégé

A hybrid analog-digital hardware apparatus and a method for realizing the hardware apparatus are provided. The hardware apparatus includes an analog circuit that includes a plurality of operational amplifiers and a plurality of resistors. The analog circuit is configured to receive an analog signal from one or more sensors, and compute an analog output based on the analog signal, by performing a portion of a trained neural network. In some implementations, the hardware apparatus includes an analog-to-digital converter coupled to the analog circuit and configured to receive and convert the analog output to a digital input. The hardware apparatus also includes a classifier or regression circuit coupled to the analog circuit. The classifier or regression circuit is configured to receive output (e.g.. a set of embeddings) from the analog circuit, and classify the output to obtain a result according to a machine learning model.

Classes IPC  ?

  • H03M 1/12 - Convertisseurs analogiques/numériques
  • G06N 20/00 - Apprentissage automatique
  • H03M 1/00 - Conversion analogique/numériqueConversion numérique/analogique

11.

Hardware Realization of Neural Networks Using Buffers

      
Numéro d'application 18135718
Statut En instance
Date de dépôt 2023-04-17
Date de la première publication 2024-10-17
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Kovshov, Nikolai
  • Maslov, Boris
  • Timofejevs, Aleksandrs
  • Godovskiy, Dmitri

Abrégé

A hardware apparatus implements a neural network. In some embodiments, the neural network is a trained convolutional neural network. The hardware apparatus includes a network of interconnected neurons (e.g., implemented in operational amplifiers and resistors). The network of interconnected neurons has a plurality of subnetworks, including a left subnetwork and a right subnetwork. The left and right subnetworks are interconnected via a buffer. The left subnetwork of neurons and the right subnetwork of neurons are configured to operate at different frequencies and/or the right subnetwork is configured to operate conditionally based on content of the buffer.

Classes IPC  ?

12.

HARDWARE REALIZATION OF NEURAL NETWORKS USING BUFFERS

      
Numéro d'application 18135100
Statut En instance
Date de dépôt 2023-04-14
Date de la première publication 2024-10-17
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Kovshov, Nikolai
  • Maslov, Boris
  • Timofejevs, Aleksandrs
  • Godovskiy, Dmitri

Abrégé

A method for hardware realization of neural networks executes at a computing device. The device obtains a neural network topology for a trained convolutional neural network that transforms a set of input tensors and generates a set of intermediate tensors. The device computes a measure of locality for tensors of the trained convolutional neural network based on dependencies between the set of input tensors and the set of intermediate tensors. The device transforms the trained convolutional neural network into an equivalent buffered neural network that includes a left subnetwork and a right subnetwork based on the neural network topology and the measure of locality. The left subnetwork and the right subnetwork are interconnected via a buffer. The device generates a schematic model for implementing the equivalent buffered neural network, including selecting component parameter values for neurons of the equivalent buffered neural network and connections between the neurons.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06N 3/0442 - Réseaux récurrents, p. ex. réseaux de Hopfield caractérisés par la présence de mémoire ou de portes, p. ex. mémoire longue à court terme [LSTM] ou unités récurrentes à porte [GRU]

13.

NEUROMORPHIC ANALOG SIGNAL PROCESSOR FOR PREDICTIVE MAINTENANCE OF MACHINES

      
Numéro d'application US2023031692
Numéro de publication 2024/049998
Statut Délivré - en vigueur
Date de dépôt 2023-08-31
Date de publication 2024-03-07
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s) Timofejevs, Aleksandrs

Abrégé

Systems, methods, and devices are provided for predictive maintenance of machines. An example apparatus includes a vibration sensor configured to sense vibrations of a vibration source and an analog circuit. The analog circuit comprises a plurality of operational amplifiers and a plurality of resistors. The analog circuit is coupled to the vibration sensor and configured to: receive an analog signal from the vibration sensor; and compute an output based on the analog signal, by performing a portion of a trained neural network.

Classes IPC  ?

  • G06N 3/045 - Combinaisons de réseaux
  • G01H 1/00 - Mesure des vibrations dans des solides en utilisant la conduction directe au détecteur
  • G01M 13/045 - Analyse acoustique ou des vibrations
  • G06N 3/0455 - Réseaux auto-encodeursRéseaux encodeurs-décodeurs
  • G06N 3/0464 - Réseaux convolutifs [CNN, ConvNet]
  • G06N 3/088 - Apprentissage non supervisé, p. ex. apprentissage compétitif
  • G06G 7/12 - Dispositions pour l'exécution d'opérations de calcul, p. ex. amplificateurs spécialement adaptés à cet effet

14.

Quantization Algorithms for Analog Hardware Realization of Neural Networks

      
Numéro d'application 18467660
Statut En instance
Date de dépôt 2023-09-14
Date de la première publication 2024-01-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Kovshov, Nikolai Vladimirovich
  • Godovskiy, Dmitry Yulievich
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology into an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component parameter values for the analog components.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions
  • G06N 3/0495 - Réseaux quantifiésRéseaux parcimonieuxRéseaux compressés

15.

Analog Hardware Realization of Neural Networks

      
Numéro d'application 18467644
Statut En instance
Date de dépôt 2023-09-14
Date de la première publication 2024-01-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Kovshov, Nikolai Vladimirovich
  • Godovskiy, Dmitry Yulievich
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology into an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component parameter values for the analog components.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions

16.

Analog Hardware Realization of Neural Networks Using Libraries of I/O Interfaces and Power Management Units

      
Numéro d'application 18467671
Statut En instance
Date de dépôt 2023-09-14
Date de la première publication 2024-01-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Kovshov, Nikolai Vladimirovich
  • Godovskiy, Dmitry Yulievich
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology into an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component parameter values for the analog components.

Classes IPC  ?

17.

Optocoupler-based flexible weights in neuromorphic analog signal processors

      
Numéro d'application 18115762
Numéro de brevet 11823037
Statut Délivré - en vigueur
Date de dépôt 2023-02-28
Date de la première publication 2023-11-21
Date d'octroi 2023-11-21
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Maslov, Boris
  • Timofejevs, Aleksandrs

Abrégé

A neuromorphic analog signal processor includes a flexible circuit corresponding to an analog neural network. The flexible circuit includes operational amplifiers, each operational amplifier corresponding to an analog neuron. The flexible circuit also includes photoresistors or photodiodes interconnecting the operational amplifiers, and illumination sources. Each illumination source transmits light to a corresponding photoresistor or photodiode, thereby changing the resistance as a function of brightness of applied light. The flexible circuit also includes control circuits, each control circuit configured to apply a pulse-width modulation corresponding to a weight value, thereby causing pulsed signals at the illumination sources. The flexible circuit also includes a memory circuit coupled to the circuits. The memory circuit is configured to (i) store weight values corresponding to connections of the analog neural network and (ii) supply different weight values to the control circuits for different time periods.

Classes IPC  ?

  • G06N 3/067 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens optiques
  • G06N 3/0442 - Réseaux récurrents, p. ex. réseaux de Hopfield caractérisés par la présence de mémoire ou de portes, p. ex. mémoire longue à court terme [LSTM] ou unités récurrentes à porte [GRU]
  • G06N 3/045 - Combinaisons de réseaux
  • G06N 3/08 - Méthodes d'apprentissage
  • G06N 3/0464 - Réseaux convolutifs [CNN, ConvNet]

18.

Hybrid Fixed/Flexible Neural Network Architecture

      
Numéro d'application 18196412
Statut En instance
Date de dépôt 2023-05-11
Date de la première publication 2023-11-16
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Godovskiy, Dmitri
  • Maslov, Boris
  • Timofejevs, Aleksandrs
  • Kovshov, Nikolai

Abrégé

A hybrid analog-digital hardware apparatus and a method for realizing the hardware apparatus are provided. The hardware apparatus includes an analog circuit that includes a plurality of operational amplifiers and a plurality of resistors. The analog circuit is configured to receive an analog signal from one or more sensors, and compute an analog output based on the analog signal, by performing a portion of a trained neural network. In some implementations, the hardware apparatus includes an analog-to-digital converter coupled to the analog circuit and configured to receive and convert the analog output to a digital input. The hardware apparatus also includes a classifier or regression circuit coupled to the analog circuit. The classifier or regression circuit is configured to receive output (e.g., a set of embeddings) from the analog circuit, and classify the output to obtain a result according to a machine learning model.

Classes IPC  ?

  • G06N 3/0455 - Réseaux auto-encodeursRéseaux encodeurs-décodeurs
  • G06N 3/0895 - Apprentissage faiblement supervisé, p. ex. apprentissage semi-supervisé ou auto-supervisé

19.

SYSTEMS AND METHODS FOR HUMAN ACTIVITY RECOGNITION USING ANALOG NEUROMORPHIC COMPUTING HARDWARE

      
Numéro d'application US2023022139
Numéro de publication 2023/220437
Statut Délivré - en vigueur
Date de dépôt 2023-05-12
Date de publication 2023-11-16
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems, methods, and devices are provided for human activity recognition (5100). An example device includes an integrated circuit for human activity recognition. The integrated circuit includes an analog network of analog components configured to implement a trained neural network model, e.g., an autoencoder, (5110) that is trained to generate a plurality of descriptors for a plurality of predefined human activities based on a plurality of features extracted from a plurality of electrical signals from one or more sensors (5106, 5108). The device also includes one or more digital components configured to classify human activity (e.g., using a classifier, such as K-Nearest Neighbor) as one of the plurality of predefined human activities according to the plurality of descriptors generated by the integrated circuit (5112). In some implementations, the device further includes the one or more sensors configured to collect the plurality of electrical signals during the human activity.

Classes IPC  ?

  • G06N 3/0455 - Réseaux auto-encodeursRéseaux encodeurs-décodeurs
  • G06N 3/0464 - Réseaux convolutifs [CNN, ConvNet]
  • G06N 3/065 - Moyens analogiques
  • G06N 20/00 - Apprentissage automatique
  • A61B 5/11 - Mesure du mouvement du corps entier ou de parties de celui-ci, p. ex. tremblement de la tête ou des mains ou mobilité d'un membre
  • A61B 5/00 - Mesure servant à établir un diagnostic Identification des individus
  • G06F 18/2413 - Techniques de classification relatives au modèle de classification, p. ex. approches paramétriques ou non paramétriques basées sur les distances des motifs d'entraînement ou de référence

20.

SYSTEMS AND METHODS FOR HUMAN ACTIVITY RECOGNITION

      
Numéro d'application RU2022000064
Numéro de publication 2023/167607
Statut Délivré - en vigueur
Date de dépôt 2022-03-04
Date de publication 2023-09-07
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems, methods, and devices are provided for human activity recognition. An example device includes an integrated circuit for human activity recognition. The integrated circuit includes an analog network of analog components configured to implement a trained neural network model (e.g., an autoencoder) that is trained to generate a plurality of descriptors for a plurality of predefined human activities based on a plurality of features extracted from a plurality of electrical signals from one or more sensors. The device also includes one or more digital components configured to classify human activity (e.g., using a classifier, such as K-Nearest Neighbor) as one of the plurality of predefined human activities according to the plurality of descriptors generated by the integrated circuit. In some implementations, the device further includes the one or more sensors configured to collect the plurality of electrical signals during the human activity.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 20/00 - Apprentissage automatique

21.

TRANSFORMATIONS, OPTIMIZATIONS, AND INTERFACES FOR ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS

      
Numéro d'application RU2021000630
Numéro de publication 2023/128792
Statut Délivré - en vigueur
Date de dépôt 2021-12-30
Date de publication 2023-07-06
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology into an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component parameter values for the analog components.

Classes IPC  ?

  • G06N 3/06 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone

22.

Sound signal processing using a neuromorphic analog signal processor

      
Numéro d'application 18093315
Numéro de brevet 12347421
Statut Délivré - en vigueur
Date de dépôt 2023-01-04
Date de la première publication 2023-05-11
Date d'octroi 2025-07-01
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for sound signal processing using neuromorphic analog signal processors. A hardware apparatus includes a digital switch coupled to a plurality of analog neuromorphic cores. The digital switch is configured to obtain one or more sound streams from one or more sound sources, transmit data based on the one or more sound streams to the plurality of analog neuromorphic cores, receive output from the plurality of analog neuromorphic cores, and output one or more modified sound streams based on the output received from the plurality of analog neuromorphic cores. Each analog neuromorphic core includes a respective analog network of analog components and is configured to (i) receive respective input data from the digital switch, (ii) perform a respective voice-related function on the respective input data, and (iii) transmit respective output to the digital switch.

Classes IPC  ?

  • G10L 15/16 - Classement ou recherche de la parole utilisant des réseaux neuronaux artificiels
  • G10L 15/08 - Classement ou recherche de la parole
  • G10L 25/51 - Techniques d'analyse de la parole ou de la voix qui ne se limitent pas à un seul des groupes spécialement adaptées pour un usage particulier pour comparaison ou différentiation
  • G10L 25/78 - Détection de la présence ou de l’absence de signaux de voix

23.

POLYN TECHNOLOGY

      
Numéro de série 97920648
Statut En instance
Date de dépôt 2023-05-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Classes de Nice  ?
  • 09 - Appareils et instruments scientifiques et électriques
  • 42 - Services scientifiques, technologiques et industriels, recherche et conception

Produits et services

Data processing apparatus; semiconductor chips Engineering services; scientific and technological services, namely, research and design in the field of artificial intelligence and neuromorphic computing; providing information relating to computer technology via a website

24.

VIBROSENSE

      
Numéro de série 97920632
Statut En instance
Date de dépôt 2023-05-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Classes de Nice  ? 09 - Appareils et instruments scientifiques et électriques

Produits et services

Semiconductor chips

25.

NEUROSENSE

      
Numéro de série 97920645
Statut En instance
Date de dépôt 2023-05-04
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Classes de Nice  ? 09 - Appareils et instruments scientifiques et électriques

Produits et services

Semiconductor chips

26.

Neuromorphic Analog Signal Processor for Predictive Maintenance of Machines

      
Numéro d'application 17902757
Statut En instance
Date de dépôt 2022-09-02
Date de la première publication 2023-03-16
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems, methods, and devices are provided for predictive maintenance of machines. An example apparatus includes a vibration sensor configured to sense vibrations of a vibration source and an analog circuit. The analog circuit comprises a plurality of operational amplifiers and a plurality of resistors. The analog circuit is coupled to the vibration sensor and configured to: receive an analog signal from the vibration sensor; and compute an output based on the analog signal, by performing a portion of a trained neural network.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion

27.

ANALOG HARDWARE REALIZATION OF TRAINED NEURAL NETWORKS FOR VOICE CLARITY

      
Numéro d'application US2021058266
Numéro de publication 2022/191879
Statut Délivré - en vigueur
Date de dépôt 2021-11-05
Date de publication 2022-09-15
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of convolutional neural networks for voice clarity. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents one or more connections between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component values for the analog components.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/08 - Méthodes d'apprentissage
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
  • G06F 30/36 - Conception de circuits au niveau analogique

28.

Systems and Methods for Human Activity Recognition Using Analog Neuromorphic Computing Hardware

      
Numéro d'application 17744565
Statut En instance
Date de dépôt 2022-05-13
Date de la première publication 2022-09-08
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems, methods, and devices are provided for human activity recognition. An example device includes an integrated circuit for human activity recognition. The integrated circuit includes an analog network of analog components configured to implement a trained neural network model (e.g., an autoencoder) that is trained to generate a plurality of descriptors for a plurality of predefined human activities based on a plurality of features extracted from a plurality of electrical signals from one or more sensors. The device also includes one or more digital components configured to classify human activity (e.g., using a classifier, such as K-Nearest Neighbor) as one of the plurality of predefined human activities according to the plurality of descriptors generated by the integrated circuit. In some implementations, the device further includes the one or more sensors configured to collect the plurality of electrical signals during the human activity.

Classes IPC  ?

  • A61B 5/11 - Mesure du mouvement du corps entier ou de parties de celui-ci, p. ex. tremblement de la tête ou des mains ou mobilité d'un membre
  • G06K 9/62 - Méthodes ou dispositions pour la reconnaissance utilisant des moyens électroniques
  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques

29.

Systems and methods for detonation control in spark ignition engines using analog neuromorphic computing hardware

      
Numéro d'application 17733932
Numéro de brevet 11885271
Statut Délivré - en vigueur
Date de dépôt 2022-04-29
Date de la première publication 2022-08-25
Date d'octroi 2024-01-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

An apparatus is provided for detonation control in spark ignition engines. The apparatus includes an analog neurocomputing hardware device, a knock sensor coupled to a spark ignition engine, an ignition coil for the spark ignition engine, and an Electronic Control Unit (ECU) for the spark ignition engine. The analog neuromorphic hardware device is configured to receive knock signals from the knock sensor, receive ignition coil data from the ignition coil, determine a knock level and ignition quality measure based on the received knock sensor signals and the received ignition coil data, and transmit the knock level and ignition quality measure to the ECU.

Classes IPC  ?

  • F02D 35/02 - Commande non électrique des moteurs en fonction des conditions extérieures ou intérieures aux moteurs, non prévue ailleurs des conditions intérieures
  • F02D 41/14 - Dispositions de circuits pour produire des signaux de commande introduisant des corrections à boucle fermée
  • G06N 3/065 - Moyens analogiques
  • F02D 41/26 - Commande électrique de l'alimentation en mélange combustible ou en ses constituants caractérisée par l'utilisation de moyens numériques utilisant des calculateurs, p. ex. microprocesseurs
  • F02P 5/152 - Traitement numérique des données fonction du cliquetis
  • F02P 17/12 - Test des caractéristiques de l'étincelle, de la tension ou du courant d'allumage
  • F02D 41/30 - Commande de l'injection de combustible

30.

Systems and methods for optimizing energy efficiency of analog neuromorphic circuits

      
Numéro d'application 17200723
Numéro de brevet 12393833
Statut Délivré - en vigueur
Date de dépôt 2021-03-12
Date de la première publication 2022-01-06
Date d'octroi 2025-08-19
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for optimizing energy efficiency of analog neuromorphic circuits. The method includes obtaining an integrated circuit implementing an analog network of analog components including operational amplifiers and resistors. The analog network represents a trained neural network, each operational amplifier represents an analog neuron, and each resistor represents a connection between two analog neurons. The method also includes generating inferences using the integrated circuit for test inputs, including simultaneously transferring signals from one layer to a subsequent layer. The method also includes, while generating inferences: in accordance with a determination that a level of signal output of the operational amplifiers is equilibrated: determining an active set of analog neurons of the analog network influencing signal formation for propagation of signals; and turning off power for other analog neurons of the analog network, for a predetermined period of time.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06F 1/3206 - Surveillance d’événements, de dispositifs ou de paramètres initiant un changement de mode d’alimentation
  • G06F 1/3287 - Économie d’énergie caractérisée par l'action entreprise par la mise hors tension d’une unité fonctionnelle individuelle dans un ordinateur
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/044 - Réseaux récurrents, p. ex. réseaux de Hopfield
  • G06N 3/049 - Réseaux neuronaux temporels, p. ex. éléments à retard, neurones oscillants ou entrées impulsionnelles
  • G06N 3/0499 - Réseaux à propagation avant
  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions
  • G06N 5/04 - Modèles d’inférence ou de raisonnement

31.

Analog Hardware Realization of Neural Networks

      
Numéro d'application 17189109
Statut En instance
Date de dépôt 2021-03-01
Date de la première publication 2021-12-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component values for the analog components.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/08 - Méthodes d'apprentissage
  • G06F 30/39 - Conception de circuits au niveau physique

32.

ANALOG HARDWARE REALIZATION OF TRAINED NEURAL NETWORKS FOR VOICE CLARITY

      
Numéro d'application 17196960
Statut En instance
Date de dépôt 2021-03-09
Date de la première publication 2021-12-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of convolutional neural networks for voice clarity. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents one or more connections between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component values for the analog components.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/08 - Méthodes d'apprentissage
  • G06F 30/39 - Conception de circuits au niveau physique

33.

Analog Hardware Realization of Trained Neural Networks

      
Numéro d'application 17198198
Statut En instance
Date de dépôt 2021-03-10
Date de la première publication 2021-12-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes calculating one or more connection constraints based on analog integrated circuit (IC) design constraints. The method also includes transforming the neural network topology to an equivalent sparsely connected network of analog components satisfying the one or more connection constraints. The method also includes computing a weight matrix for the equivalent sparsely connected network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent sparsely connected network.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/08 - Méthodes d'apprentissage

34.

Analog Hardware Realization of Trained Neural Networks

      
Numéro d'application 17199407
Statut En instance
Date de dépôt 2021-03-11
Date de la première publication 2021-12-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components including a plurality of operational amplifiers and a plurality of resistors. Each operational amplifier represents an analog neuron of the equivalent analog network, and each resistor represents a connection between two analog neurons. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection. The method also includes generating a resistance matrix for the weight matrix. Each element of the resistance matrix corresponds to a respective weight of the weight matrix and represents a resistance value.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/08 - Méthodes d'apprentissage

35.

ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS

      
Numéro d'application EP2020067800
Numéro de publication 2021/259482
Statut Délivré - en vigueur
Date de dépôt 2020-06-25
Date de publication 2021-12-30
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component values for the analog components.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
  • G06N 3/10 - Interfaces, langages de programmation ou boîtes à outils de développement logiciel, p. ex. pour la simulation de réseaux neuronaux
  • G06F 30/30 - Conception de circuits

36.

Optimizations for analog hardware realization of trained neural networks

      
Numéro d'application 17199373
Numéro de brevet 12327182
Statut Délivré - en vigueur
Date de dépôt 2021-03-11
Date de la première publication 2021-12-30
Date d'octroi 2025-06-10
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method includes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components including operational amplifiers and resistors. Each operational amplifier represents an analog neuron of the equivalent analog network, and each resistor represents a connection between two analog neurons. The method also includes computing a weight matrix based on the weights of the trained neural network. The method also includes generating a resistance matrix for the weight matrix. The method also includes pruning the equivalent analog network to reduce the number of operational amplifiers or the resistors, based on the resistance matrix, to obtain an optimized analog network of analog components.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06F 1/3206 - Surveillance d’événements, de dispositifs ou de paramètres initiant un changement de mode d’alimentation
  • G06F 1/3287 - Économie d’énergie caractérisée par l'action entreprise par la mise hors tension d’une unité fonctionnelle individuelle dans un ordinateur
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/044 - Réseaux récurrents, p. ex. réseaux de Hopfield
  • G06N 3/049 - Réseaux neuronaux temporels, p. ex. éléments à retard, neurones oscillants ou entrées impulsionnelles
  • G06N 3/0499 - Réseaux à propagation avant
  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions
  • G06N 5/04 - Modèles d’inférence ou de raisonnement

37.

Integrated circuits for neural networks

      
Numéro d'application 17199422
Numéro de brevet 12327183
Statut Délivré - en vigueur
Date de dépôt 2021-03-11
Date de la première publication 2021-12-30
Date d'octroi 2025-06-10
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

An integrated circuit includes an analog network of analog components fabricated by a method. The method includes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components including operational amplifiers and resistors. Each operational amplifier represents an analog neuron, and each resistor represents a connection between analog neurons. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. The method also includes generating a resistance matrix for the weight matrix. The method also includes generating lithographic masks for fabricating a circuit implementing the equivalent analog network based on the resistance matrix. The method also includes fabricating the circuit based on the one or more lithographic masks using a lithographic process.

Classes IPC  ?

  • G06N 3/065 - Moyens analogiques
  • G06F 1/3206 - Surveillance d’événements, de dispositifs ou de paramètres initiant un changement de mode d’alimentation
  • G06F 1/3287 - Économie d’énergie caractérisée par l'action entreprise par la mise hors tension d’une unité fonctionnelle individuelle dans un ordinateur
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/044 - Réseaux récurrents, p. ex. réseaux de Hopfield
  • G06N 3/049 - Réseaux neuronaux temporels, p. ex. éléments à retard, neurones oscillants ou entrées impulsionnelles
  • G06N 3/0499 - Réseaux à propagation avant
  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06N 3/082 - Méthodes d'apprentissage modifiant l’architecture, p. ex. par ajout, suppression ou mise sous silence de nœuds ou de connexions
  • G06N 5/04 - Modèles d’inférence ou de raisonnement

38.

Systems and Methods for Generating Libraries for Hardware Realization of Neural Networks

      
Numéro d'application 17200707
Statut En instance
Date de dépôt 2021-03-12
Date de la première publication 2021-12-30
Propriétaire PolyN Technology Limited (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Kovshov, Nikolai
  • Godovskiy, Dmitri

Abrégé

Systems and methods are provided for generating libraries for hardware realization of neural networks. The method includes obtaining a plurality of neural network topologies. Each neural network topology corresponds to a respective neural network. The method also includes transforming each neural network topology to a respective equivalent analog network of analog components. The method also includes generating a plurality of lithographic masks for fabricating a plurality of circuits. Each circuit implements a respective equivalent analog network of analog components

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06F 30/39 - Conception de circuits au niveau physique
  • G06N 3/08 - Méthodes d'apprentissage

39.

ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS

      
Numéro d'application RU2020000306
Numéro de publication 2021/262023
Statut Délivré - en vigueur
Date de dépôt 2020-06-25
Date de publication 2021-12-30
Propriétaire POLYN TECHNOLOGY LIMITED (Royaume‑Uni)
Inventeur(s)
  • Timofejevs, Aleksandrs
  • Maslov, Boris
  • Godovskiy, Dmitry Yulievich
  • Kovshov, Nikolai Vadimovich

Abrégé

Systems and methods are provided for analog hardware realization of neural networks. The method incudes obtaining a neural network topology and weights of a trained neural network. The method also includes transforming the neural network topology to an equivalent analog network of analog components. The method also includes computing a weight matrix for the equivalent analog network based on the weights of the trained neural network. Each element of the weight matrix represents a respective connection between analog components of the equivalent analog network. The method also includes generating a schematic model for implementing the equivalent analog network based on the weight matrix, including selecting component values for the analog components.

Classes IPC  ?

  • G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
  • G06G 7/60 - Calculateurs analogiques pour des procédés, des systèmes ou des dispositifs spécifiques, p. ex. simulateurs d'êtres vivants, p. ex. leur système nerveux