A novel input device that is highly convenient or reliable is provided. A novel input/output device that is highly convenient or reliable is provided. A semiconductor device is provided. The present inventors have reached an idea of a structure including a plurality of conductive films configured to be capacitively coupled to an approaching object, a driver circuit that selects a conductive film from a plurality of conductive films in a predetermined order, and a sensor circuit having a function of supplying a search signal and a sensing signal.
A lightweight flexible light-emitting device which is able to possess a curved display portion and display a full color image with high resolution and the manufacturing process thereof are disclosed. The light-emitting device comprises: a plastic substrate; an insulating layer with an adhesive interposed therebetween; a thin film transistor over the insulating layer; a protective insulating film over the thin film transistor, a color filter over the protective insulating film; and a white-emissive light-emitting element formed over and being in contact with the thin film transistor.
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10H 20/851 - Moyens de conversion de la longueur d’onde
H10H 20/855 - Moyens de mise en forme du champ optique, p. ex. lentilles
H10K 50/125 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche
H10K 50/13 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche comprenant des couches EL empilées dans une unité EL
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
H10K 59/124 - Couches isolantes formées entre les éléments TFT et les éléments OLED
H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
A semiconductor device having a novel structure is provided. The semiconductor device includes a silicon substrate and a device provided above the silicon substrate. The device includes a transistor and a conductor. The transistor includes a metal oxide in a channel formation region. Conductivity is imparted to the silicon substrate. The conductor is electrically connected to each of a drain of the transistor and the silicon substrate through an opening provided in the device. Heat of the drain of the transistor can be efficiently released through the silicon substrate.
An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on the number of write operations. The semiconductor device includes a first memory cell including a first transistor and a second transistor, a second memory cell including a third transistor and a fourth transistor, and a driver circuit. The first transistor and the second transistor overlap at least partly with each other. The third transistor and the fourth transistor overlap at least partly with each other. The second memory cell is provided over the first memory cell. The first transistor includes a first semiconductor material. The second transistor, the third transistor, and the fourth transistor include a second semiconductor material.
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
G11C 16/08 - Circuits d'adressageDécodeursCircuits de commande de lignes de mots
G11C 16/10 - Circuits de programmation ou d'entrée de données
G11C 16/26 - Circuits de détection ou de lectureCircuits de sortie de données
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/20 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur
H10B 41/30 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 99/00 - Matière non prévue dans les autres groupes de la présente sous-classe
H10D 86/00 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre
An electronic device that can easily increase the viewing angle and has a reduced screen-door effect is provided. In the electronic device, images displayed on a display panel with a low pixel density and a display panel with a high pixel density are synthesized to be seen. The electronic device includes a first display panel that has a relatively large screen size and a low pixel density, and a second display panel and a third display panel each of which has a relatively small screen size and a high pixel density. The electronic device is configured such that visual information enters the central field of view from the second display panel or the third display panel and visual information enters the peripheral field of view from the first display panel. Such a configuration can easily increase the viewing angle and reduce the screen-door effect.
G02B 27/10 - Systèmes divisant ou combinant des faisceaux
G02B 27/14 - Systèmes divisant ou combinant des faisceaux fonctionnant uniquement par réflexion
G02F 1/133 - Dispositions relatives à la structureExcitation de cellules à cristaux liquidesDispositions relatives aux circuits
H10K 59/50 - OLED intégrées avec des éléments de modulation de lumière, p. ex. avec des éléments électrochromes, des éléments photochromes ou des éléments à cristaux liquides
A display apparatus with a high aperture ratio is provided. The display apparatus includes a first pixel, a second pixel, a first coloring layer, a second coloring layer, a first conductive layer, a second conductive layer, and a first insulating layer. The first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer. The second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer. The second pixel is placed to be adjacent to the first pixel. The first coloring layer is placed to overlap with the first pixel. The second coloring layer is placed to overlap with the second pixel. The wavelength range of light that the second coloring layer transmits is different from a wavelength range of light that the first coloring layer transmits. The first conductive layer is placed over the common electrode. The first insulating layer is placed over the first conductive layer. The second conductive layer is placed over the first insulating layer. One or both of the first conductive layer and the second conductive layer overlap with a region interposed between the first EL layer and the second EL layer. A side surface of the first EL layer and a side surface of the second EL layer are placed to face each other.
H10K 50/13 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche comprenant des couches EL empilées dans une unité EL
H10K 59/127 - Affichages à OLED à matrice active [AMOLED] comprenant deux substrats, p. ex. un affichage comprenant une matrice OLED et un circuit de commande de TFT sur des substrats différents
A semiconductor device with high manufacturing yield is provided. The semiconductor device includes a plurality of subpixels. Each of the subpixels includes a first transistor, a second transistor, a first capacitor to a third capacitor, a first insulating layer, and a wiring. Each of the first capacitor to the third capacitor includes a first conductive layer, a second conductive layer, and a second insulating layer sandwiched between the first conductive layer and the second conductive layer. The first insulating layer is provided over the first transistor and the second transistor. The first conductive layers of the first capacitor to the third capacitor and the wiring are each provided over the first insulating layer. In a top view, the proportion of the total area of the first conductive layers of the first capacitor to the third capacitor and the wiring to the area of the subpixel is greater than or equal to 15 percent. The area of the first conductive layer of the second capacitor and the area of the first conductive layer of the third capacitor are each greater than or equal to twice the area of the first conductive layer of the first capacitor.
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent
H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
Provided is a semiconductor device that can be miniaturized or highly integrated, a semiconductor device that is highly reliable, a semiconductor device that has low power consumption, or a semiconductor device that has a high operation speed. This semiconductor device includes: a first transistor including a first conductive layer to a third conductive layer, a first oxide semiconductor layer, and a charge accumulation layer; a second transistor including a fourth conductive layer, a fifth conductive layer, and a second oxide semiconductor layer; and a first insulating layer. The first insulating layer is located above the first conductive layer and the fourth conductive layer, and includes: a first opening overlapping the first conductive layer; and a second opening overlapping the fourth conductive layer. A second conductive layer and the fifth conductive layer are located above the first insulating layer. The first oxide semiconductor layer is located in the first opening. In the first opening, the charge accumulation layer is located between the first oxide semiconductor layer and the third conductive layer. The second oxide semiconductor layer is located in the second opening.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
H10B 43/30 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire
H10B 43/40 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région de circuit périphérique
H10B 51/30 - Dispositifs de RAM ferro-électrique [FeRAM] comprenant des transistors ferro-électriques de mémoire caractérisés par la région noyau de mémoire
H10B 53/30 - Dispositifs RAM ferro-électrique [FeRAM] comprenant des condensateurs ferro-électriques de mémoire caractérisés par la région noyau de mémoire
H10D 1/68 - Condensateurs n’ayant pas de barrières de potentiel
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 89/00 - Aspects des dispositifs intégrés non couverts par les groupes
The present invention provides a semiconductor device that is easily scaled down. The semiconductor device has a semiconductor layer, a first electrode, a second electrode, a gate insulation layer, and a gate electrode. The semiconductor layer has a tubular portion. The gate electrode has a portion located on the inner side of the tubular portion. The gate insulation layer has a portion located between the semiconductor layer and the gate electrode. The second electrode has a portion located above the first electrode. The semiconductor layer has a portion in contact with the top surface of the second electrode, above the tubular portion. The semiconductor layer also has a portion in contact with the top surface of the first electrode, below the tubular portion. The semiconductor layer further includes a two-dimensional layered material.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
Provided is a semiconductor device having a small footprint. This semiconductor device includes a first transistor, a second transistor, and a first insulating layer. The first transistor includes a first conductive layer, a first metal oxide layer, a gate insulating layer, and a first gate electrode. The second transistor includes a second conductive layer, a third conductive layer, a second metal oxide layer, a gate insulating layer, and a second gate electrode. The first insulating layer is located above the first conductive layer and the second conductive layer and includes a first opening reaching the first conductive layer. The first insulating layer and the third conductive layer include a second opening reaching the second conductive layer. The first metal oxide layer includes: a first region in contact with the upper surface of the first conductive layer; a second region in contact with a lateral surface of the first insulating layer; and a third region in contact with the upper surface of the first insulating layer. The third region is in contact with the second region. The second metal oxide layer is in contact with the upper surface of the second conductive layer, the lateral surface of the first insulating layer, and a lateral surface of the third conductive layer.
G09F 9/30 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
A display device capable of performing display at high luminance is provided. A first layer containing a first light-emitting material emitting blue light is formed into an island shape over a first pixel electrode, and then a second layer containing a second light-emitting material emitting light having a longer wavelength than blue light is formed into an island shape over a second pixel electrode. After that, an insulating layer overlapping with a region interposed between the first pixel electrode and the second pixel electrode is formed, and a common electrode is formed to cover the first layer, the second layer, and the insulating layer.
An electronic device providing a high sense of immersion is provided. An electronic device with low power consumption is provided. A first display device includes a plurality of first pixels. The first pixel includes a light-emitting element exhibiting green. A second display device includes a plurality of second pixels. The second pixel includes a light-emitting element exhibiting red and a light-emitting element exhibiting blue. Each of the first display device and the second display device has a function of displaying a first image and a second image. The first display device is provided at such a position that the first image is reflected by the first half mirror and enters an eyepiece lens. The second display device is provided at such a position that the second image passes through the first half mirror and enters the eyepiece lens. The first image and the second image are each presented through the eyepiece lens.
H04N 13/344 - Affichage pour le visionnement à l’aide de lunettes spéciales ou de visiocasques avec des visiocasques portant des affichages gauche et droit
H10K 59/35 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des sous-pixels rouge-vert-bleu [RVB]
A semiconductor device that can be miniaturized or highly integrated is provided. First to second transistors share a first metal oxide over a first insulator and a first conductor over the first metal oxide; the first transistor includes a second conductor and a second insulator which are over the first metal oxide and a third conductor over the second insulator; the second transistor includes a fourth conductor and a third insulator which are over the first metal oxide and a fifth conductor over the third insulator; a side surface of the first insulator includes a portion in contact with the fourth conductor; an end portion of the fourth conductor includes a portion positioned outward from an end portion of the first insulator; the second insulator is positioned between the first conductor and the second conductor; the metal oxide and the third conductor overlap with each other with the second insulator therebetween; the third insulator is positioned between the first conductor and the fourth conductor; and the metal oxide and the fifth conductor overlap with each other with the third insulator therebetween.
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 64/68 - Électrodes ayant un conducteur couplé capacitivement à un semi-conducteur par un isolant, p. ex. électrodes du type métal-isolant-semi-conducteur [MIS] caractérisées par l’isolant, p. ex. par l’isolant de grille
A novel storage device is provided. A storage device in which N memory layers each including a plurality of memory cells provided in a matrix (Nis an integer greater than or equal to 2) are stacked is provided. A write bit line, a read bit line, and a selection line are provided along a stacking direction of the memory layers, and a write word line and a read word line are provided in the direction orthogonal to the stacking direction of the memory layers. The memory cell includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to the write bit line through a first conductor including a region functioning as one of a source electrode and a drain electrode. The first conductor includes a region where at least one of the top surface, a side surface, and the bottom surface of the first conductor is in contact with the write bit line.
Provided is a novel semiconductor device. This semiconductor device includes first to third transistors, a first capacitive element, and a second capacitive element. The first to third transistors each have a gate, a first terminal, and a second terminal. The first terminal of the first transistor is electrically connected to a first electrode of the first capacitive element and the gate of the third transistor. The first terminal of the second transistor is electrically connected to the second terminal of the first transistor and a first electrode of the second capacitive element. The gates of the first transistor and the second transistor are electrically connected to each other. The second electrodes of the first capacitive element and the second capacitive element are electrically connected to each other.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
G11C 11/405 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c.-à-d. cellules dynamiques avec régénération de la charge commune à plusieurs cellules de mémoire, c.-à-d. rafraîchissement externe avec trois portes à transfert de charges, p. ex. transistors MOS, par cellule
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 99/00 - Matière non prévue dans les autres groupes de la présente sous-classe
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
16.
POSITIVE ELECTRODE, SECONDARY BATTERY, AND ELECTRONIC DEVICE
Provided is a positive electrode that maintains high discharge capacity even after undergoing a charge/discharge cycle test. A positive electrode according to the present invention can be used in a lithium ion secondary battery. Said positive electrode comprises positive electrode active material particles, wherein: the positive electrode active material particles contain lithium, cobalt, oxygen, magnesium, fluorine, nickel, aluminum, and titanium; and in a cross-sectional SEM image of the positive electrode, the number of cracks is not more than 0.06 per square micrometer and the total length of cracks is not more than 0.06 μm per square micrometer. Alternatively, when the charge/discharge cycle test is performed 50 times and then the positive electrode is taken out and a cross-sectional SEM image of the positive electrode is obtained, the number of pits in the positive electrode active material particles of the positive electrode is not more than 0.25 per square micrometer.
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
H01M 4/36 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs
17.
METHOD FOR PRODUCING POSITIVE ELECTRODE ACTIVE SUBSTANCE
The present invention provides a method for producing a positive electrode active substance having good cycle characteristics. This method for producing a positive electrode active substance comprises: mixing lithium cobaltate having a median diameter (D50) of 10 µm or less with a first additional element source to form a first mixture; subjecting the first mixture to a first heating to form a first composite oxide; mixing the first composite oxide with a second additional element source to form a second mixture; subjecting the second mixture to second heating to form a second composite oxide; mixing the second composite oxide with a third additional element source to form a third mixture; and subjecting the third mixture to third heating. The first additional element source comprises a magnesium compound and a fluorine compound. The second additional element source comprises an aluminum compound and a nickel compound. The third additional element source comprises a titanium compound. The duration of the second heating and the duration of the third heating are each shorter than the duration of the first heating.
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
An aspect of the present invention provides a positive electrode active material with enhanced lithium ion insertion and desorption. Also provided is a positive electrode active material or a composite oxide with a crystal structure resistant to collapse even after repeated charge-discharge cycles. In order to prevent a lithium cobalt oxide surface layer portion from forming a rock salt structure that creates resistance, lithium fluoride is added to the lithium cobalt oxide to create a layered rock salt structure on a portion of the surface. The subsequent addition of magnesium fluoride allows for the presence of a barrier layer with a net structure of Mg-F bonds or Mg-O bonds in the surface layer portion, while still maintaining the layered rock salt structure on the portion of the surface.
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
A novel metal oxide is provided. One embodiment of the present invention is a crystalline metal oxide. The metal oxide includes a first layer and a second layer; the first layer has a wider bandgap than the second layer; the first layer and the second layer form a crystal lattice; and in the case where a carrier is excited in the metal oxide, the carrier is transferred through the second layer. Furthermore, the first layer contains an element M (M is one or more selected from Al, Ga, Y, and Sn) and Zn, and the second layer contains In.
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
A display apparatus with a high aperture ratio is provided. The display apparatus includes a first pixel, a second pixel placed adjacent to the first pixel, a first conductive layer, a second conductive layer, and a first insulating layer. The first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer. The second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer. The first conductive layer is placed over the common electrode. The first insulating layer is placed over the first conductive layer. The second conductive layer is placed over the first insulating layer. One or both of the first conductive layer and the second conductive layer overlap with a region interposed between the first EL layer and the second EL layer. A side surface of the first EL layer and a side surface of the second EL layer are placed to face each other.
A positive electrode and a secondary battery that are stable in a high potential state and/or a high temperature state are provided. Alternatively, a positive electrode and a secondary battery that have excellent cycle performance are provided. The positive electrode includes a positive electrode active material and a conductive material; at least part of a surface of the positive electrode active material is covered with the conductive material; the positive electrode active material includes lithium cobalt oxide containing magnesium, fluorine, aluminum, and nickel; the lithium cobalt oxide includes a region in which at least one or more concentrations of the magnesium, the fluorine, and the aluminum are the maximum in a surface portion; and the conductive material contains carbon. The conductive material is preferably one or more selected from carbon black, graphene, and a graphene compound.
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
H01M 4/02 - Électrodes composées d'un ou comprenant un matériau actif
Provided is a light-emitting element with high external quantum efficiency, or a light-emitting element with a long lifetime. The light-emitting element includes, between a pair of electrodes, a light-emitting layer including a guest material and a host material, in which an emission spectrum of the host material overlaps with an absorption spectrum of the guest material, and phosphorescence is emitted by conversion of an excitation energy of the host material into an excitation energy of the guest material. By using the overlap between the emission spectrum of the host material and the absorption spectrum of the guest material, the energy smoothly transfers from the host material to the guest material, so that the energy transfer efficiency of the light-emitting element is high. Accordingly, a light-emitting element with high external quantum efficiency can be achieved.
H10K 50/11 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL]
C09K 11/02 - Emploi de substances particulières comme liants, revêtements de particules ou milieux de suspension
C09K 11/06 - Substances luminescentes, p. ex. électroluminescentes, chimiluminescentes contenant des substances organiques luminescentes
H05B 33/14 - Sources lumineuses avec des éléments radiants ayant essentiellement deux dimensions caractérisées par la composition chimique ou physique ou la disposition du matériau électroluminescent
Provided is a multifunctional display device or a multifunctional electronic device. Provided is a display device or electronic device with high visibility. Provided is a display device or electronic device with low power consumption. The electronic device includes a housing, a display device, a system unit, a camera, a secondary battery, a reflective surface, and a wearing tool. The system unit and the secondary battery are each positioned inside the housing. The system unit includes a charging circuit unit. The charging circuit unit is configured to control charging of the secondary battery. The system unit is configured to perform first processing based on imaging data of the camera. The first processing includes at least one of gesture operation, head tracking, and eye tracking. The system unit is configured to generate image data based on the first processing. The display device is configured to display the image data.
A display panel for displaying an image is provided with a plurality of pixels arranged in a matrix. Each pixel includes one or more units each including a plurality of subunits. Each subunit includes a transistor in which an oxide semiconductor layer which is provided so as to overlap a gate electrode with a gate insulating layer interposed therebetween, a pixel electrode which drives liquid crystal connected to a source or a drain of the transistor, a counter electrode which is provided so as to face the pixel electrode, and a liquid crystal layer provided between the pixel electrode and the counter electrode. In the display panel, a transistor whose off current is lower than 10 zA/μm at room temperature per micrometer of the channel width and off current of the transistor at 85° C. can be lower than 100 zA/μm per micrometer in the channel width.
G09G 3/36 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice en commandant la lumière provenant d'une source indépendante utilisant des cristaux liquides
G02F 1/1337 - Orientation des molécules des cristaux liquides induite par les caractéristiques de surface, p. ex. par des couches d'alignement
G02F 1/1362 - Cellules à adressage par une matrice active
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants
It is an object to suppress deterioration of characteristics of a transistor in a driver circuit. A first switch for controlling whether to set a potential state of an output signal by being turned on and off in accordance with the first input signal, and a second switch for controlling whether to set a potential state of an output signal by being turned on and off in accordance with the second input signal are included. A first wiring and a second wiring are brought into electrical continuity by turning on and off of the first switch or the second switch.
G09G 3/36 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice en commandant la lumière provenant d'une source indépendante utilisant des cristaux liquides
G11C 19/28 - Mémoires numériques dans lesquelles l'information est déplacée par échelons, p. ex. registres à décalage utilisant des éléments semi-conducteurs
Provided is a semiconductor device with a high operating speed. This semiconductor device includes first and second transistors and a capacitive element. The first transistor has a first oxide semiconductor. The second transistor has a second oxide semiconductor. An insulating body with first to third openings is disposed on top of the first and second transistors, such that the gate of the first transistor is located inside the first opening, the gate of the second transistor is located inside the second opening, and the third opening is located over the source and the drain of the first transistor. A dielectric and a top electrode of the capacitive element are located inside the third opening. In a cross-sectional view in the channel width direction, the height of the first oxide semiconductor is longer than the width of the first oxide semiconductor, and the first and second oxide semiconductors are aligned on the same line. Either the source or the drain of the first transistor is electrically connected with the gate of the second transistor.
H10D 64/60 - Électrodes caractérisées par leurs matériaux
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
27.
DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING DISPLAY DEVICE
A highly reliable display device is provided. The display device includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, an insulating layer, a functional layer, and a light-emitting layer. The second conductive layer is provided over the first conductive layer and the third conductive layer is provided over the second conductive layer. A side surface of the second conductive layer is positioned on the inner side of side surfaces of the first and third conductive layers in a cross-sectional view. The insulating layer is provided to cover at least part of the side surface of the second conductive layer. The fourth conductive layer is provided to cover the first to third conductive layers and the insulating layer and to be electrically connected to the first to third conductive layers. The functional layer is provided to include a region in contact with the fourth conductive layer and the light-emitting layer is provided over the functional layer. The visible light reflectance of at least one of the first to third conductive layers is higher than the visible light reflectance of the fourth conductive layer.
ELECTRONIC DEVICE, METHOD FOR MANUFACTURING THE ELECTRONIC DEVICE, SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE, AND STORAGE DEVICE
An electronic device including a first conductor, a second conductor, a first insulator, a second insulator, and a connection electrode is provided. The first insulator is provided over the first conductor and has a first opening overlapping with the first conductor. The second conductor is provided over the first insulator and has a second opening overlapping with the first conductor. The second insulator is provided over the second conductor and has a third opening overlapping with the first conductor. The second opening has a portion having a width smaller than a width of the third opening. The connection electrode is positioned inside the first opening, the second opening, and the third opening and is in contact with the top surface of the first conductor. The connection electrode includes a region in contact with part of the top surface and part of the side surface of the second conductor.
The resolution of a display apparatus having a light detection function is increased. A display apparatus includes a plurality of transistors and a light-emitting and light-receiving device in a subpixel. The light-emitting and light-receiving device has a function of emitting light of a first color and a function of receiving light of a second color. One of a source and a drain of a first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a gate of a second transistor. One electrode of the light-emitting and light-receiving device is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of a third transistor, and one of a source and a drain of a fifth transistor. One of a source and a drain of a fourth transistor is electrically connected to a second wiring, and the other thereof is electrically connected to the other of the source and the drain of the third transistor.
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
H10K 77/10 - Substrats, p. ex. substrats flexibles
H10K 101/40 - Interrelation des paramètres entre plusieurs couches ou sous-couches actives constitutives, p. ex. valeurs HOMO dans des couches adjacentes
30.
MANUFACTURING APPARATUS FOR SOLID-STATE SECONDARY BATTERY AND METHOD FOR MANUFACTURING SOLID-STATE SECONDARY BATTERY
An object is to achieve a manufacturing apparatus that can fully automate the manufacturing of a solid-state secondary battery. A mask alignment chamber, a first transfer chamber connected to the mask alignment chamber, a second transfer chamber connected to the first transfer chamber, a first film formation chamber connected to the second transfer chamber, a third transfer chamber connected to the first transfer chamber, and a second film formation chamber connected to the third transfer chamber are included. The first film formation chamber has a function of forming a positive electrode active material layer or a negative electrode active material layer by a sputtering method, the second film formation chamber has a function of forming a solid electrolyte layer by co-evaporation of an organic complex of lithium and SiOx (0
H01M 10/0585 - Structure ou fabrication d'accumulateurs ayant uniquement des éléments de structure plats, c.-à-d. des électrodes positives plates, des électrodes négatives plates et des séparateurs plats
31.
SEMICONDUCTOR DEVICE, STORAGE DEVICE, AND ELECTRONIC DEVICE
A semiconductor device with high storage capacity is provided. The semiconductor device includes first to sixth insulators, first to third conductors, and first to third material layers. The first conductor overlaps with a first insulator and a first material layer. A first region of the first material layer overlaps with a second material layer, a second conductor, a second insulator, and a third insulator. The third material layer is positioned in a region including a second region of the first material layer and top surfaces of the second material layer, the second conductor, the second insulator, and the third insulator; a fourth insulator is positioned over the third material layer; the sixth insulator is positioned over the fourth insulator; and a fifth insulator is positioned over the sixth insulator. The third conductor is positioned over the fifth insulator overlapping with the second region of the first material layer. The first to third material layers include oxide containing indium, an element M (M is aluminum, gallium, tin, or titanium), and zinc.
H10B 43/27 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
H10B 41/10 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la configuration vue du dessus
H10B 41/27 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur la région de source et la région de drain étant à différents niveaux, p. ex. avec des canaux inclinés les canaux comprenant des parties verticales, p. ex. des canaux en forme de U
H10B 41/35 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région noyau de mémoire avec un transistor de sélection de cellules, p. ex. NON-ET
H10B 41/40 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par la région de circuit périphérique
H10B 43/10 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la configuration vue du dessus
H10B 43/35 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région noyau de mémoire avec transistors de sélection de cellules, p. ex. NON-ET
H10B 43/40 - Dispositifs EEPROM avec des isolants de grille à piégeage de charge caractérisés par la région de circuit périphérique
An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
G11C 11/405 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c.-à-d. cellules dynamiques avec régénération de la charge commune à plusieurs cellules de mémoire, c.-à-d. rafraîchissement externe avec trois portes à transfert de charges, p. ex. transistors MOS, par cellule
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/20 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 69/00 - Dispositifs de mémoire morte reprogrammable [EPROM] non couverts par les groupes , p. ex. dispositifs de mémoire morte reprogrammable aux ultraviolets [UVEPROM]
H10D 30/60 - Transistors à effet de champ à grille isolée [IGFET]
H10D 62/80 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux
H10D 62/83 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux étant des matériaux du groupe IV, p. ex. Si dopé B ou Ge non dopé
H10D 84/03 - Fabrication ou traitement caractérisés par l'utilisation de technologies basées sur les matériaux utilisant une technologie du groupe IV, p. ex. technologie au silicium ou au carbure de silicium [SiC]
H10D 84/90 - Circuits intégrés à tranches maîtresses
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
H10D 87/00 - Dispositifs intégrés comprenant à la fois des composants en vrac et des composants SOI ou SOS sur le même substrat
To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/532 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées caractérisées par les matériaux
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 99/00 - Matière non prévue dans les autres groupes de la présente sous-classe
It is an object to provide a semiconductor device which can supply a signal with sufficient amplitude to a scan line while power consumption is kept small. Further, it is an object to provide a semiconductor device which can suppress distortion of a signal supplied to the scan line and shorten a rising time and a falling time while power consumption is kept small. A semiconductor device which includes a plurality of pixels each including a display element and at least one first transistor and a scan line driver circuit supplying a signal for selecting the plurality of pixels to a scan line. A light-transmitting conductive layer is used for a pixel electrode layer of the display element, a gate electrode layer of the first transistor, source and drain electrode layers of the first transistor, and the scan line. The scan line driver circuit includes a second transistor and a capacitor for holding a voltage between a gate electrode layer of the second transistor and a source electrode layer of the second transistor. The source electrode of the second transistor is connected to the scan line.
G09G 3/36 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice en commandant la lumière provenant d'une source indépendante utilisant des cristaux liquides
G09G 3/3266 - Détails des circuits de commande pour les électrodes de balayage
G09G 3/34 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice en commandant la lumière provenant d'une source indépendante
G11C 19/18 - Mémoires numériques dans lesquelles l'information est déplacée par échelons, p. ex. registres à décalage utilisant des capacités comme éléments principaux des étages
H10D 1/68 - Condensateurs n’ayant pas de barrières de potentiel
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
35.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device that can be scaled down or highly integrated is provided. The semiconductor device includes a memory cell including first to third transistors and a capacitor. In each of the first to third transistors, the side surfaces of a metal oxide are covered with a source electrode and a drain electrode. The second and third transistors share the metal oxide. The capacitor is provided above the first to third transistors. A conductor including a region functioning as a write bit line is provided to include a region in contact with the top surface and the side surface of one of the source electrode and the drain electrode of the first transistor. A conductor including a region functioning as a read bit line is provided to include a region in contact with the top surface and the side surface of one of the source electrode and the drain electrode of the third transistor. The other of the source electrode and the drain electrode of the first transistor and a gate of the second transistor are electrically connected to one electrode of the capacitor.
An organic compound that can provide a light-emitting device having a high hole-transport property and high reliability. An organic compound represented by General Formula (G1) shown below is provided. In General Formula (G1), X represents a sulfur atom or an oxygen atom, each of R1 to R22 independently represents any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 12 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. At least one of R16 to R22 represents a naphthyl group, n represents an integer of 0 to 4, and Ar1 represents a fluorenyl group or a spirofluorenyl group.
An organic compound that can provide a light-emitting device having a high hole-transport property and high reliability. An organic compound represented by General Formula (G1) shown below is provided. In General Formula (G1), X represents a sulfur atom or an oxygen atom, each of R1 to R22 independently represents any one of hydrogen, halogen, a nitrile group, an alkenyl group, a vinyl group, an alkynyl group, a straight-chain alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkylsilyl group having 3 to 12 carbon atoms, an aryl group having 6 to 30 carbon atoms, and a heteroaryl group having 2 to 30 carbon atoms. At least one of R16 to R22 represents a naphthyl group, n represents an integer of 0 to 4, and Ar1 represents a fluorenyl group or a spirofluorenyl group.
C07C 211/61 - Composés contenant des groupes amino liés à un squelette carboné ayant des groupes amino liés à des atomes de carbone de cycles aromatiques à six chaînons du squelette carboné ayant des groupes amino liés à des atomes de carbone de cycles aromatiques à six chaînons faisant partie de systèmes cycliques condensés du squelette carboné avec au moins un des systèmes cycliques condensés formé par trois cycles ou plus
C07D 335/02 - Composés hétérocycliques contenant des cycles à six chaînons comportant un atome de soufre comme unique hétéro-atome du cycle non condensés avec d'autres cycles
H10K 50/11 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL]
H10K 59/35 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des sous-pixels rouge-vert-bleu [RVB]
A light-emitting device with favorable characteristics is provided. In a plurality of light-emitting devices each including an organic compound layer formed over the same insulating surface, the organic compound layer includes a first light-emitting layer, a second light-emitting layer, and an intermediate layer. The intermediate layer includes a first layer. The first layer includes a metal or metal compound, a first organic compound, and a second organic compound. The first organic compound includes a π-electron deficient heteroaromatic ring. The second organic compound includes two or more heteroaromatic rings that are bonded or condensed to each other and include three or more heteroatoms in total. The second organic compound interacts with the metal or metal compound by two or more of the three or more heteroatoms as a multidentate ligand.
H10K 85/60 - Composés organiques à faible poids moléculaire
H10K 101/40 - Interrelation des paramètres entre plusieurs couches ou sous-couches actives constitutives, p. ex. valeurs HOMO dans des couches adjacentes
38.
INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD
The present invention provides a novel information processing system that excels in convenience, usefulness, or reliability. The information processing system is formed from three components. The first component accepts configuration data and code written using a hardware description language. The second component embodies a semiconductor device on the basis of the code and configuration data, arranges and wires standard cells, and performs verification according to design rules, simulation of operating characteristics, and timing analysis. A design history document is also generated. The third component performs processing using a large language model to classify the design history document and propose approaches for correcting the code and the configuration data.
G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle
Provided is a light-emitting device with good reliability. Provided is a light-emitting device comprising a first electrode, a second electrode, and a light-emitting layer, wherein the light-emitting layer is positioned between the first electrode and the second electrode, the light-emitting layer has a light-emitting layer and an electron injection layer, the electron injection layer contains a metal oxide and a first organic compound, and the first organic compound is an organic compound having a phenanthroline ring with an electron-donating group.
Provided is a novel display apparatus with superior convenience, utility, or reliability. The present invention uses a display apparatus having a first light-emitting device, a second light-emitting device, a first conductive layer, a first layer, and a second layer. The first light-emitting device comprises a first electrode, a second electrode, and a first unit. The first unit is sandwiched between the first and second electrodes. The first unit includes a luminescent material. The second light-emitting device is adjacent to the first light-emitting device. The second light-emitting device comprises a third electrode, a fourth electrode, and a second unit. The third electrode is adjacent to the first electrode. The third electrode is disposed with a first gap between itself and the first electrode. The second unit is sandwiched between the third and fourth electrodes. The second unit includes a luminescent material. The first conductive layer includes the second electrode and the fourth electrode. The first conductive layer has an area overlapping the first gap. The first layer is sandwiched between the first conductive layer and the first gap. The first layer is in contact with a lateral surface of the first unit and a lateral surface of the second unit. The first layer has insulating properties. The second layer is sandwiched between the first conductive layer and the first layer. The second layer is thicker than the first conductive layer. The second layer has conductive properties.
H10K 59/35 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des sous-pixels rouge-vert-bleu [RVB]
G09F 9/30 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels
H10K 50/17 - Couches d'injection des porteurs de charge
H10K 50/824 - Cathodes combinées avec des électrodes auxiliaires
One aspect of the present invention provides a secondary battery that can be used over a wide temperature range and is not easily affected by ambient temperatures. Also provided is a highly safe secondary battery. The secondary battery comprises a positive electrode, a negative electrode, and an electrolyte layer between the positive and negative electrodes. The positive electrode has, on a positive electrode collector, a positive electrode active material, a first lithium-ion conductive polymer, a first lithium salt, and a conductive material. The electrolyte layer has a second lithium-ion conductive polymer and a second lithium salt. Since there is no or very little organic solvent, a secondary battery that is less prone to catch fire can be obtained, and safety is improved.
H01M 4/36 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs
H01M 4/62 - Emploi de substances spécifiées inactives comme ingrédients pour les masses actives, p. ex. liants, charges
H01M 4/131 - Électrodes à base d'oxydes ou d'hydroxydes mixtes, ou de mélanges d'oxydes ou d'hydroxydes, p. ex. LiCoOx
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
H01M 10/0565 - Matériaux polymères, p. ex. du type gel ou du type solide
42.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
The present invention provides a transistor that can be reduced in size. This semiconductor device includes a transistor and a first insulation layer. The transistor has a first electroconductive layer, a second electroconductive layer, a third electroconductive layer, a semiconductor layer, and a second insulation layer. The first insulation layer has a first opening that reaches the first electroconductive layer, an upper part of the first insulation layer being narrowed. The second electroconductive layer is disposed above the first insulation layer. The semiconductor layer has a first portion in contact with the upper surface of the first electroconductive layer, a second portion in contact with the upper surface of the second electroconductive layer, and a third portion in contact with the side surface of the first insulation layer inside the first opening. The second insulation layer covers the semiconductor layer inside the first opening. The third electroconductive layer covers the second insulation layer inside the first opening. The third portion overlaps the protruding upper part of the first insulation layer in the first opening. The first portion and the second portion include more impurity elements than the third portion.
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
H01L 21/316 - Couches inorganiques composées d'oxydes, ou d'oxydes vitreux, ou de verres à base d'oxyde
H01L 21/318 - Couches inorganiques composées de nitrures
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
H10K 71/16 - Dépôt d'une matière active organique en utilisant un dépôt physique en phase vapeur [PVD], p. ex. un dépôt sous vide ou une pulvérisation cathodique
43.
LIGHT-EMITTING DEVICE, DISPLAY DEVICE, AND ELECTRONIC APPARATUS
Provided is a light-emitting device having excellent characteristics. The light-emitting device is one of a plurality of light-emitting devices that are formed on the same insulation surface, and comprises a first electrode, a second electrode, and an organic compound layer. The first electrode is independent of an adjacent one of the light-emitting devices. The second electrode is shared with an adjacent one of the light-emitting devices. The organic compound layer is located between the first electrode and the second electrode. The organic compound layer has a light-emitting layer and an electron injection layer. The electron injection layer is located between the light-emitting layer and the second electrode. The light-emitting layer and the electron injection layer are independent of an adjacent one of the light-emitting devices. The outline of the light-emitting layer matches or almost matches the outline of the electron injection layer. The electron injection layer has a mixture layer containing a metal, a first organic compound, and a second organic compound. The first organic compound has a phenanthroline ring having an electron donating group. The second organic compound has a π electron deficient heteroaromatic ring.
A display device including a circuit suitable for controlling a liquid crystal element is provided. The display device includes two memories in one pixel and a plurality of pixels arranged in the horizontal and vertical directions share a gate line. The display device includes a liquid crystal element and by writing charges to different polarity capacitors, power consumption in an inversion operation can be reduced. Furthermore, a liquid crystal element with a high threshold voltage can be suitably used and a wide range of voltages can be applied without impairing grayscale display characteristics in the display device. Furthermore, a voltage higher than or equal to an output voltage of a source driver can be applied to the liquid crystal element.
G02F 1/1362 - Cellules à adressage par une matrice active
G02F 1/1334 - Dispositions relatives à la structure basées sur des cristaux liquides dispersés dans un polymère, p. ex. cristaux liquides micro-encapsulés
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
A furopyrazine derivative that is a novel organic compound is provided. The organic compound has a furopyrazine skeleton and is represented by General Formula (G1).
A furopyrazine derivative that is a novel organic compound is provided. The organic compound has a furopyrazine skeleton and is represented by General Formula (G1).
A furopyrazine derivative that is a novel organic compound is provided. The organic compound has a furopyrazine skeleton and is represented by General Formula (G1).
In General Formula (G1), Q represents oxygen or sulfur, Ar1 represents a substituted or unsubstituted condensed aromatic ring, R1 and R2 independently represent hydrogen or a group having 1 to 100 total carbon atoms, and at least one of R1 and R2 has a hole-transport skeleton.
C07D 491/048 - Systèmes condensés en ortho avec un seul atome d'oxygène comme hétéro-atome du cycle contenant de l'oxygène le cycle contenant de l'oxygène étant à cinq chaînons
H10K 50/11 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL]
H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants
H10K 50/125 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche
To provide a light-emitting element with an improved reliability, a light-emitting element with a high current efficiency (or a high quantum efficiency), and a novel dibenzo[f,h]quinoxaline derivative that is favorably used in a light-emitting element which is one embodiment of the present invention. A light-emitting element includes an EL layer between an anode and a cathode. The EL layer includes a light-emitting layer; the light-emitting layer contains a first organic compound having an electron-transport property and a hole-transport property, a second organic compound having a hole-transport property, and a light-emitting substance; the combination of the first organic compound and the second organic compound forms an exciplex; the HOMO level of the first organic compound is lower than the HOMO level of the second organic compound; and a difference between the HOMO level of the first organic compound and the HOMO level of the second organic compound is less than or equal to 0.4 eV.
H10K 85/60 - Composés organiques à faible poids moléculaire
C07D 403/14 - Composés hétérocycliques contenant plusieurs hétérocycles, comportant des atomes d'azote comme uniques hétéro-atomes du cycle, non prévus par le groupe contenant au moins trois hétérocycles
A light-emitting element which includes a plurality of light-emitting layers between a pair of electrodes and has low driving voltage and high emission efficiency is provided. A light-emitting element including first to third light-emitting layers between a cathode and an anode is provided. The first light-emitting layer includes a first phosphorescent material and a first electron-transport material; the second light-emitting layer includes a second phosphorescent material and a second electron-transport material; the third light-emitting layer includes a fluorescent material and a third electron-transport material; the first to third light-emitting elements are provided in contact with an electron-transport layer positioned on a cathode side; and a triplet excitation energy level of a material included in the electron-transport layer is lower than triplet excitation energy levels of the first electron-transport material and the second electron-transport material.
H10K 50/11 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL]
H10K 50/13 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche comprenant des couches EL empilées dans une unité EL
H10K 101/30 - Valeurs d'énergie de la plus haute orbitale moléculaire occupée [HOMO], de la plus basse orbitale moléculaire inoccupée [LUMO] ou de Fermi
An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Forster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Forster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with the longest-wavelength-side local maximum peak of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.
A semiconductor device that occupies a small area is provided. The semiconductor device includes a first transistor including a first oxide semiconductor; a second transistor including a second oxide semiconductor; a capacitor element; a first insulator; and a first conductor in contact with a source or a drain of the second transistor. The capacitor element includes a second conductor, a third conductor, and a second insulator. The first transistor, the second transistor, and the first conductor are placed to be embedded in the first insulator. The second conductor is placed in contact with a top surface of the first conductor and a top surface of a gate of the first transistor. The second insulator is placed over the second conductor and the first insulator. The third conductor is placed to cover the second conductor with the second insulator therebetween.
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
To provide a novel arylamine compound with a low refractive index. The provided arylamine compound includes at least one aromatic group. The aromatic group includes a first benzene ring, a second benzene ring, a third benzene ring, and at least three alkyl groups. The first benzene ring, the second benzene ring, and the third benzene ring are directly bonded in this order. The first benzene ring is bonded to nitrogen of amine. The first benzene ring may further include a substituted or unsubstituted phenyl group. The second benzene ring or the third benzene ring may further include an alkylated phenyl group. Each of first positions and third positions of two or more of the first to third benzene rings is independently bonded to another benzene ring, a benzene ring of the alkylated phenyl group, any of the at least three alkyl groups, or the nitrogen of the amine.
H10K 85/60 - Composés organiques à faible poids moléculaire
H10K 50/17 - Couches d'injection des porteurs de charge
H10K 50/858 - Dispositifs pour extraire la lumière des dispositifs comprenant des moyens de réfraction, p. ex. des lentilles
H10K 101/30 - Valeurs d'énergie de la plus haute orbitale moléculaire occupée [HOMO], de la plus basse orbitale moléculaire inoccupée [LUMO] ou de Fermi
51.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A transistor with stable electrical characteristics. A semiconductor device includes a first insulator over a substrate, a second insulator over the first insulator, an oxide semiconductor in contact with at least part of a top surface of the second insulator, a third insulator in contact with at least part of a top surface of the oxide semiconductor, a first conductor and a second conductor electrically connected to the oxide semiconductor, a fourth insulator over the third insulator, a third conductor which is over the fourth insulator and at least part of which is between the first conductor and the second conductor, and a fifth insulator over the third conductor. The first insulator contains a halogen element.
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 29/49 - Electrodes du type métal-isolant-semi-conducteur
It is an object to provide a memory device whose power consumption can be suppressed and a semiconductor device including the memory device. As a switching element for holding electric charge accumulated in a transistor which functions as a memory element, a transistor including an oxide semiconductor film as an active layer is provided for each memory cell in the memory device. The transistor which is used as a memory element has a first gate electrode, a second gate electrode, a semiconductor film located between the first gate electrode and the second gate electrode, a first insulating film located between the first gate electrode and the semiconductor film, a second insulating film located between the second gate electrode and the semiconductor film, and a source electrode and a drain electrode in contact with the semiconductor film.
H10D 86/80 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples composants passifs, p. ex. des résistances, des condensateurs ou des inducteurs
G11C 16/04 - Mémoires mortes programmables effaçables programmables électriquement utilisant des transistors à seuil variable, p. ex. FAMOS
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 69/00 - Dispositifs de mémoire morte reprogrammable [EPROM] non couverts par les groupes , p. ex. dispositifs de mémoire morte reprogrammable aux ultraviolets [UVEPROM]
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
53.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
An object is to provide a semiconductor device having a structure with which parasitic capacitance between wirings can be sufficiently reduced. An oxide insulating layer serving as a channel protective layer is formed over part of an oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the oxide insulating layer, an oxide insulating layer covering a peripheral portion of the oxide semiconductor layer is formed. The oxide insulating layer which covers the peripheral portion of the oxide semiconductor layer is provided to increase the distance between the gate electrode layer and a wiring layer formed above or in the periphery of the gate electrode layer, whereby parasitic capacitance is reduced.
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
G02F 1/1333 - Dispositions relatives à la structure
G02F 1/1337 - Orientation des molécules des cristaux liquides induite par les caractéristiques de surface, p. ex. par des couches d'alignement
H10D 62/80 - Corps semi-conducteurs, ou régions de ceux-ci, de dispositifs ayant des barrières de potentiel caractérisés par les matériaux
H10D 64/68 - Électrodes ayant un conducteur couplé capacitivement à un semi-conducteur par un isolant, p. ex. électrodes du type métal-isolant-semi-conducteur [MIS] caractérisées par l’isolant, p. ex. par l’isolant de grille
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
A semiconductor device that is less influenced by variations in characteristics between transistors or variations in a load, and is efficient even for normally-on transistors is provided. The semiconductor device includes at least a transistor, two wirings, three switches, and two capacitors. A first switch controls conduction between a first wiring and each of a first electrode of a first capacitor and a first electrode of a second capacitor. A second electrode of the first capacitor is connected to a gate of the transistor. A second switch controls conduction between the gate and a second wiring. A second electrode of the second capacitor is connected to one of a source and a drain of the transistor. A third switch controls conduction between the one of the source and the drain and each of the first electrode of the first capacitor and the first electrode of the second capacitor.
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
G09G 3/30 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents
G09G 3/32 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED]
G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent
G09G 3/3291 - Détails des circuits de commande pour les électrodes de données dans lequel le circuit de commande de données fournit une tension de données variable pour le réglage du courant à travers les éléments électroluminescents, ou de la tension aux bornes de ces éléments
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10F 39/00 - Dispositifs intégrés, ou ensembles de plusieurs dispositifs, comprenant au moins un élément couvert par le groupe , p. ex. détecteurs de rayonnement comportant une matrice de photodiodes
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
The present invention provides a storage apparatus which consumes little power. Memory cells of the storage apparatus are in a staggered arrangement and are provided in regions where orthogonal word lines and bit lines intersect. Adjacent word lines have different heights. Such a configuration makes it possible to reduce the number of memory cells per word line and makes it possible to reduce power consumption when reading data. Furthermore, it is possible to provide, in the same cell array, a pair of bit lines that connect to a sense amplifier, and therefore it is possible to reduce noise.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
56.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Provided are a transistor which has electrical characteristics requisite for its purpose and uses an oxide semiconductor layer and a semiconductor device including the transistor. In the bottom-gate transistor in which at least a gate electrode layer, a gate insulating film, and the semiconductor layer are stacked in this order, an oxide semiconductor stacked layer including at least two oxide semiconductor layers whose energy gaps are different from each other is used as the semiconductor layer. Oxygen and/or a dopant may be added to the oxide semiconductor stacked layer.
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
57.
THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE
In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
H10D 86/60 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT] les transistors TFT étant dans des matrices actives
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/477 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
H10D 99/00 - Matière non prévue dans les autres groupes de la présente sous-classe
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
H10K 59/123 - Connexion des électrodes de pixel aux transistors à couches minces [TFT]
A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.
H10K 59/35 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des sous-pixels rouge-vert-bleu [RVB]
H10K 50/11 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL]
H10K 50/12 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] comprenant des dopants
H10K 50/13 - OLED ou diodes électroluminescentes polymères [PLED] caractérisées par les couches électroluminescentes [EL] spécialement adaptées à l'émission de lumière multicolore, p. ex. à l'émission de lumière blanche comprenant des couches EL empilées dans une unité EL
H10K 101/30 - Valeurs d'énergie de la plus haute orbitale moléculaire occupée [HOMO], de la plus basse orbitale moléculaire inoccupée [LUMO] ou de Fermi
A gel electrolyte and a separator are provided between the positive electrode current collector and the negative electrode current collector. The plurality of positive electrode current collectors and the plurality of negative electrode current collectors are stacked such that surfaces of negative electrodes with which active material layers are not coated or surfaces of positive electrodes with which active material layers are not coated are in contact with each other.
H01M 10/0585 - Structure ou fabrication d'accumulateurs ayant uniquement des éléments de structure plats, c.-à-d. des électrodes positives plates, des électrodes négatives plates et des séparateurs plats
A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.
G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent
G09G 3/32 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED]
An image retrieval system that enables high-accuracy image retrieval in a short time is provided. The image retrieval system includes a processing portion provided with a neural network. The neural network includes a layer provided with a neuron. The processing portion has a function of comparing query image data with a plurality of pieces of database image data, and extracting the database image data including an area with a high degree of correspondence to the query image data as extracted image data. The processing portion has a function of extracting data of the area with a high degree of correspondence to the query image data from the extracted image data, as partial image data. The layer has a function of outputting an output value corresponding to the features of the image data input to the neural network. The processing portion has a function of comparing the above output values in the case where the respective pieces of partial image data are input with the above output value in the case where the query image data is input.
G06F 16/535 - Filtrage basé sur des données supplémentaires, p. ex. sur des profils d'utilisateurs ou de groupes
G06F 16/532 - Formulation de requêtes, p. ex. de requêtes graphiques
G06F 16/583 - Recherche caractérisée par l’utilisation de métadonnées, p. ex. de métadonnées ne provenant pas du contenu ou de métadonnées générées manuellement utilisant des métadonnées provenant automatiquement du contenu
G06V 10/25 - Détermination d’une région d’intérêt [ROI] ou d’un volume d’intérêt [VOI]
G06V 10/74 - Appariement de motifs d’image ou de vidéoMesures de proximité dans les espaces de caractéristiques
G06V 10/75 - Organisation de procédés de l’appariement, p. ex. comparaisons simultanées ou séquentielles des caractéristiques d’images ou de vidéosApproches-approximative-fine, p. ex. approches multi-échellesAppariement de motifs d’image ou de vidéoMesures de proximité dans les espaces de caractéristiques utilisant l’analyse de contexteSélection des dictionnaires
G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
A novel foldable display device or an electronic device using the same, e.g., a portable information processor or a portable communication information device, is provided. A foldable display device of which a display panel can be folded n times (n≥1, and n is a natural number) at a curvature radius of greater than or equal to 1 mm and less than or equal to 100 mm is obtained. The display device can be miniaturized by being foldable. In addition, in the state where the flexible display panel is opened, display which is unbroken and continuous over a plurality of housings is possible. The plurality of housings can store a circuit, an electronic component, a battery and the like inside as appropriate, and the thickness of each housing can be small.
The versatility of a power feeding device is improved. A power storage system includes a power storage device and a power feeding device. The power storage device includes data for identifying the power storage device. The power storage device includes a power storage unit, a switch that controls whether power from the power feeding device is supplied to the power storage unit, and a control circuit having a function of controlling a conduction state of the switch in accordance with a control signal input from the power feeding device. The power feeding device includes a signal generation circuit having a function of identifying the power storage device by the data input from the power storage device, generating the control signal corresponding to the identified power storage device, and outputting the generated control signal to the power storage device.
A semiconductor device that can be scaled down or highly integrated is to be provided. The semiconductor device includes a first conductor, a second conductor, a first insulator, a first transistor over the first insulator, and a second insulator over the first transistor. The first transistor includes a first metal oxide, a third conductor and a fourth conductor electrically connected to the first metal oxide, a third insulator over the first metal oxide, and a fifth conductor over the third insulator. The top surface of the fifth conductor includes a region in contact with the second insulator. The first conductor includes a portion positioned on an inner side of an opening of the first insulator, a region in contact with the side surface of the third conductor, and a portion positioned on an inner side of an opening of the second insulator. The second conductor includes a region in contact with the top surface of the fourth conductor, and a portion positioned on an inner side of an opening of the second insulator. The top surface of the first conductor is level or substantially level with the top surface of the second conductor.
The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 29/49 - Electrodes du type métal-isolant-semi-conducteur
H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée
H10K 10/46 - Transistors à effet de champ, p. ex. transistors organiques à couche mince [OTFT]
The present invention provides a semiconductor device that is easily miniaturized. Provided is a semiconductor device with reduced parasitic capacitance. This semiconductor device has a first insulating layer, a second insulating layer, a first conductive layer, a second conductive layer, a third conductive layer, a semiconductor layer, and a third insulating layer. The first conductive layer is located on top of the second insulating layer and has a first opening that reaches the second insulating layer. The first insulating layer is located on top of the first conductive layer and has a second opening that overlaps the first opening. The second conductive layer is located on top of the first insulating layer. The semiconductor layer has: a portion in contact with the second conductive layer; a portion located inside the second opening, along the lateral surface of the first insulating layer; a portion inside the first opening, in contact with the lateral surface of the first conductive layer; and a portion at the bottom of the first opening, in contact with the top surface of the second insulating layer. The third insulating layer covers the semiconductor layer inside the first opening and inside the second opening. The third conductive layer covers the third insulating layer inside the first opening and inside the second opening.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
Provided is a novel semiconductor device. This semiconductor device comprises a light-emitting element and a drive transistor having a gate and a back gate, and has: a first function for supplying a first potential to the back gate; a second function for supplying a video signal to the gate of the drive transistor and maintaining a second potential corresponding to the video signal at the back gate of the drive transistor; and a third function for, after execution of the second function, supplying a third potential to the gate of the drive transistor and supplying a current corresponding to the second potential to the light-emitting element.
G09G 3/3233 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active avec un circuit de pixel pour commander le courant à travers l'élément électroluminescent
G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice
68.
INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD
The present invention provides an information processing system that uses a language model to assist with correction of a document. The information processing system includes an accepting unit and a processing unit. The accepting unit functions to accept document data. The processing unit is configured to execute the following: processing to divide a document included in the document data into a plurality of first blocks; processing to create a prompt including a target sentence containing one of the plurality of first blocks and an instruction sentence containing an instruction for correcting the sentence; processing to acquire at least one second block by transmitting a prompt to a language model over a network, the second block being a proposed correction to the target sentence included in the prompt; processing to update the document data by replacing one of the plurality of first blocks with one of the at least one second block; processing to determine whether correction is necessary for one or both of the first block and the second block; and processing to evaluate the second block.
A semiconductor device including a miniaturized transistor is provided. The semiconductor device includes a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, and a second insulating layer. The first insulating layer is provided over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is provided over the first insulating layer and includes a second opening in a region overlapping with the first opening. The semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second conductive layer. The second insulating layer is provided over the semiconductor layer. The third conductive layer is provided over the second insulating layer. The first insulating layer has a stacked-layer structure of a third insulating layer and a fourth insulating layer over the third insulating layer. The fourth insulating layer includes a region having a higher film density than the third insulating layer.
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor and a second transistor over an insulating surface; the first transistor and the second transistor share a metal oxide and a first conductor over the metal oxide; the first transistor includes a second conductor and a first insulator over the metal oxide and a third conductor over the first insulator; the second transistor includes a fourth conductor and a second insulator over the metal oxide and a fifth conductor over the second insulator; the first insulator is positioned in a region between the first conductor and the second conductor; the metal oxide and the third conductor overlap with each other with the first insulator therebetween; the second insulator is positioned in a region between the first conductor and the fourth conductor; and the metal oxide and the fifth conductor overlap with each other with the second insulator therebetween.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
A semiconductor device with a high operation speed is provided. The semiconductor device includes a second oxide semiconductor; a second conductor; a third conductor; a first insulator over the second oxide semiconductor, the second conductor, and the third conductor; a second insulator and a fourth conductor in a first opening portion of the first insulator; and a third insulator and a fifth conductor in a second opening portion of the first insulator. The second oxide semiconductor is formed by removing a region covering the top surface of a columnar insulator from a first oxide semiconductor formed to cover the columnar insulator. The second conductor and the third conductor are formed by sequentially forming a first conductor and a first insulator over the second oxide semiconductor and removing a region overlapping with the second opening portion of the first insulator from the first conductor to expose the second oxide semiconductor. The first opening portion of the first insulator includes a region overlapping with the third conductor and the second oxide semiconductor.
A novel data processing system composed of three data processing devices is provided. A first data processing device receives an instruction sentence, generates a processing result, and transmits the result including an intermediate code. A second data processing device receives a document, the processing result, and model data, generates the instruction sentence, and transmits the instruction sentence. The instruction sentence includes instructions relating to analysis of the document, extraction of a processing step, and conversion into the intermediate code. The second data processing device extracts the intermediate code from the processing result and transmits the intermediate code. A third data processing device receives the intermediate code, simulates the processing step in accordance with the intermediate code, and generates and transmits the model data.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
G06F 9/30 - Dispositions pour exécuter des instructions machines, p. ex. décodage d'instructions
73.
LIGHT-EMITTING DEVICE, METHOD FOR MANUFACTURING THE SAME, AND CELLULAR PHONE
The invention relates to: a light-emitting device which includes a first flexible substrate having a first electrode, a light-emitting layer over the first electrode, and a second electrode with a projecting portion over the light-emitting layer and a second flexible substrate having a semiconductor circuit and a third electrode electrically connected to the semiconductor circuit, in which the projecting portion of the second electrode and the third electrode are electrically connected to each other; a method for manufacturing the light-emitting device; and a cellular phone which includes a housing incorporating the light-emitting device and having a longitudinal direction and a lateral direction, in which the light-emitting device is disposed on a front side and in an upper portion in the longitudinal direction of the housing.
H10K 59/127 - Affichages à OLED à matrice active [AMOLED] comprenant deux substrats, p. ex. un affichage comprenant une matrice OLED et un circuit de commande de TFT sur des substrats différents
H04M 1/02 - Caractéristiques de structure des appareils téléphoniques
The present invention provides a highly reliable semiconductor device. In the semiconductor device, a transistor is provided on a base insulator, and includes an oxide semiconductor that has a fin shape in a cross-sectional view in the channel width direction. An insulator is provided under the oxide semiconductor. The upper end part of the insulator and the lower end part of the oxide semiconductor coincide or substantially coincide with each other. In a cross-sectional view in the channel width direction of the transistor, a first angle formed by the side surface of the insulator and the upper surface of the base insulator is less than 90°. Meanwhile, a second angle formed by the side surface of the oxide semiconductor and the upper surface of the insulator is larger than the first angle, and is 90° or around 90°. A gate insulator is disposed so as to cover the insulator and the oxide semiconductor, and a gate electrode is disposed on the gate insulator. In a cross-sectional view in the channel width direction of the transistor, the bottom surface of the gate electrode is located below the bottom surface of the oxide semiconductor.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10D 1/68 - Condensateurs n’ayant pas de barrières de potentiel
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
75.
DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE
A display device capable of performing display at high luminance is provided. After a first layer including a first light-emitting material emitting blue light is formed into an island shape over a first pixel electrode, a second layer including a second light-emitting material emitting light with a longer wavelength than blue light is formed into an island shape over a second pixel electrode. Then, an insulating layer overlapping with a region interposed between the first pixel electrode and the second pixel electrode is formed, and a common electrode is formed to cover the first layer, the second layer, and the insulating layer. The insulating layer is formed by performing patterning treatment and etching treatment at least twice.
A novel display apparatus is provided. The display apparatus includes first to fifth p-channel transistors and an n-channel transistor. A gate of the fifth p-channel transistor and a gate of the n-channel transistor which operate at the same timing are connected to different nodes. A gate of the first p-channel transistor is directly connected to the gate of the n-channel transistor. The gate of the fifth p-channel transistor is electrically connected to the gate of the first p-channel transistor through a source and a drain of the third p-channel transistor.
G09G 3/3266 - Détails des circuits de commande pour les électrodes de balayage
G09G 3/3225 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
Provided is a manufacturing system for a light-emitting device, with which it is possible to continuously process steps from light-emitting device formation to sealing. In this manufacturing system having an in-line type cluster, a substrate surface is angled (greater than 90 degrees, 135 degrees) relative to the horizontal plane during processing in manufacturing apparatuses such as a vapor deposition apparatus and during movement between the manufacturing apparatuses. During resist coating and exposure processing, the substrate surface is roughly parallel to the horizontal plane.
H10K 71/12 - Dépôt d'une matière active organique en utilisant un dépôt liquide, p. ex. revêtement par centrifugation
H10K 71/13 - Dépôt d'une matière active organique en utilisant un dépôt liquide, p. ex. revêtement par centrifugation en utilisant des techniques d'impression, p. ex. l’impression par jet d'encre ou la sérigraphie
H10K 71/16 - Dépôt d'une matière active organique en utilisant un dépôt physique en phase vapeur [PVD], p. ex. un dépôt sous vide ou une pulvérisation cathodique
H10K 71/40 - Traitement thermique, p. ex. recuit en présence d'une vapeur de solvant
78.
ORGANIC COMPOUND, LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, AND ELECTRONIC APPLIANCE
An organic compound with an electron-transport property and low water solubility is provided. An organic compound represented by General Formula (G1-1) below is provided. At least any one of R2 to R9 is a group represented by General Formula (R-1) or (R-2); each of the other groups of R2 to R9 independently represents hydrogen, an alkyl group having 1 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted cyclic secondary amino group having 2 to 10 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms, or a substituted or unsubstituted heteroaryl group having 1 to 30 carbon atoms; α1 represents a substituted or unsubstituted arylene group having 6 to 30 carbon atoms; n represents 1 or 2; R11 to R26 each independently represent hydrogen (including deuterium) or an alkyl group having 1 to 10 carbon atoms; and p and q each independently represent 0 or 1.
An organic compound with an electron-transport property and low water solubility is provided. An organic compound represented by General Formula (G1-1) below is provided. At least any one of R2 to R9 is a group represented by General Formula (R-1) or (R-2); each of the other groups of R2 to R9 independently represents hydrogen, an alkyl group having 1 to 10 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 10 carbon atoms, a substituted or unsubstituted cyclic secondary amino group having 2 to 10 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms, or a substituted or unsubstituted heteroaryl group having 1 to 30 carbon atoms; α1 represents a substituted or unsubstituted arylene group having 6 to 30 carbon atoms; n represents 1 or 2; R11 to R26 each independently represent hydrogen (including deuterium) or an alkyl group having 1 to 10 carbon atoms; and p and q each independently represent 0 or 1.
A display device includes a display panel mounted on a curved surface, and driver circuits including circuit elements which are mounted on a plurality of plane surfaces provided on the back of the curved surface in a stepwise shape along the curved surface.
A positive electrode active material for a lithium ion secondary battery which has a large capacity and a good charge-and-discharge cycle performance is provided. The positive electrode active material includes lithium, cobalt, oxygen, and magnesium, and has a compound represented by a layered rock-salt crystal structure. A space group of the compound is represented by R-3m. The compound is a composite oxide in which magnesium is substituted for a lithium position and a cobalt position. The compound is a particle. The magnesium substituted for a lithium position and a cobalt position exists more in the region from the surface to 5 nm than in the region deeper than 10 nm from the surface. More magnesium is substituted for a lithium position than for a cobalt position.
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
B60L 58/12 - Procédés ou agencements de circuits pour surveiller ou commander des batteries ou des piles à combustible, spécialement adaptés pour des véhicules électriques pour la surveillance et la commande des batteries en fonction de l'état de charge [SoC]
H01M 4/38 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'éléments simples ou d'alliages
H01M 4/58 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs de composés inorganiques autres que les oxydes ou les hydroxydes, p. ex. sulfures, séléniures, tellurures, halogénures ou LiCoFyEmploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs de structures polyanioniques, p. ex. phosphates, silicates ou borates
H01M 10/0525 - Batteries du type "rocking chair" ou "fauteuil à bascule", p. ex. batteries à insertion ou intercalation de lithium dans les deux électrodesBatteries à l'ion lithium
H01M 10/42 - Procédés ou dispositions pour assurer le fonctionnement ou l'entretien des éléments secondaires ou des demi-éléments secondaires
H05K 5/00 - Enveloppes, coffrets ou tiroirs pour appareils électriques
81.
Display Device And Method For Manufacturing Display Device
The thickness of a display device including a touch sensor is reduced. Alternatively, the thickness of a display device having high display quality is reduced. Alternatively, a method for manufacturing a display device with high mass productivity is provided. Alternatively, a display device having high reliability is provided. Stacked substrates in each of which a sufficiently thin substrate and a relatively thick support substrate are stacked are used as substrates. One surface of the thin substrate of one of the stacked substrates is provided with a layer including a touch sensor, and one surface of the thin substrate of the other stacked substrate is provided with a layer including a display element. After the two stacked substrates are attached to each other so that the touch sensor and the display element face each other, the support substrate and the thin substrate of each stacked substrate are separated from each other.
G02F 1/1333 - Dispositions relatives à la structure
G02F 1/136 - Cellules à cristaux liquides associées structurellement avec une couche ou un substrat semi-conducteurs, p. ex. cellules faisant partie d'un circuit intégré
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
G06F 3/041 - Numériseurs, p. ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
G06F 3/044 - Numériseurs, p. ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction par des moyens capacitifs
H01L 21/683 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension
H01L 21/82 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 27/15 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des composants semi-conducteurs avec au moins une barrière de potentiel ou une barrière de surface, spécialement adaptés pour l'émission de lumière
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
H10K 59/60 - OLED intégrées avec des éléments inorganiques sensibles à la lumière, p. ex. avec des cellules solaires inorganiques ou des photodiodes inorganiques
A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with high reliability is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, and a conductive layer. The semiconductor layer, the second insulating layer, and the conductive layer are stacked in this order over the first insulating layer. The semiconductor layer contains indium and oxygen and has a composition falling within a range obtained by connecting first coordinates (1:0:0), second coordinates (2:1:0), third coordinates (14:7:1), fourth coordinates (7:2:2), fifth coordinates (14:4:21), sixth coordinates (2:0:3), and the first coordinates in this order with a straight line in a ternary diagram showing atomic ratios of indium to an element M and zinc. In addition, the element M is one or more of gallium, aluminum, yttrium, and tin.
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
H01L 29/49 - Electrodes du type métal-isolant-semi-conducteur
H10K 59/121 - Affichages à OLED à matrice active [AMOLED] caractérisés par la géométrie ou la disposition des éléments de pixel
Provided is a novel semiconductor device. The semiconductor device has: a first conductive layer that functions as the drain of a first transistor; a second conductive layer, above the first conductive layer, that functions as the source of the first transistor; a first semiconductor layer including a channel formation region of the first transistor; a third conductive layer having a shape that conforms to a lateral surface of the first semiconductor layer and including a region that functions as the gate of the first transistor, a region that functions as the drain of a second transistor above the first transistor, and a region in contact with the second conductive layer; a fourth conductive layer, above the third conductive layer, that functions as the source of the second transistor; a second semiconductor layer including a channel formation region of the second transistor; and a fifth conductive layer having a shape that conforms to a lateral surface of the second semiconductor layer and including a region that functions as the gate of the second transistor and a region in contact with the fourth conductive layer, wherein the first and fifth conductive layer function as power lines, and the third conductive layer functions as a signal line.
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10D 89/60 - Dispositifs intégrés comprenant des dispositions pour la protection électrique ou thermique, p. ex. circuits de protection contre les décharges électrostatiques [ESD].
Provided is a highly reliable semiconductor device. The semiconductor device includes an oxide semiconductor layer, first to third electroconductive layers, and first to third insulating layers. The first insulating layer is positioned on the first electroconductive layer. The second electroconductive layer is positioned on the first insulating layer. The first electroconductive layer has a first recess. The first insulating layer and the second electroconductive layer have a first opening at a position overlapping the first recess. The second insulating layer is in contact, in the first opening, with at least the side surface of the first insulating layer. The oxide semiconductor layer is in contact with the upper surface of the second electroconductive layer and the bottom surface and the side surface of the first recess, and is in contact, in the first opening, with the second insulating layer. The third insulating layer is located, in the first opening, on the inner side of the oxide semiconductor layer. The third conductive layer is located, in the first opening, on the inner side of the third insulating layer. The first insulating layer has a barrier property against hydrogen. The second insulating layer has a function of capturing or fixing hydrogen.
G02F 1/1368 - Cellules à adressage par une matrice active dans lesquelles l'élément de commutation est un dispositif à trois électrodes
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
H10B 53/20 - Dispositifs RAM ferro-électrique [FeRAM] comprenant des condensateurs ferro-électriques de mémoire caractérisés par les agencements tridimensionnels, p. ex. avec des cellules à des niveaux différents de hauteur
H10B 53/30 - Dispositifs RAM ferro-électrique [FeRAM] comprenant des condensateurs ferro-électriques de mémoire caractérisés par la région noyau de mémoire
H10D 1/68 - Condensateurs n’ayant pas de barrières de potentiel
H10D 64/23 - Électrodes transportant le courant à redresser, à amplifier, à faire osciller ou à commuter, p. ex. sources, drains, anodes ou cathodes
H10D 64/60 - Électrodes caractérisées par leurs matériaux
H10D 84/80 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10D 84/85 - Transistors IGFET complémentaires, p. ex. CMOS
H10D 86/40 - Dispositifs intégrés formés dans ou sur des substrats isolants ou conducteurs, p. ex. formés dans des substrats de silicium sur isolant [SOI] ou sur des substrats en acier inoxydable ou en verre caractérisés par de multiples transistors en couches minces [TFT]
Provided is a semiconductor device having a small footprint. This semiconductor device has a first transistor, a second transistor, and a first insulating layer. The first transistor has a first electroconductive layer, a first metal oxide layer, a gate insulating layer, and a first gate electrode. The second transistor has a second electroconductive layer, a third electroconductive layer, a second metal oxide layer, a gate insulating layer, and a second gate electrode. The first insulating layer is positioned on the first electroconductive layer and the second electroconductive layer and has a first opening reaching the first electroconductive layer. The first insulating layer and the third electroconductive layer have a second opening reaching the second electroconductive layer. The first metal oxide layer has a first region in contact with the upper surface of the first electroconductive layer, a second region in contact with the side surface of the first insulating layer, and a third region in contact with the upper surface of the first insulating layer. The third region is in contact with the second region. The second metal oxide layer is in contact with the upper surface of the second electroconductive layer, the side surface of the first insulating layer, and the side surface of the third electroconductive layer.
G09F 9/30 - Dispositifs d'affichage d'information variable, dans lesquels l'information est formée sur un support, par sélection ou combinaison d'éléments individuels dans lesquels le ou les caractères désirés sont formés par une combinaison d'éléments individuels
H10D 84/83 - Dispositifs intégrés formés dans ou sur des substrats semi-conducteurs qui comprennent uniquement des couches semi-conductrices, p. ex. sur des plaquettes de Si ou sur des plaquettes de GaAs-sur-Si caractérisés par l'intégration d'au moins un composant couvert par les groupes ou , p. ex. l'intégration de transistors IGFET de composants à effet de champ uniquement de transistors FET à grille isolée [IGFET] uniquement
H10K 59/12 - Affichages à OLED à matrice active [AMOLED]
A display device in which film separation is sufficiently inhibited is provided. The display device includes a first insulating layer and a second insulating layer, a first light-emitting device positioned over the first insulating layer, a second light-emitting device positioned over the second insulating layer, and a third insulating layer including a region covering part of a side surface of the first light-emitting device, a region covering part of the bottom surface of the first insulating layer, a region covering part of the bottom surface of the second insulating layer, and a region covering part of a side surface of the second light-emitting device. The first light-emitting device has a tandem structure and the second light-emitting device has a single structure.
To provide a battery having excellent charge-discharge characteristics even in a low-temperature environment. The battery includes a positive electrode, a negative electrode, an electrolyte solution, and a separator. The electrolyte solution and the separator are included between the positive electrode and the negative electrode; the negative electrode includes a carbon material; and the electrolyte solution includes a lithium salt, a potassium salt, a fluorinated cyclic carbonate, a fluorinated linear carbonate, and at least one kind of anion. The carbon material includes graphite; the lithium salt includes LiPF6; the potassium salt includes KFSI; the fluorinated cyclic carbonate includes fluoroethylene carbonate; and the fluorinated linear carbonate includes methyl trifluoropropionate.
H01M 4/587 - Matériau carboné, p. ex. composés au graphite d'intercalation ou CFx pour insérer ou intercaler des métaux légers
H01M 4/02 - Électrodes composées d'un ou comprenant un matériau actif
H01M 4/525 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'oxydes ou d'hydroxydes inorganiques de nickel, de cobalt ou de fer d'oxydes ou d'hydroxydes mixtes contenant du fer, du cobalt ou du nickel pour insérer ou intercaler des métaux légers, p. ex. LiNiO2, LiCoO2 ou LiCoOxFy
H01M 10/0525 - Batteries du type "rocking chair" ou "fauteuil à bascule", p. ex. batteries à insertion ou intercalation de lithium dans les deux électrodesBatteries à l'ion lithium
H01M 10/0567 - Matériaux liquides caracterisés par les additifs
H01M 10/0568 - Matériaux liquides caracterisés par les solutés
H01M 10/0569 - Matériaux liquides caracterisés par les solvants
An object is to provide a display device having a function of emitting visible light and infrared light and an imaging function. Another object is to increase the definition without changing the density of imaging elements while the high resolution of an image displayed on a display device is kept. The display device has a layout in which a light-receiving region of an imaging element is provided between light-emitting regions of a plurality of light-emitting elements over one substrate. In the imaging function of the display device, as a means for increasing the definition of a captured image, the definition is increased without changing the density of imaging elements by capturing an image by time division.
A novel display panel that is highly convenient or reliable is provided. The display panel includes a display region, a first functional layer, and a second functional layer. The display region includes a pixel, and the pixel includes a display element and a pixel circuit. The first functional layer includes the pixel circuit, a scan line, and a first connection portion. The display element is electrically connected to the pixel circuit, and the pixel circuit is electrically connected to the scan line. The second functional layer includes a region overlapping with the first functional layer, the second functional layer includes a driver circuit and a wiring, and the driver circuit is provided so that the pixel circuit is positioned between the driver circuit and the display element. The wiring is electrically connected to the scan line at the first connection portion, and the wiring is electrically connected to the driver circuit.
G09G 3/3225 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice utilisant des sources lumineuses commandées utilisant des panneaux électroluminescents semi-conducteurs, p. ex. utilisant des diodes électroluminescentes [LED] organiques, p. ex. utilisant des diodes électroluminescentes organiques [OLED] utilisant une matrice active
G06F 3/01 - Dispositions d'entrée ou dispositions d'entrée et de sortie combinées pour l'interaction entre l'utilisateur et le calculateur
G06F 3/02 - Dispositions d'entrée utilisant des interrupteurs actionnés manuellement, p. ex. des claviers ou des cadrans
G06F 3/0354 - Dispositifs de pointage déplacés ou positionnés par l'utilisateurLeurs accessoires avec détection des mouvements relatifs en deux dimensions [2D] entre le dispositif de pointage ou une partie agissante dudit dispositif, et un plan ou une surface, p. ex. souris 2D, boules traçantes, crayons ou palets
G06F 3/041 - Numériseurs, p. ex. pour des écrans ou des pavés tactiles, caractérisés par les moyens de transduction
G09G 3/20 - Dispositions ou circuits de commande présentant un intérêt uniquement pour l'affichage utilisant des moyens de visualisation autres que les tubes à rayons cathodiques pour la présentation d'un ensemble de plusieurs caractères, p. ex. d'une page, en composant l'ensemble par combinaison d'éléments individuels disposés en matrice
H10K 50/86 - Dispositions pour améliorer le contraste, p. ex. en empêchant la réflexion de la lumière ambiante
H10K 59/131 - Interconnexions, p. ex. lignes de câblage ou bornes
H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
A semiconductor device that enables lower power consumption and data storage imitating a human brain is provided. The semiconductor device includes a control unit, a memory unit, and a sensor unit. The memory unit includes a memory circuit and a switching circuit. The memory circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including a channel formation region with an oxide semiconductor, and a back gate electrode. The control unit has a function of switching a signal supplied to the back gate electrode, in accordance with a signal obtained at the sensor unit.
G11C 11/405 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c.-à-d. cellules dynamiques avec régénération de la charge commune à plusieurs cellules de mémoire, c.-à-d. rafraîchissement externe avec trois portes à transfert de charges, p. ex. transistors MOS, par cellule
G06N 3/04 - Architecture, p. ex. topologie d'interconnexion
G06N 3/063 - Réalisation physique, c.-à-d. mise en œuvre matérielle de réseaux neuronaux, de neurones ou de parties de neurone utilisant des moyens électroniques
A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/04 - Corps semi-conducteurs caractérisés par leur structure cristalline, p.ex. polycristalline, cubique ou à orientation particulière des plans cristallins
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/66 - Types de dispositifs semi-conducteurs
H10B 41/70 - Dispositifs de mémoire morte reprogrammable électriquement [EEPROM] comprenant des grilles flottantes la grille flottante étant une électrode partagée par plusieurs éléments
A novel functional panel, a novel device, or a novel data processor is provided. A structure in which a first plane, a second plane that is opposite the first plane, and a neutral plane between the first plane and the second plane are provided and a portion of a functional layer having a thickness greater than or equal to half of the thickness of the functional layer is in a region between the first plane and the neutral plane was conceived.
A display device with high display quality is provided. The display device includes a first light-emitting device, a second light-emitting device placed adjacent to the first light-emitting device, and a first insulating layer. The first light-emitting device includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer. The second light-emitting device includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer. Part of a side surface of the first EL layer and part of a side surface of the second EL layer are placed to face each other. Part of the first insulating layer is placed at a position interposed between a side end portion of the first EL layer and a side end portion of the second EL layer. The first insulating layer is in contact with part of the top surface of the first EL layer and part of the top surface of the second EL layer.
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator, a second insulator over the first insulator, and a memory cell including a transistor and a capacitor. The transistor includes an oxide over the first insulator, a first conductor and a second conductor over the oxide, a third insulator over the oxide, and a third conductor over the third insulator. The third insulator and the third conductor are located in a first opening of the second insulator. The capacitor includes a fourth conductor in contact with a top surface of the second conductor, a fourth insulator over the fourth conductor, and a fifth conductor over the fourth insulator. The fourth conductor, the fourth insulator, and the fifth conductor are located in a second opening of the second insulator. A third opening is formed in the first insulator, the second insulator, and the first conductor. A sixth conductor is located in the third opening. The sixth conductor includes a region in contact with part of a top surface of the first conductor and part of a side surface of the first conductor in each of a plurality of layers.
H10B 12/00 - Mémoires dynamiques à accès aléatoire [DRAM]
G11C 11/405 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments électriques utilisant des dispositifs à semi-conducteurs utilisant des transistors formant des cellules nécessitant un rafraîchissement ou une régénération de la charge, c.-à-d. cellules dynamiques avec régénération de la charge commune à plusieurs cellules de mémoire, c.-à-d. rafraîchissement externe avec trois portes à transfert de charges, p. ex. transistors MOS, par cellule
One aspect of the present invention provides: a lithium ion secondary battery which is lightweight and has a high capacity per weight; and a method for manufacturing the same. Instead of a metal, a resin material is used for an exterior body of a secondary battery. Sulfur or a sulfur compound is used as a positive electrode active material of the secondary battery. In addition, a solid electrolyte is used instead of an electrolyte in which lithium polysulfide dissolves. By employing the solid electrolyte, safety is enhanced due to the non-flammable nature thereof.
H01M 10/0585 - Structure ou fabrication d'accumulateurs ayant uniquement des éléments de structure plats, c.-à-d. des électrodes positives plates, des électrodes négatives plates et des séparateurs plats
H01M 4/13 - Électrodes pour accumulateurs à électrolyte non aqueux, p. ex. pour accumulateurs au lithiumLeurs procédés de fabrication
H01M 4/38 - Emploi de substances spécifiées comme matériaux actifs, masses actives, liquides actifs d'éléments simples ou d'alliages
A high-resolution display device is provided. The display device includes a first light-emitting device, a second light-emitting device, a first insulating layer, a second insulating layer, a first coloring layer, and a second coloring layer. The first light-emitting device includes a first pixel electrode, a first layer, and a common electrode in this order over the first insulating layer. The second light-emitting device includes a second pixel electrode, a second layer, and the common electrode in this order over the first insulating layer. The first insulating layer includes a groove including a region overlapping with the first pixel electrode and a region overlapping with the second pixel electrode. The second insulating layer overlaps with a side surface of the first layer, a side surface of the second layer, and the groove. The common electrode includes a portion positioned over the second insulating layer. The first coloring layer overlaps with the first light-emitting device. The second coloring layer overlaps with the second light-emitting device. The second coloring layer and the first coloring layer transmit light of different colors. The first layer and the second layer contain the same light-emitting material and are apart from each other.
H10K 59/122 - Structures ou couches définissant le pixel, p. ex. bords
H10K 59/38 - Dispositifs spécialement adaptés à l'émission de lumière multicolore comprenant des filtres de couleur ou des supports changeant de couleur [CCM]
A display apparatus with high definition is provided. The display apparatus includes a transistor, a light-emitting device and a first insulating layer. The transistor includes a semiconductor layer, first to third conductive layers, and second and third insulating layers. The second insulating layer is provided over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is provided over the second insulating layer and includes a second opening in a region overlapping with the first opening. The semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the second insulating layer, and the top surface and the side surface of the second conductive layer. The third insulating layer is provided over the semiconductor layer. The third conductive layer is provided over the third insulating layer. The first insulating layer is provided over the transistor. The first insulating layer and the third insulating layer include a third opening reaching the second conductive layer. The light-emitting device is provided over the first insulating layer and includes a pixel electrode, a common electrode, and an EL layer. The pixel electrode is electrically connected to the second conductive layer through the third opening. The EL layer includes a region in contact with the top surface and the side surface of the pixel electrode.
A semiconductor device includes first to third insulating layers and a transistor including a semiconductor layer, first to fourth conductive layers, and fourth to sixth insulating layers. The first conductive layer, the first insulating layer, the third conductive layer, the fifth insulating layer, the second insulating layer, the third insulating layer, and the second conductive layer overlap in this order. The first to third insulating layers and the second and third conductive layers include an opening reaching the first conductive layer. In the opening, the first insulating layer includes a protruding portion, and the fourth insulating layer is in contact with the top surface of the first insulating layer and side surfaces of the fifth insulating layer and the second insulating layer. The fifth insulating layer, an oxide of the third conductive layer, is in contact with top and side surfaces of the third conductive layer. The semiconductor layer is in contact with the top surfaces of the first and second conductive layers and a side surface of the fourth insulating layer. The sixth insulating layer is in contact with the top surface of the semiconductor layer. The fourth conductive layer is over and in contact with the sixth insulating layer to overlap with the opening.
A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.
H01L 27/12 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 29/10 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode ne transportant pas le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
H01L 29/24 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des matériaux semi-conducteurs inorganiques non couverts par les groupes , , ou
H01L 29/66 - Types de dispositifs semi-conducteurs
