This information processing system (1) is used in an image sensor having a first pixel and a second pixel, and comprises a first acquisition unit (11), a second acquisition unit (12), and a third acquisition unit (13). The first pixel is sensitive to visible light. The second pixel is sensitive to infrared light. The first acquisition unit (11) acquires first luminance information (D1) from the first pixel. The first luminance information (D1) is information pertaining to a pixel value of the first pixel. The second acquisition unit (12) acquires second luminance information (D2) from the second pixel. The second luminance information (D2) is information pertaining to a pixel value of the second pixel. The third acquisition unit (13) acquires distance information (D3) from the second pixel. The distance information (D3) is information pertaining to the distance from the image sensor to an object that has reflected infrared light.
G01S 17/89 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour la cartographie ou l'imagerie
G01S 17/32 - Systèmes déterminant les données relatives à la position d'une cible pour mesurer la distance uniquement utilisant la transmission d'ondes continues, soit modulées en amplitude, en fréquence ou en phase, soit non modulées
2.
SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, AND IMAGING METHOD
A solid-state imaging device (100) has pixel cells (101) arranged in a matrix, wherein each of the pixel cells (101) is provided with: a first photodiode (120) that stores a signal charge generated through photoelectric conversion; a second photodiode (126) that serves as a first holding unit for holding a signal charge leaked from the first photodiode (120); a second holding unit (127); and a first transfer transistor (130) that transfers the signal charge held by the second photodiode (126) to the second holding unit (127).
H04N 5/3745 - Capteurs adressés, p.ex. capteurs MOS ou CMOS ayant des composants supplémentaires incorporés au sein d'un pixel ou connectés à un groupe de pixels au sein d'une matrice de capteurs, p.ex. mémoires, convertisseurs A/N, amplificateurs de pixels, circuits communs ou composants communs
3.
SEMICONDUCTOR LASER DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR LASER DEVICE
A semiconductor laser device (1) comprises: a semiconductor laser element (30) including a substrate (31), a plurality of semiconductor layers, and a first metal layer (40); a heat-dissipating member (10) having a bonding surface (10b) to which the semiconductor laser element (30) is bonded; and a second metal layer (20) bonding the first metal layer (40) and the bonding surface (10b) together. The semiconductor laser element (30) has an output surface (1f) for outputting laser light. The first metal layer (40) includes a bonding region (40b) bonded to the second metal layer (20), and an exposed region (40a) which is disposed between the bonding region (40b) and the output surface (1f) and in which the first metal layer (40) is exposed from the second metal layer (20). A surface of the second metal layer (20) opposing the exposed region (40a) includes an inclined surface (20s) inclined with respect to the output surface (1f).
Provided is a method for driving a gas sensor (100) that includes a first electrode (103) having a first main surface, a second electrode (106) having a second main surface, a metal oxide layer (104) disposed so as to be sandwiched between the first main surface and the second main surface which are disposed opposing each other, and an insulating film (102) covering the first electrode (103), the metal oxide layer (104), and the second electrode (106) and exposing at least the second main surface of the second electrode (106) and a portion of a third main surface of the second electrode (106) on the opposite side from the second main surface, and that senses hydrogen according to a change in the resistance value of the metal oxide layer (104) when the portion of the third main surface contacts gas containing gaseous molecules having hydrogen atoms while a voltage is applied between the first electrode (103) and the second electrode (106). The method for driving this gas sensor (100) involves repeatedly applying a positive voltage and a negative voltage between the first electrode (103) and the second electrode (106) (S301, S302).
G01N 27/12 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un corps solide dépendant de la réaction avec un fluide
5.
IMAGE CAPTURING DEVICE AND VARIATION INFORMATION CALCULATION METHOD
An image capturing device (1) comprises a light emitting unit (4) which irradiates a subject with light, and a solid state image capturing device which has a plurality of pixel units (100) that convert received light into signal charges, and a signal processing unit (20) which calculates distance information indicating distance to the subject. The signal processing unit (20) calculates distance information for each of the plurality of pixel units (100) by using a time of flight (TOF) method which is carried out by using a plurality of signal charges converted by the plurality of pixel units (100), and calculates variation information indicating a variation amount related to distance indicated by the distance information for one or more of the pixel units (100) in at least a portion of the plurality of pixel units (100), when at least a portion of the plurality of pixel units (100) has received light reflected by the subject of light irradiated by the light emitting unit (4).
A resistance element (100) is provided with: a substrate (101); a first nitride semiconductor layer (102); a second nitride semiconductor layer (103); a two-dimensional electron gas layer (107) provided on the first nitride semiconductor layer (102) side of an interface between the first nitride semiconductor layer (102) and the second nitride semiconductor layer (103); a first electrode (113) ohmic-contacted to the two-dimensional electron gas layer (107); a second electrode (114) ohmic-contacted to the two-dimensional electron gas layer (107); and an insulating layer provided between the first electrode (113) and the second electrode (114) in plan view. The two-dimensional electron gas layer (107) functions as an electrical resistance element, and no conductive layers are disposed above the insulating layer between the first electrode (113) and the second electrode (114) in plan view, whereby a resistance-value stabilizing structure that functions so that the resistance value of the electrical resistance element becomes constant is provided.
H01L 27/04 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur
H01L 21/338 - Transistors à effet de champ à grille Schottky
H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
H01L 29/812 - Transistors à effet de champ l'effet de champ étant produit par une jonction PN ou une autre jonction redresseuse à grille Schottky
7.
MONOLITHIC SEMICONDUCTOR DEVICE AND HYBRID SEMICONDUCTOR DEVICE
This monolithic semiconductor device has: a substrate (11); a first nitride semiconductor layer (102) formed on the substrate (11); a second nitride semiconductor layer (103) formed on the first nitride semiconductor layer (102) and having a bandgap larger than that of the first nitride semiconductor layer (102); an HEMT-type first transistor (12) for power amplification which is formed on the substrate (11) and includes the first nitride semiconductor layer (102) and the second nitride semiconductor layer (103); and a first bias circuit (20) which includes an HEMT-type second transistor (21) formed on the substrate (11) and disposed outside a propagation path of a high frequency signal input to the first transistor (12), and which applies a bias voltage to a gate of the first transistor (12).
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
This high frequency amplifier (30) comprises: a carrier amplifier (11) for amplifying a first signal; a peak amplifier (12) for amplifying a second signal; a first matching circuit (33) connected to the output terminal of the carrier amplifier (11); a second matching circuit (36) connected to the output terminal of the peak amplifier (12); and a first transmission line (40) connected between the first matching circuit (33) and the second matching circuit (36) and having an electrical length of less than 1/4 wavelength of the center frequency of a predetermined frequency band, wherein the phase rotation by the parallel inductors (35), (38), which are grounded at one end and constitute the first matching circuit (33) and the second matching circuit (36), is opposite to the phase rotation by the first transmission line (40).
H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p.ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
This power amplifier (100 has: a first semiconductor chip (103) that has a first main surface (301) and a second main surface (302); a first field effect transistor; a first drain finger part (21), a plurality of first gate finger parts (11), and a source finger part (31); a sub-mount substrate (101) having a third main surface (303) and a fourth main surface (304); and a first filled via (108) provided so as to penetrate from the third main surface (303) to the fourth main surface (304). In plan view, the first filled via (108) is rectangular. The long-side direction of the first filled via (108) is provided so as to be parallel to the long-side direction of the plurality of first gate finger parts (11). In plan view, the first filled via (108) is provided at a position overlapping some of one first gate finger part (11) from among the plurality of first gate finger parts (11).
H01L 23/36 - Emploi de matériaux spécifiés ou mise en forme, en vue de faciliter le refroidissement ou le chauffage, p.ex. dissipateurs de chaleur
H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
H03F 3/213 - Amplificateurs de puissance, p.ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
11.
GAS SENSOR, PRODUCTION METHOD THEREFOR, AND FUEL CELL VEHICLE
A gas sensor (100) comprises: a gas detection element comprising a first electrode (105), a metal oxide layer (106), and a second electrode (108); and a first insulating film (109) that has an opening exposing one section of the second electrode (108) and that covers the first electrode (105), the metal oxide layer (106), and another section of the second electrode (108). The metal oxide layer (106) has a characteristic whereby a resistance value changes as a result of the second electrode (108) being in contact with a gas molecule including hydrogen atoms. A first step (121) is formed in a section positioned inside an opening (109a) in the planar view of a boundary surface between the metal oxide layer (106) and the second electrode (108). A local area (107) is formed in the vicinity of the first step (121) in the metal oxide layer (106). The oxygen deficiency in the local area (107) is greater than the oxygen deficiency in other areas in the metal oxide layer (106).
G01N 27/12 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un corps solide dépendant de la réaction avec un fluide
H01M 8/00 - PROCÉDÉS OU MOYENS POUR LA CONVERSION DIRECTE DE L'ÉNERGIE CHIMIQUE EN ÉNERGIE ÉLECTRIQUE, p.ex. BATTERIES Éléments à combustible; Leur fabrication
H01M 8/04 - Dispositions auxiliaires, p.ex. pour la commande de la pression ou pour la circulation des fluides
B60L 50/70 - Propulsion électrique par source d'énergie intérieure au véhicule utilisant de la puissance de propulsion fournie par des batteries ou des piles à combustible utilisant de l'énergie fournie par des piles à combustible
12.
NON-VOLATILE MEMORY DEVICE AND PRODUCTION METHOD THEREOF
In this non-volatile memory device (100), inside a storage area (60), a first lower layer metal wiring (20), a bottom plug (30), a variable resistance element (40), a top plug (32), and a first upper layer metal wiring (23) are formed in this order from below, and inside a circuit area (70), a second lower layer metal wiring (21), a first via (31), a middle layer metal wiring (22), a second via (33), and a second upper layer metal wiring (24) are formed in this order from below. The first and second lower layer metal wirings (20, 21) are formed on the same layer, and the first and second upper layer metal wirings (23, 24) are formed on the same layer. The variable resistance element (40) and the middle layer metal wiring (22) have different heights between top surfaces or different heights between bottom surfaces, or have both different heights between top surfaces and different heights between bottom surfaces with respect to the surface of the substrate (10).
H01L 45/00 - Dispositifs à l'état solide spécialement adaptés pour le redressement, l'amplification, la production d'oscillations ou la commutation, sans barrière de potentiel ni barrière de surface, p.ex. triodes diélectriques; Dispositifs à effet Ovshinsky; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
H01L 49/00 - Dispositifs à l'état solide non couverts par les groupes et et non couverts par une autre sous-classe; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
H01L 27/10 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration répétitive
H01L 27/105 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration répétitive comprenant des composants à effet de champ
H01L 27/11507 - Mémoires mortes programmables électriquement; Procédés de fabrication à étapes multiples de ces dispositifs avec condensateurs ferro-électriques de mémoire caractérisées par la région noyau de mémoire
H01L 27/11509 - Mémoires mortes programmables électriquement; Procédés de fabrication à étapes multiples de ces dispositifs avec condensateurs ferro-électriques de mémoire caractérisées par la région de circuit périphérique
A light source device (100) is provided with: a first optical element (131) for propagating output light (500) from semiconductor laser elements (120); a first light receiving unit (140) for receiving first propagating light (510a) that has propagated through the first optical element (131); a laser drive control unit (192a) for controlling the semiconductor laser elements (120); and a measuring circuit (180) for measuring a first output value indicating the received light intensity of the first propagating light (510a) received in the first light receiving unit (140). The first light receiving unit (140) is arranged downstream of the first optical element (131). The laser drive control unit (192a) causes the semiconductor laser elements (120) to be driven with a plurality of mutually different drive currents. A measurement circuit (180) measures the first output value of the first propagating light (510a) received in the first light receiving unit (140) with respect to each of the plurality of mutually different drive current values.
H01S 3/00 - Lasers, c. à d. dispositifs utilisant l'émission stimulée de rayonnement électromagnétique dans la gamme de l’infrarouge, du visible ou de l’ultraviolet
H01S 5/062 - Dispositions pour commander les paramètres de sortie du laser, p.ex. en agissant sur le milieu actif en faisant varier le potentiel des électrodes
H01S 5/0683 - Stabilisation des paramètres de sortie du laser en surveillant les paramètres optiques de sortie
14.
SEMICONDUCTOR LASER DEVICE AND SEMICONDUCTOR LASER ELEMENT
A semiconductor laser device (200) is provided with a semiconductor laser element (100) for junction-down mounting including a first light-emitting element region (81) and a second light-emitting element region (82) which are formed isolated from each other on a substrate (1). In the semiconductor laser element (100), each of the first light-emitting element region (81) and the second light-emitting element region (82) has a stacked structure (500) in which an n-type semiconductor layer (2), an active layer (3), and a p-type semiconductor layer (4) are stacked in this order. The first light-emitting element region (81) has a first electrode film (10a) arranged on the n-type semiconductor layer (2). The second light-emitting element region (82) has a second electrode film (11b) arranged on the p-type semiconductor layer (4). The first electrode film (10a) and the second electrode film (11b) are electrically connected to each other.
A semiconductor laser module (10) is provided with a semiconductor laser chip (40), a first collimator element (50), and a package (20). The package (20) comprises: a body (21) having a bottom portion (22) and a top-surface portion (25) having an opening (21a) formed therein; a cap member (26); and a window member (27). The semiconductor laser chip (40) has an emission point (40a) for emitting laser light. The semiconductor laser chip (40) is disposed on the bottom portion (22) in such a way that a laser light emitting direction is parallel to a main surface of the bottom portion (22). A divergence angle in a first axial direction of the laser light is greater than a divergence angle in a second axial direction perpendicular to the first axis. The first collimator element (50) has a concave mirror surface (50r). The mirror surface (50r) reflects the laser light toward the opening (21a) and decreases the divergence angle in the first axial direction of the laser light.
An imaging device (1) comprises a light emission unit (4), a pixel unit (100), and a signal processing unit (2) for calculating distance information for a subject. The pixel unit (100) comprises a photoelectric conversion unit (101), a first read-out gate (106a) and second read-out gate (106b), and a plurality of charge accumulation units (102) that include a first charge accumulation unit (102a) and a second charge accumulation unit (102b). The first read-out gate (106a) is activated in a first period and deactivated in a second period. The second read-out gate (106b) is activated in the first period and second period. The signal processing unit (2) calculates the distance information on the basis of differences between the total amount of signal charge accumulated in the plurality of charge accumulation units (102) in the first period and second period, the amount of signal charge accumulated in the second charge accumulation unit (102b) in the first period and second period, and the amount of signal charge accumulated in the first charge accumulation unit (102a) in the first period.
G01C 3/06 - Utilisation de moyens électriques pour obtenir une indication finale
G01S 17/10 - Systèmes déterminant les données relatives à la position d'une cible pour mesurer la distance uniquement utilisant la transmission d'ondes à modulation d'impulsion interrompues
G01S 17/89 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour la cartographie ou l'imagerie
H04N 5/369 - Transformation d'informations lumineuses ou analogues en informations électriques utilisant des capteurs d'images à l'état solide [capteurs SSIS] circuits associés à cette dernière
H04N 5/374 - Capteurs adressés, p.ex. capteurs MOS ou CMOS
This semiconductor light-emitting element (100) comprises: a first semiconductor layer (12) disposed above a substrate (11), the first semiconductor layer including a nitride-based semiconductor of a first electroconductivity type; an active layer (15) disposed above the first semiconductor layer, the active layer including a nitride-based semiconductor that contains Ga or In; an electron barrier layer (18) disposed above the active layer (15), the electron barrier layer including a nitride-based semiconductor that contains at least Al, and the electron barrier layer having a second electroconductivity type differing from the first electroconductivity type; and a second semiconductor layer (19) disposed above the electron barrier layer (18), the second semiconductor layer including a nitride-based semiconductor of a second electroconductivity type. The electron barrier layer (18) has an Al composition ratio increase region in which the Al composition ratio increases monotonically commensurately with proximity to the second semiconductor layer. The position of maximum concentration of second-electroconductivity-type impurities in the electron barrier layer (18) is nearer to the active layer (15) than an intermediate position between the position in the Al composition ratio increase region at which the Al composition ratio of the electron barrier layer is at a maximum and the boundary on the active-layer (15) side of the electron barrier layer (18).
H01S 5/20 - Structure ou forme du corps semi-conducteur pour guider l'onde optique
H01S 5/343 - Structure ou forme de la région active; Matériaux pour la région active comprenant des structures à puits quantiques ou à superréseaux, p.ex. lasers à puits quantique unique [SQW], lasers à plusieurs puits quantiques [MQW] ou lasers à hétérostructure de confinement séparée ayant un indice progressif [GRINSCH] dans des composés AIIIBV, p.ex. laser AlGaAs
18.
RESISTANCE-VARIABLE NONVOLATILE MEMORY ELEMENT, AND RESISTANCE-VARIABLE NONVOLATILE MEMORY DEVICE USING SAME
This resistance-variable nonvolatile memory element (20) comprises: a first electrode (2); a second electrode (4); and a resistance-variable layer (3) disposed between the first electrode (2) and the second electrode (4) and having a resistance value reversibly varied on the basis of an electrical signal applied between the electrodes. The resistance-variable layer (3) has: a first resistance-variable layer (3c) composed of an oxygen-deficient first metal oxide comprising a first metal element and oxygen; and a second resistance-variable layer (3d) which is composed of an oxygen-deficient composite oxide comprising a first metal element, a second metal element other than the first metal element, and oxygen, and having an oxygen deficiency different from that of the first metal oxide. The oxygen deficiency of the composite oxide is smaller than the oxygen deficiency of the first metal oxide, and the oxygen diffusion coefficient of the composite oxide at room temperature is smaller than the oxygen diffusion coefficient of a second metal oxide at room temperature, the second metal oxide comprising a first metal element and oxygen, and having an oxygen deficiency equal to the oxygen deficiency of the composite oxide.
H01L 27/105 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration répétitive comprenant des composants à effet de champ
H01L 45/00 - Dispositifs à l'état solide spécialement adaptés pour le redressement, l'amplification, la production d'oscillations ou la commutation, sans barrière de potentiel ni barrière de surface, p.ex. triodes diélectriques; Dispositifs à effet Ovshinsky; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
H01L 49/00 - Dispositifs à l'état solide non couverts par les groupes et et non couverts par une autre sous-classe; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
19.
DLL CIRCUIT, TEMPORAL DIFFERENCE AMPLIFYING CIRCUIT, AND RANGING/IMAGING DEVICE
A DLL circuit (10) is provided with: a temporal difference amplifying circuit (11) which, with respect to a first signal and a second signal that have been input, performs a process for amplifying a temporal difference between an edge that is a point of change in logic level included in the first signal and an edge that is a point of change in logic level included in the second signal, and which outputs a resultant first amplified signal and second amplified signal; a phase comparison circuit (12) which calculates a phase difference between the first amplified signal and the second amplified signal output from the temporal difference amplifying circuit (11), and outputs a phase difference signal indicating the calculated phase difference; and a variable delay circuit (13) which causes the second signal to be delayed by a delay amount that depends on the phase difference indicated by the phase difference signal output from the comparison circuit (12), and outputs the second signal as a delayed signal.
G01C 3/06 - Utilisation de moyens électriques pour obtenir une indication finale
G01S 17/89 - Systèmes lidar, spécialement adaptés pour des applications spécifiques pour la cartographie ou l'imagerie
H03L 7/081 - Commande automatique de fréquence ou de phase; Synchronisation utilisant un signal de référence qui est appliqué à une boucle verrouillée en fréquence ou en phase - Détails de la boucle verrouillée en phase avec un déphaseur commandé additionnel
This battery monitoring control circuit is used for a battery control system in which a battery pack to which a plurality of secondary battery cells are connected is subdivided into a plurality of blocks, the system comprising: a plurality of the battery monitoring control circuits for measuring an output voltage of an individual or a plurality of secondary battery cells; and a control circuit for controlling the battery monitoring control circuits. Each of the battery monitoring control circuits is provided with: a communication interface for communicating among the battery monitoring control circuits or communicating with the control circuit; a power converter for converting a start signal inputted to the communication interface to a direct current voltage; and a start circuit that is supplied with power using the direct current voltage from the power converter as a power source voltage and that generates a start control signal for starting up the battery monitoring control circuit.
G01R 19/00 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe
H01M 10/48 - Accumulateurs combinés à des dispositions pour mesurer, tester ou indiquer l'état des éléments, p.ex. le niveau ou la densité de l'électrolyte
H02J 7/02 - Circuits pour la charge ou la dépolarisation des batteries ou pour alimenter des charges par des batteries pour la charge des batteries par réseaux à courant alternatif au moyen de convertisseurs
G01R 31/396 - Acquisition ou traitement de données pour le test ou la surveillance d’éléments particuliers ou de groupes particuliers d’éléments dans une batterie
A semiconductor device (1) has a transistor (10) and a transistor (20) formed respectively in a first area (A1) and a second area (A2) of a rectangular semiconductor layer (40) in a plan view. The semiconductor device has on a surface of the semiconductor layer (40) a first source pad (111), a first gate pad (119), a second source pad (121), and a second gate pad (129). In a plan view, the transistor (10) and the transistor (20) are aligned in a first direction, the first gate pad (119) is disposed such that the first source pad (111) is not even partially held between the first gate pad and one long side or the other long side in the first direction of the semiconductor layer (40), or between the first gate pad and a boundary between the first area (A1) and the second area (A2), and the second gate pad (129) is disposed such that the second source pad (121) is not even partially held between the second gate pad and the one long side or the other long side, or between the second gate pad and the boundary.
A ranging/imaging device (1) is provided with: a timing control unit (100) which outputs one or more timing signals; a light-receiving unit (204) which receives reflected light, due to a subject, of light emitted from a light source (203) and outputs a signal used for measuring a distance to the subject; and a phase adjusting circuit (2) which, on the basis of the one or more timing signals, outputs at least one of an emission control signal which is used for emitting light from the light source (203) toward the subject, and an exposure control signal which is used for starting exposure by the light-receiving unit (204). The phase adjusting circuit (2) includes one or more DLL circuits for determining the phase, with reference to at least one of the one or more timing signals, of at least one of a rise edge and a fall edge of the at least one of the signals.
H03L 7/081 - Commande automatique de fréquence ou de phase; Synchronisation utilisant un signal de référence qui est appliqué à une boucle verrouillée en fréquence ou en phase - Détails de la boucle verrouillée en phase avec un déphaseur commandé additionnel
A semiconductor device (1) that comprises a first electrode (E1) that is provided on a semiconductor laminate structure (11), a second electrode (E2) that is provided on a substrate (21), and a bonding metal layer (30) that bonds the first electrode (E1) and the second electrode (E2). There is a gap (33) inside the bonding metal layer (30).
H01L 33/62 - Dispositions pour conduire le courant électrique vers le corps semi-conducteur ou depuis celui-ci, p.ex. grille de connexion, fil de connexion ou billes de soudure
H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
An imaging device includes a solid-state imaging element (106) that exposes reflected light from an object and stores the light as signal charges, and a control arithmetic device (107) that controls irradiation from an infrared light source (103) and exposure of the solid-state imaging device (106), wherein the solid-state imaging device (106) includes a plurality of photoelectric conversion units (4) that converts reflected light from the object into signal charges, and a plurality of charge storage units that stores signal charges, the imaging device performing m types (m is an integer of 4 or more) of exposure sequences for controlling irradiation and exposure within one frame period, exclusively assigning charge storage units to the m types of exposure sequences, and storing signal charges obtained from n (n is an integer of 3 or more) photoelectric conversion units (4) in the charge storage units in at least one type of exposure sequence among the m types of exposure sequences.
G01S 17/10 - Systèmes déterminant les données relatives à la position d'une cible pour mesurer la distance uniquement utilisant la transmission d'ondes à modulation d'impulsion interrompues
This method for manufacturing a nitride semiconductor light-emitting element involves a step (S10) in which an n-type nitride semiconductor layer is formed, a light-emitting layer comprising a nitride semiconductor is formed on the n-type nitride semiconductor layer, and, in an atmosphere containing hydrogen gas, a p-type nitride semiconductor layer is formed on the light-emitting layer while doping with a p-type dopant with a concentration of 2.0x1018atom/cm3, and a step (S16) in which the p-type nitride semiconductor layer is annealed in an atmosphere not containing hydrogen and at a temperature greater than or equal to 800°c, wherein the hydrogen concentration of the p-type nitride semiconductor layer after the annealing step is less than or equal to 5.0×1018atom/cm3, the concentration of the p-type dopant is less than or equal to 5%, and the hydrogen concentration of the light-emitting layer is less than or equal to 2.0×1017atom/cm3.
H01S 5/343 - Structure ou forme de la région active; Matériaux pour la région active comprenant des structures à puits quantiques ou à superréseaux, p.ex. lasers à puits quantique unique [SQW], lasers à plusieurs puits quantiques [MQW] ou lasers à hétérostructure de confinement séparée ayant un indice progressif [GRINSCH] dans des composés AIIIBV, p.ex. laser AlGaAs
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p.ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c. à d. un dépôt chimique
H01L 33/32 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique contenant de l'azote
26.
LIGHT SOURCE UNIT, ILLUMINATION DEVICE, MACHINING DEVICE, AND DEFLECTION ELEMENT
A light source unit (100) comprising: a first light-emission point (13a) that emits a first beam; a second light-emission point (13b) that emits a second beam and is arranged distanced from the first light-emission point in a second direction orthogonal to a first direction; a deflection element (50) that deflects at least either the first beam or the second beam, in a third direction that is orthogonal to the first direction and the second direction; and a first condensing optical element (70) that condenses the first beam and the second beam emitted from the deflection element (50), on to a light condensing surface (91). The first beam at the first light-emission point (13a) and the second beam at the second light-emission point overlap in the third direction. On the light condensing surface (91), the first beam and the second beam overlap in the second direction and are separated in the third direction.
This semiconductor laser device (10) comprises: a semiconductor laminate (30); and a first opening part (27) formed to extend along a first direction from a front end surface (36) to a rear end surface (37) and also comprises: an insulation layer (21) disposed above the semiconductor laminate (30); a first electrode (25) disposed above the semiconductor laminate (30); a second electrode disposed above the first electrode (25) and the insulation layer (21); and an auxiliary adhesion layer (22) disposed between the second electrode (23) and the insulation layer (21), wherein the auxiliary adhesion layer (22) has a second opening part (26) that at least partially overlaps the first opening part (27) in a plan view, at least a portion of the first electrode (25) is disposed inside the first opening part (27) and the second opening part (26), and the second electrode (23) and the auxiliary adhesion layer (22) are located above the insulation layer (21) between at least one end surface among the front end surface (36) and the rear end surface (37) and the first opening part (27).
Provided is a nitride semiconductor light-emitting element comprising a substrate (10) that is an example of an n-type nitride semiconductor containing a group IV n-type impurity, and an n-side electrode (34) in contact with the substrate (10). The substrate (10) has a halogen element-containing surface layer region (10a) in contact with the n-side electrode (34) and an internal region (10b) disposed on the side of the surface layer region (10a) opposite from the n-side electrode (34). The peak concentration of the group IV n-type impurity in the surface layer region (10a) is at least 1.0×1021cm-3; the peak concentration of the halogen element in the surface layer region (10a) is at least 10% of the peak concentration of the group IV n-type impurity in the surface layer region (10a); and the concentration of the group IV n-type impurity in the internal region (10b) is lower than the concentration of the group IV n-type impurity in the surface layer region (10a).
H01L 33/32 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique contenant de l'azote
H01S 5/343 - Structure ou forme de la région active; Matériaux pour la région active comprenant des structures à puits quantiques ou à superréseaux, p.ex. lasers à puits quantique unique [SQW], lasers à plusieurs puits quantiques [MQW] ou lasers à hétérostructure de confinement séparée ayant un indice progressif [GRINSCH] dans des composés AIIIBV, p.ex. laser AlGaAs
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