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Résultats pour
brevets
1.
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OSCILLOSCOPE
| Numéro d'application |
19435227 |
| Statut |
En instance |
| Date de dépôt |
2025-12-29 |
| Date de la première publication |
2026-05-14 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
An oscilloscope is provided. The oscilloscope includes a first data processing unit (10) configured to send a first synchronization signal to a first multi-output unit (20); the first multi-output unit (20) configured to output a second synchronization signal to N sampling channels, respectively, according to the first synchronization signal; an analog-to-digital conversion unit (30) configured to perform signal sampling to determine first sampled data, and synchronously transmit the first sampled data to a second data processing unit (40) of a sampling channel to which the analog-to-digital conversion unit (30) belongs, according to the second synchronization signal; and the second data processing unit (40) configured to process the received first sampled data and send second sampled data obtained by processing the first sampled data to the first data processing unit (10).
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
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2.
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PROBE ADAPTER AND MEASUREMENT SYSTEM
| Numéro d'application |
19003412 |
| Statut |
En instance |
| Date de dépôt |
2024-12-27 |
| Date de la première publication |
2026-04-30 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Yang, Kai
- Wang, Liming
- Wang, Yue
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Abrégé
The present disclosure relates to a probe adapter and a measurement system, including: a first interface, configured to be electrically connected to a probe; a second interface, configured to be electrically connected to a measuring instrument; signal transmission lines, including first and second signal transmission lines, and a line selection switch, where the first and second signal transmission lines are both located between the first interface and the second interface, and the line selection switch is configured to select the first signal transmission line or the second signal transmission line to conduct the first interface and the second interface; and a signal conditioning circuit, located on the second signal transmission line, and configured to adjust an impedance of a measured signal to match an input impedance of the measuring instrument, and/or adjust an amplitude of the measured signal to match a measurement range of the measuring instrument.
Classes IPC ?
- G01R 1/067 - Sondes de mesure
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
- G01R 35/00 - Test ou étalonnage des appareils couverts par les autres groupes de la présente sous-classe
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3.
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WAVEFORM SELECTION METHOD, ELECTRONIC TEST AND MEASUREMENT DEVICE, AND STORAGE MEDIUM
| Numéro d'application |
19413385 |
| Statut |
En instance |
| Date de dépôt |
2025-12-09 |
| Date de la première publication |
2026-04-02 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
Provided are a waveform selection method, an electronic test and measurement device, and a storage medium. The waveform selection method comprises the following: in response to a click operation of a user, determining a click position on a display; determining a waveform selection region according to the click position; determining waveform energies of waveforms of a plurality of channels within the waveform selection region; and selecting a target waveform from the waveforms of the plurality of channels according to the waveform energy of the waveforms of the plurality of channels.
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
- G01R 19/25 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe utilisant une méthode de mesure numérique
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4.
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POWER CONTROL CIRCUIT AND POWER SUPPLY DEVICE
| Numéro d'application |
19250748 |
| Statut |
En instance |
| Date de dépôt |
2025-06-26 |
| Date de la première publication |
2026-01-01 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
An embodiment of the present disclosure provides a power control circuit and a power supply device. The circuit is provided with a feedback module and a control module. A first end of the feedback module is connected to a primary side circuit of a push-pull switching power, a second end of the feedback module is connected to the control module, and the feedback module is configured to generate a corresponding feedback signal according to an electrical signal of the primary side circuit of the push-pull switching power. The control module is respectively connected to control ends of two switching tubes in the primary side circuit of the push-pull switching power, and the control module is configured to control on-off states of the two switching tubes according to a preset power voltage and the feedback signal, so as to adjust output electrical signals of power output channels.
Classes IPC ?
- H02M 3/337 - Transformation d'une puissance d'entrée en courant continu en une puissance de sortie en courant continu avec transformation intermédiaire en courant alternatif par convertisseurs statiques utilisant des tubes à décharge avec électrode de commande ou des dispositifs à semi-conducteurs avec électrodes de commande pour produire le courant alternatif intermédiaire utilisant des dispositifs du type triode ou transistor exigeant l'application continue d'un signal de commande utilisant uniquement des dispositifs à semi-conducteurs en configuration push-pull
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5.
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Signal processing apparatus and method, and digital oscilloscope
| Numéro d'application |
19098499 |
| Numéro de brevet |
12493055 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2025-04-02 |
| Date de la première publication |
2025-08-14 |
| Date d'octroi |
2025-12-09 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
A signal processing apparatus and method, and a digital oscilloscope are provided. The signal processing apparatus is configured to output one of two target signals according to a trigger signal and a trigger level. The signal processing apparatus includes a trigger comparison unit, a trigger display unit, and a controller. The trigger comparison unit is configured to extract a low-frequency component signal from the trigger signal. The controller is electrically connected to the trigger comparison unit and is configured to generate a trigger comparison signal according to a relationship between the low-frequency component signal and the trigger signal, and output a target signal obtained based on the trigger comparison signal according to a preset rule. The trigger display unit is electrically connected to the controller and is configured to receive and display the target signal on a target interactive interface.
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
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6.
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ANALOG FRONT-END CHIP AND OSCILLOSCOPE
| Numéro d'application |
19007254 |
| Statut |
En instance |
| Date de dépôt |
2024-12-31 |
| Date de la première publication |
2025-05-01 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Yan, Bo
- Li, Jianwei
- Fang, Chaomin
- Luo, Junzhou
- Wang, Yue
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Abrégé
An analog front-end chip and an oscilloscope are provided. The analog front-end chip is integrated with an input buffer module, a variable gain amplification module, and at least two output branches. An input end of the input buffer module is configured as an input end of the analog front-end chip, and an output end of the input buffer module is electrically connected to an input end of the variable gain amplification module. An input end of each of the output branches is electrically connected to an output end of the variable gain amplification module, and an output end of each of the output branches is configured as an output end of the analog front-end chip, wherein each of the output branches includes an output buffer module.
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
- H03G 3/00 - Commande de gain dans les amplificateurs ou les changeurs de fréquence
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7.
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SIGNAL ANALYSIS INTERACTION METHOD, APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM
| Numéro d'application |
18932130 |
| Statut |
En instance |
| Date de dépôt |
2024-10-30 |
| Date de la première publication |
2025-03-06 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
An embodiment of the present disclosure relates to a signal analysis interaction method and a signal analysis apparatus. The method may include displaying an image of at least one waveform of an obtained signal in an image display area of a screen according to the signal; displaying a selection area in the image display area in response to a first control operation, wherein the selection area is configured to indicate an area selected by the first control operation in the image display area; determining a channel list of the signal selected by the first control operation according to an image in the selection area; and displaying a function option to be executed according to the channel list.
Classes IPC ?
- G06F 3/0482 - Interaction avec des listes d’éléments sélectionnables, p. ex. des menus
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8.
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Electrical signal sampling device
| Numéro d'application |
18278459 |
| Numéro de brevet |
12480977 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2022-02-23 |
| Date de la première publication |
2024-07-11 |
| Date d'octroi |
2025-11-25 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
Provided is an electrical signal sampling device. The electrical signal sampling device includes a pulse signal source, a first sampling module, and a signal delay module. The pulse signal source is configured to generate a pulse signal. The first sampling module is connected to the pulse signal source through a coupler. The coupler is configured to fan-out the pulse signal to generate a test input signal and a sampling incidence signal. The test input signal is input into a tested device from the coupler and then is coupled to form a test output signal. The first sampling module is configured to collect the sampling incidence signal and the test output signal through the coupler. The signal delay module generates N excitation signals through a preset delay.
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
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9.
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Synchronization method for multi-channel signals, power supply module, electronic device and power supply device
| Numéro d'application |
18519866 |
| Numéro de brevet |
12316331 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2023-11-27 |
| Date de la première publication |
2024-03-28 |
| Date d'octroi |
2025-05-27 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
A synchronization method for multi-channel signals, a power supply module, an electronic device, and a power supply device. In the synchronization method for multi-channel signals, a first power supply module (700) is connected to a plurality of mutually isolated second power supply modules (800), allocates target data information and a target duration to each of the second power supply modules (800) according to total data information input by a user; and then the first power supply module (700) synchronously transmits a clock signal to each of the second power supply modules (800), so as to trigger each of the second power supply modules (800) to synchronously output a data signal corresponding to the target data information, and to control an output duration of the data signal to be equal to the target duration.
Classes IPC ?
- H03L 7/00 - Commande automatique de fréquence ou de phaseSynchronisation
- G06F 1/10 - Répartition des signaux d'horloge
- H02M 1/00 - Détails d'appareils pour transformation
- H04L 7/00 - Dispositions pour synchroniser le récepteur avec l'émetteur
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10.
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Electronic test equipment and optional function configuring method
| Numéro d'application |
18198130 |
| Numéro de brevet |
12323508 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2023-05-16 |
| Date de la première publication |
2023-09-14 |
| Date d'octroi |
2025-06-03 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
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Abrégé
The present application relates to an electronic test equipment and an optional function configuring method. A ciphertext decryption authentication unit performs a decryption authentication operation according to a function option key and a function option ciphertext, performs a corresponding operation on a function device corresponding to the function option ciphertext according to an authentication result signal, and outputs the authentication result signal to an operation control unit, such that the operation control unit operates, according to the authentication result signal, a target function corresponding to the function option ciphertext.
Classes IPC ?
- H04L 9/06 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité l'appareil de chiffrement utilisant des registres à décalage ou des mémoires pour le codage par blocs, p. ex. système DES
- G06F 21/10 - Protection de programmes ou contenus distribués, p. ex. vente ou concession de licence de matériel soumis à droit de reproduction
- H04L 9/08 - Répartition de clés
- H04L 9/32 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
- H04L 9/40 - Protocoles réseaux de sécurité
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11.
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Multi-channel signal synchronization system, circuit, and method
| Numéro d'application |
17966133 |
| Numéro de brevet |
11902015 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2022-10-14 |
| Date de la première publication |
2023-02-02 |
| Date d'octroi |
2024-02-13 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Luo, Junzhou
- Fang, Chaomin
- Yan, Bo
- Wang, Yue
- Wang, Tiejun
- Li, Weisen
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Abrégé
Embodiments of the present application provide a multi-channel signal synchronization system, circuit, and method. The multi-channel signal synchronization system comprises a clock signal generation module, a synchronization signal generation module, and signal receiving modules; the clock signal generation module is configured to generate a first clock signal; the synchronization signal generation module is configured to generate a synchronization signal based on the first clock signal and transmit the synchronization signal to the clock signal generation module; the clock signal generation module generates second clock signals on the basis of the synchronization signal and transmits the second clock signals to the signal receiving modules; the synchronization signal generation module transmits the synchronization signal to the signal receiving modules.
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12.
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ADC sampling data identification method and system, integrated circuit and decoding device
| Numéro d'application |
17280719 |
| Numéro de brevet |
11438003 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2020-05-09 |
| Date de la première publication |
2022-04-21 |
| Date d'octroi |
2022-09-06 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Yan, Bo
- Fang, Chaomin
- Wang, Yue
- Wang, Tiejun
- Li, Weisen
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Abrégé
An ADC sampling data identification method and system, integrated circuit and decoding device are disclosed. The ADC sampling data identification method includes in the integrated circuit, converting sampling data from n time interleaved ADC chips into serial data, generating a preamble sequence, combining the serial data with the generated preamble sequence to obtain new serial data, sending the new serial data to a decoding device, generating a clock signal that matches the new serial data, and sending the clock signal to the decoding device; and in the decoding device, receiving the new serial data and the clock signal from the ADC integrated circuit, obtaining the preamble sequence for combining according to an agreement with the ADC integrated circuit, and identifying a start position of the sampling data from the time interleaved ADC chips.
Classes IPC ?
- H03M 1/12 - Convertisseurs analogiques/numériques
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13.
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Metastabile state detection device and method, and ADC circuit
| Numéro d'application |
17276027 |
| Numéro de brevet |
11451236 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2020-05-09 |
| Date de la première publication |
2022-04-07 |
| Date d'octroi |
2022-09-20 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Yan, Bo
- Luo, Junzhou
- Wang, Yue
- Wang, Tiejun
- Li, Weisen
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Abrégé
A metastable state detection device and method, and an ADC circuit are disclosed. The metastable state detection device includes: a delay unit which is configured to receive a synchronization signal and delay the synchronization signal based on preset step delay values; a first flip-flop unit including a first clock input terminal, a first data input terminal and a first data output terminal, wherein the first clock input terminal is configured to receive a clock signal; the first data input terminal is configured to receive the delayed synchronization signal; a second flip-flop unit including a second clock input terminal, a second data input terminal and a second data output terminal; a processing module connected to the second data output terminal, which is configured to receive a target clock signal and detect a metastable state of the first flip-flop unit according to the target clock signal.
Classes IPC ?
- H03M 1/10 - Calibrage ou tests
- H03L 7/081 - Détails de la boucle verrouillée en phase avec un déphaseur commandé additionnel
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14.
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Digital oscilloscope and method for controlling the same
| Numéro d'application |
13143239 |
| Numéro de brevet |
08788229 |
| Statut |
Délivré - en vigueur |
| Date de dépôt |
2010-09-26 |
| Date de la première publication |
2011-11-03 |
| Date d'octroi |
2014-07-22 |
| Propriétaire |
RIGOL TECHNOLOGIES CO., LTD. (Chine)
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| Inventeur(s) |
- Wang, Yue
- Wang, Tiejun
- Li, Weisen
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Abrégé
Provided are a digital oscilloscope and a method for controlling the same. The digital oscilloscope comprises a trace intensity synthesizer including a first intensity memory and a second intensity memory. The controlling procedure performed by the digital oscilloscope includes: a determining step for determining whether the time interval of a trigger signal is larger than a predetermined threshold, a first fluorescence processing step performed when the time interval of a trigger signal is equal to or less than the predetermined threshold, and a second fluorescence processing step performed when the time interval of a trigger signal is larger than the predetermined threshold. The digital oscilloscope can automatically select the dynamic fluorescence effect to pay attention to the long-term variation of a signal when the triggering rate is low, and the static fluorescence effect to pay attention to the rapid variation of a signal when the triggering rate is high.
Classes IPC ?
- G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
- G01R 13/00 - Dispositions pour la présentation de variables électriques ou de formes d'ondes
- G09G 5/22 - Dispositions ou circuits de commande de l'affichage communs à l'affichage utilisant des tubes à rayons cathodiques et à l'affichage utilisant d'autres moyens de visualisation caractérisés par l'affichage de caractères ou de signes individuels en utilisant des signaux de commande d'affichage dérivés de signaux codés représentant les caractères ou les signes avec une mémoire de codes de caractères
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