Provided is a method for manufacturing a silicon wafer in which a main surface is an inclined {110} plane of a silicon single crystal, the method comprising: a step for preparing a silicon wafer having an inclination angle of 10° or less in a range in which the inclination angle direction by which the {110} plane is inclined with respect to the main surface from a <100> direction that is parallel to the {110} plane to a <110> direction is 0-30°; and a heat treatment step for performing rapid temperature increase/decrease treatment in which the silicon wafer is maintained at a maximum temperature of 1250-1400°C for 1-60 seconds and then cooled.
The present invention provides a silicon wafer cleaning method capable of suppressing formation of water marks and adhesion of particles, and deterioration of surface roughness while preventing surface defects due to ozone water. A silicon wafer cleaning method according to the present invention can be applied to single-wafer spin cleaning involving performing a cleaning step using hydrofluoric acid and a cleaning step using ozone water in a state in which a silicon wafer is rotated. The silicon wafer cleaning method is characterized by including: a first cleaning process of performing a cleaning step using ozone water, and then performing a cleaning step using hydrofluoric acid after leaving a specific time interval; and a second cleaning process of performing a cleaning step using ozone water without leaving a time interval after performing the cleaning step using hydrofluoric acid.
A method of accurately evaluating the metal contamination on silicon wafers by lifetime measurement. The silicon wafers are subjected to heat treatment and further to a corona charge as passivation, and then, the lifetime is measured, in which the heat treatment is at least one of the following processes that the silicon wafer is held at a temperature of 1250° C. or more to 1330° C. or less for 7 s or more to 220 s or less under an oxygen atmosphere and then the temperature is lowered at a rate of 30° C./s or more to 500° C./s or less, or that and the silicon wafer is held at a temperature of 1020° C. or more to less than 1250° C. for 7 s or more to 600 s or less under an oxygen atmosphere, and then the temperature is lowered at a rate of 1° C./s or more to 280° C./s or less.
The disclosed silicon epitaxial substrate production method and silicon epitaxial substrate prevent the occurrence of stacking fault. The method includes growing a silicon single crystal to which phosphorus is added as a dopant and of which the electrical resistivity is adjusted to 0.6 to 1.0 mΩ·cm using the Czochralski method. The silicon single crystal is monitored for a 700-600° C. passage time during cooling. The silicon single crystal is sliced and the sliced product is placed in an epitaxial growth furnace. The method further includes retaining the furnace temperature of the epitaxial growth furnace for 120 seconds to 300 seconds at a temperature ranging from 750° C. to 900° C. inclusive when the 700-600° C. passage time is less than 300 minutes and at a temperature ranging from 900° C. to 1000° C. inclusive when the 700-600° C. passage time is 300 minutes or more. Epitaxial growth is performed following the retention step.
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
By accurately detecting cooling medium leakage in a heat treatment apparatus, reductions in yield and production efficiency are suppressed. A controller controls a lamp voltage or lamp current applied to a plurality of lamps based on the temperature of a semiconductor substrate detected by a temperature detector. When n is a positive integer of 2 or more, indicating the lot order of the semiconductor substrate to be treated, the controller calculates a difference effect size (n), based on the maximum lamp voltage or maximum lamp current applied to the plurality of lamps, according to equation below:
By accurately detecting cooling medium leakage in a heat treatment apparatus, reductions in yield and production efficiency are suppressed. A controller controls a lamp voltage or lamp current applied to a plurality of lamps based on the temperature of a semiconductor substrate detected by a temperature detector. When n is a positive integer of 2 or more, indicating the lot order of the semiconductor substrate to be treated, the controller calculates a difference effect size (n), based on the maximum lamp voltage or maximum lamp current applied to the plurality of lamps, according to equation below:
Difference effect size(n)=(maximum lamp voltage or maximum lamp current(n)−maximum lamp voltage or maximum lamp current(n−1))/standard deviation of the maximum lamp voltage or maximum lamp current in a predetermined lot range, and determines that an abnormality has occurred when the difference effect size(n)exceeds a first threshold.
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
G05B 19/4099 - Usinage de surface ou de courbe, fabrication d'objets en trois dimensions 3D, p. ex. fabrication assistée par ordinateur
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
6.
HEAT TREATMENT APPARATUS, METHOD OF MAINTAINING HEAT TREATMENT APPARATUS, AND METHOD OF REGENERATING LAMP SLEEVE
The timing for removing granular SiOx deposits on an inner wall of a lamp sleeve is easily obtained to prevent a decrease in production efficiency and suppress an increase in power consumption for heat treatment. A heat treatment apparatus includes a plurality of lamps that heats a semiconductor substrate, a lamp sleeve that reflects irradiation light of the plurality of lamps; a power supply that applies a lamp voltage to the plurality of lamps; a temperature detector that detects a temperature of the semiconductor substrate, a controller that controls the lamp voltage or lamp current applied to the plurality of lamps, and a warning unit that makes a warning on timing for cleaning the lamp sleeve through a display or a voice. The controller causes the warning unit to issue a warning when the lamp voltage or lamp current applied to the plurality of lamps exceeds a predetermined threshold.
A method of manufacturing a semiconductor wafer by performing the RTA treatment for suppressing slips is provided. The method of manufacturing a semiconductor wafer according to the present invention includes a step of performing the RTA treatment on a semiconductor wafer 1, wherein, for example, a first correction for eliminating temperature variations of the entire wafer surface is performed throughout the entire process of heating and cooling in the RTA treatment, and further, in the cooling process, a second correction of +0.1° C. or more and +5.0° C. or less is performed to a part or the entire wafer outer circumference 1d, which is an outer region including the wafer periphery.
A method of manufacturing semiconductor wafers comprises the RTA process, wherein a wafer is placed on a wafer support member having a support surface inclined downwardly toward the inside, the RTA process is performed, and further wherein an angle between the wafer backside and the wafer backside bevel is formed at an obtuse angle, and the semiconductor wafer is processed so that the top of the obtuse angle contacts the support surface during the RTA process. During the RTA process, the angle θ1 of the angle between the wafer backside and the support surface and the angle θ2 of the angle between the backside bevel and the support surface formed at the contact position with the support surface are θ1≥5° and θ2≥5°, respectively, and the difference between the angles θ1 and θ2 is |θ1−θ2|≤5°, whereby the semiconductor wafer is produced.
To provide a method of manufacturing silicon wafers having a low oxygen concentration and being provided with the gettering capability of heavy metals even when the density of BMD is low. The method includes a step of placing wafers sliced from a silicon single crystal and having an oxygen concentration in the range of 1×1016 atoms/cm3 to 7×1017 atoms/cm3, in a chamber and a step of performing rapid thermal processing at a maximum temperature reached of not less than 1250° C. or not more than 1350° C. after introducing a mixed gas having an oxygen partial pressure in the range of 1% to 10% of oxygen and an inert gas.
A clean silicon wafer, having a DZ layer free of micro-defects formed in a device active region on the surface of the thermally-processed silicon wafer, an IG layer having a high gettering capability formed in a bulk layer, and little heavy metal contamination on the wafer surface is manufactured. A method for manufacturing a silicon wafer for performing the rapid thermal process for a silicon wafer in a furnace, the method performs the rapid thermal process with a thermal budget of 53% or more and 65% or less, in terms of a thermal budget with temperature and time, when a condition where a thermal process at a highest temperature of 1350° C. is maintained for a predetermined longest holding time is taken as 100% of the thermal budget.
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
H01L 21/67 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants
11.
SINGLE CRYSTAL PULLING DEVICE AND SINGLE CRYSTAL PULLING METHOD
The present invention precisely controls a gap that is the distance between the bottom end of a radiation shield and molten silicon when pulling a silicon single crystal by means of the Czochralski method, and grows a silicon single crystal. The present invention comprises: a raising/lowering driving unit 15 that raises and lowers a crucible 3; a heater 4 that heats the crucible; a cylindrical radiation shield 7 that is disposed above molten silicon M formed in the crucible and surrounds the periphery a single crystal C that is pulled upward; a translucent pin member 8 that is disposed to a terraced surface located at the front end of the radiation shield and penetrates the radiation shield such that the bottom part of the pin member is located on the molten liquid-side and the top part is located on the radiation shield inner circumference-side; a brightness detection portion 17 that detects the brightness of the pin member; and a controller 11 that, when the detected brightness of the pin member exceeds a prescribed threshold, determines that the bottom end of the pin member has come into contact with the molten silicon and stops the raising of the crucible.
Provided is a silicon single crystal which is grown by intermittently inserting a sub dopant into a melt to form a plurality of single crystal blocks along an axial direction and controlling the variety and resistivity of each of the single crystal blocks, when pulling up the silicon single crystal by the Czochralski method, and which has a marking indicating a boundary of each of the single crystal blocks. This silicon single crystal comprises: a plurality of single crystal blocks 1 which are formed continuously in the crystal axis direction and have a first resistivity having a fluctuation width within the standard range in the crystal axis direction; and a high-resistivity layer 2 which has a second resistivity having a peak that protrudes higher than the standard range at the boundaries of the plurality of single crystal blocks.
Provided is a method for evaluating a silicon single crystal ingot, whereby it becomes possible to achieve the improvement in yield of wafers while reducing the time required for the evaluation of fluctuations in resistivity in a crystal length method even when a light-doped crystal is used. In the method for evaluating a single crystal ingot according to the present embodiment, a counter doping procedure in which an auxiliary dopant is added during pulling up is performed in the pulling up of a silicon single crystal by Czochralski method, then the silicon single crystal is pulled up, then the resistivity of a side surface in the crystal length direction is measured by four point probe method in which the silicon single crystal has the form of a single crystal ingot 1, and a reject area is determined on the basis of the distribution of resistivities in the crystal length direction.
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
14.
Silicon wafer and method for producing silicon wafer
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
15.
SILICON EPITAXIAL SUBSTRATE PRODUCTION METHOD AND SILICON EPITAXIAL SUBSTRATE
Provided are: a silicon epitaxial substrate production method whereby it becomes possible to prevent the occurrence of stacking fault; and a silicon epitaxial substrate. The silicon epitaxial substrate production method comprises: a growth step for growing a silicon single crystal to which phosphorus is added as a dopant and of which the electrical resistivity is adjusted to 0.6 to 1.0 mΩ•cm by Czochralski method; a step for monitoring a 700-600°C passage time when the silicon single crystal is cooled; a step for slicing the silicon single crystal and placing a sliced product in an epitaxial growth furnace; a retention step for retaining the furnace temperature of the epitaxial growth furnace for 120 seconds to 300 seconds at a temperature ranging from 750°C to 900°C inclusive when the 700-600°C passage time is less than 300 minutes and at a temperature ranging from 900°C to 1000°C inclusive when the 700-600°C passage time is 300 minutes or more; and an epitaxial growth step for performing epitaxial growth after the retention step.
According to the present invention, the thickness of a high-resistance silicon wafer is precisely measured using a capacitive thickness measurement device, and, on the basis of the result of the measurement, the flatness of the wafer is measured. This method for measuring the thickness of a high-resistance silicon wafer doped with boron and an n-type impurity, comprises: a step for causing the n-type impurity in the silicon wafer to function more for temporarily forming an n-type silicon wafer having a lower resistivity; and a step for performing capacitive thickness measurement on the silicon wafer having a lowered resistivity.
C30B 33/00 - Post-traitement des monocristaux ou des matériaux polycristallins homogènes de structure déterminée
G01B 7/06 - Dispositions pour la mesure caractérisées par l'utilisation de techniques électriques ou magnétiques pour mesurer la longueur, la largeur ou l'épaisseur pour mesurer l'épaisseur
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
Provided is a method for manufacturing a semiconductor silicon wafer capable of inhibiting P-aggregation defects (Si-P defects) and SF in an epitaxial layer. The method includes a step of forming a silicon oxide film with a thickness of at least 300 nm or thicker only on the backside of the silicon wafer substrate by the CVD method at a temperature of 500° C. or lower after the step of forming the silicon oxide film, a step of heat treatment where the substrate is kept in an oxidizing atmosphere at a constant temperature of 1100° C. or higher and 1250° C. or lower for 30 minutes or longer and 120 minutes or shorter after the heat treatment, a step of removing surface oxide film formed on the front surface of the substrate, and a step of depositing a silicon monocrystalline epitaxial layer on the substrate after the step of removing the surface oxide film.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
C23C 16/01 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] sur des substrats temporaires, p. ex. sur des substrats qui sont ensuite enlevés par attaque chimique
The purpose of the present invention is to provide a method for cleaning a silicon wafer in which particles on the front surface and end surface of a silicon wafer are effectively removed by being brushed off, particles that have adhered to the wafer end surface face are inhibited from re-adhering to the wafer surface, and the LPD quality of the silicon wafer is improved. The present invention provides a method for cleaning a silicon wafer in which the surface of a silicon wafer W to be cleaned is made clean by causing the silicon wafer W to rotate and causing cleaning members 3, 4 made from a grouping of a plurality of brushes 11 to rub the surface of a silicon wafer W to be cleaned while being caused to rotate, wherein the cleaning members 3, 4 are caused to rub the center part of the surface of the silicon wafer W, whereupon the cleaning members 3, 4, while being kept in a rubbing state, are moved from the center part to a position at which a portion of the cleaning members 3, 4 hangs over the outer peripheral edge of the silicon wafer W, and the outer periphery end part of the silicon wafer W and the end surface outer periphery of the plurality of brushes 11 are caused to intersect in 4–6 locations (inclusive) with the cleaning members 3, 4 in an overhanging state.
The substrate is doped with P, has a resistivity adjusted to 1.05 mΩ·cm or less, and includes defects, formed in the crystal by the aggregation of P, which are Si—P crystal defects substantially. The method includes a step of forming a silicon oxide film on the backside of the substrate with a thickness of 300 nm or more and 700 nm or less, a step of mirror-polishing the substrate, and after the mirror-polishing step, a heat treatment step of the substrate mounted on a substrate holder made of Si or SiC, on the holder surface a silicon oxide film is formed with the thickness between 200 nm and 500 nm, wherein the thickness X of the silicon oxide film of the holder and the thickness Y of that on the backside of the substrate satisfy a relational expression Y=C−X, where C is a constant between 800 and 1000.
H01L 21/304 - Traitement mécanique, p. ex. meulage, polissage, coupe
H01L 21/3065 - Gravure par plasmaGravure au moyen d'ions réactifs
H01L 21/3205 - Dépôt de couches non isolantes, p. ex. conductrices ou résistives, sur des couches isolantesPost-traitement de ces couches
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
20.
Manufacturing method for semiconductor silicon wafer
3. The method includes steps of mirror-polishing substrates and heat treatment, where after the mirror-polishing step, the substrate is kept at a temperature from 700° C. to 850° for 30 to 120 minutes, then after the temperature rise, kept at a temperature from 1100° C. to 1250° for 30 to 120 minutes, and after cooling, kept at a temperature from 700° C. to 450° C. for less than 10 minutes as an experience time. The heat treatment step is performed in a mixture gas of hydrogen and argon. The method includes an epitaxial layer deposition step to a thickness of 1.3 μm to 10.0 μm.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
21.
METHOD FOR PRODUCING SILICON SINGLE CRYSTAL, AND SINGLE CRYSTAL PULLING APPARATUS
The purpose of the present invention is to make it possible to control a resistivity along an axis direction with high accuracy regardless of the occurrence of first dislocation generation in a single crystal and also make it possible to improve yield. The present invention comprises a step for adding a main dopant to a silicon melt M during the formation of the silicon melt in a crucible 3, a step for growing a single crystal C from the silicon melt having the main dopant added thereto, and a step for adding an auxiliary dopant having a reverse electroconductivity type to that of the main dopant to the silicon melt continuously or intermittently in the step for growing the single crystal, and the present invention is characterized by a step for conveying a chip-like dopant into a chamber using a pushing rod 19 that can advance and retreat relative to the inside of the chamber and is also characterized by making the chip-like dopant that has been conveyed into the chamber by means of the pushing rod fall into a funnel-shaped tool 23 and then putting the chip-like dopant into the silicon melt through a narrow tube provided in the funnel-shaped tool in the step for adding the auxiliary dopant to the silicon melt.
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
The purpose of the present invention is to maintain the value of v/G so as to be uniform when pulling up a silicon monocrystal from a silicon melt by the Czochralski method, and even if the crystal diameter periodically fluctuates, control the amount of change in diameter to within a certain range, and thereby grow a silicon monocrystal having a high defect-free area ratio and a low defect density along the entire length of the crystal. The present invention is a method for manufacturing a silicon monocrystal in which a silicon melt M is formed in a crucible by performing heating by a heater 4 and a silicon monocrystal C is grown by the Czochralski method, the method for manufacturing a silicon monocrystal being provided with: a step in which, in the pulling-up of a straight body part in the manufacture of the silicon monocrystal, the pulling-up speed of the crystal pulled up while being made to rotate about an axis is set so as to be uniform, and the output of the heater is controlled so that the temperature gradient at the solid-liquid interface is uniform; and a step in which during the step for controlling the output of the heater, the crystal rotation speed is controlled so as to maintain the relationship -0.0335 < (diameter change amount/time (mm/min)) < 0.0335.
A method and an apparatus of pulling single crystals are provided that allows adding dopants efficiently into the silicon melt without causing to generate dislocations and obtainment of single crystals with low resistivity, during forming the former half of a product portion after the formation of the shoulder, when pulled up from the silicon melt by the Czochralski method. The method includes steps of forming an inert gas flow G that flows from above toward the silicon melt M1 along the inside of a heat shield 7 disposed to surround the silicon crystal C to be grown in the furnace and expands in radial directions along the surface of the silicon melt and is exhausted to the outside of the furnace, gasifying a dopant in the furnace, discharging the gasified dopant into the inside of the heat shield, and flowing the gasified dopant carried by the inert gas flow.
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
C30B 15/10 - Creusets ou récipients pour soutenir le bain fondu
The occurrence of breaking and chipping at the wafer peripheral edge of a bonded wafer obtained by bonding a lamination wafer on a support wafer is suppressed. A lamination wafer to be bonded to a support wafer includes a large-diameter portion made of a silicon wafer whose peripheral edge is chamfered and a small-diameter portion, whose diameter is smaller than that of the large-diameter portion, formed on the large-diameter portion concentrically and integrally with the large-diameter portion, and the small-diameter portion includes a straight body portion whose side surface is perpendicular to the wafer surface, and a neck portion whose side surface is oblique with a predetermined angle to the wafer between the straight body portion and the large-diameter portion, and the small-diameter portion is formed such that the upper face of the straight body portion is to be bonded to the support wafer.
According to the present invention, there is produced a clean silicon wafer which has less heavy metal contamination on the wafer surface, while being provided with a DZ layer in a device active region in the surface of the silicon wafer that has been subjected to a heat treatment, the DZ layer being free from a micro defect, and also being provided with an IG layer that has a high gettering ability in a bulk layer. A method for producing a silicon wafer, wherein a silicon wafer is subjected to a rapid temperature raising/lowering heat treatment in a furnace. With respect to a thermal budget of the temperature and time, if the thermal budget with which a heat treatment having a maximum temperature of 1350°C is maintained for a predetermined maximum period of time is taken as 100%, the rapid temperature raising/lowering heat treatment is carried out with 53% to 65% of the thermal budget.
H01L 21/26 - Bombardement par des radiations ondulatoires ou corpusculaires
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
26.
METHOD FOR PREDICTING OCCURRENCE OF DEFECT IN EPITAXIAL SILICON WAFER AND METHOD FOR MANUFACTURING EPITAXIAL SILICON WAFER
Provided is a method that is for predicting the occurrence of a defect (stacking fault (SF)) in an epitaxial silicon wafer when the phosphorus concentration is to be defined arbitrarily and crystal thermal hysteresis is present. This method for predicting the occurrence of a defect comprises: a step for calculating a cooling curve of a silicon monocrystal; a step for calculating the concentration of at least interstitial phosphorus in each temperature process from the concentration phosphorus contained as a dopant; a step for calculating the size and density of depositions of phosphorus and silicon at the time of completion of cooling, from the degree of supersaturation of interstitial phosphorus during cooling; and a defect estimation step for estimating the density of defects (stacking faults (SFs)) in a silicon wafer after epitaxial growth, from the size and density of the depositions of phosphorus and silicon.
Provided is a method for producing a silicon monocrystal that suppresses the development of Si-P defects occurring during pull-up of a silicon monocrystalline ingot and thus enables stable production of an epitaxial substrate without depending on variations in an epitaxial growth method or in the process thereof. This method for producing a silicon monocrystal, in which a silicon monocrystal is grown by the Czochralski method, is characterized by comprising adding phosphorus as a dopant and, during the growth of the silicon monocrystal, monitoring and regulating the passage time of each monocrystalline site at 700-600°C in a cooling process to thereby give a silicon monocrystal having an electrical resistivity of 0.6-1.0 mΩ•cm.
3 or more; and then forming an oxide film on the surface of the three-dimensional shape by performing a heat treatment. The three-dimensional structure has a shape having projections and recesses in a thickness direction of the silicon substrate, and a height in the thickness direction of the silicon substrate is between 1 nm and 1000 nm, and preferably between 1 nm and 100 nm.
2 film, nitride film or PE film on each of a measurement wafer, interstitial-oxygen-free reference wafer and standard wafer with known interstitial oxygen concentration; step 2 of measuring IR spectra of the three wafers; step 3 of determining a difference transmission spectrum from the IR spectrum of measurement wafer and that of reference wafer and determining the intensity of an absorption peak corresponding to interstitial oxygen; and step 4 of comparing the peak intensity of the interstitial oxygen and that of standard wafer and calculating the interstitial oxygen concentration in measurement wafer from ratio to the interstitial oxygen concentration of standard wafer.
G01N 21/35 - CouleurPropriétés spectrales, c.-à-d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes en recherchant l'effet relatif du matériau pour les longueurs d'ondes caractéristiques d'éléments ou de molécules spécifiques, p. ex. spectrométrie d'absorption atomique en utilisant la lumière infrarouge
G01N 21/3563 - CouleurPropriétés spectrales, c.-à-d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes en recherchant l'effet relatif du matériau pour les longueurs d'ondes caractéristiques d'éléments ou de molécules spécifiques, p. ex. spectrométrie d'absorption atomique en utilisant la lumière infrarouge pour l'analyse de solidesPréparation des échantillons à cet effet
30.
SILICON WAFER AND METHOD FOR PRODUCING SILICON WAFER
A Czochralski wafer (1) made of silicon, wherein the silicon wafer has an oxygen concentration of a bulk layer (3) of 0.5×1018/cm3or higher and an oxygen concentration of a surface layer (2) up to a depth of 300 nm from the surface of 2×1018/cm3 or higher.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
Provided is a method for heat-treating a silicon wafer in an inert gas atmosphere, wherein it is possible to discharge SiO gas produced in melting a natural oxide film on the surface of the silicon wafer efficiently, to suppress the accumulation of reaction products in the heat treatment chamber, and to prevent slip deterioration. The wafer is held for a period of 5 to 30 sec inclusive, the rotational speed of the wafer is set to 80 to 120 rpm, and further the inert gas supply in the chamber is controlled so that the gas replacement rate is 90% or more in a temperature range of 900 to 1100° C. inclusive.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
The present invention effectively reduces the amount of metal contaminants and carbon components adhering to a silicon raw material while suppressing any increase in cost. A cleaning device 100 for cleaning a silicon raw material S is equipped with a cleaning tank 1 in which a cleaning solution for cleaning the silicon raw material is placed, and a silicon raw material accommodation container 20 that accommodates the silicon raw material and can be immersed in the cleaning tank. The silicon raw material accommodation container has at least a resin container 21 having resistance to the cleaning solution and a silicon plate member 23 positioned inside the resin container.
Provided is a silicon wafer manufacturing method with which it is possible to suppress P aggregation defects (Si-P defects) and suppress SFs of epitaxial films. The present invention comprises: subjecting a substrate produced from an Si single crystal ingot to mirror-finishing, the substrate containing phosphorus (P) as a dopant, having a resistivity of 1.05 mΩcm or less, and having a solid-solution oxygen concentration of 0.9 × 1018atoms/cm322 and Ar as an atmosphere in a furnace during the series of processes; and an epitaxial film formation step of forming an Si single crystal epitaxial film having a thickness of 1.3-10.0 µm after the heat treatment step.
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
34.
METHOD FOR MANUFACTURING SEMICONDUCTOR SILICON WAFER
Provided is a method for manufacturing a silicon wafer that can suppress P aggregation defects (Si–P defects), suppress SF in an epitaxial film, and suppress variation in resistivity. A dopant of a substrate is phosphorus (P), resistivity is adjusted to 1.05 mΩcm or less, the substance of a defect formed by aggregation of P in crystal includes an Si–P crystal defect, and the method includes: a step in which a Si oxide film with a thickness of 300–700 nm is formed on a back surface of the substrate; a mirror-polishing processing step in which the substrate is mirror-polished; and a step in which, after the mirror-polishing step, the substrate is mounted on a substrate retaining member, comprising Si or SiC, on a front surface of which a Si oxide film was formed, the thickness of this Si oxide film being 200–500 nm, the thickness X of this Si oxide film and the thickness Y of the Si oxide film on the back surface of the substrate being within the range of the relational expression Y = C − X, where C is a constant in the range 800–1000.
C23C 16/01 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] sur des substrats temporaires, p. ex. sur des substrats qui sont ensuite enlevés par attaque chimique
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
35.
METHOD FOR MANUFACTURING SEMICONDUCTOR SILICON WAFER
Provided is a method for manufacturing a silicon wafer, the method being capable of suppressing P aggregation defects (Si-P defects) and suppressing stacking faults (SF) in an epitaxial film. This method for manufacturing a silicon wafer comprises: a step for forming a Si oxide film that is at least 300 nm thick via CVD at a temperature of 500°C or lower only on the rear surface of a substrate manufactured from a Si single crystal ingot grown by the Czochralski method; a heat treatment step, which is conducted after the step for forming a Si oxide film, for holding the substrate under an oxidizing atmosphere for 30-120 minutes at a constant temperature of 1100-1250°C; and a surface oxide film removal step, which is conducted after the heat treatment step, for removing the thermal oxide film formed on the surface side of the substrate. The method also includes an epitaxial film forming step, which is conducted after the surface oxide film removal step, for forming a Si single crystal epitaxial film.
C23C 16/01 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] sur des substrats temporaires, p. ex. sur des substrats qui sont ensuite enlevés par attaque chimique
C30B 25/20 - Croissance d'une couche épitaxiale caractérisée par le substrat le substrat étant dans le même matériau que la couche épitaxiale
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
The purpose of the present invention is to provide a method for producing a silicon single crystal, whereby it becomes possible to keep an oxygen concentration required for the improvement in slip resistance by a thermal stress in the crystal and to prevent the occurrence of internal rearrangement upon the pulling up of the silicon single crystal. In a step for growing a straight barrel portion of a silicon single crystal, the correlational formula between the oxygen concentration A (×1018atoms/cm3) in the single crystal and the single crystal pulling up speed B (mm/min) is the formula: B = -1/4A+0.75, and the oxygen concentration in the single crystal is adjusted to A or more and the single crystal pulling up speed is adjusted to B or more.
Provided is a method for producing a silicon single crystal, the method being capable of producing a silicon single crystal having more uniform oxygen concentration distribution in the direction of the length of the silicone crystal. This method for producing a silicon single crystal comprises pulling a silicon single crystal from a silicon melt accommodated in a quartz glass crucible 3 using the Czochralski method and uses a quartz glass crucible for which the ratio t/T of the thickness t of the transparent inner layer to the thickness T of the side wall of the quartz glass crucible is adjusted from the top part to the bottom part of the side wall of the quartz glass crucible, wherein variation in the oxygen concentration in the crystal growth axis direction of the silicon single crystal pulled is within 20%.
Provided are a single crystal pulling method and a single crystal pulling device, whereby, during pulling of a silicon single crystal from a silicon melt by the Czochralski method, a dopant can be efficiently added to a silicon melt without causing dislocation after formation of a shoulder part and during formation of the front half of a product part, and a single crystal having low resistivity can be obtained. The present invention comprises: a step for forming an inert gas flow G which flows over the inside of a heat-shielding plate 7 along a silicon melt surface M1 from above, the heat-shielding plate 7 being arranged so as to surround a silicon single crystal C growing in a furnace, and which spreads radially along the silicon melt surface and is discharged to the outside of a crucible; a step for gasifying a dopant in the furnace; a step for emitting the gasified dopant to the inside of the heat-shielding plate; and a step for causing the gasified dopant to flow along with the inert gas flow.
C30B 15/04 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski en introduisant dans le matériau fondu le matériau à cristalliser ou les réactifs le formant in situ avec addition d'un matériau de dopage, p. ex. pour une jonction n–p
3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
C30B 15/14 - Chauffage du bain fondu ou du matériau cristallisé
2 or less and the existence of strain in each of the sections is determined based on a depolarization value of polarized infrared light, and a screening step where the wafer is evaluated as non-defective when the number of adjacent sections being determined to have strain by the section analysis step does not exceed a predetermined threshold value.
G01N 21/956 - Inspection de motifs sur la surface d'objets
G01B 11/16 - Dispositions pour la mesure caractérisées par l'utilisation de techniques optiques pour mesurer la déformation dans un solide, p. ex. indicateur optique de déformation
G01L 1/24 - Mesure des forces ou des contraintes, en général en mesurant les variations des propriétés optiques du matériau quand il est soumis à une contrainte, p. ex. par l'analyse des contraintes par photo-élasticité
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01N 21/88 - Recherche de la présence de criques, de défauts ou de souillures
41.
LAMINATION WAFER AND LAMINATED-WAFER MANUFACTURING METHOD USING SAME
The present invention addresses the problem of suppressing the occurrence of cracks and chips at a wafer peripheral edge in a laminated wafer obtained by laminating a lamination wafer on a support wafer. A lamination wafer 1 that is bonded on a support wafer 10 includes a large-diameter portion 2 that is formed of a silicon wafer, a peripheral edge of which is chamfered, and a small-diameter portion 3 that is formed on the large-diameter portion concentrically and integrally with the large-diameter portion and that is formed so as to have a smaller diameter than the large-diameter portion, wherein the small-diameter portion has a straight body section 3A, a side surface of which is perpendicular to a wafer surface, and a neck section 3B, a side surface of which is inclined with respect to the wafer surface, between the straight body section and the large-diameter portion; and an upper surface of the straight body section is formed so as to be bonded on the support wafer.
B24B 7/22 - Machines ou dispositifs pour meuler les surfaces planes des pièces, y compris ceux pour le polissage des surfaces planes en verreAccessoires à cet effet caractérisés par le fait qu'ils sont spécialement étudiés en fonction des propriétés de la matière des objets non métalliques à meuler pour meuler de la matière inorganique, p. ex. de la pierre, des céramiques, de la porcelaine
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/304 - Traitement mécanique, p. ex. meulage, polissage, coupe
42.
METHOD FOR MEASURING ULTRA-LOW OXYGEN CONCENTRATION IN SILICON WAFER
Provided is a method for measuring interstitial oxygen concentration in a silicon wafer easily and with good sensitivity using FT-IR. The present invention provides a method for measuring an ultra-low oxygen concentration of less than 1.0×1016atoms/cm322 film, a nitride film, or a PE film having a predetermined thickness on each of a measurement wafer, an interstitial-oxygen-free reference wafer, and a standard wafer having a known interstitial oxygen concentration; a step 2 for measuring the IR spectrum of the measurement wafer, the reference wafer, and the standard wafer obtained in step 1; a step 3 for determining a difference spectrum (transmission spectrum) from the IR spectrum of the measurement wafer and the IR spectrum of the reference wafer, and determining the intensity of an absorption peak corresponding to interstitial oxygen; and a step 4 for comparing the peak intensity of said interstitial oxygen and the peak intensity of interstitial oxygen in the IR spectrum of the standard wafer, and calculating the interstitial oxygen concentration in the measurement wafer from the ratio with respect to the interstitial oxygen concentration of the standard wafer.
G01N 21/3563 - CouleurPropriétés spectrales, c.-à-d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes en recherchant l'effet relatif du matériau pour les longueurs d'ondes caractéristiques d'éléments ou de molécules spécifiques, p. ex. spectrométrie d'absorption atomique en utilisant la lumière infrarouge pour l'analyse de solidesPréparation des échantillons à cet effet
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
43.
Protective-film forming method for semiconductor substrate
A protective-film forming method for a semiconductor substrate suppresses deterioration in the number of LPDs and adhesion of impurities such as particles by forming a new protective-film of a surfactant solution when the semiconductor substrate is detached from a polishing head. The method includes a first protective-film forming process for forming a protective-film by hydrophilizing the front surface of the polished substrate with a surfactant solution and, after the first protective-film forming process, a second protective-film forming process for forming protective-films on the front and back surface of the substrate by detaching the substrate from the polishing head in a state where at least the front surface of the polished semiconductor substrate is in contact with the liquid surface of the protective-film forming treatment liquid comprising a surfactant solution, then by immersing the polished substrate in a protective-film forming treatment liquid.
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
Provided is a method for heat-treating a silicon wafer in an inert gas atmosphere, wherein it is made possible to efficiently exhaust SiO gas produced when a natural oxide film on the surface of the silicon wafer dissolves, inhibit accumulation of a reaction product in a heat-processing chamber, and prevent deterioration of slip. The wafer is held for a period between 5 and 30 seconds inclusive in a temperature range of 900 to 1100°C inclusive, the wafer rotation speed is set to 80 to 120 rpm inclusive, and the feeding of an inert gas into the chamber is controlled so that the gas replacement rate is 90% or above.
A method for manufacturing an epitaxial silicon wafer enables to lower carbon concentration in an epitaxial film. The method forming an epitaxial silicon wafer where an epitaxial film is formed on a silicon wafer in a reaction chamber including a wafer-holding susceptor that separates an upper and lower space communicating through a predetermined gap includes steps of forming a flow of a processing gas flowing laterally along an upper surface of the wafer in the upper space and a flow of a main purging gas flowing towards the susceptor upwardly in the lower space being formed simultaneously, setting a flow rate ratio of the main purging gas flow rate to the processing gas flow rate to be 1.0/100 to 1.5/100 where the processing gas flow rate is set as 100, and controlling a pressure in the upper space to be within an atmospheric pressure ±0.2 kPa at least.
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
H01L 21/687 - Appareils spécialement adaptés pour la manipulation des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide pendant leur fabrication ou leur traitementAppareils spécialement adaptés pour la manipulation des plaquettes pendant la fabrication ou le traitement des dispositifs à semi-conducteurs ou des dispositifs électriques à l'état solide ou de leurs composants pour le maintien ou la préhension en utilisant des moyens mécaniques, p. ex. mandrins, pièces de serrage, pinces
Provided is a method for evaluating a silicon wafer by which it is possible to carry out a non-destructive and non-contact inspection for a slip that exerts an influence on the electrical properties of a semiconductor device while causing as few restrictions as possible on the surface state of the silicon wafer and the processing details thereof. This method for evaluating a silicon wafer comprises: a section analysis step in which a heat-treated single crystal silicon wafer is partitioned into equally spaced sections of between 1 mm2and 25 mm2 inclusive, and the presence or absence of distortion in each of the sections is determined on the basis of a depolarization value of infrared polarization; and a screening step in which sections that were determined in the section analysis step as having distortion and that do not have a number of adjacent sections exceeding a prescribed threshold are evaluated as being of a good quality.
The present invention addresses the problem of highly accurately measuring and evaluating the quantity of metal contamination to a silicon wafer in a high-speed heat treatment device. The present invention is provided with: a step for obtaining a silicon single crystal 10 having an oxygen concentration of 1.3×1018/cm3 or lower by growing the silicon single crystal at a pulling speed of 1.0 mm/min or lower by means of the Czochralski method; a step for cutting out a silicon wafer from a region excluding a region 40 mm to the center side from the head of the silicon single crystal, and a region 40 mm to the center side from the tail; a step for heat treating the silicon wafer by means of a high-speed heat treatment device, and thermally transferring, to the silicon wafer, a contaminant generated from members in a furnace; and a step for measuring a lifetime with respect to the silicon wafer, to which the contaminant is transferred.
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
C30B 15/00 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski
H01L 21/26 - Bombardement par des radiations ondulatoires ou corpusculaires
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/32 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour former des couches isolantes en surface, p. ex. pour masquer ou en utilisant des techniques photolithographiquesPost-traitement de ces couchesEmploi de matériaux spécifiés pour ces couches en utilisant des masques
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
50.
METHOD FOR PRODUCING THREE-DIMENSIONAL STRUCTURE, METHOD FOR PRODUCING VERTICAL TRANSISTOR, WAFER FOR VERTICAL TRANSISTOR, AND SUBSTRATE FOR VERTICAL TRANSISTOR
[Problem] To provide a method for producing a three-dimensional structure, a method for producing a vertical transistor, a wafer for a vertical transistor, and a substrate for a vertical transistor, with which it is possible to suppress the release of Si by thermal treatment and make an interface between an oxide film and a core part consisting mainly of Si relatively smooth. [Solution] This three-dimensional structure is produced by: forming a three-dimensional shape by processing, by etching, a surface layer of a monocrystalline silicon substrate, the surface layer of which has an oxygen concentration of 1×1017atoms/cm3 or greater; and then forming an oxide film on the surface of said three-dimensional shape by performing a thermal treatment. The three-dimensional structure has a shape having projections and recesses in the thickness direction of the silicon substrate, and the height thereof along the thickness direction of the silicon substrate is from 1 nm to 1000 nm, preferably from 1 nm to 100 nm.
A carbon concentration can be measured using a small number of calibration curves even for a silicon wafer containing oxygen at a high concentration. A calibration curve determination method includes determining calibration curves using data sets each including a plurality of data, each data including irradiation dose, oxygen concentration, carbon concentration, and luminescence intensity, the data of each data set having the same irradiation dose and the same oxygen concentration, and the data sets being different in at least one of the irradiation dose and the oxygen concentration, selecting one or more combinations each being a pair of the calibration curves which are equal to each other in the irradiation dose and different from each other in the oxygen concentration, and obtaining a difference between slopes of the paired calibration curves on a log-log plot for each combination.
H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
H01L 29/36 - Corps semi-conducteurs caractérisés par la concentration ou la distribution des impuretés
H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
G01N 21/95 - Recherche de la présence de criques, de défauts ou de souillures caractérisée par le matériau ou la forme de l'objet à analyser
A thermal process is performed in a range in which a process temperature TS attained by a rapid thermal annealing and rapid cooling process device is not less than 1250°C and not more than 1350°C, and a temperature fall rate Rd from the process temperature is not less than 20°C/s and not more than 150°C/s. The process temperature TS and the temperature fall rate Rd are adjusted to lie in a range in which an upper limit of an oxygen partial pressure P in a thermal process atmosphere gas is P = 0.00207TS·Rd - 2.52Rd + 13.3 (expression (A)) and a lower limit of P is P = 0.000548TS·Rd - 0.605Rd - 0.511 (expression (B)).
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
The present invention configures a silicon wafer comprising: a denuded zone (10), which is an outermost layer, in which the concentration of a void-oxygen complex is lower than 1.0×1012/cm3, the void-oxygen complex being a complex of voids and oxygen; an intermediate layer (11), which is formed adjacently to the inner side in the wafer depth direction of the denuded zone (10), in which the concentration of the void-oxygen composite gradually increases within a range of not lower than 1.0×1012/cm3 but lower than 5.0×1012/cm3, from the denuded zone (10) side toward the inside in the thickness direction, and the width of which is determined correspondingly to the width of the denuded zone (10); and a bulk layer (12), which is formed adjacently to the inner side in the wafer depth direction of the intermediate layer (11), in which the concentration of the void-oxygen complex is equal to or higher than 5.0×1012/cm3.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
Provided is a protective film forming method for a semiconductor substrate, which method suppresses deterioration in the number of LPDs by suppressing adhesion of impurities such as particles from new formation of a protective film of an aqueous surfactant solution when the semiconductor substrate is peeled from a polishing head. The protective film forming method for a semiconductor substrate according to the present invention comprises: a first protective film forming process Y1 for forming a protective film by hydrophilizing the surface of the polished semiconductor substrate by an aqueous surfactant solution; and a second protective film forming process Y2 for forming protective films on the obverse surface and the reverse surface of the semiconductor substrate by peeling the semiconductor substrate from the polishing head and immersing the polished semiconductor substrate in a protective film forming treatment liquid in a state in which at least the surface of the polished semiconductor substrate is in contact with the liquid surface of the protective film forming treatment liquid comprising an aqueous surfactant solution after the first protective film forming process Y1.
According to an embodiment, a method of forming a calibration curve is provided. The method includes ion-implanting different doses of an impurity into a plurality of first samples, measuring an intensity of photoluminescence deriving from the impurity by a photoluminescence spectroscopy for the first samples and a second sample made of the same semiconductor. Based on the amount of implanted impurity, the intensity of the photoluminescence, and a concentration of the impurity contained in the second sample measured by a method other than the photoluminescence spectroscopy, a calibration curve is formed.
G01J 3/44 - Spectrométrie RamanSpectrométrie par diffusion
H01J 37/317 - Tubes à faisceau électronique ou ionique destinés aux traitements localisés d'objets pour modifier les propriétés des objets ou pour leur appliquer des revêtements en couche mince, p. ex. implantation d'ions
H01L 21/265 - Bombardement par des radiations ondulatoires ou corpusculaires par des radiations d'énergie élevée produisant une implantation d'ions
G01N 21/95 - Recherche de la présence de criques, de défauts ou de souillures caractérisée par le matériau ou la forme de l'objet à analyser
G01N 21/27 - CouleurPropriétés spectrales, c.-à-d. comparaison de l'effet du matériau sur la lumière pour plusieurs longueurs d'ondes ou plusieurs bandes de longueurs d'ondes différentes en utilisant la détection photo-électrique
The present invention inhibits, in forming a nitride semiconductor layer on a silicon wafer through epitaxial growth, the wafer from breaking or from warping significantly because of extended dislocation. The present invention comprises calculating the shape value of a bevel from the values of parameters and regulating the shape of the bevel so as to make the shape value fall within a prescribed range. The shape value is defined by the formula, a1·tanθ1-a2·tanθ2, wherein: a1 (μm) is the first projected length along a front surface (3) between an intersection of an end face (5) and a first inclined face (6) and an intersection of the front surface (3) and the first inclined face (6); a2 (μm) is the second projected length along a back surface (4) between an intersection of the end face (5) and a second inclined face (7) and an intersection of the back surface (4) and the second inclined surface (7); θ1 is the first inclination angle of the first inclined face (6) from the front surface (3); θ2 is the second inclination angle of the second inclined face (7) from the back surface (4); and T (μm) is the spacing between the front surface (3) and the back surface (4).
C30B 25/18 - Croissance d'une couche épitaxiale caractérisée par le substrat
H01L 21/205 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale en utilisant la réduction ou la décomposition d'un composé gazeux donnant un condensat solide, c.-à-d. un dépôt chimique
57.
Silicon wafer and method for manufacturing the same
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
58.
Thermal treatment method of silicon wafer and silicon wafer
There is provided a thermal treatment method of a silicon wafer. The method includes the successive steps of: (a) terminating silicon atoms existing on an active surface of the silicon wafer with hydrogen, wherein the active surface is mirror-polished, and a semiconductor device is to be formed on the active surface; (b) terminating the silicon atoms existing on the active surface of the silicon wafer with fluorine; (c) rapidly heating the silicon wafer to a first temperature under an inert gas atmosphere or a reducing gas atmosphere, wherein the first temperature is in a range of 1300° C. to 1400° C.; (d) holding the silicon wafer at the first temperature for a certain time; and (e) rapidly cooling the silicon wafer.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/324 - Traitement thermique pour modifier les propriétés des corps semi-conducteurs, p. ex. recuit, frittage
H01L 21/306 - Traitement chimique ou électrique, p. ex. gravure électrolytique
H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface region 1 which is a defect-free region and a bulk region 2 including void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.
H01L 21/26 - Bombardement par des radiations ondulatoires ou corpusculaires
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
61.
Single crystal pulling-up apparatus of pulling-up silicon single crystal and single crystal pulling-up method of pulling-up silicon single crystal
According to one exemplary embodiment, a single crystal pulling-up apparatus of pulling-up silicon single crystals by a Czochralski method, is provided with: a neck diameter measuring portion which measures a diameter of a grown neck portion; a first compensation portion which outputs a first compensated pulling-up speed for the seed crystals based on a difference between a measured value of the diameter of the neck portion and a target value of the neck portion diameter previously stored; a second compensation portion which outputs a second pulling-up speed while limiting an upper limit of the first pulling-up speed to a first limit value; and a crucible rotation number compensation portion which lowers the number of a rotation of a crucible at least in a period where the upper limit of the first pulling-up speed is limited to the first limit value.
A silicon wafer which has DZ layers formed on both sides thereof by heat treatment in an atmosphere of reducing gas (such as hydrogen) or rare gas (such as argon) with a specific temperature profile for heating, holding, and cooling, and which also has a gettering site of BMD in the bulk inside the DZ layer. A silicon wafer which has a silicon epitaxial layer formed on one side thereof. The DZ layer and the silicon epitaxial layer contain dissolved oxygen introduced into their surface parts, with the concentration and distribution of dissolved oxygen properly controlled. Introduction of oxygen into the surface part is accomplished by heat treatment and ensuing rapid cooling in an atmosphere of oxygen-containing gas.
H01L 21/322 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour modifier leurs propriétés internes, p. ex. pour produire des défectuosités internes
H01L 21/20 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale
H01L 21/36 - Dépôt de matériaux semi-conducteurs sur un substrat, p. ex. croissance épitaxiale
H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
H01B 1/12 - Conducteurs ou corps conducteurs caractérisés par les matériaux conducteurs utilisésEmploi de matériaux spécifiés comme conducteurs composés principalement d'autres substances non métalliques substances organiques
C30B 15/00 - Croissance des monocristaux par tirage hors d'un bain fondu, p. ex. méthode de Czochralski
C30B 21/06 - Solidification unidirectionnelle des matériaux eutectiques par tirage à partir d'un bain fondu
C30B 27/02 - Croissance de monocristaux sous un fluide protecteur par tirage à partir d'un bain fondu
C30B 28/10 - Production de matériaux polycristallins homogènes de structure déterminée à partir de liquides par tirage hors d'un bain fondu
C30B 30/04 - Production de monocristaux ou de matériaux polycristallins homogènes de structure déterminée, caractérisée par l'action de champs électriques ou magnétiques, de l'énergie ondulatoire ou d'autres conditions physiques spécifiques en utilisant des champs magnétiques
C30B 23/00 - Croissance des monocristaux par condensation d'un matériau évaporé ou sublimé
C30B 25/00 - Croissance des monocristaux par réaction chimique de gaz réactifs, p. ex. croissance par dépôt chimique en phase vapeur
C30B 28/12 - Production de matériaux polycristallins homogènes de structure déterminée directement à partir de l'état gazeux
C30B 28/14 - Production de matériaux polycristallins homogènes de structure déterminée directement à partir de l'état gazeux par réaction chimique de gaz réactifs
In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200° C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.
H01L 21/31 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour former des couches isolantes en surface, p. ex. pour masquer ou en utilisant des techniques photolithographiquesPost-traitement de ces couchesEmploi de matériaux spécifiés pour ces couches
H01L 21/469 - Traitement de corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour changer les caractéristiques physiques ou la forme de leur surface, p. ex. gravure, polissage, découpage pour y former des couches isolantes, p. ex. pour masquer ou en utilisant des techniques photolithographiquesPost-traitement de ces couches
64.
Method for production of silicon wafer for epitaxial substrate and method for production of epitaxial substrate
3, thereby forming a silicon oxide film on the surface of the silicon wafer, a second step of peeling off the silicon oxide film, and a third step of performing heat treatment on the silicon wafer in a hydrogen atmosphere.
In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.
a is arranged below a second middle position in the pull-up axis direction in the electromagnet 13, and a distance difference d between the first and second middle positions is 0.15 times to 0.55 times the inner diameter R of the crucible 3.
C30B 35/00 - Appareillages non prévus ailleurs, spécialement adaptés à la croissance, à la production ou au post-traitement de monocristaux ou de matériaux polycristallins homogènes de structure déterminée
The present invention provides a method of manufacturing a silicon wafer where a defect does not exist at a wafer surface layer part on which a device is formed, without affecting productivity and production costs of the wafer.
An ingot of a silicon single crystal is grown by way of Czochralski single crystal pulling method, this silicon single crystal ingot is sliced to produce a wafer, then a surface layer of the wafer is annealed for between 0.01 microseconds and 10 seconds (inclusive) by means of a laser spike annealing apparatus such that a temperature of a wafer surface layer part is between 1250° C. and 1400° C. (inclusive).
H01L 21/302 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour changer leurs caractéristiques physiques de surface ou leur forme, p. ex. gravure, polissage, découpage
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