Apparatuses, systems, and methods for artificial intelligence (AI) augmented data analysis can include providing a large language model (LLM), access to a data set. For example, an end user can interact with a user interface on a user device to provide instructions to the LLM to access the data set. In addition, the LLM can be interacted with via the user interface using natural language instructions and LLM output, based on the LLM analysis of the data set, can also be interacted with via the user interface. The LLM output can include one or more visualizations of the data set.
Apparatuses, systems, and methods for test sequence generation to validate a device under test (DUT) can include generating a structured set of test sequence inputs and performing a large language model (LLM) call using the structured set of test sequence inputs. The structured set of test sequence inputs can include parameters associated with the DUT, a list of available tests associated with the DUT, instructions for an LLM to query a database to retrieve test sequence information associated with the DUT, and/or an output structure. The LLM call can be used to generate the test sequence for validating the DUT based on the generated structured set of test sequence inputs.
Apparatuses, systems, and methods for one or more models (e.g., generative Artificial Intelligence (AI) and/or large language model(s)) to determine technical specifications based on input documentation of a device under test (DUT). The model(s) may divide the documentation into portions, iteratively identify technical specifications in the portions, format the specifications, and/or identify duplicative or related specifications for removal or consolidation.
Apparatuses, systems, and methods for extracting structured specification requirements from specification documents associated with a device under test (DUT) can include generating one or more semantic units based on DUT specification documentation and performing a structured large language model (LLM) call to generate test requirements for the DUT based on the generated one or more semantic units and an entity extraction task. The entity extraction task can be defined via a system prompt command that is responsive to presenting an end user with a system prompt for the entity extraction task. The one or more semantic units can be generated via portioning of DUT specification documentation.
Apparatuses, systems, and methods for generative Artificial Intelligence (AI)/Large Language Model (LMM) assisted test system specification based on an initial input of a request for quote (RFQ) or request for information (RFI). An RFQ/RFI document can be provided as input to the AI/LLM model. The AI/LLM model can also receive selection and detection criteria and user-provided input associated with the RFQ/RFI document as guidance for the generative AI/LLM process. The AI/LLM model generate a test system specification from the RFQ/RFI document, with the test system specification fulfilling one or more criteria identified from the RFQ/RFI document.
G06Q 10/20 - Administration de la réparation ou de la maintenance des produits
G06Q 50/00 - Technologies de l’information et de la communication [TIC] spécialement adaptées à la mise en œuvre des procédés d’affaires d’un secteur particulier d’activité économique, p. ex. aux services d’utilité publique ou au tourisme
6.
MATRIX SWITCHING WORKFLOW IN A TEST SYSTEM FOR DEVICE TESTING
A matrix switching workflow allows for extending the virtual device configuration associated with a given single (test) site to multiple (test) sites, and expanding use of a single functional test program/sequence from a single site to multiple sites. Virtual device and connection support in a pin map editor enables mapping between switched instrument channels and switched device under test (DUT) pins on multiple sites, eliminating additional editing work. A switched channels section in a front test program design panel may list fully qualified channel connections to pins configured to a matrix switch. Configurations may be exported based on pin names and not based on the switch channel connection so that the configuration may be applied to switched instrument channels based on the specified pins. In order to avoid entering route/route-group names in the pin map, a specific route/route-group naming scheme may be used.
Systems, methods and devices for performing dynamically controlled battery cell formation. A formation process is performed on a plurality of battery cells. A series connection is established through each of the plurality of battery cells and a cycling device. Each battery cell is coupled to a respective monitoring device to monitor performance during cell formation. The monitoring devices provide indications to a controller when their monitored battery cells experience a status change. Responsive to the indication, instructions are provided for synchronously modifying the series connection through the first battery cell and modifying a voltage amplitude at the cycling device. Modifying the series connection through the first battery cell may include switching a voltage polarity across the first battery cell shorting the series connection around the first battery cell without modifying the series connection through the other battery cells.
Systems, methods, and devices for characterizing a defect of a device-under-test (DUT). A first measurement is performed of a first quantity on the DUT prior to performing a first operation on the DUT, producing a first result. The first operation is performed on the DUT, and subsequently a second measurement of the first quantity is performed on the DUT, producing a second result. A defect class is characterized for the DUT from a plurality of defect classes based on a difference between the first and second results.
Systems, methods and devices for constructing an electrochemical process manifold (EPM) for a battery cell during a formation process. The current through the cell is controllably adjusted to charge or discharge the cell. The temperature and/or pressure may be controllably adjusted along with the current. At each of a plurality of time steps as the current is controllably adjusted, the voltage across the cell is measured and integrated over time to obtain a voltage-hours value for each time step. A data point is stored in memory for each time step that includes the measured voltage, the voltage-hours value, and the current through the cell at the respective time step. The data points for each time step are mapped onto an EPM, and the EPM is stored in a non-transitory computer-readable memory medium.
H01M 10/42 - Procédés ou dispositions pour assurer le fonctionnement ou l'entretien des éléments secondaires ou des demi-éléments secondaires
G01R 31/367 - Logiciels à cet effet, p. ex. pour le test des batteries en utilisant une modélisation ou des tables de correspondance
H01M 10/0525 - Batteries du type "rocking chair" ou "fauteuil à bascule", p. ex. batteries à insertion ou intercalation de lithium dans les deux électrodesBatteries à l'ion lithium
Efficient continuity testing for instruments connected to a mass interconnect. Digital input and output capabilities may be used on each pin of the mass interconnect to test a variety of input/output (I/O) types on a device under test. Each pin of the interconnect may connect to a respective corresponding digital input and digital output in the tester, with the digital input resistively coupled to the digital output. The connectivity of the pin to the digital input and the digital output, and the connectivity between the digital input and the digital output may be implemented with shift registers and a buffer stage, respectively. In some embodiments, the structure may be implemented through parallel I/O blocks, as in a complex programmable logic device (CPLD), field programmable gate array (FPGA), or microcontroller.
An open-loop test system (300, 400) for testing vertical-cavity surface-emitting lasers (306) is provided. A high-speed pulse generator (402, 302) may be used to produce nanoseconds pulses provided to the VCSEL device (306). A high-speed oscilloscope (410) may be used to measure the resultant nanoseconds pulses across the VCSEL device (306). The VCSEL device voltage and VCSEL device current may be obtained from the measured nanosecond pulses according to compensation data (308) derived from the system (300, 400). A pre-test compensation procedure may be used to obtain the compensation data (308), which may include representative characteristics of each system component. The compensation procedure may also include capturing specified pulse trains under different load conditions of the pulse generator (302) to obtain a scaling relationship between the VCSEL device current and an input voltage used for the pulse generation, and also to obtain various parameters later used to derive the accurate VCSEL device voltage and the accurate VCSEL device current.
G01R 27/00 - Dispositions pour procéder aux mesures de résistance, de réactance, d'impédance, ou de caractéristiques électriques qui en dérivent
G01R 31/00 - Dispositions pour tester les propriétés électriquesDispositions pour la localisation des pannes électriquesDispositions pour tests électriques caractérisées par ce qui est testé, non prévues ailleurs
12.
METHOD AND SYSTEM FOR OVER-THE-AIR TESTING OF MILLIMETER WAVE ANTENNA ARRAYS
A system and method for testing (e.g., rapidly and inexpensively) devices such as integrated circuits (IC) with integrated antennas configured for millimeter wave transmission and/or reception. The method may first perform a calibration operation on a reference device under test (DUT). The calibration operation may determine a set of reference DUT FF base functions and may also generate a set of calibration coefficients. After the calibration step using the reference DUT, the resulting reference DUT FF base functions and the calibration coefficients (or reconstruction matrix) may be used in determining far-field patterns of DUTs based on other field measurements, e.g., measurements taken in the near field of the DUT.
A system for emulating an over-the-air environment for testing a light detection and ranging (LiDAR) unit under test (UUT). The system may comprise a lens system that receives light from the LiDAR UUT and a plurality of optical processing chains. The system may generate light into free space based on the optical signals processed by each chain. The system may process received light optically to maintain coherence with light received from the LiDAR unit under test and may process all points in a LiDAR image simultaneously. The system may operate to emulate an over-the-air environment for a time-of-flight LiDAR UUT, a frequency modulated continuous wave (FMCW) LiDAR UUT, and/or a flash LiDAR UUT.
Antenna characterization systems and methods are described for hardware-timed testing of integrated circuits (IC) with integrated antennas configured for over-the-air transmission and/or reception. An IC to be tested (e.g., the device under test (DUT)) may be mounted to an adjustable positioner in an anechoic chamber. Radio frequency (RF) characteristics (e.g., including transmission characteristics, reception characteristics, and/or beamforming characteristics) of the IC may be tested over-the-air using an array of antennas or probes within the anechoic chamber while continually transitioning the adjustable positioner through a plurality of orientations. Counters and reference trigger intelligence may be employed to correlate measurement results with orientations of the DUT.
Antenna characterization systems and methods are described for hardware-timed testing of integrated circuits (IC) with integrated antennas configured for over-the-air transmission and/or reception. An IC to be tested (e.g., the device under test (DUT)) may be mounted to an adjustable positioner in an anechoic chamber. Radio frequency (RF) characteristics (e.g., including transmission characteristics, reception characteristics, and/or beamforming characteristics) of the IC may be tested over-the-air using an array of antennas or probes within the anechoic chamber while continually transitioning the adjustable positioner through a plurality of orientations. Counters and reference trigger intelligence may be employed to correlate measurement results with orientations of the DUT.
Testing devices such as integrated circuits (IC) with integrated antennas configured for millimeter wave (mmW) transmission and/or reception. A DUT may be mounted to an interface in a measurement fixture (e.g., a socket, anechoic chamber, etc.). Power and data connections of the DUT may be tested over the interface, which may also provide connections (e.g., wired) for input/output signals, power, and control and may also provide positioning. Radio frequency (RF) characteristics of the DUT may be tested over-the-air using an array of antennas or probes in the radiating Fresnel zone of the DUT's antennas. Each of the antennas or probes of the array may incorporate a power detector (e.g., a diode) so that the RF radiating pattern may be measured using DC voltage measurements. Measured voltage measurements may be compared to an ideal signature, e.g., voltage measurements expected from an ideal or model DUT.
G01R 21/12 - Dispositions pour procéder aux mesures de la puissance ou du facteur de puissance en utilisant des caractéristiques quadratiques d'éléments de circuit, p. ex. des diodes, pour mesurer la puissance absorbée par des charges d'impédance connue dans des circuits comportant des constantes réparties
17.
OVER-THE-AIR TEST FIXTURE USING ANTENNA ARRAY, METHOD FOR PERFORMING OVER THE AIR PRODUCTION TESTING
Various embodiments are presented of a system and method for testing (e.g., rapidly and cheaply) devices with antennas configured for radio frequency (RF) and/or millimeter wave (mmW) transmission and/or reception. A device to be tested (e.g., the device under test (DUT)) may be mounted to an interface in a measurement fixture (e.g., a socket, anechoic chamber, etc.). Power and data connections of the DUT may be tested over the interface, which may also provide connections for input/output signals, power, and control and may also provide positioning. RF characteristics (e.g., including transmission, reception, and/or beamforming) of the DUT may be tested over-the-air using an array of antennas or probes.
A wireless communications apparatus includes first/second data source/sinks that respectively source/sink PDCP SDU and MAC PDU for transfer to/from a memory unit and hardware accelerators controlled by a control processor (CP). In response to sourcing transmit PDCP SDU for transfer to the memory unit, the CP controls the hardware accelerators to generate and write PDCP, RLC, MAC headers to the memory unit and assemble the generated headers and the transmit PDCP SDU from the memory unit into transmit MAC PDU for provision to the second data sink. In response to sourcing receive MAC PDU for transfer to the memory unit, the CP controls the hardware accelerators to decode PDCP, RLC MAC headers of the receive MAC PDU in the memory unit to determine locations of receive PDCP SDU in the memory unit and fetch the receive PDCP SDU from the determined locations for provision to the first data sink.
H04L 29/08 - Procédure de commande de la transmission, p.ex. procédure de commande du niveau de la liaison
19.
WIRELESS COMMUNICATION SYSTEM THAT PERFORMS BEAM REPORTING BASED ON A COMBINATION OF REFERENCE SIGNAL RECEIVE POWER AND CHANNEL STATE INFORMATION METRICS
A base station receives a report of channel state information (CSI) computation capability from a UE, configures the UE with X and Y values based on the reported computation capability, performs a beam sweep by transmitting direction-unique beams, and receives a beam measurement report from the UE comprising a reference signal receive power (RSRP) of Y strongest beams of the transmitted beams and at least a portion of the CSI of X strongest beams of the Y beams. Based on the beam measurement report, one of the X beams is selected to configure the UE for subsequent data and control channel transmissions. X and Y are positive integers, Y is greater than or equal to X, and Y is at least 1.
H04B 7/08 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station de réception
20.
WIRELESS COMMUNICATION SYSTEM THAT PERFORMS MEASUREMENT BASED SELECTION OF PHASE TRACKING REFERENCE SIGNAL (PTRS) PORTS
A base station (BS) having a plurality of antennas transmits a plurality of spatial streams. Each user equipment (UE) of a plurality of UE estimates common phase error (CPE) of each of two or more of the plurality of spatial streams, measures correlations of the estimated CPE among the two or more of the plurality of spatial streams, and provides feedback about the CPE correlations to the BS. The BS uses the CPE correlation feedback to allocate phase tracking reference signal (PTRS) ports and to map the allocated PTRS ports to demodulation reference signal (DMRS) ports corresponding to the plurality of spatial streams.
Techniques are disclosed related to calibrating and operating a multiple input multiple output (MIMO) radio system. Some embodiments comprise a method wherein a single calibration signal is used to calibrate a MIMO radio system by performing each of time synchronization, phase synchronization, and frequency response correction for multiple receivers. A dual mode calibration may be employed to calibrate a remote transmitter (RT). During a first, Sparse Full System Calibration (SFSC) mode, the RT may be physically connected to the MIMO radio system. In some embodiments, first and second equalizers may be derived for each of the RT and a local transmitter (LT), respectively. During a subsequent, Real-time Calibration (RTC) mode, the RT may be located remotely from the MIMO radio system, and third equalizers may be derived for the LT. The RT may then be calibrated based on an equalizer derived from each of the first, second, and third equalizers.
Methods and systems are disclosed for using a single receiving device, such as a single VSA, to capture and digitize multiple time-domain acquisitions of a repeating signal at different center frequencies, to create a single time-domain waveform having a bandwidth greater than the real-time instantaneous bandwidth of the receiving device. Specifically, one or more signal processing paths may process the multiple digitized acquisitions of the repeating signal, either sequentially or in parallel, such that the processed acquisitions may be aggregated into a representation of one or more repetitions of the repeating signal.
G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
Techniques are disclosed relating to massive MIMO communications. In some embodiments, a base station is configured to dynamically adjust the number of processing elements used for MIMO signal estimation (e.g., the number of MIMO RX chains used for parallel processing). In some embodiments, the number of processing elements may be based on the number of antennas currently being used, the number of spatial streams, interconnect throughput thresholds, sampling rate, etc. In some embodiments, the base station includes configurable MIMO cores configured to dynamically switch between MIMO signal estimation techniques, e.g., on a per-symbol basis. In some embodiments, the base station includes configurable linear decoders configured to separately multiply input matrices and combine or refrain from combining the results based on the number of antennas and/or processing elements currently in use.
H04B 7/04 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées
H04B 7/08 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées à la station de réception
24.
SPECTRAL STITCHING METHOD TO INCREASE INSTANTANEOUS BANDWIDTH IN VECTOR SIGNAL ANALYZERS
Embodiments are described of devices and methods for processing a signal using a plurality of vector signal generators (VSGs). A digital signal may be provided to a plurality of signal paths, each of which may process a respective frequency band of the signal, the respective frequency bands having regions of overlap. The gain and phase of each signal path may be adjusted such that continuity of phase and magnitude are preserved through the regions of overlap. The adjustment of gain and phase may be accomplished by a complex multiply with a complex calibration constant. The calibration constant may be determined for each signal path by comparing the gain and phase of one or more calibration tones generated within each region of overlap. Each signal path may comprise a VSG to convert the respective signal to an analog signal, which may be combined to obtain a composite signal.
G01R 13/02 - Dispositions pour la présentation de variables électriques ou de formes d'ondes pour la présentation sous forme numérique des variables électriques mesurées
G01R 23/165 - Analyse de spectreAnalyse de Fourier en utilisant des filtres
H04B 1/00 - Détails des systèmes de transmission, non couverts par l'un des groupes Détails des systèmes de transmission non caractérisés par le milieu utilisé pour la transmission
25.
PIPELINE LAYERED LDPC DECODING WITH PRECONFIGURED MEMORY ARBITRATION
Layered LDPC decoding with pipelining of the write operation of a current layer and the read operation of the next layer. In order to reduce the occurence of wating time occuring when the read operation of a next layer attempts to read a variable node which was not updated in the current layer, the rows of the macro matrix are re-arranged. Remaining memory access collisions are resolved by an arbitrer which receives and grants memory access requests, and which was preconfigured by a compiler with a table indicating a number of memory accesses without stalling for each variable node, or indicating a read/write pointer which must be attained before granting memory access.
H03M 13/11 - Détection d'erreurs ou correction d'erreurs transmises par redondance dans la représentation des données, c.-à-d. mots de code contenant plus de chiffres que les mots source utilisant un codage par blocs, c.-à-d. un nombre prédéterminé de bits de contrôle ajouté à un nombre prédéterminé de bits d'information utilisant plusieurs bits de parité
H03M 13/00 - Codage, décodage ou conversion de code pour détecter ou corriger des erreursHypothèses de base sur la théorie du codageLimites de codageMéthodes d'évaluation de la probabilité d'erreurModèles de canauxSimulation ou test des codes
Techniques are disclosed relating to synchronization of radios in a large antenna count (LAC) system. In some embodiments, a LAC system includes a plurality of slave radios, a clock and trigger distribution system, and a master device. In these embodiments, the plurality of slave radios are configured to establish a fixed relationship between a reference clock and their respective local clocks. In these embodiments, the master device and plurality of slave radios are configured to generate and align respective common periodic time reference (CPTR) signals, at a lower frequency than the local clocks. In these embodiments, the master device is configured to transmit a trigger signal based on its CPTR and the plurality of slave radios are configured to perform an action based on the trigger at a subsequent edge of their CPTRs. This may allow synchronization of sampling for antennas in a massive MIMO base station, for example. In some embodiments the master device a radio and includes a local clock, is configured to establish and maintain a fixed relationship between a reference clock and its local clock, and is configured to perform an action based on the trigger at the subsequent edge of its CPTR.
H04B 7/04 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées
Techniques are disclosed relating to signaling and frame structure for massive MIMO communication systems. In some embodiments, an apparatus (102) is configured to receive an uplink pilot symbol from a mobile device (106) over a first channel (UL) and receive uplink data from the mobile device over the first channel, where the uplink data is included in one or more orthogonal frequency division multiplexing (OFDM) symbols at a symbol rate. In these embodiments, the apparatus is configured to, determine channel information based on the pilot symbol, precode downlink data based on the channel information, and transmit the precoded downlink data to the mobile device. In these embodiments, a transition interval between receiving the uplink pilot symbol and beginning to transmit the precoded downlink data corresponds to less than five OFDM symbols at the symbol rate. This may facilitate reciprocity-based precoding for fast-moving mobile devices, in some embodiments.
H04B 7/04 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées
Techniques are disclosed relating to a massive MIMO base station architecture. In some embodiments, a base station is configured to combine signals received by multiple antennas and, for at least a subset of processing elements included in the base station, each processing element is configured to operate on a different portion of the combined signals. In these embodiments, each portion includes signals from multiple antennas. In some embodiments, the portions are different time and/or frequency portions of the combined signals. In some embodiments, this distributed processing may allow the number of antennas of the base station to scale dramatically, provide dynamic re-configurability, facilitate real-time reciprocity-based precoding, etc.
H04B 7/04 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées
29.
A FLEXIBLE REAL TIME SCHEDULER FOR TIME DIVISION DUPLEXING AND/OR FREQUENCY DIVISION DUPLEXING
A flexible real-time scheduler for a wireless communication node, enabling the node to communicate with a remote node using dynamically variable frame structure. The scheduler continuously receives map information defining the frame structure of frames in a frame sequence. Each frame includes a plurality of slots (e.g., time slots or frequency slots). The map information specifies for each slot of each frame whether the slot is to be a transmit slot or a receive slot. The scheduler drives a transmitter to transmit during the slots assigned for transmission, and drives a receiver to receive during the slots assigned for reception. (The number of slots per frame and the size of each slot are also configurable.)
H04B 7/26 - Systèmes de transmission radio, c.-à-d. utilisant un champ de rayonnement pour communication entre plusieurs postes dont au moins un est mobile
30.
LOSSLESS TIME BASED DATA ACQUISITION AND CONTROL IN A DISTRIBUTED SYSTEM
Systems and methods for mapping a time-based data acquisition (DAQ) to an isochronous data transfer channel of a network. A buffer associated with the isochronous data transfer channel of the network may be configured. A clock and a local buffer may be configured. A functional unit may be configured to initiate continuous performance of the time-based DAQ, transfer data to the local buffer, initiate transfer of the data between the local buffer and the buffer at a configured start time, and repeat the transferring and initiating transfer in an iterative manner, thereby transferring data between the local buffer and the buffer. The buffer may be configured to communicate data over the isochronous data transfer channel of the network, thereby mapping the time-based DAQ to the isochronous data transfer channel of the network.
A network switch (200) interoperating between real time networks includes a plurality of ports (210a - 210e) and switch circuitry (205) coupled to the plurality of ports. At least one port, e.g., port (210e), is coupled to node operating in the first real time network, e.g., node (300) or real time network (350). Real time network (350) carries first traffic. The first traffic includes best effort traffic and first real time traffic. Additionally, additional ports, such as, port (210a), are configured to couple to a node of a second real time network, such as real time network (250). Real time network (250) carries second traffic and the second traffic includes only second real time traffic. Switch circuitry (205) is coupled to the ports (210a - 210e) and is configured with a mapping that specifies data routing between the ports. Thus, switch circuitry (205) is configured to route packets between a first real time network, such as real time network (350), and the one or more second real time networks, such as real time network (250), based on the mapping and maintains real time behavior between (or of) the first real time traffic and the second real time traffic. During operation, the switch circuitry (205) inserts routing information in packets routed from real time network (250) to real time (network 350) and removes routing information from the packets routed from real time network (350) to real time network (250). Additionally, switch circuitry (205) is configured to route packets to distinct queues for the first traffic and the second traffic for processing by an application executing on at least one device, such as device (325). Further, the routing of the packets to the distinct queues is performed based on the mapping. Ingress and egress of packets to/from the first queue pairs and the second queue pairs are time stamped, and clock synchronization information of the first and second real time networks is correlated based on the time stamps. The real-time networks may be of differing protocols, such as a time-sensitive network as defined by IEEE 802.1 and one or more real-time networks, such as PROFINET isochronous communications, EtherCAT fieldbus system, Ethernet/IP process control and industrial automation applications, and Ethernet Powerlink's deterministic protocol.
System and method for extending programmable device functionality while preserving functionality of the device driver and driver IP. User input may be received specifying functionality of custom IP for a programmable measurement device with standard driver IP. The custom IP may be generated accordingly, and may be deployable to the programmable measurement device. During operation the custom IP may communicate directly with the standard driver IP and may provide custom functionality of the programmable measurement device while preserving functionality of the standard driver IP on the programmable measurement device and the standard device driver.
System and method for editing a graphical diagram. A graphical diagram, such as a graphical program, is displayed on a display device. User input may be received editing the graphical diagram, thereby generating an edited graphical diagram. Placement of one or more elements in the graphical diagram may be adjusted in response to the editing based on determined forces applied to the one or more elements in the edited graphical diagram based on the said editing, resulting in an adjusted edited graphical diagram. The adjusted edited graphical diagram may be displayed on the display device, which may include displaying an animation illustrating the movement of the elements to an equilibrium state in which the forces balance and movement ceases. The editing, adjusting, and displaying may be performed sequentially and/or concurrently, as desired.
A switching element that is at least partially implemented in one or more printed wiring boards (PWBs). A first input and a plurality of outputs may be integrated into the PWB(s). In some embodiments, a plurality of contacts may also be integrated into the PWB(s). The switching element is selectively operable in first and second states, the first state in which the first input is coupled to a first output and the second state in which the first input is coupled to a second output.
G01R 31/28 - Test de circuits électroniques, p. ex. à l'aide d'un traceur de signaux
H04Q 3/545 - Circuits pour sélection indirecte commandée par circuits communs, p. ex. contrôleur d'enregistreur, marqueur dans lesquels les circuits logiques commandant le central sont centralisés utilisant un programme enregistré
35.
MECHANISMS FOR THE CORRECTION OF I/Q IMPAIRMENTS, AND MEASUREMENT OF TRANSMITTER IMPAIRMENTS USING OFFSET LOCAL OSCILLATORS
Mechanisms for reducing I/Q impairments in communication devices are described. A transmitter performs pre-correction on digital I/Q signals before converting them into analog I/Q signals, to pre-compensate for I/Q impairments which will subsequently be introduced during digital-to-analog conversion, I/Q modulation, or other processing that occurs to produce a transmission signal. A receiver receives a transmission signal, produces digital I/Q signals from it, and performs filtering on the digital I/Q signals to correct I/Q impairments at a plurality of frequency offsets. Furthermore, mechanisms for measuring transmitter and/or receiver I/Q impairments are disclosed, including iterative methods for measuring transmitter I/Q impairments using shared local oscillators or using intentionally-offset local oscillators, and methods for measuring receiver I/Q impairments. Also disclosed are methods for computing I/Q impairments from a sampled complex signal, for computing DC properties of a signal path between the transmitter and receiver, and for transforming I/Q impairments through a linear system.
Customizing a test instrument. A plurality of pairs of code modules may be provided. Each pair of code modules may include a first code module having program instructions for execution by a processor of the test instrument and a second code module for implementation on a programmable hardware element of the test instrument. For each pair of code modules, the first code module and the second code module may collectively implement a function in the test instrument. User input may be received specifying modification of a second code module of at least one of the plurality of pairs of code modules. Accordingly, a hardware description may be generated for the programmable hardware element of the test instrument based on the modified second code module.
System and method for transferring data. A system diagram is displayed, where the system diagram includes multiple device icons corresponding to respective devices, each device icon having associated executable function nodes specified for deployment on the corresponding device. The function nodes are interconnected to form a distributed graphical program that is deployable and executable in a distributed manner on the devices. User input is received to the system diagram specifying isochronous data transfer among the function nodes. Invocation timing relationships among the function nodes are automatically determined based on the specified isochronous data transfer, including phase relationships between execution of the function nodes. The determined invocation timing relationships are displayed among the function nodes. The graphical program is deployable and executable in a distributed manner on the devices according to the determined invocation timing relationships, where during execution of the graphical program, data are transferred isochronously between the function nodes.
System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation and explicit declaration of constraints in response to user input. The graphical program includes a specified model of computation, a plurality of interconnected functional blocks that visually indicate functionality of the graphical program in accordance with the specified model of computation, and specifications or constraints for the graphical program or at least one of the functional blocks in the graphical program. The specified model of computation and specifications or constraints are useable to analyze the graphical program or generate a program or simulation.
System and method for editing a graphical program. A graphical program is displayed on a display device. Multi-touch input is received to a multi-touch interface, where the multi-touch input specifies an edit operation in the graphical program. The edit operation is performed in the graphical program in response to the multi-touch input, and the edited graphical program is displayed on the display device.
System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.
System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.
Testing a plurality of communication devices. A plurality of signals may be received from the plurality of communication devices. The plurality of signals may include a signal from each of the plurality of communication devices, where a first subset of the plurality of signals has a different frequency than a second subset of the plurality of signals. The received signals may be combined into a combined signal. The combined signal may be downconverted to a combined signal, e.g., by mixing the combined signal with an output from at least one local oscillator. The downconverting may generate a plurality of lower frequency signals, each corresponding to one of the plurality of received signals. Testing may be performed on each of the plurality of lower frequency signals.
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