The invention is notably directed to a physical reservoir for a magnetic reservoir computing apparatus. The physical reservoir includes a ferromagnetic film, which comprises a two-dimensional arrangement of point deformations. The point deformations are dimensioned to act as pinning sites for magnetic domains of the ferromagnetic film. The invention further concerns a magnetic reservoir computing apparatus comprising such a physical reservoir, as well as methods of operating and fabricating such a reservoir computing apparatus. The proposed approach results in a low-power-consumption physical reservoir, which is easy to fabricate.
G06G 7/00 - Dispositifs dans lesquels l'opération de calcul est effectuée en faisant varier des grandeurs électriques ou magnétiques
G11C 11/16 - Mémoires numériques caractérisées par l'utilisation d'éléments d'emmagasinage électriques ou magnétiques particuliersÉléments d'emmagasinage correspondants utilisant des éléments magnétiques utilisant des éléments dans lesquels l'effet d'emmagasinage est basé sur l'effet de spin
2.
HETEROGENEOUS AUTOMATION SCRIPT MANAGEMENT WITH DYNAMIC ENVIRONMENT PREPARATION
Embodiments of the present invention disclose an approach for managing a plurality of heterogeneous automation scripts with dynamic environment preparation. Specifically, the approach involves allowing users to upload a script to a centralized script manager. The uploaded script is then analyzed to determine the necessary runtime environment and library resources required for successful execution. After resolving the dependencies of the script, an optimal machine on a centralized server is selected for automation. The chosen machine is equipped with the required runtime environment and library resources, which are automatically installed.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
G06F 9/50 - Allocation de ressources, p. ex. de l'unité centrale de traitement [UCT]
3.
VARIABLE REFLECTIVE SURFACE AND SOLAR PANEL CONFIGURATION
Described is a method for managing a trackable solar panel assembly and a variable reflective surface. The method can receive solar farm characteristics and location characteristics for the solar farm. The method can also receive solar panel assembly characteristics for a solar panel assembly and variable reflective surface characteristics for a variable reflective surface. The method can optimize control parameters for the solar panel assembly and the variable reflective surface, based on the solar farm characteristics, the location characteristics, the solar panel assembly characteristics, and the variable reflective surface characteristics. The method can adjust the variable reflective surface based on the control parameters.
A method, computer system, and a computer program product are provided for restoring an interrupted communication session. In one embodiment, the methodology comprises obtaining communication interface and network information from a user required to communicate from a user device with another device. The user communication is then captured between a cunent session using the user device and another device. The context of the captured communication is then determined, and a token is associated with it. The information relating to the cunent session and its context as well as the associated token are stored. This stored information is used to re-establish a new session when the current session is terminated or interrupted prior to resolution. The new session uses the stored information to reestablish communication at the exact process stage where interruption occurred.
H04L 67/146 - Marqueurs pour l'identification sans ambiguïté d'une session particulière, p. ex. mouchard de session ou encodage d'URL
G06Q 30/016 - Fourniture d’une assistance aux clients, p. ex. pour assister un client dans un lieu commercial ou par un service d’assistance après-vente
H04L 51/02 - Messagerie d'utilisateur à utilisateur dans des réseaux à commutation de paquets, transmise selon des protocoles de stockage et de retransmission ou en temps réel, p. ex. courriel en utilisant des réactions automatiques ou la délégation par l’utilisateur, p. ex. des réponses automatiques ou des messages générés par un agent conversationnel
H04L 67/142 - Gestion des états de session pour les protocoles sans étatÉtats des sessions de signalisationSignalisation des états de sessionMécanismes de conservation d’état
H04L 67/145 - Interruption ou inactivation de sessions, p. ex. fin de session contrôlée par un événement en évitant la fin de session, p. ex. maintien en vie, battements de cœur, message de reprise ou réveil pour une session inactive ou interrompue
5.
DIGITAL CIRCUIT, METHOD OF STORING PARAMETERS, AND METHOD OF OUTPUTTING PARAMETERS
A digital circuit according of the invention is a digital circuit provided in a semiconductor device to control analog elements. The digital circuit includes a digital communication circuit, a random access memory, a temporary parameter store, and an output circuit. The digital communication circuit receives a control message including a command and data in one communication transaction. The random access memory stores a look-up table. The look-up table has an address and a data set corresponding to the address. The data set includes a plurality of analog-element control parameters. The temporary parameter store temporarily stores the data received by the digital communication circuit in the communication transaction. The temporary parameter store prepares a data set to be stored to one address of the look-up table. The output circuit outputs a setting-parameter.
A wireless communication device includes a sensor control unit and a sensor unit. The sensor control unit operates in synchronization with a first clock. The sensor unit operates in synchronization with a second clock. The sensor control unit includes a counter. The counter counts rising edges of the first clock from 0 to 2M−1 (M is a natural number). The second clock rises at a rising edge of the first clock when a count value of the counter is 0 and falls at a rising edge of the first clock when the count value of the counter is M. The sensor control unit transmits a control signal to the sensor unit at a rising edge of the first clock when the count value of the counter is M.
A phased array antenna module includes a plurality of antenna elements, a storage region, a temporary parameter store, an address generation unit, and a setting unit. The storage region is configured to store more than 256 items for at least one of intensity setting values and phase setting values. The temporary parameter store temporarily store a part of an address of the storage region. The address generation unit is configured to generate an address of the storage region according to the first address bitgroup stored in the temporary parameter store and the second address bit-group. The setting unit is configured to read at least one of the intensity setting values and the phase setting values by using the address of the storage region. The setting unit is configured to set an intensity and a phase to be set in each of the antenna elements.
H01Q 3/26 - Dispositifs pour changer ou faire varier l'orientation ou la forme du diagramme de directivité des ondes rayonnées par une antenne ou un système d'antenne faisant varier la phase relative ou l’amplitude relative et l’énergie d’excitation entre plusieurs éléments rayonnants actifsDispositifs pour changer ou faire varier l'orientation ou la forme du diagramme de directivité des ondes rayonnées par une antenne ou un système d'antenne faisant varier la distribution de l’énergie à travers une ouverture rayonnante
H01Q 21/24 - Combinaisons d'unités d'antennes polarisées dans des directions différentes pour émettre ou recevoir des ondes polarisées circulairement ou elliptiquement ou des ondes polarisées linéairement dans n'importe quelle direction
H01Q 21/06 - Réseaux d'unités d'antennes, de même polarisation, excitées individuellement et espacées entre elles
H01Q 25/00 - Antennes ou systèmes d'antennes fournissant au moins deux diagrammes de rayonnement
H04B 7/04 - Systèmes de diversitéSystèmes à plusieurs antennes, c.-à-d. émission ou réception utilisant plusieurs antennes utilisant plusieurs antennes indépendantes espacées
8.
INTERCONNECT STRUCTURES WITH OVERLAPPING METAL VIAS
An interconnect structure includes a first via metallization layer having at least a first metal via, a second via metallization layer having at least a second metal via, and a first metallization layer disposed between the first via metallization layer and the second via metallization layer, the first metallization layer comprising a first metal line and a second metal line. The first metal via is disposed on the first metal line and the second metal via is disposed on the second metal line. The second metal via is in an overlapping configuration with the first metal via.
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
A semiconductor device including stacked field effect transistors ( FETs) is provided. The stacked FETs are formed utilizing a process that optimizes the thermal budget without negatively impacting the frontside and/or backside contact structures. The stacked can be designed to have different work function metals and a frontside/backside deep via structure can be provided that has a low area resistance.
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
A trace assist unit operable with a plurality of processor cores is described. The trace assist unit comprises a plurality of physical buffers, and loading circuitry and unloading circuitry that are communicatively coupled with the plurality of physical buffers. The loading circuitry receives trace events from various ones of the plurality of processor cores, each of the trace events having a respective category from a plurality of predefined categories. The loading circuitry writes the trace events to respective ones of the plurality of physical buffers that are assigned to the respective categories of the plurality of predefined categories. The loading circuitry transmits, responsive to one or more predefined conditions, an unload signal to the unloading circuitry to unload contents of a selected physical buffer of the plurality of physical buffers to an external memory.
According to an example of the present subject matter, a secured radio frequency identification device includes: a first radio frequency identification (RFID) tag; and a secured radio frequency identification (RFID) tag having a transmission control for selectively enabling and disabling data transmission from the secured RFID tag. The first RFID tag is to store non-sensitive data from a data set and the secured RFID tag is to store sensitive data from the same data set such that all the data of the data set is only accessible when the secured RFID tag is enabled for data transmission.
Embodiments of present invention provide a magnetoresistive random-access-memory (MRAM). The MRAM includes a reference layer; a tunnel barrier layer of magnesium-oxide (MgO); and a free layer, where the free layer includes a first cobalt-iron-boron (CoFeB) layer on top of the tunnel barrier layer; a spacer layer on top of the first CoFeB layer; a second CoFeB layer on top of the spacer layer; and a capping layer of MgO on top of the second CoFeB layer. Additionally, the first and the second CoFeB layer are substantially depleted of boron (B) to include respectively a first region adjacent to the tunnel barrier layer and the capping layer respectively and a second region adjacent to the spacer layer, where the first regions of the first and the second CoFeB layer include crystallized cobalt-iron (CoFe) and the second regions of the first and the second CoFeB layer include amorphous CoFe alloy.
According to one embodiment, a method, computer system, and computer program product for continuous lighting adjustment through a video stream is provided. The embodiment may include identifying a lighting system. The embodiment may also include determining a lighting goal. The embodiment may further include analyzing a scene in a video stream, wherein one or more lighting features of the video stream are illuminated by the lighting system. The embodiment may also include comparing at least one lighting feature of the scene to the lighting goal. While the lighting goal is not met, the embodiment may include adjusting a lighting system according to the lighting goal, and repeating the analyzing and comparing until the lighting goal is met.
H05B 47/125 - Commande de la source lumineuse en réponse à des paramètres détectés en détectant la présence ou le mouvement d'objets ou d'êtres vivants en utilisant des caméras
G06V 10/00 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos
G06V 10/60 - Extraction de caractéristiques d’images ou de vidéos relative aux propriétés luminescentes, p. ex. utilisant un modèle de réflectance ou d’éclairage
A system and method for improving the performance and reducing costs of a program by automatically provisioning and managing proper memory pool cell size adaptive to each executing application. By collecting time series of historical data on the memory pool usage of applications over a period of time, respective time-series prediction models are used to process the data to predict the allocation size for applications and in particular, a predicted number of allocations and a respective predicted allocation cell size. A clustering-based method is further applied to predict the allocation size for applications, using real time execution to do scaling, complement and interpolation. A method runs a further time-series prediction model trained to predict, based on the predicted memory cell size and one or more application profile features associated with the requesting application, a tuning parameter to refine the memory pool storage area size used for handling memory allocation requests.
The illustrative embodiments provide for dynamic tuning of pre-initialization environment provisioning and management. An embodiment includes accepting a request from a group of applications to generate a performance-based index table for a workload based on a feature of the applications and generating the performance-based index table. The embodiment includes building a label feature by analyzing a static program feature of the applications and the performance-based index table. The embodiment includes constructing, using clustering algorithms, a model for provisioning a pre-initialization environment using the label features. The embodiment includes loading the applications into a pre-initialization environment. The embodiment includes introducing a selection policy for a switch in the pre-initialization environment in multiple applications to balance usage of a resource. The embodiment includes updating input to the model in response to monitoring a traffic of requests and collecting real time runtime data of the workload.
Embodiments of present invention provide a semiconductor structure. The semiconductor structure includes a first transistor having a first source/drain (S/D) region; a second transistor having a second S/D region, the second transistor being stacked on top of the first transistor; and a first S/D contact shared by the first S/D region of the first transistor and the second S/D region of the second transistor, where the first S/D contact has a first portion and a second portion, the first portion being in direct contact with a top surface of the first S/D region of the first transistor and in direct contact with a bottom surface of the second S/D region, and the second portion being in direct contact with an inner sidewall of the second S/D region of the second transistor. A method of manufacturing the semiconductor structure is also provided.
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 21/82 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
Disclosed herein is a computer implemented method of accessing a shared data set using a shared and an exclusive lock. The method comprises: initiating at least one reader thread configured to perform a read operation; recording a reader thread state for the at least one reader thread in a data structure; selectively acquiring the shared lock for the at least one reader thread; implementing processing of the at least one reader thread; selectively interrupting the processing of the at least one reader thread in response to an exclusive lock request; restoring the at least one reader thread state using the reader thread state recorded in the data structure and releasing the shared lock; acquiring an exclusive lock; resuming the processing of the at least one reader thread; reacquiring the shared lock for the at least one reader thread in response to determining a releasing of the exclusive lock.
Described is a method for an augmented Quality of Service (QoS) wireless charging configuration in an Internet of Things (IoT) network for managing wireless charging of devices within an area. The method can identify multiple wirelessly chargeable devices within an area and generate a spatial plan for the area with the multiple wirelessly chargeable devices. The method can further identify a position for each wirelessly chargeable device devices within the spatial plan for the area and determine priority for the identified wirelessly chargeable devices based on status information for each wirelessly chargeable device. The method can adjust a wireless charging signal pattern for the spatial plan based on the priority for the identified wirelessly chargeable devices.
H02J 50/20 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant des micro-ondes ou des ondes radio fréquence
H02J 50/30 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique utilisant de la lumière, p. ex. des lasers
H02J 50/80 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique mettant en œuvre l’échange de données, concernant l’alimentation ou la distribution d’énergie électrique, entre les dispositifs de transmission et les dispositifs de réception
H02J 50/90 - Circuits ou systèmes pour l'alimentation ou la distribution sans fil d'énergie électrique mettant en œuvre la détection ou l'optimisation de la position, p. ex. de l'alignement
19.
VEHICLE INCIDENT DATA RECOVERY OF DISTRIBUTED VEHICLE EVENT DATA
A computer-implemented method for distributing a copy of event data recorder (EDR) data of a vehicle includes sending index information uniquely identifying respective member vehicles of a dynamic vehicle network that include candidate vehicles located within a predetermined geo distance of a host vehicle, sending a fragment of a private key associated with EDR data of the host vehicle to the respective member vehicles of the dynamic vehicle network, distributing segments of replicated EDR data from the host vehicle among the respective member vehicles, and responsive to an expiration of a predetermined lifecycle duration associated with the dynamic vehicle network and an absence of an incident of the host vehicle: disbanding the dynamic vehicle network, and initiating a next dynamic vehicle network including a set of next candidate vehicles.
H04W 4/021 - Services concernant des domaines particuliers, p. ex. services de points d’intérêt, services sur place ou géorepères
H04W 4/46 - Services spécialement adaptés à des environnements, à des situations ou à des fins spécifiques pour les véhicules, p. ex. communication véhicule-piétons pour la communication de véhicule à véhicule
20.
PROCESSING AND ARCHIVING DATA FROM EDGE NODES ACROSS DISTRIBUTED SYSTEMS
A computer-implemented method, according to one approach, includes: detecting new data generated at a first edge node, and causing a first copy of the new data to be transferred to a central data storage location in real-time. A second copy of the new data is also stored in a first location at the first edge node. In response to a predetermined condition being met, a determination is made as to whether any information in the first copy of the new data transferred is missing at the central data storage location. The first copy of the new data is removed from the first location at the first edge node in response to determining that no information in the first copy of the new data transferred is missing at the central data storage location.
The present disclosure relates to a method for detecting information breach in a computer system. The method comprises: detecting a radio frequency signal in an area of the computer system. A set of samples of the radio frequency signal may be input to a machine learning model. An output of the machine learning model may be received. The output indicates whether the detected radio frequency signal is anomalous. An alarm signal may be generated in case the detected radio frequency signal is predicted as an anomalous signal.
A method for medication bolus calculation has been developed. The method includes receiving physiological measurements from an analyte sensor coupled to a user, receiving data corresponding to at least one meal event including a timestamp corresponding to when a meal was consumed, identifying a missed meal event time corresponding to a meal consumed by the user but not to the timestamp of any meal event, the recommended bolus being calculated based, at least in part, upon an length of time elapsed from the missed meal event time to a current time, and generating an output message indicating the recommended bolus of the medication.
G16H 20/17 - TIC spécialement adaptées aux thérapies ou aux plans d’amélioration de la santé, p. ex. pour manier les prescriptions, orienter la thérapie ou surveiller l’observance par les patients concernant des médicaments ou des médications, p. ex. pour s’assurer de l’administration correcte aux patients administrés par perfusion ou injection
G16H 40/63 - TIC spécialement adaptées à la gestion ou à l’administration de ressources ou d’établissements de santéTIC spécialement adaptées à la gestion ou au fonctionnement d’équipement ou de dispositifs médicaux pour le fonctionnement d’équipement ou de dispositifs médicaux pour le fonctionnement local
A61B 5/00 - Mesure servant à établir un diagnostic Identification des individus
A61B 5/145 - Mesure des caractéristiques du sang in vivo, p. ex. de la concentration des gaz dans le sang ou de la valeur du pH du sang
G16H 40/67 - TIC spécialement adaptées à la gestion ou à l’administration de ressources ou d’établissements de santéTIC spécialement adaptées à la gestion ou au fonctionnement d’équipement ou de dispositifs médicaux pour le fonctionnement d’équipement ou de dispositifs médicaux pour le fonctionnement à distance
23.
RECHARGEABLE BATTERY WITH AN SEI PROTECTIVE LAYER ON THE SURFACE OF A METAL ANODE AND METHOD FOR MAKING SAME
αβγδεζηη, where M is a metal, B is boron, C is carbon, N is nitrogen, F is fluorine, X is a non-fluorine halogen species, and 0 is oxygen; α is a number in the range of 0.2-0.4, β is a number in the range of 0.0-0.1, γ is a number in the range of 0.15-0.25, δ is a number in the range of 0.0-0.02, ε is a number in the range of 0.0-0.1, ζ is a number in the range of 0.005-0.02, η is a number in the range of 0.40-0.60, and a, p, y, 6, E, (, and q are selected such that the sum of α+β+γ+δ+ε+ζ+η=1. The SEI surface layer on the metal anode suppresses the formation of dendrites, facilitates the even plating of lithium, limits electrolyte decomposition, and extends battery life.
C23C 22/73 - Traitement chimique de surface de matériaux métalliques par réaction de la surface avec un milieu réactif laissant des produits de réaction du matériau de la surface dans le revêtement, p. ex. revêtement par conversion, passivation des métaux caractérisé par le procédé
H01M 10/0525 - Batteries du type "rocking chair" ou "fauteuil à bascule", p. ex. batteries à insertion ou intercalation de lithium dans les deux électrodesBatteries à l'ion lithium
A semiconductor cell comprises a top FET (106) that contains a first set of silicon nanosheets (114A-114D) and a bottom FET (102) that contains a second set of silicon nanosheets (110A, 110B). The top FET and bottom FET are in a stacked profile. The semiconductor cell comprises a top FET cutout region lateral to the first set of nanosheets and above a portion of the second set of nanosheets. The semiconductor cell also comprises a dielectric fill (118) within the top FET cutout region.
H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
A phase change memory device that includes a composite phase change material layer comprising a mixture of a dispersed phase of a projection material of a first resistivity, and a matrix of a phase-change material of a second resistivity or third resistivity dependent on phase. The first resistivity of the projection material has a resistance that is greater than the second resistance for the phase change material, and is less than the third resistance of the phase change material. The phase change memory device further includes a first electrode; and a second electrode on opposing faces of the composite phase change material layer. The projection material forms a percolated conducting path from the first electrode to the second electrode.
A semiconductor structure includes a first stacked device having a first field-effect transistor containing one or more first nanosheet layers, a second field-effect transistor containing one or more second nanosheet layers; and a first dielectric insulator layer positioned between the first field-effect transistor and the second field-effect transistor, the first dielectric insulator layer having a first width. The semiconductor structure further includes a second stacked device adjacent the first stacked device. The second stacked device having a third field-effect transistor containing one or more third nanosheet layers, a fourth field-effect transistor containing one or more fourth nanosheet layers, and a second dielectric insulator layer positioned between the third field-effect transistor and the fourth field-effect transistor. The second dielectric insulator layer has a second width less than the first width of the first dielectric insulator layer.
H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
An impedance sensing structure is provided and includes a dielectric layer, a spiral electrode pair forming a dual spiral channel on the dielectric layer and having an inlet portion at a central region of the dual spiral channel and an outlet portion at an end of the dual spiral channel, inlet and outlet elements and sensing circuitry. The inlet and outlet elements are coupled with the inlet and outlet portions, respectively, for directing fluid or gas to flow through the dual spiral channel. The sensing circuitry is electrically connected with the spiral electrode pair and configured to sense the particles in the fluid or gas in accordance with an impedance of the spiral electrode pair and the fluid or gas flowing through the dual spiral channel.
G01N 15/10 - Recherche de particules individuelles
G01N 27/06 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la résistance d'un liquide
G01N 27/22 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la capacité
28.
RANSOMWARE MITIGATION USING VERSIONING AND ENTROPY DELTA-BASED RECOVERY
A mitigation system protects data in a data store that is not yet encrypted by a successful ransomware attack against encryption. Data is stored in the data store as a set of versions identified in a data tree, and a version can only be updated by writing a new version to the tree. Access controls to prevent modification of the tree are also in place. Following an attack, a restore function is executed to attempt recovery. This function computes an entropy delta that compares an entropy of an encrypted version, with an entropy of versions of the data not yet encrypted. Based on the computed entropy deltas, the restore function identifies a latest clear version of the data, and a restore operation is then initiated with respect to this version.
G06F 21/56 - Détection ou gestion de programmes malveillants, p. ex. dispositions anti-virus
G06F 11/14 - Détection ou correction d'erreur dans les données par redondance dans les opérations, p. ex. en utilisant différentes séquences d'opérations aboutissant au même résultat
G06F 21/55 - Détection d’intrusion locale ou mise en œuvre de contre-mesures
G06F 21/62 - Protection de l’accès à des données via une plate-forme, p. ex. par clés ou règles de contrôle de l’accès
29.
SEMICONDUCTOR PACKAGE WITH CHIP STACK AND ORTHOGONAL INTERCONNECTION BRIDGE
A package structure includes a substrate having an upper surface; a first chip package positioned on the upper surface of the substrate, the first chip package comprising a first chip having a first integrated circuit connected to a first redistribution layer; a second chip package positioned on the upper surface of the substrate, the second chip package comprising a second chip having a second integrated circuit connected to a second redistribution layer; an orthogonal bridge positioned between the first chip package and the second chip package and having an interconnection to the first redistribution layer and the second redistribution layer; and a heat spreader positioned in direct contact with at least one of the first chip package, the second chip package, or the orthogonal bridge. The orthogonal bridge is arranged substantially orthogonal to the upper surface of the substrate.
H01L 25/065 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans le groupe
H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
Computer-implemented methods for performing enhanced resolution time-domain reflectometry are provided. Aspects include obtaining a plurality of waveforms by transmitting a first pulse on a transmission line, transmitting a second pulse on the transmission line, where the second pulse is transmitted after the first pulse by a delay, and capturing and measuring reflections of the transmitted pulses, wherein the delay corresponding to each of the plurality of waveforms is different. Aspects also include identifying a discontinuity of the transmission line based at least in part on the plurality of waveforms. Based on a determination that the transmission line includes the discontinuity, aspects include calculating third derivative curves for each of the plurality of waveforms and calculating a length of the discontinuity of the transmission line based on the third derivative curves. Aspects also include creating a notification indicating a location and the length of the discontinuity of the transmission line.
A data set is received for training a machine learning model to perform a recognition task. Optimization is performed during training of the machine learning model. The optimization includes at least searching for a minimum value of a loss function, responsive to finding a local minimum, adding an additional term to the loss function, continuing to find another local minimum until a criterion is met, and identifying a global minimum having the lowest minimum value among the found local minima. The machine learning model can be updated with parameters identified at the global minimum.
A sensing structure (101) is provided and includes a tubular element (110) through which a fluid is flowable along a single path, an array of sensors (120 1-5) disposed along a length of the tubular element whereby the fluid is flowable through each of the sensors and sensing circuitry electrically connected with each of the sensors and configured to measure a reactance of each of the sensors and to determine whether any reactance is indicative of a presence of a biological cell in the fluid flowing through the corresponding sensors.
B01L 3/00 - Récipients ou ustensiles pour laboratoires, p. ex. verrerie de laboratoireCompte-gouttes
G01N 33/487 - Analyse physique de matériau biologique de matériau biologique liquide
G01N 27/02 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance
G01N 27/22 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la capacité
G01N 15/12 - Recherche de particules individuelles en mesurant des effets électriques ou magnétiques en observant des changements de résistance ou d’impédance à travers des fentes traversées par des particules individuelles, p. ex. en utilisant le principe de Coulter
33.
COMPACT REPRESENTATION OF TRANSITION SEQUENCES FOR SINGLE-STATE STORAGE
A system-implemented (e.g., computer-implemented) method for generating a set of hashes representing known-good state sequences, in accordance with one aspect of the present invention, includes determining, a priori, all known-good state sequences of a system. Valid paths for the determined known-good state sequences are enumerated by constructing history-incorporating aggregate hashes that represent the states along the paths, whereby the resulting set of hashes represents all valid states as the system traverse through the known-good sequences. The history-incorporating aggregate hashes are stored. A state- advancing call is received from the system, and in response to receiving the call, the stored history- incorporating aggregate hashes are sent to the system.
G06F 21/57 - Certification ou préservation de plates-formes informatiques fiables, p. ex. démarrages ou arrêts sécurisés, suivis de version, contrôles de logiciel système, mises à jour sécurisées ou évaluation de vulnérabilité
H04L 9/00 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité
34.
MULTI-PART TRANSACTION INTEGRITY PROTECTION AND ENCRYPTION
Multi-part transaction integrity protection and encryption is disclosed, including generating, by a first device, a first message authentication code (MAC) for authenticating a plurality of packets of a transaction, the plurality of packets including at least a first packet received from a second device over a data link and a second packet generated by the first device in response to receiving the first packet, wherein the first MAC is generated using data included in the plurality of packets; and sending, by the first device to the second device, the second packet and the first MAC over the data link.
H04L 9/32 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
Devices and methods for detecting the presence and/or monitoring a movement of an analyte contained in a medium. More specifically, a microcapacitive sensing system is provided that includes a planar micro-capacitive sensor array for detecting the presence of an analyte in a sample media. The sensor structure for sensing recognizing or tracking material movement includes a top planar substrate having a first array non-contacting planar conductive electrodes and a bottom planar substrate having a second array of non-contacting planar conductive electrodes overlapping corresponding aligned electrodes in the first array. The overlapping conducting electrodes are triangular shaped to maximize perimeter-to-area ratio. The first and second planar substrates are parallel and sealed to define a volume therebetween for receiving a medium including the analyte to be detected or monitored. The sensing of movement accomplished by measuring a capacitance change between electrodes in the top substrate and aligned electrodes in the bottom substrate.
G01N 27/22 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant l'impédance en recherchant la capacité
A method, system, and computer program product are configured to: initiate a transaction in response to receiving a readiness probe request from a requesting system; set a probe flag for the transaction to a first state; send the transaction to a user application for processing; based on the probe flag being set to the first state, keep updates to recoverable resources in-flight while the user application is processing the transaction; based on the probe flag being set to the first state, roll back the updates to the recoverable resources in response to the user application ending processing the transaction; and send a readiness probe response to the requesting system based on how the user application ended processing the transaction.
H04L 67/025 - Protocoles basés sur la technologie du Web, p. ex. protocole de transfert hypertexte [HTTP] pour la commande à distance ou la surveillance à distance des applications
H04L 67/60 - Ordonnancement ou organisation du service des demandes d'application, p. ex. demandes de transmission de données d'application en utilisant l'analyse et l'optimisation des ressources réseau requises
Converting shared libraries is provided. A shadow shared library is generated based on symbol information of each respective symbol of an original shared library. A symbol receiver that corresponds to the shadow shared library is generated. The symbol receiver corresponding to the shadow shared library and the original shared library are deployed as a microservice on a set of servers.
According to one embodiment, a method, computer system, and computer program product for performing data synchronization between a source DBMS, comprising a trusted database, and a target DBMS, comprising an untrusted datastore and a trusted datastore, is disclosed. The present invention may include upon the source DBMS performing an update to an object in the trusted source database, sending the object change to a trusted data replication engine, encrypting the object change, sending the encrypted object change with a related decryption key to the target DBMS, upon receiving the encrypted object change and the related decryption key at the target DBMS, searching an object related to the object change in the untrusted target data store, identifying a decryption key for the searched object, replacing the identified decryption key by the received decryption key, and integrating the encrypted object change in encrypted form into the untrusted target data store.
G06F 21/62 - Protection de l’accès à des données via une plate-forme, p. ex. par clés ou règles de contrôle de l’accès
G06F 16/27 - Réplication, distribution ou synchronisation de données entre bases de données ou dans un système de bases de données distribuéesArchitectures de systèmes de bases de données distribuées à cet effet
39.
CLIENT-SERVER RESPONSE TIME BASED COMPUTER SYSTEM GEOLOCATION
An embodiment sends, at a first time, from a boundary server to a client system in response to a challenge request, a challenge specifying a computational problem to be solved by the client system, the boundary server specified in a challenge list sent to the client system. An embodiment receives, at a second time, at the boundary server, a challenge response from the client system, the challenge response comprising a solution to the computational problem. An embodiment generates, at the boundary server, a certificate encoding an elapsed time between the first time and the second time, the certificate usable by the client system to prove a location of the client system. An embodiment sends, from the boundary server to the client system, the certificate.
H04L 9/32 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
H04W 4/029 - Services de gestion ou de suivi basés sur la localisation
H04W 12/63 - Sécurité dépendant du contexte dépendant de la localisationSécurité dépendant du contexte dépendant de la proximité
H04W 64/00 - Localisation d'utilisateurs ou de terminaux pour la gestion du réseau, p. ex. gestion de la mobilité
40.
MULTIPOLE BANDPASS FILTER NETWORK BASED ISOLATOR DEVICES
A device comprises filter circuitry and non-linear mixing devices. The filter circuitry comprises a first port, a second port, a first bandpass filter, and a second bandpass filter. The non-linear mixing devices are responsive to control signals to couple poles of the first bandpass filter to respective poles of the second bandpass filter to cause non-reciprocal transmission of signals from the first port to the second port.
H03H 11/38 - Réseaux à transmission unidirectionnelle
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
H03H 7/01 - Réseaux à deux accès sélecteurs de fréquence
H03H 7/52 - Réseaux à transmission unidirectionnelle
A semiconductor structure including a dielectric bar arranged between and physically separating a first source drain region from a second source drain region, a first silicide liner (160) directly beneath the first source drain region, and second silicide liner directly beneath the second source drain region, where the first silicide liner is a different material than the second silicide liner.
An embodiment detects an inter-cloud service negotiation between a plurality of cloud environments, the inter-cloud service negotiation indicating an interaction between the plurality of cloud environments. The embodiment identifies a plurality of local controllers in the plurality of cloud environments, a local controller in the plurality of local controllers being a computer control node configured to manage resources associated a cloud environment in the plurality of cloud environments including a worker, and the worker being a computer execution node configured to execute tasks using resources associated with the cloud environment. The embodiment selects a local controller from among the plurality of local controllers based on a performance metric of the local controller. The embodiment designates the selected local controller as a super controller, the super controller being configured to manage resources associated the plurality of cloud environments including the plurality of local controllers.
G06F 9/50 - Allocation de ressources, p. ex. de l'unité centrale de traitement [UCT]
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
H04L 41/50 - Gestion des services réseau, p. ex. en assurant une bonne réalisation du service conformément aux accords
H04L 67/51 - Découverte ou gestion de ceux-ci, p. ex. protocole de localisation de service [SLP] ou services du Web
A computer-implemented method for transforming a library from a source operating system to a target operating system is disclosed. Thereby, the source OS comprises a source ABI; the target OS comprises a target application ABI; the target ABI is different from the source application binary interface, wherein the library is implemented by a source object file; the source object file is compliant with the source application binary interface and comprising at least a source memory image, source symbol information, and source relocation information, where the source relocation information is free of relative relocation information. The method comprises also creating a target memory image compliant with the target application binary interface and derived from the source memory image, enriching the target memory image with a fixed-length eye-catcher information, and writing the target memory image to a target object file.
A semiconductor structure including a plurality of stacked devices having different gate dielectrics is provided. The different gate dielectrics for the stacked devices are designed to improve the performance and the reliability for each of the stacked devices.
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 27/092 - Transistors à effet de champ métal-isolant-semi-conducteur complémentaires
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
A semiconductor structure including a first transistor comprising a first placeholder and a first gate pitch and a second transistor comprising a second placeholder and a second gate pitch, where the first gate pitch is less than the second gate pitch, and wherein the first placeholder is smaller than the second placeholder.
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
Provided is a system, method, and computer program product for minimizing high resolution tape directory (HRTD) recovery time when a HRTD is invalid. A tape drive may load a tape in the tape drive. In response to receiving a write command or a read command at a beginning of tape (BOT) position, the tape drive may execute the write command or the read command without performing HRTD recovery. In response to receiving the write command or the read command at a position other than the BOT position, the tape drive may determine if the HRTD is valid. In response to determining the HRTD is not valid, the tape drive may clear a timer.
G11B 23/14 - Supports d'enregistrement, non spécifiques du procédé d'enregistrement ou de reproductionAccessoires, p. ex. réceptacles, spécialement adaptés pour coopérer avec des appareils d'enregistrement ou de reproduction permettant de refaire la mise en place à un emplacement donné, p. ex. utilisant des trous à dents
47.
STORAGE POOL RESIZING TO MEET MEMORY ENDURANCE TARGETS
A non-volatile memory includes physical blocks each including a respective plurality of cells, where each cell is capable of storing multiple bits of data. A controller maintains dynamically resizable pools of physical blocks, including at least a low-density pool in which cells are configured to store fewer bits and a high-density pool in which cells are configured to store more bits. The controller repeatedly dynamically resizes the low-density and the high-density pools based on write utilization of the non-volatile memory.
A computer-implemented method includes receiving an image of an article of interest to be evaluated relative to one or more features of interest, identifying a reference feature of a known size in the received image, identifying two or more extremities of the reference feature in the received image and a number of pixels between the two or more extremities of the reference feature, calculating a pixel size for the selected image based on the reference feature size and the number of pixels between the two or more extremities of the reference feature, annotating the received image to include one or more tolerance lines for the one or more features of interest, and determining whether the one or more features of interest in the image comply with the one or more tolerance lines. A computer program product and computer system corresponding to the method are also disclosed.
G06V 10/22 - Prétraitement de l’image par la sélection d’une région spécifique contenant ou référençant une formeLocalisation ou traitement de régions spécifiques visant à guider la détection ou la reconnaissance
G06V 10/24 - Alignement, centrage, détection de l’orientation ou correction de l’image
G06V 10/44 - Extraction de caractéristiques locales par analyse des parties du motif, p. ex. par détection d’arêtes, de contours, de boucles, d’angles, de barres ou d’intersectionsAnalyse de connectivité, p. ex. de composantes connectées
G06V 10/82 - Dispositions pour la reconnaissance ou la compréhension d’images ou de vidéos utilisant la reconnaissance de formes ou l’apprentissage automatique utilisant les réseaux neuronaux
49.
LEARNED JOIN CARDINALITY ESTIMATION USING A JOIN GRAPH REPRESENTATION
Aspects of the invention include techniques for providing a learned join cardinality estimation using a join graph representation. A non-limiting example method includes building a join cardinality estimation model. The model can be built by generating a training query having a known join cardinality, generating an adjacency matrix encoding a join graph of the training query, encoding one side of a diagonal axis of the adjacency matrix, and training the join cardinality estimation model using the encoded adjacency matrix and the known join cardinality. The method includes performing an inference using the join cardinality estimation model. The inference includes a predicted join cardinality for a query. The method includes executing a query execution plan for the query using the predicted join cardinality.
A computer-implemented method for transforming a library from a source operating system to a target operating system is disclosed. Thereby, the source operating system comprises an ABI, the target operating system comprising a target ABI, the target ABI being different from the source ABI, the library being implemented by a source object file that is compliant with the source application binary interface and comprising a source memory image, source symbol and source relocation information. The method comprises also creating a target memory image, that is compliant with the target application binary interface, wherein the target memory is derived from the source memory image, enriching the target memory image with an address information pointing to a variable length information, and writing the target memory image to the target object file to implement the transformed library by the target object file.
An approach is provided for securing a secret for usage by an application utilizing a client to retrieve secrets. A request is sent from a client in a workload container within a trusted execution environment (TEE) to retrieve an encrypted secret from an application programming interface (API) server outside the TEE. The request is hooked and sent to the API server by a proxy or a secret proxy plugin within the TEE. The secret is received from the API server by the proxy or secret proxy plugin. An agent within the TEE is called to request a private key. The agent obtains the private key. The secret is decrypted by using the private key. The decrypted secret is returned to the client by the proxy or secret proxy plugin, which ensures that a plain text version of sensitive information in the decrypted secret is not accessible outside the TEE.
G06F 21/53 - Contrôle des utilisateurs, des programmes ou des dispositifs de préservation de l’intégrité des plates-formes, p. ex. des processeurs, des micrologiciels ou des systèmes d’exploitation au stade de l’exécution du programme, p. ex. intégrité de la pile, débordement de tampon ou prévention d'effacement involontaire de données par exécution dans un environnement restreint, p. ex. "boîte à sable" ou machine virtuelle sécurisée
A semiconductor structure includes a stacked device structure having a first field-effect transistor having a first source/drain region, and a second field-effect transistor vertically stacked above the first field-effect transistor, the second field-effect transistor having a second source/drain region and a gate region having first sidewall spacers. The stacked device structure further includes a frontside source/drain contact disposed on a first portion of a sidewall and a top surface of the second source/drain region, a first metal via connected to the frontside source/drain contact and to a first backside power line, and second sidewall spacers disposed on a first portion of the first metal via. The first sidewall spacers comprise a first dielectric material and the second sidewall spacers comprise a second dielectric material different than the first dielectric material.
H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/165 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée comprenant plusieurs des éléments prévus en dans différentes régions semi-conductrices
A semiconductor structure with a first backside metal level that has a plurality of first type of lines and at least one second type line. The first type of lines have a wider top surface than the bottom surface and have a first width. The first type of lines each connect by a first via to a second backside metal level. Each of first type of lines and the second type line connect by a second via to a through-silicon via. The second type line is narrower than the first type of lines. Each of the second type line is between adjacent first type of lines. The second type line has a top surface that is in the middle of the first type of lines, below the first type of lines, above, or level with the top surface of the first type of lines.
H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
H01L 23/528 - Configuration de la structure d'interconnexion
54.
TRANSISTORS WITH BOTTOM DIELECTRIC ISOLATION AND FULLY SELF-ALIGNED DIRECT BACKSIDE CONTACT
A microelectronic device including a nanosheet transistor that includes a first source/drain (170) and a second source/drain (172), a frontside contact (182) connected to the first source/drain and a backside contact (210) connected to the second source/drain. A plurality of isolation layers is located beneath the nanosheet transistor, and the second source/drain extends through the plurality of isolation layers to connect with the backside contact.
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 29/08 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices avec des régions semi-conductrices connectées à une électrode transportant le courant à redresser, amplifier ou commuter, cette électrode faisant partie d'un dispositif à semi-conducteur qui comporte trois électrodes ou plus
55.
EDGE DEVICE FACILITY TO SELECTIVELY LOCATE MISSING CHAT MESSAGES
Selective locating of missing chat messages for an edge device is provided. The process includes sending a locate chat message request from a user's edge device to at least one other edge device of at least one other participant in a chat with the user via an end-to-end encryption messaging system. The locate chat message request identifies at least one search parameter for at least one missing chat message of the chat on the edge device. The process further includes, based on sending the locate chat message request, receiving at the edge device from the at least one other edge device, the at least one missing chat message of the chat identified via the at least one search parameter.
The present inventive concept provides for a method of microfluid cooling for a non-uniform heatmap. The method includes identifying a plurality of zones of a microelectronic device. A local temperature measurement is obtained for one or more zones of the plurality of zones of the microelectronic device. A voltage is applied to a microfluid in at least a portion of the one or more zones based on the obtained local temperature measurement.
H01L 23/34 - Dispositions pour le refroidissement, le chauffage, la ventilation ou la compensation de la température
H01L 23/473 - Dispositions pour le refroidissement, le chauffage, la ventilation ou la compensation de la température impliquant le transfert de chaleur par des fluides en circulation par une circulation de liquides
Mechanisms are provided for detecting fraudulent user flows associated with a website. User flow data, representing an interaction by a user with content of a website, is received and converted to a vector representation that represents a time series transition from one portion of website content to another of the website. The vector representation is input to a trained sequential machine learning computer model which generates a classification of the vector representation. A determination as to whether or not the user flow data represents a fraudulent user flow is made based on the classification. An output is generated that indicates whether or not the user flow is a fraudulent user flow based on the detection.
Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: examining image layers of a container image and generating, in dependence on the examining, layer dependency relationship data that specifies layer dependency relationships of the container image; storing in a container repository the layer dependency relationship data that specifies layer dependency relationships of the container image; in response to receipt of a download request that specifies a targeted layer of the container image, analyzing relationship data of the layer dependency relationship data; in dependence on the analyzing, identifying a subset of image layers of the container image preceding the targeted layer; and establishing a deployment container image in dependence on the identified subset of image layers.
A semiconductor structure includes a front-end-of-line level including a plurality of field effect transistors. Each field effect transistor includes source/drain regions located on opposite sides of the field effect transistors. A shallow trench isolation region located between adjacent field effect transistors electrically separates the plurality of field effect transistors from one another. The shallow trench isolation region has a tapered profile. A backside isolation region is embedded within the shallow trench isolation region and cuts through the source/drain regions. The backside isolation region has a reverse tapered profile.
An embodiment configures a software robot to operate collaboratively with a plurality of platforms within a work environment. The embodiment decomposes, via the software robot, a request to perform a task received from one of the platforms, into at least one integration-action pair. An integration in this pair represents a configuration to operate on an execution platform within the plurality of platforms where a function is to be executed; an action in the pair represents the function to be performed on the execution platform. Responsive to the determination that the at least one integration-action pair does not exist in a database of integration-action pairs, the embodiment trains the software robot to perform the function on the platform.
A computer-implemented method for live migration of a logical dedicated host and virtual machines (VMs) associated therewith from a first physical server to a second physical server, in accordance with one aspect of the present invention, includes, in response to receiving a request to migrate a logical dedicated host from the first physical server, creating a clone of the logical dedicated host thereby creating a clone dedicated host. The clone dedicated host is provisioned on a second physical server. VMs are migrated from the logical dedicated host to the clone dedicated host. The migration is transparent such that user operations being performed on the VMs continue uninterrupted during the migration. In response to completion of the migrating of the VMs to the clone dedicated host, the logical dedicated host is caused to be de-provisioned from the first physical server.
Systems and techniques that facilitate coupling a superconducting cable to a interconnect chip and a quantum processor. In various embodiments, a system can comprise a quantum processor, one or more interconnect chips, and one or more cable connections. The quantum processor can comprise a plurality of qubits. Additionally, the one or more interconnect chips can be bonded to the quantum processor, and the one or more cable connections can be coupled to the one or more interconnect chips. With embodiments, the one or more interconnect chips can comprise one or more signal routings from the one or more cable connections to the quantum processor. Further, in embodiments, a first signal can pass from the one or more cable connections to at least one of the plurality of qubits.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
According to one embodiment, a method, computer system, and computer program product for mitigating a camera failure during volumetric capture is provided. The embodiment may include monitoring respective status of functionality (SoF) array data structures of a set of cameras tasked with capturing volumetric video of a scene. The set of cameras comprises cameras designated as backup cameras and cameras designated for active volumetric capture. The embodiment may include detecting a failed camera of the cameras designated for active volumetric capture based on evaluation of an SoF array data structure of the failed camera. In response to detecting the failed camera, the embodiment may include determining whether a backup camera of the cameras designated as backup cameras is available to replace the failed camera. In response to determining the backup camera is available, the embodiment may include replacing the failed camera with the backup camera.
A device-implemented method, in accordance with one aspect of the present invention, includes receiving a command having an address field of predefined length. A first subset of bits in the address field identify an external key of a particular tenant, and a second subset of the bits in the address field corresponds to one of a plurality of type keys associated with different data types. The external key identified by the first subset of bits is retrieved. The type key corresponding to the second subset of bits is also retrieved. The tenant and type keys are combined to create a combined key for use in encrypting and/or decrypting data associated with the command.
A device comprises a differential voltage-mode filter circuit comprising first and second voltage-mode filter circuits, and a neutralization network. The first and second voltage-mode filter circuits each comprise a unity gain buffer having a nonzero output impedance. The neutralization network comprises a first neutralization impedance circuit which couples an input of the first voltage-mode filter circuit to an output of the second voltage-mode filter circuit, and a second neutralization impedance circuit which couples an input of the second voltage-mode filter circuit to an output of the first voltage-mode filter circuit. The neutralization network is configured to correct a frequency response of the first and second voltage-mode filter circuits by at least one of cancelling and compensating for at least one transmission zero of a transfer function of each of the first and second voltage-mode filter circuits, which results from the nonzero output impedance of the respective unity gain buffers.
H03H 11/12 - Réseaux sélectifs en fréquence à deux accès utilisant des amplificateurs avec contre-réaction
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
66.
PROCESSING UPDATES IN MULTI-LAYER EDGE ARCHITECTURES
An example system includes a processor to receive state bundles including full state bundles and delta bundles with dependencies corresponding to updates received via a transport layer from a lower layer in a multi-layer edge architecture. The processor can conflate the state bundles to generate ready to be processed bundles. The processor can then process the ready to be processed bundles.
A phase-change memory cell includes an insulating layer; a first electrode embedded in the insulating layer, wherein an outer end of the first electrode is locally flush with an outer surface of the insulating layer; a second electrode, larger than the first electrode, and spaced from the first electrode; a compositionally homogenous crystalline phase change material layer; and a highly oriented seed layer. A crystal structure of the homogenous phase change material layer is correlated with a crystal structure of the highly oriented seed layer. The compositionally homogenous phase change material layer and the highly oriented seed layer are located at least partially between the first and second electrodes.
A thermal interface material (TIM) that includes a thermally reworkable polysiloxane with thermally reversible cycloadduct functionalities on at least one polysiloxane chain is disclosed. A TIM that includes a polysiloxane blended with a crosslinking network having thermally reversible cycloadduct functionalities is disclosed as well. A method of providing a TIM that includes a thermally reversible polymer network, a semiconductor package containing the TIM, and a computing device including the semiconductor package are also disclosed. The thermally reworkable polymer network of the provided TIM includes at least one polysiloxane chain and thermally reversible cycloadduct functionalities.
C08G 77/48 - Composés macromoléculaires obtenus par des réactions créant dans la chaîne principale de la macromolécule une liaison contenant du silicium, avec ou sans soufre, azote, oxygène ou carbone dans lesquels au moins deux atomes de silicium, mais pas la totalité, sont liés autrement que par des atomes d'oxygène
B29C 73/16 - Dispositions ou agents d'autoréparation ou d'auto-obturation des perforations
C08G 77/54 - Composés macromoléculaires obtenus par des réactions créant dans la chaîne principale de la macromolécule une liaison contenant du silicium, avec ou sans soufre, azote, oxygène ou carbone dans lesquels au moins deux atomes de silicium, mais pas la totalité, sont liés autrement que par des atomes d'oxygène liés par l'azote
H01L 23/36 - Emploi de matériaux spécifiés ou mise en forme, en vue de faciliter le refroidissement ou le chauffage, p. ex. dissipateurs de chaleur
69.
REWORKABLE POLYSILOXANES FOR THERMAL INTERFACE MATERIALS
A thermal interface material (TIM) that includes a hydroxy-terminated polysiloxane blended with a catalyst generator is disclosed. When the catalyst generator is activated by a thermal stimulus, it catalyzes cleavage of silicon-oxygen bonds in the hydroxy-terminated polysiloxane. A semiconductor package and a computing device containing the TIM are also disclosed. Additionally, a method of providing a TIM, as well as a semiconductor package containing the TIM are disclosed. Providing the TIM includes blending a hydroxy-terminated polysiloxane with a catalyst generator that cleaves silicon-oxygen bonds when activated by a thermal stimulus.
Intelligent wireless energy sharing is provided. An ad hoc wireless mesh network that includes a plurality of energy nodes is formed using a set of machine learning models. The plurality of energy nodes is comprised of the energy node and a set of other energy nodes. A source energy node and a sink energy node in the plurality of energy nodes is identified using the set of machine learning models in response to forming the ad hoc wireless mesh network. Energy is wirelessly transferred from the energy node as the source energy node to the sink energy node via the ad hoc wireless mesh network utilizing a transceiver.
B60L 53/126 - Procédés pour associer un véhicule et une station de charge, p. ex. en établissant une relation directe entre un transmetteur d'énergie sans fil et un récepteur d'énergie sans fil
B60L 55/00 - Dispositions relatives à la fourniture d'énergie emmagasinée dans un véhicule à un réseau électrique, c.-à-d. du véhicule au réseau [V2G]
H04B 5/00 - Systèmes de transmission en champ proche, p. ex. systèmes à transmission capacitive ou inductive
B60L 53/66 - Transfert de données entre les stations de charge et le véhicule
A system and/or method that can reduce impact of network latency can be provided. Information associated with a user device participating in an online meeting can be determined, for user devices connecting to the online meeting. Based on the information, the user devices can be grouped. For each of the user devices in a group, network quality associated with network connection between a user device in the group and a server managing the online meeting can be evaluated. Based on the network quality, at least one user device in the group can be designated to operate as a sharer device to at least one other user device in the group. The sharer device can be caused to stream data directly from the server during the online meeting. That one other user device can be caused to connect with and stream data from the sharer device.
A semiconductor IC device (50) includes a conductive through device connection. The connection may be located within a double diffusion break (DDB) region (51) that separates active regions (52, 53). The connection may include a faux S/D region (24) between a frontside contact (30) and a backside contact (32). The semiconductor IC device may further include a first (20) and/or second diffusion break isolation rail (22). The connection may be between the first and second diffusion break isolation rails. The connection location within the DDB region may resultantly increase packing densities of the semiconductor IC device. Further, the connection may reduce routing complexities and resistance through the semiconductor IC device, which may improve semiconductor IC device performance. Further, the connection may utilize mirrored structure instances (e.g., frontside contact, backside contact, faux S/D region, or the like) as that are used by microdevices (e.g., transistors, or the like) within the active regions, which may decrease fabrication complexities.
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
H01L 29/66 - Types de dispositifs semi-conducteurs
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
According to one embodiment, a method, computer system, and computer program product for detecting, interpreting, and translating sign language is provided. The present invention may include responding to a detection of an active web conference, by analyzing a user's profile and profiles of an audience of the web conference; capturing gestures and spoken language of a presenter using one or more Internet of Things devices; processing the captured gestures and the spoken language of the presenter to interpret the gestures and the spoken language of the presenter; translating the gestures and the spoken language of the presenter into sign language; generating a digital avatar; and displaying the digital avatar along with dynamic sign language movements using the digital avatar.
A method for accelerated video editing that includes providing a video, segmenting, using a segmentation module, the video into a number of clips, and automatically computing, for each clip of the number of clips, corresponding metadata representing at least one attribute of the clip based on an analysis of contents of each clip of the plurality of clips. A profile script is generated based on the corresponding metadata, the profile script is generated to include one or more editing actions to be performed on a section of the video that corresponds to at least one identified clip from the number of clips. An editing tool is used to automatically edit the video based on the profile script to generate an edited video.
G11B 27/28 - IndexationAdressageMinutage ou synchronisationMesure de l'avancement d'une bande en utilisant une information détectable sur le support d'enregistrement en utilisant des signaux d'information enregistrés par le même procédé que pour l'enregistrement principal
75.
THREE-DIMENSIONAL PRINTING WITH PHOTOSENSITIVE RESIN
A system for three-dimensional (3D) printing. The system includes: a printing head for printing a material including a photosensitive resin; a first ultraviolet (UV) light source; and, a controller configured to direct the printing head to print a layer of the material, calculate an appropriate strength of UV radiation in a first UV beam to solidify the layer, and direct the first UV light source to project the first UV beam at the appropriate strength to the layer, wherein the printing head includes a semitransparent nozzle configured to allow the first UV beam to be transmitted through the semitransparent nozzle.
B29C 64/106 - Procédés de fabrication additive n’utilisant que des matériaux liquides ou visqueux, p. ex. dépôt d’un cordon continu de matériau visqueux
A computer-implemented method, a system and a computer program product for device failure detection are disclosed. In the method, phase-based predictions may be performed on a plurality of storage devices to determine a plurality of sampling scopes and corresponding sampling ratios. The respective sampling scopes may comprise at least one storage device of the plurality of storage devices. A sampling dataset may be obtained by selecting a group of storage devices from the respective sampling scopes with the corresponding sampling ratios. Device failure may be detected for the group of storage devices based on the sampling dataset.
A microelectronic structure including a nanosheet transistor that includes a source/drain. A frontside contact that includes a first section located on the frontside of the source/drain and a via section that extends to the backside of the nanosheet transistor. A shallow isolation layer located around a portion of the via section the first frontside contact. A backside metal line located on a backside surface of the via section and located on a backside surface of the shallow trench isolation layer. A dielectric liner located along a sidewall of the backside metal line and located along a bottom surface of the backside metal line.
H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
H01L 23/485 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes formées de couches conductrices inséparables du corps semi-conducteur sur lequel elles ont été déposées formées de structures en couches comprenant des couches conductrices et isolantes, p. ex. contacts planaires
H01L 23/528 - Configuration de la structure d'interconnexion
H01L 29/775 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à une dimension, p.ex. FET à fil quantique
According to one embodiment, a method, computer system, and computer program product for establishing identity-based hierarchical sessions on a hardware security module (HSM) for binding secure keys to a guest system, is disclosed. The present invention may include establishing a communication channel between the guest system and the HSM, wherein the communication channel is identity-based, end-to-end and encrypted, thereby establishing a session, transferring login information of the guest system through the communication channel to the HSM, maintaining a predefined security level throughout a hierarchy of the sessions, wherein no child session has a higher security level than its parent session, and performing a challenge-response protocol based on a session ownership verification with the guest, such that an HSM generated and secured key is bound to a related session.
H04L 9/32 - Dispositions pour les communications secrètes ou protégéesProtocoles réseaux de sécurité comprenant des moyens pour vérifier l'identité ou l'autorisation d'un utilisateur du système
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
A computer implemented method performs a task for a vehicle. A number of processor units detects a presence of the vehicle on a road. The number of processor units divides the task to be performed for the vehicle into subtasks. The number of processor units assigns the subtasks to Internet of Things nodes on possible paths that the vehicle can travel on the road. The number of processor units processes the subtasks using a set of the Internet of Things nodes on a selected path in the possible paths in real time as the vehicle moves on the selected path to form subtask results. The number of processor units combines the subtask results from the processed subtasks to form a task result for the task.
A method for inference performance in an artificial intelligence model provides reduction of pre-processing overhead. The method includes receiving a plurality of operations associated with the artificial intelligence model. A computational graph for the artificial intelligence model is generated. Each of the operations is categorized into one of three categories including: accelerator designated operations, central processing unit (CPU) designated operations, and undetermined processing designated operations. An estimated processing time is determined for the operations. The operations are inserted into the computational graph. The computational graph is divided into sub-graphs. Edges of the sub-graphs where pre-processing steps will be performed is determined. A conversion is applied to the sub-graphs converting the undetermined processing designated operations, into one of the accelerator designated operations or the CPU designated operations, based on a condition that minimizes a number of the pre-processing steps in the sub-graph.
A signal-analysis-based process for detecting and correcting power feeds is provided. The process includes obtaining voltage waveform data for power feeds connected to a system, and determining for the power feeds, using the obtained voltage waveform data, at least one respective signal characteristic. Further, the process includes comparing the respective signal characteristics of the power feeds to ascertain at least one signal characteristic difference between the power feeds. Based on the at least one signal characteristic difference not exceeding at least one respective difference limit, the process determines that the power feeds are not separately-sourced redundant power feeds connected to the system, and based on determining that the power feeds are not separately-sourced redundant power feeds, the process initiates a corrective action to ensure that the system is connected to separately-sourced redundant power feeds.
H02J 3/00 - Circuits pour réseaux principaux ou de distribution, à courant alternatif
G01R 19/25 - Dispositions pour procéder aux mesures de courant ou de tension ou pour en indiquer l'existence ou le signe utilisant une méthode de mesure numérique
H02J 13/00 - Circuits pour pourvoir à l'indication à distance des conditions d'un réseau, p. ex. un enregistrement instantané des conditions d'ouverture ou de fermeture de chaque sectionneur du réseauCircuits pour pourvoir à la commande à distance des moyens de commutation dans un réseau de distribution d'énergie, p. ex. mise en ou hors circuit de consommateurs de courant par l'utilisation de signaux d'impulsion codés transmis par le réseau
82.
REDUCING THE EFFECTS OF NOISE ON DISCERNMENT OF QUANTUM STATES BY PHASE SHIFTING
A method, system and computer program product for improving discernment between qubit states in superconducting quantum computers. Channels are calibrated to train the kernel to contain the correct calibration data ("kernel states"). After calibrating a channel, testing is performed in which quantum operations are performed on qubits at the same time in adjacent channels, including the recently calibrated channel, to determine if the kernel response differs from the expected kernel response, where the expected kernel response is based on the kernel states of the trained kernel of the recently calibrated channel, beyond a threshold value. If such a situation occurs, then the phase of the signal for the recently calibrated channel is shifted and the process of recalibrating the channel (using the phase shifted signal) and testing is repeated until the difference between the kernel response and the expected kernel response is not beyond the threshold value.
G06N 10/40 - Réalisations ou architectures physiques de processeurs ou de composants quantiques pour la manipulation de qubits, p. ex. couplage ou commande de qubit
G06N 10/70 - Correction, détection ou prévention d’erreur quantique, p. ex. codes de surface ou distillation d’état magique
An organometallic compound, composition, and dry photoresist or hardmask for extreme ultraviolet (EUV) lithography are disclosed. The organometallic compound includes at least one bismuth element selected from Bi(III) and Bi(V). The organometallic compound also includes at least one C1 to C6 alkyl ligand and at least one terminal or bridging ligand A (O, S, or N-R, where the R group in N-R is H or a C1 to C6 alkyl) bonded to the bismuth element. Methods for preparing the dry photoresist or hardmask composition and for using the composition to form patterned material features on a substrate are disclosed as well.
A method, apparatus and computer program product for privacy-preserving homomorphic inferencing using one-hot data representations. In this approach, a client interacting with a cloud-based server submits one-hot maps of a Chinese Remainder Theorem (CRT)-based representation of an data element, and the server expands these maps in an online phase to obtain a full one-hot map for the element. After the server obtains the full one-hot map, it performs an operation, e.g., a comparison operation associated with inferencing on a decision tree, on the one-hot map under homomorphic encryption, and in response generates a result. The result is provided back to the client.
The present inventive concept provides for a method of battery pack thermal and gaseous stress mitigation. The method includes obtaining data related to batteries within a battery pack. Features are extracted from the obtained data related to the batteries. The extracted features include effected batteries, battery positions, gas and temperature measurements, and gas and temperature thresholds. The extracted features are mapped. Effected battery patterns are identified. Space is created between the effected batteries and adjacent batteries based on the identified effected battery patterns.
H01M 10/42 - Procédés ou dispositions pour assurer le fonctionnement ou l'entretien des éléments secondaires ou des demi-éléments secondaires
H01M 10/48 - Accumulateurs combinés à des dispositions pour mesurer, tester ou indiquer l'état des éléments, p. ex. le niveau ou la densité de l'électrolyte
H01M 10/633 - Systèmes de commande caractérisés par des algorithmes, des diagrammes, des détails de logiciel ou similaires
H01M 50/289 - MonturesBoîtiers secondaires ou cadresBâtis, modules ou blocsDispositifs de suspensionAmortisseursDispositifs de transport ou de manutentionSupports caractérisés par des éléments d’espacement ou des moyens de positionnement dans les racks, les cadres ou les blocs
A method for rendering clear visibility through the windscreen of a vehicle. The method includes monitoring, by one or more sensors, visibility of a windscreen, wherein monitoring includes analyzing a level of visibility of the windscreen, generating a visibility score, and responsive to the visibility score falling below a predetermined threshold, converting, dynamically, the windscreen into a display surface. The method further includes analyzing an external sensor feed of a vehicle to identify the visibility of a surrounding area. The method further includes initiating, dynamically, a generative adversarial network (GAN) enabled adaptation of the surrounding area of the vehicle, in real-time, to reconstruct a visual based on the external sensor feed, and rendering, in real-time, the GAN enabled adaptation of the surrounding area of the vehicle on a transparent display layer of the windscreen of the vehicle.
B60K 35/235 - Dispositifs d'affichage "tête haute" [HUD] comportant des moyens de détection de la direction du regard ou de points de repère oculaires du conducteur
B60K 35/40 - Instruments spécialement adaptés à l’amélioration de leur visibilité pour l'utilisateur, p. ex. dispositions antibuée ou antireflet
B60K 35/81 - Dispositions pour la commande des instruments pour la commande des affichages
G06V 20/56 - Contexte ou environnement de l’image à l’extérieur d’un véhicule à partir de capteurs embarqués
An edge device can receive a commercial communication, a scrubbed token list and a telephone number list. Responsive to determining the mobile device is detected in the specific area, whether a telephone number of the mobile device is contained in the telephone number list can be determined. Responsive to determining that the telephone number of the mobile device is contained in the telephone number list, the telephone number of the mobile device, the scrubbed token list and the commercial communication can be communicated to an originating access provider, wherein the originating access provider communicates to the mobile device the commercial communication based, at least in part, upon whether the telephone number of the mobile device matches a token contained in the scrubbed token list.
Described are techniques for defect mitigation in additive manufacturing. The techniques including a system having one or more computer-readable storage media storing a sliced model file of an object to be manufactured and a machine learning model configured to predict an error in the sliced model file and generate corrective printing parameters. The system further includes a Fused Filament Fabrication (FFF) three-dimensional (3D) printer communicatively coupled to the one or more computer-readable storage media. The FFF 3D printer is configured to print the object according to the sliced model file and the corrective printing parameters.
B29C 64/118 - Procédés de fabrication additive n’utilisant que des matériaux liquides ou visqueux, p. ex. dépôt d’un cordon continu de matériau visqueux utilisant un matériau filamentaire mis en fusion, p. ex. modélisation par dépôt de fil en fusion [FDM]
B22F 10/18 - Formation d’un corps vert par mélange de liant avec du métal sous forme de filaments, p. ex. par fabrication à filaments fondus
B22F 10/85 - Acquisition ou traitement des données pour la commande ou la régulation de procédés de fabrication additive
B22F 12/90 - Moyens de commande ou de régulation des opérations, p. ex. caméras ou capteurs
B29C 64/393 - Acquisition ou traitement de données pour la fabrication additive pour la commande ou la régulation de procédés de fabrication additive
Dynamic adjusting of pod resource limits is provided at runtime of a container orchestration platform pod. The process includes deploying a container orchestration platform pod with one or more pod resources in a computing environment, where the pod resources have one or more associated pod resource limits. Further, the process includes monitoring a runtime resource usage of the container orchestration platform pod, and predicting, by a trained machine learning model, upcoming resource usage of the container orchestration platform pod. The predicting uses, at least in part, the monitored runtime resource usage. Further, the process includes dynamically adjusting a pod resource limit of the one or more pod resource limits of the container orchestration platform pod in the computing environment. The dynamically adjusting is based on the monitored runtime resource usage, and the predicted upcoming resource usage.
A data-analysis-based process of controlling a floating solar array location is provided. The process includes providing data analysis-based control of location of the floating solar array on water within a geographical area. The floating solar array has a propulsion system coupled to the floating solar array to facilitate relocating of the floating solar array. The control is configured to identify, using one or more machine learning prediction models, a region of a plurality of regions of the geographical area which meets, for a forecasted time period, a predefined criteria for harvesting energy from the floating solar array. Further, the control is configured to initiate, using the propulsion system, dynamic relocating of the floating solar array to the identified region of the geographical area to facilitate solar energy harvesting from the floating solar array for the forecasted time period.
G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle
A semiconductor structure comprises a first transistor and a second transistor. The first transistor comprises a first input source/drain region and a first output source/drain region, and the second transistor comprises a second input source/drain region and a second output source/drain region. The first input source/drain region and the second input source/drain region are connected to a first source/drain contact, and the first output source/drain region and the second output source/drain region are connected to a second source/drain contact. The first source/drain contact and the second source/drain contact on a same side of the semiconductor structure.
A computer-implemented method, according to one embodiment, for creating a backup copy of a deleted file based on a previous backup copy of the file to be deleted includes creating a deleted data set record associated with a file in association with deletion of the file, wherein the file comprises a file data set. The file data set is removed from a catalog containing the file data set. The method includes freeing physical space associated with the file data set and extracting the file from a most recent backup copy and writing the file to a temporary file in a pre-defined pool space. A file level backup copy is created of the temporary file based on the deleted data set record, and the temporary file and the deleted data set record are deleted.
G06F 11/14 - Détection ou correction d'erreur dans les données par redondance dans les opérations, p. ex. en utilisant différentes séquences d'opérations aboutissant au même résultat
G06F 16/16 - Opérations sur les fichiers ou les dossiers, p. ex. détails des interfaces utilisateur spécialement adaptées aux systèmes de fichiers
According to one embodiment, a method, computer system, and computer program product for 3D printing is provided. The present invention may include identifying one or more physical objects to be infused within an object being 3D printed; generating at least one digital model of the one or more identified physical objects; analyzing a digital model of the object being 3D printed; determining one or more identified physical object that can be infused within the object being 3D printed; modifying the digital model of the object being 3D printed to comprise an internal physical object infused within the object being 3D printed; and printing the object being 3D printed over the internal physical object. Additionally, according to one embodiment, a method for manufacturing a three-dimensional product is provided. Additionally, according to one embodiment, a data processing device for 3D printing is provided.
A method for automatically generating, correlating, and presenting visual content along with an audio stream associated with an audiobook is provided. The method may further include, in response to receiving an audio stream, automatically segmenting the audio stream into audio segments. The method may also include automatically identifying keywords, topics, and entities associated with each audio segment. The method may further include automatically identifying and retrieving visual content related to the identified keywords, topics, and entities of each audio segment from a visual content repository. The method may also include automatically integrating the identified and retrieved visual content with an audio segment. The method may further include automatically generating and displaying the visual content on the display at the designated time during play of the audio stream.
Embodiments of present invention provide a MRAM structure. The structure includes a metallic wire, the metallic wire having a width between a first side and a second side; a length between a first end and a second end; and a lengthwise axis, and being symmetric with respect to the lengthwise axis; a conductive via contacting a first area of the metallic wire; and a magnetic tunnel junction (MTJ) stack placed at a second area of the metallic wire. The MRAM structure is asymmetric with respect to the lengthwise axis to have a second metallic wire formed at the first side of the metallic wire or have the MTJ stack placed asymmetric with respect to the lengthwise axis. A method of forming the MRAM structure is also provided.
Embodiments of the present disclosure provide enhanced systems and methods for predicting optimal design flow parameters for optimized output targets for physical design synthesis of a given IC design. A Variational Autoencoder (VAE) along with a regression network are trained using a dataset comprising synthesis design construction flows from historical IC designs to provide a training data representation of the dataset constrained to a latent space of the VAE. The system generates feature vectors based on the training data representation of the dataset and updates the feature vectors with initial design characteristics of the given IC design. The system iteratively performs an input gradient search of the updated feature vectors to optimize an objective function of the design targets to identify locally optimal design parameters. The system identifies globally optimal design flow parameters for optimized design targets based on locally optimal design parameters.
G06F 30/27 - Optimisation, vérification ou simulation de l’objet conçu utilisant l’apprentissage automatique, p. ex. l’intelligence artificielle, les réseaux neuronaux, les machines à support de vecteur [MSV] ou l’apprentissage d’un modèle
G06N 3/088 - Apprentissage non supervisé, p. ex. apprentissage compétitif
A field effect transistor (FET) device(102). The FET device(102) includes a semiconductor channel(102-C). Additionally, the FET device (102)includes a first gate dielectric in contact with the semiconductor channel(102-C). Further, the FET device(102) includes a metal-insulator-metal (MIM) structure. The MIM structure includes a liner(216-L) comprising a first metal, an insulator, and a second metal. The first metal is in contact with the first gate dielectric. Additionally, the insulator is in contact with the first metal and the second metal. Further, the FET device includes a floating gate(106A-FG). The floating gate(106A-FG) includes the first metal and an extension. Additionally, the extension is disposed to one side of the MIM structure, and includes a surface (106-X)for sensing a sample in contact with the surface(106-X).
G01N 27/414 - Transistors à effet de champ sensibles aux ions ou chimiques, c.-à-d. ISFETS ou CHEMFETS
G01N 27/26 - Recherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en recherchant des variables électrochimiquesRecherche ou analyse des matériaux par l'emploi de moyens électriques, électrochimiques ou magnétiques en utilisant l'électrolyse ou l'électrophorèse
H01L 21/00 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
98.
ROBOTIC PROCESS AUTOMATION USING GENERATED SEMANTIC INFORMATION
An example system includes a processor to detect a non-found element from a robotic process automation (RPA) script executed on an application. The processor can analyze the application to extract a group and a set of elements from the application. The processor can calculate a semantic similarity between the extracted group and a previously extracted group from a previous version of the application. The processor can calculate, in response to detecting that the extracted group is similar to the previously extracted group, a semantic similarity between the extracted set of elements and the non-found element. The processor can re-direct the RPA script to use a most similar element of the extracted set of elements.
G06F 9/455 - ÉmulationInterprétationSimulation de logiciel, p. ex. virtualisation ou émulation des moteurs d’exécution d’applications ou de systèmes d’exploitation
99.
LOOP INDEX SET MERGING OPTIMIZATION FOR PROGRAM INSTRUCTIONS
A computer implemented method for merging loops. A number of processor units identifies loops in computer code. The loops are sequences of instructions that are repeated until conditions for the loops are reached. The number of processor units creates a tree comprising nodes that represent the loops and edges that represent relationships between nodes. The number of processor units utilizes the tree to identify a pair of candidate loops from sibling nodes. The number of processor units creates a new loop from the pair of candidate loops with an expanded iteration space based on iteration spaces for the pair of candidate loops in response to the pair of candidate loops being eligible for merging.
The disclosed resistance switching memory structure (25) includes a dielectric stack of a ferroelectric layer (10) and a paraelectric layer (15) arranged between a first electrode (5) and a second electrode (20). At least the ferroelectric layer produces a negative differential capacitance to amplify an applied voltage. Thicknesses of the ferroelectric layer and the paraelectric layer are selected to result in simultaneous breakdown of the ferroelectric layer and the paraelectric layer for the formation of conductive filaments (60) upon being exposed to an electric field produced by the applied voltage amplified by the negative differential capacitance.