Abrégé

A semiconductor device includes a metal base, a wall, a lid, a semiconductor die, and at least one capacitor. The wall is placed on the metal base, and provides an opening portion inside of the wall. The lid is placed on the wall. The semiconductor die is placed on the metal base. The semiconductor die is surrounded with the wall to be placed in the opening portion. The capacitor is placed on the wall. A first end of the capacitor is electrically connected to the semiconductor die, and a second end of the capacitor is electrically connected to the metal base.

Classes IPC  ?

• H01L 23/64 - Dispositions relatives à l'impédance
• H01L 23/043 - ConteneursScellements caractérisés par la forme le conteneur étant une structure creuse ayant une base conductrice qui sert de support et en même temps de connexion électrique pour le corps semi-conducteur
• H01L 23/08 - ConteneursScellements caractérisés par le matériau du conteneur ou par ses propriétés électriques le matériau étant un isolant électrique, p. ex. du verre
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou

Abrégé

An optical semiconductor element includes a substrate having a first main surface whose plane orientation is {100} and a second main surface provided opposite to the first main surface, and a first semiconductor layer provided on the first main surface and provided with a mesa. The mesa includes a laser portion and an optical amplifier portion. The laser portion includes a first surface perpendicular to the first main surface, and a second surface perpendicular to the first main surface and parallel to the first surface. The optical amplifier portion includes a third surface perpendicular to the first main surface and contiguous with the first surface, a fourth surface perpendicular to the first main surface and contiguous with the second surface, a fifth surface perpendicular to the first main surface and contiguous with the third surface.

Classes IPC  ?

• H01S 5/22 - Structure ou forme du corps semi-conducteur pour guider l'onde optique ayant une structure à nervures ou à bandes
• H01S 5/02 - Détails ou composants structurels non essentiels au fonctionnement laser
• H01S 5/026 - Composants intégrés monolithiques, p. ex. guides d'ondes, photodétecteurs de surveillance ou dispositifs d'attaque
• H01S 5/042 - Excitation électrique
• H01S 5/12 - Structure ou forme du résonateur optique le résonateur ayant une structure périodique, p. ex. dans des lasers à rétroaction répartie [lasers DFB]
• H01S 5/227 - Structure mesa enterrée

Abrégé

A semiconductor device includes a substrate having a main surface and a back surface, and first and second transistors. A first gate wiring is provided on the main surface a disposed in a first source electrode of the first transistor when viewed from a direction, and is electrically connected to a first gate electrode thereof. The second source electrode is interposed between a second gate electrode of the second transistor and a first gate wiring. A back metal layer is provided on the back surface and is electrically connected to the first source electrode and a second source electrode of the second transistor through a first via hole and a second via hole which overlap the first source electrode and the second source electrode, respectively, when viewed in a thickness direction of the substrate.

Classes IPC  ?

• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 23/50 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes pour des dispositifs à circuit intégré
• H01L 27/095 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte à barrière Schottky
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

A semiconductor device includes a substrate, a compound semiconductor layer provided on the substrate, and a plurality of unit FETs arranged in a second direction intersecting a first direction, each of the unit FETs including a source electrode, a drain electrode, a gate electrode interposed between the source electrode and the drain electrode, and a field plate electrode. The plurality of unit FETs include a first unit FET, and a second unit FET close to an end of the plurality of unit FETs in the second direction. A first distance in the second direction between an end of the gate electrode closer to the drain electrode and an end of the field plate electrode closer to the drain electrode in the first unit FET is shorter than a second distance in the second direction therebetween in the second unit FET.

Classes IPC  ?

• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
• H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/40 - Electrodes
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter

Abrégé

A semiconductor device includes a substrate having a main surface and a back surface opposite to the main surface, a first transistor disposed on the main surface, a second transistor disposed on the main surface, a third transistor disposed on the main surface between the first transistor and the second transistor, a first gate line disposed on the main surface, and a back-surface metal layer disposed on the back surface.

Classes IPC  ?

• H01L 27/095 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte à barrière Schottky
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

A semiconductor device includes a substrate having main and back surfaces, and a first transistor and a second transistor. A first end of a via hole which penetrates the substrate and is farther from the second transistor is farther from the second transistor than a second end of an active region which is farther from the second transistor in a region where a first gate electrode of the first transistor is disposed, as viewed from a first direction.

Classes IPC  ?

• H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
• H01L 23/50 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes pour des dispositifs à circuit intégré
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive

Abrégé

A semiconductor device includes a substrate, first FETs having first gate electrodes and arranged in a first direction, second FETs having second gate electrodes and arranged in the first direction, third FETs having third gate electrodes and arranged in the first direction, the second FETs being interposed between the third and the first FETs in a second direction, wherein a first distance between two second gate electrodes with one second gate electrode interposed therebetween in a central portion of the first to third FETs in the first direction is larger than a second distance between two second gate electrodes with one second gate electrode interposed therebetween in a first end portion of the first to third FETs in the first direction, and the second distance is smaller than a third distance between two first gate electrodes with one first gate electrode interposed therebetween in the first end portion.

Classes IPC  ?

• H01L 27/02 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface

Abrégé

An amplifier circuit includes a divider that divides an input signal into a first signal and a second signal, a first amplifier that amplifies the first signal and output a third signal to a first node, a second amplifier that amplifies the second signal and outputs a fourth signal to a second node, a combiner that combines the third signal and the fourth signal and outputs a combined signal to an output terminal as an output signal, and a processing circuit that includes an input node to which the first and the second nodes are electrically coupled, and allows a signal having a frequency lower than an operating band of the first amplifier and the second amplifier to pass through a reference potential, wherein a coupling degree between the first node and the input node is larger than a coupling degree between the second node and the input node.

Classes IPC  ?

• H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs
• H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire

Abrégé

A semiconductor device includes a conductive base, a first chip and a second chip that are mounted on the base, and a first bonding wire that electrically connects the first chip to the second chip and transmits a high frequency signal. The base has a first opening extending through the base in a thickness direction of the base and overlapping at least a part of the first bonding wire with no conductor layer interposed between the first opening and the at least a part of the first bonding wire as viewed in the thickness direction of the base.

Classes IPC  ?

• H01L 23/66 - Adaptations pour la haute fréquence
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 23/495 - Cadres conducteurs
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides

Abrégé

A semiconductor device according to the present disclosure includes a source electrode provided on a substrate, a gate electrode provided-on the substrate and surrounding a part of the source electrode, a drain electrode provided on the substrate and surrounding the gate electrode, and a gate wiring provided on the substrate, wherein a first end of the gate wiring is connected to only one portion of the gate electrode and a second end of the gate wiring is connected to a first gate bus bar.

Classes IPC  ?

• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter

Abrégé

A semiconductor device includes a base, one or a plurality of chips that include a semiconductor chip provided on the base, a first bonding wire connected to at least one of the one or the plurality of chips, a second bonding wire that extends in a direction intersecting with an extending direction of the first bonding wire when viewed from a thickness direction of the base, and a resin layer that is provided on the base and seals the one or the plurality of chips, the first bonding wire and the second bonding wire. The first bonding wire and the second bonding wire are not in contact with each other, and the first bonding wire is contactable with the second bonding wire when the first bonding wire is inclined toward the second bonding wire.

Classes IPC  ?

• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/66 - Adaptations pour la haute fréquence

Abrégé

A package includes a base having a mounting region on which a semiconductor chip is to be mounted, a frame provided on the base so as to surround the mounting region, a first metal layer provided on an upper surface of the frame, the first metal layer including a first portion to which a first bonding wire electrically connecting the semiconductor chip is to be bonded, a second portion farther from the mounting region than the first portion, and a first connecting portion connecting the first portion to the second portion, a first insulating layer provided on the first connecting portion in contact with the first connecting portion, the first insulating layer crossing the first metal layer, and a first lead bonded on the second portion.

Classes IPC  ?

• H01L 23/495 - Cadres conducteurs
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/047 - ConteneursScellements caractérisés par la forme le conteneur étant une structure creuse ayant une base conductrice qui sert de support et en même temps de connexion électrique pour le corps semi-conducteur les autres connexions étant parallèles à la base
• H01L 23/10 - ConteneursScellements caractérisés par le matériau ou par la disposition des scellements entre les parties, p. ex. entre le couvercle et la base ou entre les connexions et les parois du conteneur
• H01L 23/29 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par le matériau
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides

Abrégé

An optical modulator integrated laser includes a substrate, a laser portion provided on the substrate and outputting laser light, an optical modulation portion provided on the substrate and modulating the laser light, and a first terminating portion provided on the substrate and including a first resistive film. The optical modulation portion includes a modulation electrode that is supplied with a modulation signal, a signal pad connected to the modulation electrode and for being connected to a first wire for inputting the modulation signal to the optical modulation portion, and a first pad for being connected to a second wire having a ground potential. The signal pad and one end of the first resistive film are connected to each other. The other end of the first resistive film and the first pad are connected to each other.

Classes IPC  ?

• H01S 5/00 - Lasers à semi-conducteurs
• H01S 5/042 - Excitation électrique

Abrégé

An optical modulator integrated laser includes a substrate, a laser portion provided on the substrate and outputting laser light, an optical modulation portion provided on the substrate and modulating the laser light, and a first terminating portion provided on the substrate and including a first resistive film. The optical modulation portion includes a modulation electrode that is supplied with a modulation signal, a signal pad connected to the modulation electrode and for being connected to a first wire for inputting the modulation signal to the optical modulation portion, and a first pad for being connected to a second wire having a ground potential. The modulation electrode and one end of the first resistive film are connected to each other. Another end of the first resistive film and the first pad are connected to each other.

Classes IPC  ?

• H01S 5/00 - Lasers à semi-conducteurs
• H01S 5/042 - Excitation électrique

Abrégé

An electronic component includes an insulator, a first resistor provided on the insulator, a first electrically insulating film provided on the first resistor to be in contact with the first resistor, and a first metal bonding material provided on the first electrically insulating film to be in contact with the first electrically insulating film and be in contact with a heat sink.

Classes IPC  ?

• H01L 23/367 - Refroidissement facilité par la forme du dispositif
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 23/64 - Dispositions relatives à l'impédance
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A radio frequency amplifier circuit includes a Doherty amplifier including a main amplifier and a peak amplifier. The main amplifier includes a first input end, a first output end, and a first transistor. The main amplifier includes only a first harmonic processing circuit among the first harmonic processing circuit and a first fundamental matching circuit. The peak amplifier includes a second input end, a second output end, and a second transistor. The peak amplifier includes only a second fundamental matching circuit among a second harmonic processing circuit and the second fundamental matching circuit.

Classes IPC  ?

• H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
• H03F 3/24 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C d'étages transmetteurs de sortie

Abrégé

An optical modulator integrated semiconductor laser includes a laser unit outputting a laser beam, an optical modulation unit modulating the laser beam, a signal pad for connection to a first wire for inputting a modulation signal to the optical modulation unit, and a first pad for connection to a second wire holding a ground potential.

Classes IPC  ?

• H01S 5/02345 - Câblage filaire
• H01S 5/026 - Composants intégrés monolithiques, p. ex. guides d'ondes, photodétecteurs de surveillance ou dispositifs d'attaque

Abrégé

A variable-wavelength laser includes a gain region and a wavelength control region alternately arranged along a propagation direction of light, a diffraction grating arranged in each of the gain region and the wavelength control region, and a region located at least one of an end of the gain region and an end of the wavelength control region at a boundary between the gain region and the wavelength control region, the region being without the diffraction grating, wherein a length of the region without the diffraction grating is 5% or more and 30% or less of a length of the gain region or the wavelength control region to which the region belongs.

Classes IPC  ?

• H01S 5/12 - Structure ou forme du résonateur optique le résonateur ayant une structure périodique, p. ex. dans des lasers à rétroaction répartie [lasers DFB]
• H01S 5/026 - Composants intégrés monolithiques, p. ex. guides d'ondes, photodétecteurs de surveillance ou dispositifs d'attaque
• H01S 5/06 - Dispositions pour commander les paramètres de sortie du laser, p. ex. en agissant sur le milieu actif
• H01S 5/50 - Structures amplificatrices non prévues dans les groupes

Abrégé

A semiconductor amplifier circuit includes: a circuit board; a pre-stage amplifier including first and second transistors arranged side by side on the circuit board with a first reference line interposed therebetween; a post-stage amplifier disposed on the circuit board; and an inter-stage circuit formed on the circuit board, in which the inter-stage circuit includes: a phase adjustment line; an internal terminal; and a matching circuit, a first end of the phase adjustment line is connected to the output terminal, and a second end of the phase adjustment line is connected to the internal terminal, an input terminal of the matching circuit is connected to the internal terminal, and an output terminal of the matching circuit is connected to an input terminal of the post-stage amplifier, the first end and the second end are arranged on the first reference line, and the phase adjustment line has a line-symmetric shape.

Classes IPC  ?

• H03F 3/04 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs
• H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs

Abrégé

A semiconductor device includes a substrate, a first nitride semiconductor layer, a first metal layer, a b second metal layer, a third metal layer, and a fourth metal layer. The substrate, first nitride semiconductor layer, and first metal layer have a through-hole that penetrates the substrate, first nitride semiconductor layer, and first metal layer and to which the second metal layer is exposed. The first metal layer makes an Ohmic contact with the first nitride semiconductor layer. Resistance of the second metal layer to etching using a reactive gas is higher than resistance of the first metal layer to etching using the reactive gas. Resistivity of the third metal layer is lower than resistivity of the first metal layer and resistivity of the second metal layer. The fourth metal layer is on an inner surface of the through-hole and is in direct contact with the second metal layer.

Classes IPC  ?

• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 21/311 - Gravure des couches isolantes
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

An optical semiconductor device includes, an optical amplifier portion configured to amplify a laser beam, a plurality of wiring pads for causing electric current to flow to the optical amplifier portion, and bonding wires. The optical amplifier portion includes a plurality of electrodes divided from each other in an optical axis direction. The number of the plurality of electrodes is greater than the number of the plurality of wiring pads. The bonding wires each connect a corresponding one of the plurality of electrodes to one of the plurality of wiring pads.

Classes IPC  ?

• H01S 5/02345 - Câblage filaire
• H01S 5/02325 - Composants intégrés mécaniquement aux éléments de montage ou aux micro-bancs optiques
• H01S 5/12 - Structure ou forme du résonateur optique le résonateur ayant une structure périodique, p. ex. dans des lasers à rétroaction répartie [lasers DFB]
• H01S 5/50 - Structures amplificatrices non prévues dans les groupes

Abrégé

A matching circuit board includes a first substrate, a second substrate, and a third substrate. The first substrate includes a first insulator, a first metal pattern, and first conductive vias. The second substrate includes a second insulator, a second metal pattern, and second conductive vias. The third substrate includes a third insulator and a third metal pattern. A capacitor is constituted by the first metal pattern, the second insulator, and the second metal pattern, and a capacitor is constituted by the first metal pattern, the first insulator, and the third metal pattern. The second metal pattern is electrically connected to the third metal pattern through the second conductive vias and the first conductive vias. The first metal pattern is separated from the first conductive vias to be positioned inside the first conductive vias, and is insulated from the first conductive vias.

Classes IPC  ?

• H05K 1/02 - Circuits imprimés Détails
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H05K 1/16 - Circuits imprimés comprenant des composants électriques imprimés incorporés, p. ex. une résistance, un condensateur, une inductance imprimés

Abrégé

The passive element includes a semiconductor substrate, a first insulating film, a first metal pad, a first conductor, and a first conductive film. The semiconductor substrate has p-type or n-type conductivity, and has a main surface and a back surface. The first insulating film is provided on a first region in the main surface of the semiconductor substrate. The first metal pad is provided on the first insulating film. The first conductor extends from the first metal pad in the first direction. The first conductive film is provided on a second region adjacent to the first region in a first direction in the main surface of the semiconductor substrate. The first conductive film is in ohmic contact with the main surface of the semiconductor substrate, and has an electrical resistivity lower than an electrical resistivity of the semiconductor substrate.

Classes IPC  ?

• H01L 29/94 - Dispositifs à métal-isolant-semi-conducteur, p.ex. MOS
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/18 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types prévus dans plusieurs différents groupes principaux de la même sous-classe , , , , ou
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

A semiconductor device of the present disclosure includes a substrate; a buffer layer above the substrate; a barrier layer on the buffer layer; an electron traveling layer on the barrier layer; and an electron supply layer above the electron traveling layer. The electron traveling layer is thinner than the buffer layer. A band gap of the barrier layer is larger than a band gap of the buffer layer and a band gap of the electron traveling layer.

Classes IPC  ?

• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV

Abrégé

An optical semiconductor element includes a substrate having a first main surface whose plane orientation is {100}, a first semiconductor layer provided on the first main surface and in which a mesa is formed, and a second semiconductor layer. The mesa has a laser portion and an optical amplifier portion. The laser portion has a first surface and a second surface. The optical amplifier portion has a third surface, a fourth surface, a fifth surface, a sixth surface, and an end surface. A first distance is smaller than a second distance. The first surface and the second surface are parallel to a {01-1} plane of the substrate. The end surface is perpendicular to the {01-1} plane. In a plane parallel to the first main surface, the third surface and the fourth surface are inclined from the {01-1} plane in directions identical to each other.

Classes IPC  ?

• H01S 5/50 - Structures amplificatrices non prévues dans les groupes
• H01S 5/02 - Détails ou composants structurels non essentiels au fonctionnement laser
• H01S 5/227 - Structure mesa enterrée

Abrégé

A semiconductor device includes a substrate; a first insulating layer provided on the substrate; a first metal layer provided on the first insulating layer; a second metal layer provided on the first metal layer; and a second insulating layer covering the first metal layer and the second metal layer. An upper surface of the first metal layer has a first region that is in contact with the second metal layer, and a second region that is separated from the second metal layer. The second insulating layer is in direct contact with a side surface and the second region of the first metal layer and an upper surface and a side surface of the second metal layer. A width of the first metal layer is greater than or equal to a width of the second metal layer in a direction parallel to the substrate.

Classes IPC  ?

• H01L 23/485 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes formées de couches conductrices inséparables du corps semi-conducteur sur lequel elles ont été déposées formées de structures en couches comprenant des couches conductrices et isolantes, p. ex. contacts planaires
• H01L 21/3213 - Gravure physique ou chimique des couches, p. ex. pour produire une couche avec une configuration donnée à partir d'une couche étendue déposée au préalable
• H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition

Abrégé

A semiconductor device includes a first nitride semiconductor layer having a first surface, and a first recess formed in the first surface, a second nitride semiconductor layer provided inside the first recess, a first insulating film, covering the first nitride semiconductor layer and the second nitride semiconductor layer, and having a first opening exposing at least a portion of the second nitride semiconductor layer, and an interconnect layer making ohmic contact with the second nitride semiconductor layer through the first opening. The second nitride semiconductor layer has a second surface opposing the interconnect layer. A second recess, continuous with the first opening, is formed in the second surface. The interconnect layer makes direct contact with the second nitride semiconductor layer at an inner surface of the second recess.

Classes IPC  ?

• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

A semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface; a first nitride semiconductor layer having a third surface that is in contact with the second surface and a fourth surface opposite to the third surface, a recess being formed in the fourth surface; a second nitride semiconductor layer provided in the recess; and a first metal layer provided on the second nitride semiconductor layer. A through-hole is formed to penetrate the substrate, the first nitride semiconductor layer, and the second nitride semiconductor layers and expose the first metal layer. The semiconductor device further includes a second metal layer that is in contact with the first metal layer and that covers the first surface and an inner wall surface of the through-hole. The second nitride semiconductor layer contains impurity atoms at a concentration of 1.0×1018 cm−3 or greater.

Classes IPC  ?

• H01L 29/45 - Electrodes à contact ohmique
• H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/40 - Electrodes
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

A Doherty amplifier includes a substrate, a first transistor provided on the substrate and including first gate electrodes, first drain electrodes, a first gate bus bar and a first drain bus bar, a second transistor provided on the substrate and including second gate electrodes, second drain electrodes, a second gate bus bar having a first end, and a second drain bus bar, a combining node provided on the substrate and combining a first signal amplified by the first transistor and a second signal amplified by the second transistor, a first line provided on the substrate and connecting the first drain bus bar and the combining node, and a second line provided on the substrate, connecting the second drain bus bar and the combining node, and connected to a second end of the second drain bus bar located diagonally across the second transistor with respect to the first end.

Classes IPC  ?

• H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
• H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs

Abrégé

An optical transmitter according to one embodiment includes: a plurality of light emitting elements; a plurality of light receiving elements that monitor output lights from the respective plurality of light emitting elements; a housing that mounts the plurality of light emitting elements and the plurality of light receiving elements; and a wiring board which is mounted on the housing and which is provided with a first region having a pad electrically connected to the light emitting element and a second region disposed at a position lower than the first region and having a pad electrically connected to the light receiving element.

Classes IPC  ?

• H01S 5/0683 - Stabilisation des paramètres de sortie du laser en surveillant les paramètres optiques de sortie
• H01S 5/0239 - Combinaisons d’éléments électriques ou optiques

Abrégé

A semiconductor device includes a semiconductor chip including a substrate, a transistor provided on an upper surface of the substrate and having an input electrode to which a high frequency signal is input, an output electrode from which the high frequency signal is output, and a reference potential electrode to which a reference potential is supplied, and a metal pattern provided on the upper surface of the substrate and electrically connected to the reference potential electrode, a first capacitor including a first lower electrode provided on the metal pattern and electrically connected to the metal pattern, a first dielectric layer provided on the first lower electrode, and a first upper electrode provided on the first dielectric layer, and a first bonding wire electrically connecting the first upper electrode and a first electrode which is any one of the input electrode and the output electrode.

Classes IPC  ?

• H01L 23/66 - Adaptations pour la haute fréquence
• H01L 21/8252 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie III-V
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/495 - Cadres conducteurs
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
• H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive

Abrégé

A semiconductor device includes a wiring substrate including an opening formed to penetrate from a first main surface to a second main surface, and configured to include an insulating material, a metal substrate fixed to the wiring substrate to cover the opening from the second main surface side, a semiconductor chip fixed inside the opening on a main surface of the metal substrate, a resin disposed to cover the semiconductor chip from above the first main surface on the main surface, and formed of a material having a thermal expansion coefficient different from that of the wiring substrate, and an adhesive containing a metal paste disposed between a side surface of the wiring substrate and the main surface, and the resin, in which the adhesive is disposed on the main surface so that a thickness gradually increases from a center side of the opening to the side surface.

Classes IPC  ?

• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A semiconductor device includes a substrate, a semiconductor layer provided on the substrate, a gate electrode, a drain electrode, and a source electrode provided so as to dispose the gate electrode between the drain electrode and the source electrode, wherein via holes are provided in the substrate and the semiconductor layer, the via holes overlap with the source electrode when viewed from a thickness direction of the substrate, penetrate through the semiconductor layer and the substrate, and are arranged in an extending direction of the source electrode, the via holes include a first via hole closest to a first end of the gate electrode to which a signal is inputted, the first via hole is in contact with the source electrode with a first area, and the first area is the smallest of a plurality of areas in which the via holes are in contact with the source electrode.

Classes IPC  ?

• H01L 23/367 - Refroidissement facilité par la forme du dispositif
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

An optical apparatus includes a light emitting apparatus and a host apparatus. The light emitting apparatus includes a housing extending in a first direction, a light emitting device mounted in the housing, an optical connector including a first optical connection part provided at one end of the housing, and an electrical connector including a first electrical connection part provided at one end of the housing and receiving a voltage to drive the light emitting device. The host apparatus includes a host optical connector including a second optical connection part which faces the first optical connection part and is optically coupled thereto, a host electrical connector including a second electrical connection part facing the first electrical connection part and being electrically connected to the first electrical connection part, and a host board mounting the host optical connector and the host electrical connector thereon. The light emitting apparatus is connected to the host apparatus in the optical apparatus.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques

Abrégé

A semiconductor device includes a silicon carbide substrate, a nitride semiconductor layer provided on a top surface of the silicon carbide substrate, a transistor provided on the nitride semiconductor layer, and an element provided on or above the silicon carbide substrate, wherein the silicon carbide substrate has a hole that is provided between the transistor and the element, the hole is formed by removing at least a part of the silicon carbide substrate from a bottom surface of the silicon carbide substrate and an internal thermal conductivity of the hole is smaller than a thermal conductivity of the silicon carbide substrate.

Classes IPC  ?

• H01L 29/16 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, mis à part les matériaux de dopage ou autres impuretés, seulement des éléments du groupe IV de la classification périodique, sous forme non combinée
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

An amplifier includes an amplifier circuit 10 having a characteristic changing in accordance with a thermal history, and a bias circuit 20 that includes an element subjected to a thermal history corresponding to the thermal history of the amplifier circuit, and supplies a bias voltage to the amplifier circuit. The bias voltage changes based on a characteristic of the element that changes in accordance with the thermal history of the element.

Classes IPC  ?

• H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
• H03F 3/16 - Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs comportant uniquement des dispositifs à semi-conducteurs avec dispositifs à effet de champ

Abrégé

A semiconductor device includes a semiconductor substrate, a semiconductor element formed on the semiconductor substrate, a first insulating film covering the semiconductor element, a second insulating film formed on the first insulating film, and a third insulating film formed on the second insulating film. The first and third insulating films allow less moisture to pass than the second insulating film. A dielectric constant of the second insulating film is lower than dielectric constants of the first and third insulating films. The first insulating film has a first portion that is in contact with a first region of an upper surface of the semiconductor substrate. The third insulating film has a second portion that is in contact with upper and side surfaces of the first portion and a second region of the upper surface. The second region is farther away from the semiconductor element than the first region.

Classes IPC  ?

• H01L 23/66 - Adaptations pour la haute fréquence

Abrégé

A semiconductor device includes a substrate having a first main surface and a second main surface opposite to the first main surface, and a first conductive layer covering the second main surface and including dendrites, wherein a via hole extending through the substrate and having an inner wall surface is formed in the substrate, and wherein the first conductive layer covers the inner wall surface.

Classes IPC  ?

• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

An electronic device includes a substrate, a first silicon nitride film provided on the substrate, a silicon oxide film provided on the first silicon nitride film, a capacitor provided on the silicon oxide film, and an interconnect electrically connected to the capacitor. The interconnect is disposed apart from the first silicon nitride film. In a plan view, an outer perimeter of the silicon oxide film is inside an outer perimeter of the first silicon nitride film.

Classes IPC  ?

• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 27/01 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant uniquement des éléments à film mince ou à film épais formés sur un substrat isolant commun

Abrégé

A semiconductor device includes a substrate having a first upper surface; a semiconductor layer provided on the substrate; a first insulator layer provided over the semiconductor layer and having a second upper surface; a lower electrode provided over the first insulator layer; a dielectric layer provided on the lower electrode; and an upper electrode provided on the dielectric layer. A difference between a maximum value and a minimum value of a distance between the first upper surface of the substrate and the second upper surface of the first insulator layer is smaller than a thickness of the semiconductor layer.

Classes IPC  ?

• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 27/06 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant une pluralité de composants individuels dans une configuration non répétitive

Abrégé

An optical transmitter includes an optical transmission unit, a drive unit, an arithmetic circuit, and a bias supply circuit. The optical transmission unit includes a laser element. The drive unit drives the laser element according to a first transmission signal. The arithmetic circuit generates a second transmission signal. The bias supply circuit superimposes the second transmission signal on a bias current of the laser element. An output of the arithmetic circuit containing the second transmission signal is a digital signal in a rectangular wave form based on a reference clock having a frequency lower than a reference clock frequency of the first transmission signal. The bias supply circuit includes a circuit element for inclining a rising portion and a falling portion of the output of the arithmetic circuit.

Classes IPC  ?

• H04B 10/50 - Émetteurs
• H04B 10/516 - Détails du codage ou de la modulation

Abrégé

An optical transceiver includes an electrical connector, an internal circuit, first switch and second switch. The internal circuit is electrically connected to the apparatus through the electrical connector when the optical transceiver is completely inserted into the apparatus, and generate a switching signal after a first signal pad and a second signal pad in a second row of the electrical connector are electrically connected. The first switch isolates a third signal pad in a first row of the electrical connector when the optical transceiver is not fully inserted, and puts the third signal pad electrically connectable in accordance with the switching signal when the optical transceiver is fully inserted. The second switch isolates a fourth signal pad in the first row when the optical transceiver is not fully inserted, and puts the fourth signal pad electrically connectable in accordance with the switching signal when the optical transceiver is fully inserted.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H01R 13/70 - Association structurelle avec des composants électriques incorporés avec interrupteur incorporé

Abrégé

A semiconductor device includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first opening being formed in the first insulating film, an ohmic electrode that is in ohmic contact with the semiconductor layer through the first opening, a gate electrode provided on the first insulating film, and a second insulating film covering at least a portion of a side surface of the ohmic electrode, the side surface being closer to the gate electrode, and the second insulating film being continuous with the first insulating film.

Classes IPC  ?

• H01L 29/45 - Electrodes à contact ohmique
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H01L 29/40 - Electrodes
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

A capacitor includes a substrate, a first electrode provided on the substrate, a dielectric film provided on the first electrode, a second electrode provided on the dielectric film and having an outer periphery positioned inside the outer periphery of the first electrode in a plan view viewed from above in a direction normal to an upper surface of the substrate, a third electrode that is in contact with the second electrode in a region inside the second electrode in the plan view, is separated upward from the first electrode and the dielectric film outside the region in the plan view, and has an outer periphery positioned inside the outer periphery of the first electrode and an outer periphery of the dielectric film in the plan view, and a protective film covering the second electrode and the third electrode and being in contact with the second electrode and the third electrode.

Classes IPC  ?

• H01L 21/302 - Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes pour changer leurs caractéristiques physiques de surface ou leur forme, p. ex. gravure, polissage, découpage

Abrégé

A capacitor according to an embodiment of the present disclosure includes a substrate, a first electrode disposed on the substrate, a dielectric film disposed on the first electrode, a second electrode disposed on the dielectric film, a third electrode in contact with the second electrode in a first region of at least a portion of a lower surface of the third electrode, and an organic insulator film covering an upper portion of the dielectric film, an upper portion of the second electrode, and the third electrode. In a normal direction normal to an upper surface of the substrate, the organic insulator film is not disposed between the lower surface of the third electrode and the second electrode.

Classes IPC  ?

• H01G 4/224 - BoîtiersEncapsulations
• H01G 4/33 - Condensateurs à film mince ou à film épais
• H01G 4/012 - Forme des électrodes non autoporteuses
• H01G 4/008 - Emploi de matériaux spécifiés
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition

Abrégé

A semiconductor device includes a source bus bar provided on a first surface of a substrate and overlapping with a first via hole penetrating through the substrate, a plurality of first transistors arranged in a second direction intersecting a first direction, each of the first transistors including a first source finger, a first drain finger and a first gate finger which extend in the first direction on the first surface, the first source finger being electrically connected to the source bus bar, and a plurality of second transistors arranged in the second direction, each of the second transistors including a second source finger, a second drain finger and a second gate finger which extend in the first direction on the first surface, the second source finger being electrically connected to the source bus bar, the first transistors and the second transistors sandwiching the source bus bar.

Classes IPC  ?

• H01L 27/088 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur comprenant uniquement des composants semi-conducteurs d'un seul type comprenant uniquement des composants à effet de champ les composants étant des transistors à effet de champ à porte isolée
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes

Abrégé

An optical device according to one embodiment includes an optical element, a sleeve including a receptacle portion and an insertion portion, and a base having a lower plate having a main surface with the optical element being mounted thereon and a side wall having a hole with the insertion portion of the sleeve optically coupled with the optical element inserted into the hole. A step difference at a position lower than the main surface is formed at a lower position of the hole in the side wall.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques

Abrégé

A semiconductor device includes a base having a first surface on which the semiconductor element is mounted and a second surface opposite to the first surface, a first edge portion having a step from the first surface toward the second surface in a first region of a peripheral edge of the base, a first terminal that is arranged at a position facing the first edge portion when viewed from a thickness direction of the base, a conductive member for electrically connecting the semiconductor element and the first terminal to each other, and a resin material for sealing a part of the base, the semiconductor element, and a part of the first terminal.

Classes IPC  ?

• H01L 23/495 - Cadres conducteurs
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides

Abrégé

An optical device according to one embodiment includes: a light-emitting element; first and second lenses optically coupled with the light-emitting element; an optical component provided between the light-emitting element and the second lens, optically coupling each of the light-emitting element and the second lens, and multiplexing input lights; and a base having a lower plate having a plurality of convex mounting surfaces with each of the light-emitting element, the first lens, the second lens, and the optical component being mounted thereon and a side wall with a receptacle being connected thereto.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques

Abrégé

An optical transceiver includes an outer part provided outside the apparatus upon an engagement of the optical transceiver with the apparatus. The outer part includes a first spindle, a rotational member, a sliding member. The rotational member is configured to rotate on the first spindle. The sliding member is configured to move along the first direction. The rotational member has a hole. The sliding member has a second spindle. The first spindle and the second spindle are fit with the hole. The optical transceiver includes an inner part provided inside the apparatus upon the engagement with the apparatus. The hole has a first circular area, a second circular area, and a straight area. The first spindle is fit with the first circular area. The second spindle is fit with the second circular area. The straight area is connected between the first circular area and the second circular area.

Classes IPC  ?

• F16B 1/00 - Dispositifs pour assembler des éléments structuraux ou parties de machines ou bien pour empêcher tout mouvement relatif entre eux
• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques

Abrégé

A semiconductor device includes a base, a matching circuit including a substrate, a ground layer, and a signal line, wherein a width of the signal line on a first end side of the substrate is smaller than a width of the substrate and larger than that of the signal line on a second end side, and a distance between the ground layer and the signal line on the first end side is larger than a distance therebetween on the second end side, a semiconductor element electrically connected to the signal line on the first end side of the matching circuit by first bonding wires, a frame body, a feedthrough having a lead, and second bonding wires electrically connected to the lead and the signal line on the second end side, wherein the first bonding wires are arranged in parallel, and the second bonding wires are arranged in parallel.

Classes IPC  ?

• H01Q 23/00 - Antennes comportant des circuits ou des éléments de circuit actifs qui leur sont intégrés ou liés
• H01Q 13/20 - Antennes constituées par un guide non résonnant à ondes de fuite ou une ligne de transmissionStructures équivalentes produisant un rayonnement le long du trajet de l'onde guidée

Abrégé

A method for manufacturing a semiconductor device includes selectively forming an insulating film on a region of a substrate serving as a scribe line; and forming a first semiconductor layer in a state where a cavity is provided on the insulating film. The cavity is buried in the first semiconductor layer.

Classes IPC  ?

• H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p. ex. marques de repérage, schémas de test
• H01L 31/0304 - Matériaux inorganiques comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 31/0352 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails caractérisés par leurs corps semi-conducteurs caractérisés par leur forme ou par les formes, les dimensions relatives ou la disposition des régions semi-conductrices
• H01L 31/18 - Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives
• H01L 33/00 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails
• H01L 33/06 - DISPOSITIFS À SEMI-CONDUCTEURS NON COUVERTS PAR LA CLASSE - Détails caractérisés par les corps semi-conducteurs ayant une structure à effet quantique ou un superréseau, p.ex. jonction tunnel au sein de la région électroluminescente, p.ex. structure de confinement quantique ou barrière tunnel
• H01L 33/30 - Matériaux de la région électroluminescente contenant uniquement des éléments du groupe III et du groupe V de la classification périodique

Abrégé

M logic levels depending on the selected encoding method.

Classes IPC  ?

• H04B 10/50 - Émetteurs
• H04B 10/516 - Détails du codage ou de la modulation
• H04B 10/54 - Modulation d'intensité

Abrégé

in) using the updated signal generation coefficients.

Classes IPC  ?

• H04L 25/49 - Circuits d'émissionCircuits de réception à conversion de code au transmetteurCircuits d'émissionCircuits de réception à pré-distorsionCircuits d'émissionCircuits de réception à insertion d'intervalles morts pour obtenir un spectre de fréquence désiréCircuits d'émissionCircuits de réception à au moins trois niveaux d'amplitude
• H04L 27/36 - Circuits de modulationCircuits émetteurs
• H04L 27/38 - Circuits de démodulationCircuits récepteurs
• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples

Abrégé

hi).

Classes IPC  ?

• H04L 27/36 - Circuits de modulationCircuits émetteurs
• H04L 27/38 - Circuits de démodulationCircuits récepteurs
• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples

Abrégé

A high frequency amplifier includes a first transistor and a second transistor, a first drain pad connected to the first transistor and a second drain pad connected to the second transistor, a matching circuit pattern having a first transmission line connected to the first drain pad and a second transmission line connected to the second drain pad, a first wire and a second wire, and a wiring pattern connected to the first drain pad via the first transmission line and the first wire and connected to the second drain pad via the second transmission line and the second wire. An effective impedance of the second wire is larger than an effective impedance of the first wire. The matching circuit pattern has an asymmetrical external shape. An electrical length of the second transmission line is shorter than an electrical length of the first transmission line.

Classes IPC  ?

• H03F 1/56 - Modifications des impédances d'entrée ou de sortie, non prévues ailleurs
• H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ

Abrégé

A semiconductor device according to one embodiment includes: a semiconductor chip having a transistor and a drain pad provided on a board; a capacitor having an upper electrode and a lower electrode interposing a dielectric; a pad; and an empty pad provided on the board of the semiconductor chip. The semiconductor device further includes: a first wire connecting the pad and the drain pad of the semiconductor chip to each other; a second wire connecting the empty pad and the upper electrode of the capacitor to each other; and a third wire connecting the pad and the empty pad to each other.

Classes IPC  ?

• H01L 23/66 - Adaptations pour la haute fréquence
• H01L 25/16 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant de types couverts par plusieurs des sous-classes , , , , ou , p. ex. circuit hybrides
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A method of manufacturing a semiconductor device includes forming a semiconductor layer on an upper surface of a substrate, forming an etching stopper on an upper surface of the semiconductor layer, forming a metal mask including a seed film and a plating film on a lower surface of the substrate, the metal mas having an opening inside the etching stopper in plan view, forming a through-hole in the substrate and the semiconductor layer from the lower surface of the substrate to the etching stopper through the opening, and removing the plating film by an anodic reaction in an electrolyte solution after forming the through-hole.

Classes IPC  ?

• H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
• H01L 21/04 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives les dispositifs ayant des barrières de potentiel, p. ex. une jonction PN, une région d'appauvrissement ou une région de concentration de porteurs de charges
• H01L 21/308 - Traitement chimique ou électrique, p. ex. gravure électrolytique en utilisant des masques

Abrégé

A semiconductor device includes a metal base, a wall, a lid, a semiconductor die, and at least one capacitor. The wall is placed on the metal base, and provides an opening portion inside of the wall. The lid is placed on the wall. The semiconductor die is placed on the metal base. The semiconductor die is surrounded with the wall to be placed in the opening portion. The capacitor is placed on the wall. A first end of the capacitor is electrically connected to the semiconductor die, and a second end of the capacitor is electrically connected to the metal base.

Classes IPC  ?

• H01L 23/02 - ConteneursScellements
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A semiconductor device includes: a package having a top surface and a bottom surface; a semiconductor element arranged in the package; and a base which is arranged in the package and on which the semiconductor element is mounted. A top surface of the base is exposed to the top surface of the package, and a bottom surface of the base is exposed to the bottom surface of the package.

Classes IPC  ?

• H01L 23/495 - Cadres conducteurs
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 25/07 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide les dispositifs étant tous d'un type prévu dans une seule des sous-classes , , , , ou , p. ex. ensembles de diodes redresseuses les dispositifs n'ayant pas de conteneurs séparés les dispositifs étant d'un type prévu dans la sous-classe
• H01L 23/66 - Adaptations pour la haute fréquence
• H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition

Abrégé

A semiconductor device includes a substrate having a front surface including a first long side and a second long side extending in a first direction and opposed to each other, and a first short side and a second short side extending in a second direction intersecting the first direction and opposed to each other, a source finger provided on the front surface, a drain finger provided on the front surface, and a gate finger provided on the front surface and sandwiched between the source finger and the drain finger, wherein a via hole penetrating the substrate is provided in the substrate, a region where the via hole is connected to the source finger in the front surface is contained within the source finger, and the via hole has a maximum width in the first direction larger than a maximum width in the second direction.

Classes IPC  ?

• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 29/06 - Corps semi-conducteurs caractérisés par les formes, les dimensions relatives, ou les dispositions des régions semi-conductrices
• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter

Abrégé

A semiconductor device includes a substrate, a semiconductor layer disposed on the substrate, an insulating layer disposed on the semiconductor layer and having a first opening formed therein, a gate electrode disposed on the insulating layer and in contact with the semiconductor layer via the first opening, and a source electrode and a drain electrode in ohmic contact with the semiconductor layer. The gate electrode includes a crystallinity control film disposed on the insulating layer and having a second opening formed such that an inner wall thereof extends to an inner wall of the first opening toward the substrate in plan view in a direction perpendicular to a top surface of the substrate, and a first metal film disposed on the crystallinity control film and in Schottky contact with the semiconductor layer via the inner walls, extending to each other, of the second opening and the first opening.

Classes IPC  ?

• H01L 29/47 - Electrodes à barrière de Schottky
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV

Abrégé

A package for a semiconductor device includes a metal base plate, a wall portion, a first metal film, and a lead portion. The base plate has a first region and a second region surrounding the first region. The wall portion has a first frame body comprising metal and a second frame body comprising resin. The first frame body is provided on the second region. The second frame body is provided on the first frame body. The first metal film is provided on the second frame body. The lead portion is conductively bonded to the first metal film. The first frame body is conductively bonded to the base plate. A thickness of the first frame body in a first direction that is a direction in which the first frame body and the second frame body are arranged is larger than a thickness of the first metal film in the first direction.

Classes IPC  ?

• H01L 23/492 - Embases ou plaques
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

Disclosed is a package for a semiconductor device including a semiconductor die. The package includes a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess in its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.

Classes IPC  ?

• H01L 23/66 - Adaptations pour la haute fréquence
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
• H01L 23/047 - ConteneursScellements caractérisés par la forme le conteneur étant une structure creuse ayant une base conductrice qui sert de support et en même temps de connexion électrique pour le corps semi-conducteur les autres connexions étant parallèles à la base
• H01P 3/08 - MicrorubansTriplaques
• H03H 7/38 - Réseaux d'adaptation d'impédance

Abrégé

A method of manufacturing a semiconductor device includes forming a first AlN layer on a first main surface of a single-crystal substrate, partly etching the first AlN layer to form a plurality of pieces of AlN seed crystals on the first main surface from the first AlN layer, and forming a second AlN layer on the first main surface using the AlN seed crystals as growth nuclei.

Classes IPC  ?

• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives

Abrégé

A semiconductor device includes a substrate having an upper surface and a lower surface, a metal layer provided on the lower surface of the substrate, a semiconductor element including first electrodes provided on the upper surface of the substrate, connected to the metal layer via through holes penetrating the substrate, and electrically separated from each other on the upper surface of the substrate, second electrodes provided on the upper surface of the substrate and alternately provided with the first electrodes, and a first pad provided on the upper surface of the substrate and to which the second electrodes are connected, and a protective film provided on the upper surface of the substrate to cover the first electrodes and the second electrodes, having a first opening that exposes at least a part of the first pad, and having no opening that overlaps the first electrodes.

Classes IPC  ?

• H01L 23/544 - Marques appliquées sur le dispositif semi-conducteur, p. ex. marques de repérage, schémas de test
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter

Abrégé

An optical transceiver includes an optical transmitter transmit an optical signal; an optical receiver to extract a monitoring control signal from an optical signal, the monitoring control signal including first and second frames having the respective headers, and being separated in time; and a processing part to generate a bit stream from the monitoring control signal; generate a first byte stream from the bit stream; extract monitoring control data from a byte stream subsequent to the first byte stream, if the first byte stream is equal to the first header; generate a second byte stream from the bit stream if the first byte stream is different from the first header, the second byte stream having the same length as the second header; and extract the monitoring control data from a byte stream subsequent to the second byte stream if the second byte stream is equal to the second header.

Classes IPC  ?

• H04L 27/26 - Systèmes utilisant des codes à fréquences multiples
• H04B 10/40 - Émetteurs-récepteurs

Abrégé

A method for manufacturing an epitaxial substrate includes the steps of: epitaxially growing a group III nitride semiconductor layer on a substrate; removing the substrate from a growth furnace; irradiating a surface of the group III nitride semiconductor layer with ultraviolet light while exposing the surface to an atmosphere containing oxygen; and measuring a sheet resistance value of the group III nitride semiconductor layer.

Classes IPC  ?

• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 21/66 - Test ou mesure durant la fabrication ou le traitement
• C30B 25/02 - Croissance d'une couche épitaxiale
• C30B 29/40 - Composés AIII BV
• C30B 33/00 - Post-traitement des monocristaux ou des matériaux polycristallins homogènes de structure déterminée

Abrégé

A method of manufacturing a semiconductor device, includes attaching a first susceptor to a film forming apparatus, measuring a magnitude of a warp of the first susceptor, setting a first initial film formation condition as a film formation condition of the film forming apparatus in accordance with the measured magnitude of the warp of the first susceptor, and placing a plurality of first wafers on the first susceptor and forming a first film on the plurality of first wafers under the film formation condition. The setting of the first initial film formation condition includes reading the first initial film formation condition from a recording medium storing a database. The database includes a plurality of pieces of data in which magnitudes of warps of susceptors are associated with initial film formation conditions for forming the first film.

Classes IPC  ?

• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• C23C 16/46 - Revêtement chimique par décomposition de composés gazeux, ne laissant pas de produits de réaction du matériau de la surface dans le revêtement, c.-à-d. procédés de dépôt chimique en phase vapeur [CVD] caractérisé par le procédé de revêtement caractérisé par le procédé utilisé pour le chauffage du substrat
• C23C 16/52 - Commande ou régulation du processus de dépôt
• C30B 25/10 - Chauffage de l'enceinte de réaction ou du substrat
• C30B 25/16 - Commande ou régulation
• H01L 21/66 - Test ou mesure durant la fabrication ou le traitement

Abrégé

A 2nd signal line has impedance lower than impedance of a 1st signal line. A capacitor includes a 1st extension part and a 2nd extension part, a 1st ground part and a 2nd ground part. The 1st extension part and the 2nd extension part are connected to a 2nd signal line and are provided on an insulation substrate to extend along a longitudinal direction of the 2nd signal line. The 1st ground part and the 2nd ground part are at least a part of a ground pattern, and are provided between the 1st extension part and the 2nd extension part and the 2nd signal line, and between the 1st extension part and the 2nd extension part and an end part of the insulation substrate, to be electrically coupled with the 1st extension part and the 2nd extension part.

Classes IPC  ?

• H01L 23/64 - Dispositions relatives à l'impédance
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/66 - Adaptations pour la haute fréquence

Abrégé

A first optical transceiver includes a transmission signal processor that generates a multi-valued pulse amplitude modulation signal including a fixed bit pattern. The first optical transceiver includes an optical transmitter that transmits the multi-valued pulse amplitude modulation signal as an optical transmission signal. The first optical transceiver includes an optical receiver that receives an optical adjustment signal from a second optical transceiver to reproduce an adjustment signal from the optical adjustment signal. The first optical transceiver includes a first controller that controls the transmission signal processor based on a bit error rate included in the optical adjustment signal to adjust light power at each level of the optical transmission signal.

Classes IPC  ?

• H04B 10/079 - Dispositions pour la surveillance ou le test de systèmes de transmissionDispositions pour la mesure des défauts de systèmes de transmission utilisant un signal en service utilisant des mesures du signal de données
• H04B 10/40 - Émetteurs-récepteurs
• H04B 10/293 - Commande de la puissance du signal
• H04B 10/2513 - Dispositions spécifiques à la transmission par fibres pour réduire ou éliminer la distorsion ou la dispersion due à la dispersion chromatique

Abrégé

An optical transmitter according to one embodiment includes a housing with an emission end, a light emitting element mounted on a first mounting portion of the housing, and a light receiving element mounted on a second mounting portion of the housing to monitor output light from the light emitting element. The second mounting portion is provided with a carrier, a first resin located on an emission end side of a lower side of the carrier, and a second resin located on a light emitting element side of the lower side of the carrier. A coefficient of thermal expansion of the first resin is smaller than a coefficient of thermal expansion of the second resin.

Classes IPC  ?

• H04B 10/50 - Émetteurs
• H04B 10/564 - Commande de la puissance
• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• G02B 7/00 - Montures, moyens de réglage ou raccords étanches à la lumière pour éléments optiques

Abrégé

A passive element comprising: a semiconductor substrate; a first insulating film; a first metal pad; a first conductor; and a first conductive film. The semiconductor substrate is of p-type or n-type conductivity, and has a main surface and a back surface. The first insulating film is provided over a first region on the main surface of the semiconductor substrate. The first metal pad is provided on the first insulating film. The first conductor extends from the first metal pad in a first direction. The first conductive film is provided over a second region adjacent to the first region in the first direction on the main surface of the semiconductor substrate. The first conductive film is ohmically connected to the main surface of the semiconductor substrate, and has an electric resistivity smaller than the electric resistivity of the semiconductor substrate.

Classes IPC  ?

• H01L 27/04 - Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface le substrat étant un corps semi-conducteur
• H01L 21/3205 - Dépôt de couches non isolantes, p. ex. conductrices ou résistives, sur des couches isolantesPost-traitement de ces couches
• H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
• H01L 21/768 - Fixation d'interconnexions servant à conduire le courant entre des composants distincts à l'intérieur du dispositif
• H01L 21/822 - Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun avec une division ultérieure du substrat en plusieurs dispositifs individuels pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants le substrat étant un semi-conducteur, en utilisant une technologie au silicium
• H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées
• H01L 25/00 - Ensembles consistant en une pluralité de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A high frequency package includes a package having an input terminal and an output terminal. A substrate housed in the package, has a first side, a second side facing the input terminal, and a third side facing the output terminal. The first side extends in a first direction and connects the second side and the third side, and the second side and the third side extend in a second direction intersecting the first direction. A coupling circuit on the substrate is electrically connected to the input terminal and the output terminal to input an input signal from the input terminal disposed at the second side of the substrate and output an output signal to the output terminal disposed at the third side of the substrate. A filter circuit on the substrate is electrically connected to the coupling circuit, an is configured to reduce third-order IMD (Inter Modulation Distortion) included in the output signal. The output signal is output from the coupling circuit in a middle of the output terminal side of the third side of the substrate. The filter circuit is arranged on an edge of the first side of the substrate, and an edge of the third side of the substrate.

Classes IPC  ?

• H03F 1/32 - Modifications des amplificateurs pour réduire la distorsion non linéaire
• H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
• H01L 23/66 - Adaptations pour la haute fréquence
• H03H 7/06 - Réseaux à deux accès sélecteurs de fréquence comprenant des résistances
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

This variable-wavelength laser is provided with: gain regions and wavelength control regions that are alternately arranged along a direction of light propagation; diffraction gratings arranged so as to respectively correspond to the gain regions and the wavelength control regions; and a region that does not have a plurality of the aforementioned diffraction gratings, located at the end of an aforementioned gain region and/or the end of an aforementioned wavelength control region, at the boundary between an aforementioned gain region and an aforementioned wavelength control region. The length of the region that does not have the aforementioned diffraction gratings is 5% to 30% the length of the gain region or the length of the wavelength control region to which the the region that does not have the aforementioned diffraction gratings belongs.　

Classes IPC  ?

• H01S 5/12 - Structure ou forme du résonateur optique le résonateur ayant une structure périodique, p. ex. dans des lasers à rétroaction répartie [lasers DFB]
• H01S 5/026 - Composants intégrés monolithiques, p. ex. guides d'ondes, photodétecteurs de surveillance ou dispositifs d'attaque
• H01S 5/14 - Lasers à cavité externe
• H01S 5/50 - Structures amplificatrices non prévues dans les groupes

Abrégé

A semiconductor device includes a substrate, a nitride semiconductor layer formed on the substrate, a source electrode and a drain electrode formed in the nitride semiconductor layer. The source electrode and drain electrode are arranged side by side in a first direction. A gate electrode is formed on the nitride semiconductor layer between the source electrode and the drain electrode. A first protective film is formed on the nitride semiconductor layer, and covers the first protective film covering the source electrode, the drain electrode, and the gate electrode. A source field plate is formed on the first protective film between the gate electrode and the drain electrode in a plan view. A dielectric-breakdown inhibition portion includes a part positioned between an end of the source field plate and an end of the drain electrode in a sectional view, and inhibits dielectric breakdown of the first protective film.

Classes IPC  ?

• H01L 29/40 - Electrodes
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H01L 21/76 - Réalisation de régions isolantes entre les composants
• H01L 21/765 - Réalisation de régions isolantes entre les composants par effet de champ
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

A capacitor includes an MIM capacitor that includes a lower electrode, a dielectric film disposed on the lower electrode, and an upper electrode disposed on the dielectric film, an insulating film that is disposed on the upper electrode so as to cover the MIM capacitor, and an additional electrode that is disposed in the insulating film and above an outer periphery of the upper electrode, has an outer periphery located outside the outer periphery of the upper electrode, and is connected to the upper electrode.

Classes IPC  ?

• H01L 49/02 - Dispositifs à film mince ou à film épais
• H01G 4/08 - Diélectriques inorganiques

Abrégé

Semiconductor device includes a semiconductor layer, an insulating film provided on the semiconductor layer and having an opening formed therein, a gate electrode connected to the semiconductor layer through opening, a protection film covering gate electrode, and a Ni oxide film, wherein the insulating film has a first surface on the semiconductor layer side and a second surface opposite to the first surface, and the gate electrode has a third surface facing the second surface and spaced apart from the second surface and a fourth surface connecting the second surface and the third surface. The gate electrode includes a Ni film constituting the third surface and the fourth surface, and the Ni oxide film covers the Ni film on the third surface and the fourth surface. The protection film covers the third surface and the fourth surface by being placed over Ni oxide film.

Classes IPC  ?

• H01L 29/47 - Electrodes à barrière de Schottky
• H01L 21/02 - Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
• H01L 21/285 - Dépôt de matériaux conducteurs ou isolants pour les électrodes à partir d'un gaz ou d'une vapeur, p. ex. condensation
• H01L 29/40 - Electrodes
• H01L 29/66 - Types de dispositifs semi-conducteurs
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT

Abrégé

A semiconductor device includes a substrate, a first source finger, a first gate finger, a first drain finger, a second source finger, a second gate finger, a second drain finger, a first gate wiring, wherein a width of the first gate wiring in the extension direction at a first region where the first gate finger connects to the first gate wiring is smaller than a width of the first gate wiring in the extension direction at a second region located between the first source finger and the second source finger, and an end of the first region near the second gate finger in the extension direction is located closer to the second gate finger than an end of the second region near the second gate finger in the extension direction.

Classes IPC  ?

• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 23/48 - Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p. ex. fils de connexion ou bornes

Abrégé

A semiconductor device includes a substrate, a first source finger provided on the substrate, a first gate finger provided adjacent to the first source finger in a width direction of the first source finger, a second source finger having a width smaller than a width of the first source finger, a second gate finger provided adjacent to the second source finger in the width direction of the second source finger, a first source wiring connecting the first source finger to the second source finger, a first gate wiring sandwiching the second source finger between the first gate wiring and the second gate finger, a second gate wiring intersecting the first source wiring in a non-contact manner, and connecting the first gate wiring to the first gate finger, and a first drain finger sandwiching the first gate finger and the second gate finger between the first drain finger.

Classes IPC  ?

• H01L 29/423 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative ne transportant pas le courant à redresser, à amplifier ou à commuter
• H01L 29/417 - Electrodes caractérisées par leur forme, leurs dimensions relatives ou leur disposition relative transportant le courant à redresser, à amplifier ou à commuter
• H01L 23/528 - Configuration de la structure d'interconnexion
• H01L 29/40 - Electrodes

Abrégé

An optical module of the present disclosure includes an optical element, a first optical component that is optically coupled to the optical element, a second optical component that is optically coupled to the first optical component, a receptacle to which an optical fiber that transmits the incident light to the second optical component is connected, a terminal unit that electrically outputs an output signal of the optical element to the outside, and a package that accommodates the optical element, the first optical component, and the second optical component and is provided with the receptacle on a first surface and the terminal unit on a second surface facing the first surface, wherein the wiring extends from the first surface side to the second surface side and electrically connects the second optical component and the terminal unit.

Classes IPC  ?

• H04B 10/60 - Récepteurs
• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H04B 10/40 - Émetteurs-récepteurs
• H04B 10/50 - Émetteurs

Abrégé

A semiconductor device includes a semiconductor chip in which a field effect transistor mainly containing GaN is formed on a surface of a SiC semiconductor substrate. The semiconductor device includes a metal base on which a back surface of the semiconductor chip is mounted through a conductive adhesive material containing Ag and a resin mold configured to seal the semiconductor chip. A metal having wettability lower than wettability of Au or Cu with respect to Ag is exposed in a region extending along an edge of the back surface.

Classes IPC  ?

• H01L 23/495 - Cadres conducteurs
• H01L 21/56 - Encapsulations, p. ex. couches d’encapsulation, revêtements
• H01L 23/31 - Encapsulations, p. ex. couches d’encapsulation, revêtements caractérisées par leur disposition
• H01L 29/267 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, des éléments couverts par plusieurs des groupes , , , , dans différentes régions semi-conductrices
• H01L 29/78 - Transistors à effet de champ l'effet de champ étant produit par une porte isolée

Abrégé

Provided is an amplifier device including a semiconductor chip, a package, a first feedback circuit, and a second feedback circuit. The package includes a metal base, an insulating side wall, an input lead, and an output lead. The input lead is connected to a gate pad group of the semiconductor chip. The output lead is connected to a drain pad group of the semiconductor chip. Each of the feedback circuits includes a dielectric substrate disposed on the metal base, a feedback resistor located on the dielectric substrate, and a capacitor connected in series to the feedback resistor. Each of the feedback circuits is connected between the gate pad group and the drain pad group. The feedback circuits are located respectively on the base on one side and the other side of the semiconductor chip in an extension direction of a first and a second end edge.

Classes IPC  ?

• H03F 1/42 - Modifications des amplificateurs pour augmenter la bande passante
• H01L 23/66 - Adaptations pour la haute fréquence
• H03F 3/195 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés

Abrégé

An amplification device includes a base substrate, an amplification element, and a matching circuit board. The amplification element is mounted on the base substrate. The matching circuit board is mounted on the base substrate and includes a circuit pattern which is electrically connected to the amplification element. The matching circuit board includes a first side surface and a second side surface each extending in the longitudinal direction of the matching circuit board. A first recess is provided in the first side surface. A second recess facing the first recess is provided in the second side surface.

Classes IPC  ?

• H03F 1/08 - Modifications des amplificateurs pour réduire l'influence défavorable de l'impédance interne des éléments amplificateurs
• H03F 3/193 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs comportant des dispositifs à effet de champ
• H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

Abrégé

A semiconductor device includes a semiconductor layer, a source electrode and a drain electrode that are disposed on the upper surface of the semiconductor layer, a gate electrode disposed on the upper surface of the semiconductor layer and located between the source electrode and the drain electrode, a first insulating film disposed on the gate electrode, and a field plate disposed on the first insulating film, at least part of the field plate overlapping the gate electrode, the field plate including a first metal layer and a second metal layer disposed on the upper surface of the first metal layer, the first metal layer containing gold, the second metal layer containing at least one of tantalum, tungsten, molybdenum, niobium, and titanium.

Classes IPC  ?

• H01L 29/40 - Electrodes
• H01L 29/20 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV
• H01L 29/205 - Corps semi-conducteurs caractérisés par les matériaux dont ils sont constitués comprenant, à part les matériaux de dopage ou autres impuretés, uniquement des composés AIIIBV comprenant plusieurs composés dans différentes régions semi-conductrices
• H01L 29/778 - Transistors à effet de champ avec un canal à gaz de porteurs de charge à deux dimensions, p.ex. transistors à effet de champ à haute mobilité électronique HEMT
• H01L 21/76 - Réalisation de régions isolantes entre les composants
• H01L 21/765 - Réalisation de régions isolantes entre les composants par effet de champ
• H01L 29/66 - Types de dispositifs semi-conducteurs

Abrégé

A microwave circuit integrated on a common semiconductor substrate, includes: a first-stage amplifier to amplify an input high-frequency signal having a first frequency; a main-system amplification stage to amplify and output one signal having the first frequency branched from an output of the first-stage amplifier; a branch stage to generate a signal having double the frequency of the first frequency; and a sub-system amplification stage to amplify and output the signal having double the frequency. An amplification circuit constituting the first-stage amplifier, an amplification circuit included in the branch stage, an amplification circuit included in the main-system amplification stage, and an amplification circuit included in the sub-system amplification stage are connected in series between a power supply and ground in a DC manner, and each is a current reuse type amplifier including two-stage transistors connected in series between a signal input and a signal output in an AC manner.

Classes IPC  ?

• H03F 3/19 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 23/66 - Adaptations pour la haute fréquence
• H03F 1/02 - Modifications des amplificateurs pour augmenter leur rendement, p. ex. étages classe A à pente glissante, utilisation d'une oscillation auxiliaire
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées

Abrégé

An amplifier equipped with: an amplification circuit 10, the properties of which change according to thermal history; and a bias circuit 20 which is equipped with an element for undergoing a thermal history corresponding to the thermal history of the amplification circuit, and supplies a bias voltage, which changes on the basis of the properties of the element which change according to the thermal history of said element, to the amplification circuit.　

Classes IPC  ?

• H03F 1/30 - Modifications des amplificateurs pour réduire l'influence des variations de la température ou de la tension d'alimentation
• H03F 3/21 - Amplificateurs de puissance, p. ex. amplificateurs de classe B, amplificateur de classe C comportant uniquement des dispositifs à semi-conducteurs

Abrégé

A method for manufacturing a semiconductor device includes forming a lead frame assembly in which a first side wall portion and a second side wall portion, both made of a resin, are joined to each other in a state of having a metal lead frame sandwiched therebetween; applying a sintering metal paste to a disposition region of the lead frame assembly and disposing the lead frame assembly on the sintering metal paste; and sintering the sintering metal paste between a metal base of the semiconductor device and the lead frame assembly to join the base and the lead frame assembly to each other.

Classes IPC  ?

• H01L 23/043 - ConteneursScellements caractérisés par la forme le conteneur étant une structure creuse ayant une base conductrice qui sert de support et en même temps de connexion électrique pour le corps semi-conducteur
• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 21/52 - Montage des corps semi-conducteurs dans les conteneurs
• H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A semiconductor device according to an embodiment comprises: a semiconductor chip including a transistor and a drain pad provided on a substrate; a capacitor having an upper electrode and a lower electrode sandwiching a dielectric; a pad; and a vacant pad provided on the substrate of the semiconductor chip. The semiconductor device further comprises a first wire interconnecting the pad and the drain pad of the semiconductor chip, a second wire interconnecting the vacant pad and the upper electrode of the capacitor, and a third wire interconnecting the pad and the vacant pad.

Classes IPC  ?

• H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement

Abrégé

A semiconductor device package is disclosed. The package according to one example includes a base having a main surface made of a metal, a dielectric side wall having a bottom surface facing the main surface, a joining material containing silver (Ag) and joining the main surface of the base and the bottom surface of the side wall to each other, a lead made of a metal joined to an upper surface of the side wall on a side opposite to the bottom surface, and a conductive layer not containing silver (Ag). The conductive layer is provided between the bottom surface and the upper surface of the side wall at a position overlapping the lead when viewed from a normal direction of the main surface. The conductive layer is electrically connected to the joining material, extends along the bottom surface, and is exposed from a lateral surface of the side wall.

Classes IPC  ?

• H01L 23/495 - Cadres conducteurs
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

An optical module includes a first optical splitting element to split a signal beam into a first polarization component and a second polarization component, a first element having a first introduction port, a second element having a second introduction port, a first condensing part disposed between the first optical splitting element and the first introduction port and configured to condense the first polarization component toward the first introduction port, and a second condensing part disposed between the first optical splitting element and the second introduction port and configured to condense the second polarization component toward the second introduction port. An average refractive index of the second condensing part in an optical axis direction is larger than an average refractive index of the first condensing part in an optical axis direction.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H04B 10/61 - Récepteurs cohérents

Abrégé

An optical transmitter according to one embodiment comprises a housing having an emission end, a light emitting element mounted on a first mounting portion of the housing, and a light receiving element that is mounted on a second mounting portion of the housing and monitors output light from the light emitting element. The second mounting portion is provided with a carrier, a first resin located on the emission end side on the underside of the carrier, and a second resin located on the light emitting element side on the underside of the carrier. The coefficient of thermal expansion of the first resin is smaller than the coefficient of thermal expansion of the second resin.

Classes IPC  ?

• H01L 31/02 - Dispositifs à semi-conducteurs sensibles aux rayons infrarouges, à la lumière, au rayonnement électromagnétique d'ondes plus courtes, ou au rayonnement corpusculaire, et spécialement adaptés, soit comme convertisseurs de l'énergie dudit rayonnement e; Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de ces dispositifs ou de leurs parties constitutives; Leurs détails - Détails
• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H01S 5/0239 - Combinaisons d’éléments électriques ou optiques
• H01S 5/0683 - Stabilisation des paramètres de sortie du laser en surveillant les paramètres optiques de sortie

Abrégé

An optical device (1) according to one embodiment is provided with: a light-emitting element (9); a first lens (8) and a second lens (11) that are optically coupled to the light-emitting element (9); an optical component (6) that is provided between the light-emitting element (9) and the second lens (11) and optically coupled to the light-emitting element (9) and the second lens (11), and multiplexes input light; and a base (2) that has a lower plate (2A) having a plurality of protruding mounting surfaces (2c) on which the light-emitting element (9), the first lens (8), the second lens (11), and the optical component (6) are mounted, respectively, and a side wall (2B) to which a receptacle (4) is connected.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H01S 5/022 - SupportsBoîtiers

Abrégé

An optical transmitter according to one embodiment comprises a plurality of light emission elements, a plurality of light reception elements which monitor output light from each of the plurality of light emission elements, a housing to which the plurality of light emission elements and the plurality of light reception elements are mounted, and a wiring board provided with a first region which is mounted to the housing and has a pad electrically coupled to the light emission elements and a second region which is disposed at a lower position than the first region and has a pad electrically coupled to the light reception elements.

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H01S 5/0239 - Combinaisons d’éléments électriques ou optiques
• H01S 5/0683 - Stabilisation des paramètres de sortie du laser en surveillant les paramètres optiques de sortie

Abrégé

This optical device (1) is provided with: optical elements (6-9); a sleeve (40) containing a receptable unit (41) and an insertion unit (42); and a base (2) comprising a bottom plate (2A), which has a principal surface (2b) for mounting the optical elements, and a side wall (2B), which has a hole (2g) for insertion of the insertion unit of the sleeve, which optically couples with the optical elements. At the bottom position (2h) of the hole (2g) in the side wall, a step (2j) is formed in a position below the principal surface (2b).

Classes IPC  ?

• G02B 6/42 - Couplage de guides de lumière avec des éléments opto-électroniques
• H01S 5/022 - SupportsBoîtiers

Abrégé

This optical transmitter comprises a control unit for generating a multi-level amplitude modulation signal on the basis of binary transmission data, a drive unit for generating a drive signal in accordance with the multi-level amplitude modulation signal, and a light emitting unit for generating an optical signal in accordance with the drive signal. The control unit selects a first coding scheme or a second coding scheme in accordance with a switching signal. The control unit, using the selected coding scheme, generates a multi-level amplitude modulation signal by converting an M-bit (M is an integer of 2 or more) bit string included in the transmission data into a pulse signal of 2Mlogic levels. The control unit sets a voltage value of 2M logic levels in accordance with the selected coding scheme.

Classes IPC  ?

• H04B 10/516 - Détails du codage ou de la modulation

Abrégé

A transmission component according to the present invention comprising: a substrate including an insulator; a ground layer provided on the substrate; and a signal line provided on a first surface of the substrate and separated from the ground layer, wherein the width of the signal line on one end side of the substrate is greater than the width of the signal line on the other end side of the substrate, and the distance between the ground layer and the signal line on the one end side is greater than the distance between the ground layer and the signal line on the other end side.　

Classes IPC  ?

• H01L 23/02 - ConteneursScellements
• H01L 23/04 - ConteneursScellements caractérisés par la forme
• H01L 23/12 - Supports, p. ex. substrats isolants non amovibles
• H01P 5/02 - Dispositifs de couplage du type guide d'ondes à coefficient de couplage invariable

Abrégé

A method for manufacturing a semiconductor device includes forming a thermosetting resin film on a first metal layer, forming an opening in the resin film, forming a second metal layer that covers a region from an upper surface of the first metal layer exposed from the opening of the resin film to an upper surface of the resin film, performing heat treatment at a temperature equal to or higher than a temperature at which the resin film is cured after forming the second metal layer, forming a cover film that covers the upper surface of the resin film and a side surface of the second metal layer after performing the heat treatment, and forming a solder on an upper surface of the second metal layer exposed from an opening of the cover film after forming the cover film.

Classes IPC  ?

• H01L 23/498 - Connexions électriques sur des substrats isolants
• H01L 21/50 - Assemblage de dispositifs à semi-conducteurs en utilisant des procédés ou des appareils non couverts par l'un uniquement des groupes ou
• H01L 21/48 - Fabrication ou traitement de parties, p. ex. de conteneurs, avant l'assemblage des dispositifs, en utilisant des procédés non couverts par l'un uniquement des groupes ou
• H01L 21/60 - Fixation des fils de connexion ou d'autres pièces conductrices, devant servir à conduire le courant vers le ou hors du dispositif pendant son fonctionnement
• H01L 23/00 - Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide

Abrégé

A capacitor having a MIM structure includes a dielectric formed by laminating a plurality of times on an upper surface of a lower electrode, and an upper electrode on an upper surface of the dielectric. Forming of the dielectric includes forming the first dielectric layer on the upper surface of the lower electrode, cleaning an upper surface of the first dielectric layer by at least one of jet cleaning and dual fluid cleaning, and forming the second dielectric layer on an upper surface of the cleaned first dielectric layer.

Classes IPC  ?

• H01L 23/52 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre
• H01L 49/02 - Dispositifs à film mince ou à film épais
• H01L 23/522 - Dispositions pour conduire le courant électrique à l'intérieur du dispositif pendant son fonctionnement, d'un composant à un autre comprenant des interconnexions externes formées d'une structure multicouche de couches conductrices et isolantes inséparables du corps semi-conducteur sur lequel elles ont été déposées

Abrégé

This high frequency amplifier comprises: a first transistor and a second transistor; a first drain pad connected to the first transistor and a second drain pad connected to the second transistor; a matching circuit pattern that includes a first transmission line connected to the first drain pad and a second transmission line connected to the second drain pad; a first wire and a second wire; and a wiring pattern that is connected to the first drain pad via the first transmission line and the first wire and that is connected to the second drain pad via the second transmission line and the second wire. The effective impedance of the second wire is greater than that of the first wire. The matching circuit pattern has an asymmetric outline. The electrical length of the second transmission line is shorter than that of the first transmission line.

Classes IPC  ?

• H03F 1/26 - Modifications des amplificateurs pour réduire l'influence du bruit provoqué par les éléments amplificateurs
• H03F 3/195 - Amplificateurs à haute fréquence, p. ex. amplificateurs radiofréquence comportant uniquement des dispositifs à semi-conducteurs dans des circuits intégrés
• H03F 3/50 - Amplificateurs dans lesquels le signal d'entrée est appliqué — ou le signal de sortie est recueilli — sur une impédance commune aux circuits d'entrée et de sortie de l'élément amplificateur, p. ex. amplificateurs dits "cathodynes"