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2024
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G/S
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Semi-conductor memories; Semi-conductor memory units; Semiconductor chip sets; Semiconductor chip... |
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Invention
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3d memory cells and array architectures and processes. Various 3D memory cells, array architectur... |
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Invention
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3d cell and array structures. Various 3D cells, array structures, and processes are disclosed. In... |
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Invention
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3d cell and array structures.
Various 3D cells, array structures, and processes are disclosed. I... |
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Invention
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3d memory cells and array architectures.
Various 3D memory cells, array architectures, and proce... |
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Invention
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3d memory cells and array architectures. Various 3D memory cells, array architectures, and proces... |
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Invention
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3d cell and array structures with parallel bit lines and source lines.
Various 3D cells, array s... |
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2023
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Invention
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3d memory cells and array architectures and processes.
Various 3D memory cells, array architectu... |
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Invention
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3d cells and array structures.
Various 3D memory cells, array architectures, and processes are d... |
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Invention
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3d array structures and processes.
Various 3D array structures and processes are disclosed. In a... |
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Invention
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3d cells and array structures and processes.
Various 3D cells, array structures and processes ar... |
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Invention
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3d memory cells and array structures.
Various 3D memory cells, array structures, and processes a... |
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2022
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Invention
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Methods and apparatus for nand flash memory. Methods and apparatus for NAND flash memory are disc... |
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Invention
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Methods and apparatus for a novel memory array. Methods and apparatus for a novel memory array ar... |
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2021
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Invention
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Methods and apparatus for nand flash memory. Methods and apparatus for memory operations disclose... |
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Invention
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Three dimensional double-density memory array.
A three dimensional double-density memory array i... |
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2020
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Invention
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Methods and apparatus for reading nand flash memory. Methods and apparatus for reading NAND flash... |
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2019
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Invention
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Methods and apparatus for a three-dimensional (3d) array having aligned deep-trench contacts. Met... |
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Invention
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Methods and apparatus for a three-dimensional (3d) array having aligned deep-trench contacts.
Me... |
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Invention
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Cmos anti-fuse cell. A CMOS anti-fuse cell is disclosed. In one aspect, an apparatus includes an ... |
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Invention
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Methods and apparatus for writing nonvolatile 3d nand flash memory using multiple-page programmin... |
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2018
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Invention
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3d nand array with divided string architecture. A 3D NAND array with divided string architecture.... |
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Invention
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Method and apparatus for providing multi-page read and write using sram and nonvolatile memory de... |
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2017
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Invention
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Method and apparatus for storing information using a memory able to perform both nvm and dram fun... |
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2016
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Invention
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Compact anti-fuse memory cell using cmos process. A compact CMOS anti-fuse memory cell. In one as... |
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Invention
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Methods and apparatus for a 3d array inside a substrate trench.
A 3D array inside a substrate tr... |
