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2024
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Invention
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Instruction execution method and device for use in sha256, data processing system for use in sha2... |
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Invention
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Timing analysis method and apparatus, and device and medium. Disclosed are a timing analysis meth... |
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2023
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Invention
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Data processing method, zero-knowledge proof accelerator, and storage medium. A data processing m... |
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Invention
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Method and apparatus for implementing finite field operation, and storage medium. Provided are a ... |
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Invention
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Method and device for assigning pins in chip design. The present application discloses a method a... |
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Invention
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Pin position determination method and apparatus, and device and medium. Disclosed are a pin posit... |
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Invention
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Latch unit, multi-bit latch, integrated circuit and preparation method therefor. A latch unit, a ... |
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Invention
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Device configuration method and apparatus, server, and computer readable storage medium. A device... |
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Invention
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Method and apparatus for processing data, device, medium, and program product. The present applic... |
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Invention
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Computing power monitoring method and apparatus for computing power server, and storage medium. A... |
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Invention
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Chip packaging method and device. Provided are a chip packaging method and device. An initial pac... |
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Invention
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Method and apparatus for comparing finite field elements. Disclosed in the present application ar... |
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Invention
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Data encryption method and apparatus, device, and storage medium. Provided is a data encryption m... |
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Invention
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Apparatus and method for accelerating computation, and chip. Provided are an apparatus and method... |
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Invention
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Device and system for realizing data validation. The present invention provides a device and syst... |
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Invention
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Method and apparatus for realizing physical design layout of encryption operation die, and die. D... |
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Invention
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Method and apparatus for accelerating physical verification of large-scale integrated circuit and... |
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Invention
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Integrated circuit design method and apparatus, and integrated circuit and storage system. The pr... |
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Invention
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Method and device for implementing cp testing, and cp testing system. The present application dis... |
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Invention
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Logical unit circuit and adder circuit. iiiiiiii, i representing an ith bit in a multi-bit adder. |
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Invention
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Logical operation unit circuit and adder circuit. i:kk-1:ji:ki:jk-1:ji:ki:ji:j, wherein i, k, and... |
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Invention
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Adder circuit structure and processor. An adder circuit structure and a processor, which are used... |
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Invention
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Logic gate circuit, adder circuit structure, and processor. A logic gate circuit, an adder circui... |
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Invention
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Method and apparatus for locating timing violation on basis of timing report. Disclosed in the pr... |
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Invention
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Method and apparatus for implementing sign-off on the basis of 3d-ic, and computer program. The p... |
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Invention
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Polynomial processing system and method. Provided in the present application are a polynomial pro... |
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Invention
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Instruction processing method and apparatus based on blake2b algorithm, and electronic device and... |
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Invention
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Method and apparatus for implementing big number addition. The present application discloses a me... |
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Invention
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Method and apparatus for implementing large-number operation, and addition operation unit, subtra... |
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Invention
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Instruction processing method and apparatus based on blake2s algorithm, electronic device and sto... |
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Invention
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Random number generation method and apparatus. The present application discloses a random number ... |
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Invention
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Matrix computation apparatus and method for marlin zero-knowledge proof protocol, and device. A m... |
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Invention
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Computing power server, working frequency adjusting method and apparatus therefor, and storage me... |
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Invention
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Apparatus, method, and storage medium for accelerating elliptic curve scalar point multiplication... |
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Invention
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Data processing method and device, terminal, and storage medium. The present application provides... |
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Invention
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Data processing method and system, electronic device, and computer medium. Provided are a data pr... |
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Invention
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Multi-scalar multiplication implementation method and apparatus, terminal, and storage medium. Th... |
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Invention
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Three-dimensional integrated circuit chip, and design method and preparation method therefor. A t... |
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Invention
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Data compression circuit based on security hash algorithm, and chip. A data compression circuit b... |
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Invention
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Logic operation circuit, compression circuit of secure hash algorithm, and chip. A logic operatio... |
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Invention
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Layout structure of overlay error measurement identifier, and chip. The embodiments of the presen... |
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Invention
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Data processing method and apparatus based on proof of work, and chip. Provided in the present ap... |
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Invention
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Data collection structure, method and system, and chip. Disclosed in the embodiments of the prese... |
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Invention
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Integrated circuit chip, and pin setting method and apparatus for hierarchical layout of integrat... |
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Invention
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Data processing method and apparatus, terminal, and storage medium. Provided in the present appli... |
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Invention
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Zero-knowledge proof verification method and device, terminal, and storage medium. The present ap... |
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Invention
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Hierarchical layout of integrated circuit and top power supply arrangement method thereof. Disclo... |
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2022
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Invention
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Polynomial processing method based on zero-knowledge proof. Disclosed in the present application ... |
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Invention
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Package substrate solder ball layout method and apparatus, and chip and storage medium. A package... |
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Invention
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Many-core processor and data transmission method therefor, and computer readable storage medium. ... |
