II-VI Advanced Materials, LLC

United States of America

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IPC Class
C30B 29/36 - Carbides 19
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions 14
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form 14
C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials 10
H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes 9
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Found results for

1.

CRYSTALLINE WAFERS AND PROCESS FOR FORMING CRYSTALLINE WAFERS

      
Application Number 18433031
Status Pending
Filing Date 2024-02-05
First Publication Date 2025-05-01
Owner II-VI Advanced Materials, LLC (USA)
Inventor
  • Chen, Y.K.
  • Tanner, Charles D.
  • Turcaud, Jeremy

Abstract

Methods of forming a crystalline wafers or films such as a diamond wafer or film are disclosed. Such a method may include creating a damaged layer in a seed wafer at a depth from a seed wafer upper surface. The seed wafer may include a diamond crystalline structure. The method may also include growing a diamond epitaxial layer on the seed wafer upper surface via a chemical vapor deposition (CVD) process. A growth temperature of the CVD process may convert the damaged layer into a graphitized interface between the seed wafer and the diamond epitaxial layer. The method may further include applying light from a laser to the graphitized interface to separate the diamond epitaxial layer from the seed wafer and obtain the diamond wafer.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • C30B 25/10 - Heating of the reaction chamber or the substrate
  • C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
  • C30B 29/04 - Diamond
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

2.

POLARIZER, DIFFRACTION GRATING AND META SURFACE FABRICATION VIA ION IMPLANTATION

      
Application Number 18607870
Status Pending
Filing Date 2024-03-18
First Publication Date 2024-12-12
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Barbarossa, Giovanni
  • Chebi, Robert
  • Sundaram, Ramesh
  • Turcaud, Jeremy
  • Greiner, Christoph

Abstract

This disclosure describes the fabrication of a polarizer, a diffraction grating and a meta surface via ion implantation. The polarizer comprises a plurality of non-conducting areas between a wire grid of conducting wires. The conducting wires may comprise nanowires or nanopillars. The wire grid may be a rectangular grid or a hexagonal grid.

IPC Classes  ?

  • G02B 5/30 - Polarising elements
  • B82Y 20/00 - Nanooptics, e.g. quantum optics or photonic crystals
  • B82Y 40/00 - Manufacture or treatment of nanostructures
  • G02B 1/00 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements
  • G02B 1/08 - Optical elements characterised by the material of which they are madeOptical coatings for optical elements made of polarising materials

3.

VANADIUM-COMPENSATED 4H AND 6H SINGLE CRYSTALS OF OPTICAL GRADE, AND SILICON CARBIDE CRYSTALS AND METHODS FOR PRODUCING SAME

      
Application Number 18760286
Status Pending
Filing Date 2024-07-01
First Publication Date 2024-10-24
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan
  • Souzis, Andrew E.
  • Ruland, Gary

Abstract

An optical device includes a vanadium compensated, high resistivity, SiC single crystal of 6H or 4H polytype, for transmitting light having a wavelength in a range of from 420 nm to 4.5 μm. The device may include a window, lens, prism, or waveguide. A system includes a source for generating light having a wavelength in a range of from 420 nm to 4.5 μm, and a device for receiving and transmitting the light, where the device includes a vanadium compensated, high resistivity, SiC single crystal of 6H or 4H polytype. The disclosure also relates to crystals and methods for optical applications, including an aluminum doped SiC crystal having residual nitrogen and boron impurities, where the aluminum concentration is greater than the combined concentrations of nitrogen and boron, and where an optical absorption coefficient is less than about 0.4 cm−1 at a wavelength between about 400 nm to about 800 nm.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C01B 32/956 - Silicon carbide
  • C04B 35/573 - Fine ceramics obtained by reaction sintering
  • C04B 35/65 - Reaction sintering of free metal- or free silicon-containing compositions
  • C30B 29/36 - Carbides
  • G02F 1/00 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities

4.

CONCEPT FOR SILICON CARBIDE POWER DEVICES

      
Application Number 18736039
Status Pending
Filing Date 2024-06-06
First Publication Date 2024-09-26
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schoner, Adolf
  • Thierry-Jebali, Nicolas
  • Vieider, Christian
  • Reshanov, Sergey
  • Elahipanah, Hossein
  • Kaplan, Wlodzimierz

Abstract

A modular concept for Silicon Carbide power devices is disclosed where a low voltage module (LVM) is designed separately from a high voltage module (HVM). The LVM having a repeating structure in at least a first direction, the repeating structure repeats with a regular distance in at least the first direction, the HVM comprising a buried grid (4) with a repeating structure in at least a second direction, the repeating structure repeats with a regular distance in at least the second direction, along any possible defined direction. Advantages include faster easier design and manufacture at a lower cost.

IPC Classes  ?

  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

5.

METHOD FOR PREPARING AN ALUMINUM DOPED SILICON CARBIDE CRYSTAL BY PROVIDING A COMPOUND INCLUDING ALUMINUM AND OXYGEN IN A CAPSULE COMPRISED OF A FIRST AND SECOND MATERIAL

      
Application Number 18655053
Status Pending
Filing Date 2024-05-03
First Publication Date 2024-08-29
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan
  • Souzis, Andrew E.
  • Ruland, Gary E.

Abstract

The present disclosure generally relates to a physical vapor transport system including a chamber, a growth crucible positioned within the chamber, the growth crucible sealable with a growth crucible lid, and a doping capsule positioned within the growth crucible. The doping capsule includes an outer crucible fitted with an outer crucible lid, an inner crucible fitted with an inner crucible lid, the inner crucible fitted with the inner crucible lid positioned within the outer crucible, and a capillary channel formed by a first aperture in the outer crucible lid and a second aperture in the inner crucible lid.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C01B 32/956 - Silicon carbide
  • C04B 35/573 - Fine ceramics obtained by reaction sintering
  • C04B 35/65 - Reaction sintering of free metal- or free silicon-containing compositions
  • C30B 29/36 - Carbides
  • G02F 1/00 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities

6.

CRYSTAL EFFICIENT SIC DEVICE WAFER PRODUCTION

      
Application Number 18645895
Status Pending
Filing Date 2024-04-25
First Publication Date 2024-08-15
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schoner, Adolf
  • Reshanov, Sergey

Abstract

There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.

IPC Classes  ?

  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

7.

SYSTEMS AND METHODS FOR ALUMINUM ION BEAM GENERATION SOURCE TECHNOLOGY

      
Application Number 18426555
Status Pending
Filing Date 2024-01-30
First Publication Date 2024-08-08
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Hassan, Ahmet
  • Pong, Raymond
  • Turcaud, Jeremy
  • Schuur, John

Abstract

An implantation device is disclosed. In particular, an implantation device includes an ionization chamber having a cathode and a repeller arranged therein. A source of aluminum ions is including within the chamber, wherein a displacing gas is introduced to the chamber during an ionization process to yield a beam of energetic aluminum ions.

IPC Classes  ?

  • H01J 37/317 - Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. ion implantation
  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer

8.

BURIED GRID WITH SHIELD IN WIDE BAND GAP MATERIAL

      
Application Number 18631641
Status Pending
Filing Date 2024-04-10
First Publication Date 2024-08-01
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor Elahipanah, Hossein

Abstract

There is disclosed a structure in a wide band gap material such as silicon carbide wherein there is a buried grid and shields covering at least one middle point between two adjacent parts of the buried grid, when viewed from above. Advantages of the invention include easy manufacture without extra lithographic steps compared with standard manufacturing process, an improved trade-off between the current conduction and voltage blocking characteristics of a JBSD comprising the structure.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/40 - Electrodes
  • H01L 29/872 - Schottky diodes

9.

LARGE DIAMETER SILICON CARBIDE SINGLE CRYSTALS AND APPARATUS AND METHOD OF MANUFACTURE THEREOF

      
Application Number 18415291
Status Pending
Filing Date 2024-01-17
First Publication Date 2024-05-09
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Xu, Xueping
  • Zwieback, Iiya
  • Gupta, Avinash
  • Rengarajan, Varatharajan

Abstract

In an apparatus and method growing a SiC single crystal, a PVT growth apparatus is provided with a single crystal SiC seed and a SiC source material positioned in spaced relation in a growth crucible. A resistance heater heats the growth crucible such that the SiC source material sublimates and is transported via a temperature gradient that forms in the growth crucible in response to the heater heating the growth crucible to the single crystal SiC seed where the sublimated SiC source material condenses forming a growing SiC single crystal. Purely axial heat fluxes passing through the bottom and the top of the growth crucible form a flat isotherm at least at a growth interface of the growing SiC single crystal on the single crystal SiC seed.

IPC Classes  ?

  • C30B 25/02 - Epitaxial-layer growth
  • C01B 33/025 - Preparation by reduction of silica or silica-containing material with carbon or a solid carbonaceous material, i.e. carbo-thermal process
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
  • C30B 29/36 - Carbides

10.

ALPHAPACK

      
Serial Number 98147089
Status Pending
Filing Date 2023-08-23
Owner II-VI ADVANCED MATERIALS, LLC ()
NICE Classes  ? 09 - Scientific and electric apparatus and instruments

Goods & Services

Electrical power modules, namely, electronic components in the nature of electric power converters in electrical systems

11.

Concept for silicon carbide power devices

      
Application Number 18295743
Grant Number 12034001
Status In Force
Filing Date 2023-04-04
First Publication Date 2023-08-03
Grant Date 2024-07-09
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schoner, Adolf
  • Thierry-Jebali, Nicolas
  • Vieider, Christian
  • Reshanov, Sergey
  • Elahipanah, Hossein
  • Kaplan, Wlodzimierz

Abstract

A modular concept for Silicon Carbide power devices is disclosed where a low voltage module (LVM) is designed separately from a high voltage module (HVM). The LVM having a repeating structure in at least a first direction, the repeating structure repeats with a regular distance in at least the first direction, the HVM comprising a buried grid (4) with a repeating structure in at least a second direction, the repeating structure repeats with a regular distance in at least the second direction, along any possible defined direction. Advantages include faster easier design and manufacture at a lower cost.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

12.

Buried grid with shield in wide band gap material

      
Application Number 18182621
Grant Number 11984474
Status In Force
Filing Date 2023-03-13
First Publication Date 2023-07-06
Grant Date 2024-05-14
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor Elahipanah, Hossein

Abstract

There is disclosed a structure in a wide band gap material such as silicon carbide wherein there is a buried grid and shields covering at least one middle point between two adjacent parts of the buried grid, when viewed from above. Advantages of the invention include easy manufacture without extra lithographic steps compared with standard manufacturing process, an improved trade-off between the current conduction and voltage blocking characteristics of a JBSD comprising the structure.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/40 - Electrodes
  • H01L 29/872 - Schottky diodes

13.

Integration of a Schottky diode with a MOSFET

      
Application Number 18155394
Grant Number 11984497
Status In Force
Filing Date 2023-01-17
First Publication Date 2023-05-18
Grant Date 2024-05-14
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein
  • Schoner, Adolf
  • Reshanov, Sergey

Abstract

There is disclosed the integration of a Schottky diode with a MOSFET, more in detail there is a free-wheeling Schottky diode and a power MOSFET on top of a buried grid material structure. Advantages of the specific design allow the whole surface area to be used for MOSFET and Schottky diode structures, the shared drift layer is not limited by Schottky diode or MOSFET design rules and therefore, one can decrease the thickness and increase the doping concentration of the drift layer closer to a punch through design compared to the state of the art. This results in higher conductivity and lower on-resistance of the device with no influence on the voltage blocking performance. The integrated device can operate at higher frequency. The risk for bipolar degradation is avoided.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/47 - Schottky barrier electrodes
  • H01L 29/872 - Schottky diodes

14.

Feeder design with high current capability

      
Application Number 18150611
Grant Number 11869940
Status In Force
Filing Date 2023-01-05
First Publication Date 2023-05-11
Grant Date 2024-01-09
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Elahipanah, Hossein
  • Thierry-Jebali, Nicolas
  • Schoner, Adolf
  • Reshanov, Sergey

Abstract

A feeder design is manufactured as a structure in a SiC semiconductor material comprising at least two p-type grids in an n-type SiC material (3), comprising at least one epitaxially grown p-type region, wherein an Ohmic contact is applied on the at least one epitaxially grown p-type region, wherein an epitaxially grown n-type layer is applied on at least a part of the at least two p-type grids and the n-type SiC material (3) wherein the at least two p-type grids (4, 5) are applied in at least a first and a second regions at least close to the at least first and second corners respectively and that there is a region in the n-type SiC material (3) between the first and a second regions without any grids.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/868 - PIN diodes

15.

MOSFET in SiC with self-aligned lateral MOS channel

      
Application Number 17817384
Grant Number 11923450
Status In Force
Filing Date 2022-08-04
First Publication Date 2022-11-24
Grant Date 2024-03-05
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schoner, Adolf
  • Reshanov, Sergey
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein

Abstract

There is disclosed a method for manufacturing a MOSFET with lateral channel in SiC, said MOSFET comprising simultaneously formed n type regions comprising an access region and a JFET region defining the length of the MOS channel, and wherein the access region and the JFET region are formed by ion implantation by using one masking step. The design is self-aligning so that the length of the MOS channel is defined by simultaneous creating n-type regions on both sides of the channel using one masking step. Any misalignment in the mask is moved to other less critical positions in the device. The risk of punch-through is decreased compared to the prior art. The current distribution becomes more homogenous. The short-circuit capability increases. There is lower Drain-Source specific on-resistance due to a reduced MOS channel resistance. There is a lower JFET resistance due to the possibility to increase the JFET region doping concentration.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device

16.

Method for manufacturing a grid

      
Application Number 17660888
Grant Number 11876116
Status In Force
Filing Date 2022-04-27
First Publication Date 2022-08-11
Grant Date 2024-01-16
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schoner, Adolf
  • Reshanov, Sergey
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein

Abstract

A grid is manufactured with a combination of ion implant and epitaxy growth. The grid structure is made in a SiC semiconductor material with the steps of a) providing a substrate comprising a doped semiconductor SiC material, said substrate comprising a first layer (n1), b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions (p2) on the first layer (n1), if necessary with aid of removing parts of the added semiconductor material to form separated second regions (p2) on the first layer (n1), and c) by ion implantation at least once at a stage selected from the group consisting of directly after step a), and directly after step b); implanting ions in the first layer (n1) to form first regions (p1). It is possible to manufacture a grid with rounded corners as well as an upper part with a high doping level. It is possible to manufacture a component with efficient voltage blocking, high current conduction, low total resistance, high surge current capability, and fast switching.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 29/40 - Electrodes
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/3065 - Plasma etchingReactive-ion etching
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

17.

Crystal efficient SiC device wafer production

      
Application Number 17595173
Grant Number 11996330
Status In Force
Filing Date 2020-05-20
First Publication Date 2022-07-14
Grant Date 2024-05-28
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schöner, Adolf
  • Reshanov, Sergey

Abstract

There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.

IPC Classes  ?

  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

18.

Concept for silicon for carbide power devices

      
Application Number 17577226
Grant Number 11652099
Status In Force
Filing Date 2022-01-17
First Publication Date 2022-05-05
Grant Date 2023-05-16
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schöner, Adolf
  • Thierry-Jebali, Nicolas
  • Vieider, Christian
  • Reshanov, Sergey
  • Elahipanah, Hossein
  • Kaplan, Wlodzimierz

Abstract

A modular concept for Silicon Carbide power devices is disclosed where a low voltage module (LVM) is designed separately from a high voltage module (HVM). The LVM having a repeating structure in at least a first direction, the repeating structure repeats with a regular distance in at least the first direction, the HVM comprising a buried grid (4) with a repeating structure in at least a second direction, the repeating structure repeats with a regular distance in at least the second direction, along any possible defined direction. Advantages include faster easier design and manufacture at a lower cost.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

19.

SIC SINGLE CRYSTAL(S) DOPED FROM GAS PHASE

      
Application Number 17444863
Status Pending
Filing Date 2021-08-11
First Publication Date 2022-02-17
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan

Abstract

An apparatus for sublimation growth of a doped SiC single crystal includes a growth crucible, an envelope, a heater, and a passage for introducing into the envelope from a source outside the envelope a doping gas mixture. The gas mixture includes a gaseous dopant precursor that, in response to entering a space between the growth crucible and the envelope, undergoes chemical transformation and releases into the space between the growth crucible and the envelope dopant-bearing gaseous products of transformation which penetrate the wall of the crucible, move into the crucible, and absorb on a growth interface of a growing SiC crystal thereby causing doping of the growing crystal. A sublimation growth method is also described.

IPC Classes  ?

  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
  • C30B 29/36 - Carbides
  • C23C 14/06 - Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material

20.

Integration of a Schottky diode with a MOSFET

      
Application Number 17444817
Grant Number 11581431
Status In Force
Filing Date 2021-08-10
First Publication Date 2022-01-27
Grant Date 2023-02-14
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein
  • Schöner, Adolf
  • Reshanov, Sergey

Abstract

There is disclosed the integration of a Schottky diode with a MOSFET, more in detail there is a free-wheeling Schottky diode and a power MOSFET on top of a buried grid material structure. Advantages of the specific design allow the whole surface area to be used for MOSFET and Schottky diode structures, the shared drift layer is not limited by Schottky diode or MOSFET design rules and therefore, one can decrease the thickness and increase the doping concentration of the drift layer closer to a punch through design compared to the state of the art. This results in higher conductivity and lower on-resistance of the device with no influence on the voltage blocking performance. The integrated device can operate at higher frequency. The risk for bipolar degradation is avoided.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/47 - Schottky barrier electrodes
  • H01L 27/07 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/872 - Schottky diodes

21.

Feeder design with high current capability

      
Application Number 17448790
Grant Number 11575007
Status In Force
Filing Date 2021-09-24
First Publication Date 2022-01-20
Grant Date 2023-02-07
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Elahipanah, Hossein
  • Thierry-Jebali, Nicolas
  • Schöner, Adolf
  • Reshanov, Sergey

Abstract

A feeder design is manufactured as a structure in a SIC semiconductor material comprising at least two p-type grids in an n-type SiC material (3), comprising at least one epitaxially grown p-type region, wherein an Ohmic contact is applied on the at least one epitaxially grown p-type region, wherein an epitaxially grown n-type layer is applied on at least a part of the at least two p-type grids and the n-type SiC material (3) wherein the at least two p-type grids (4, 5) are applied in at least a first and a second regions at least close to the at least first and second corners respectively and that there is a region in the n-type SiC material (3) between the first and a second regions without any grids.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/868 - PIN diodes

22.

SiC single crystal sublimation growth apparatus

      
Application Number 17447742
Grant Number 11761117
Status In Force
Filing Date 2021-09-15
First Publication Date 2022-01-06
Grant Date 2023-09-19
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Gupta, Avinash
  • Zwieback, Ilya
  • Semenas, Edward
  • Getkin, Marcus
  • Flynn, Patrick

Abstract

A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.

IPC Classes  ?

  • C30B 29/36 - Carbides
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated

23.

Vanadium-compensated 4H and 6H single crystals of optical grade, and silicon carbide crystals and methods for producing same

      
Application Number 17249395
Grant Number 12060650
Status In Force
Filing Date 2021-03-01
First Publication Date 2021-09-02
Grant Date 2024-08-13
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan
  • Souzis, Andrew E.
  • Ruland, Gary

Abstract

−1 at a wavelength between about 400 nm to about 800 nm.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C01B 32/956 - Silicon carbide
  • C04B 35/573 - Fine ceramics obtained by reaction sintering
  • C04B 35/65 - Reaction sintering of free metal- or free silicon-containing compositions
  • C30B 29/36 - Carbides
  • G02F 1/00 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities

24.

Method for preparing an aluminum doped silicon carbide crystal by providing a compound including aluminum and oxygen in a capsule comprised of a first and second material

      
Application Number 17029746
Grant Number 12006591
Status In Force
Filing Date 2020-09-23
First Publication Date 2021-09-02
Grant Date 2024-06-11
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan
  • Souzis, Andrew E.
  • Ruland, Gary E.

Abstract

−1 at a wavelength in a range between about 400 nm to about 800 nm.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C01B 32/956 - Silicon carbide
  • C04B 35/573 - Fine ceramics obtained by reaction sintering
  • C04B 35/65 - Reaction sintering of free metal- or free silicon-containing compositions
  • C30B 29/36 - Carbides
  • G02F 1/00 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities

25.

Buried grid with shield in wide band gap material

      
Application Number 17055686
Grant Number 11626478
Status In Force
Filing Date 2019-05-22
First Publication Date 2021-07-01
Grant Date 2023-04-11
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor Elahipanah, Hossein

Abstract

There is disclosed a structure in a wide band gap material such as silicon carbide wherein there is a buried grid and shields covering at least one middle point between two adjacent parts of the buried grid, when viewed from above. Advantages of the invention include easy manufacture without extra lithographic steps compared with standard manufacturing process, an improved trade-off between the current conduction and voltage blocking characteristics of a JBSD comprising the structure.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/872 - Schottky diodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/40 - Electrodes

26.

Large diameter silicon carbide single crystals and apparatus and method of manufacture thereof

      
Application Number 17249597
Grant Number 11905618
Status In Force
Filing Date 2021-03-05
First Publication Date 2021-06-24
Grant Date 2024-02-20
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Xu, Xueping
  • Zwieback, Ilya
  • Gupta, Avinash
  • Rengarajan, Varatharajan

Abstract

In an apparatus and method growing a SiC single crystal, a PVT growth apparatus is provided with a single crystal SiC seed and a SiC source material positioned in spaced relation in a growth crucible. A resistance heater heats the growth crucible such that the SiC source material sublimates and is transported via a temperature gradient that forms in the growth crucible in response to the heater heating the growth crucible to the single crystal SiC seed where the sublimated SiC source material condenses forming a growing SiC single crystal. Purely axial heat fluxes passing through the bottom and the top of the growth crucible form a flat isotherm at least at a growth interface of the growing SiC single crystal on the single crystal SiC seed.

IPC Classes  ?

  • C30B 25/02 - Epitaxial-layer growth
  • C30B 29/36 - Carbides
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
  • C01B 33/025 - Preparation by reduction of silica or silica-containing material with carbon or a solid carbonaceous material, i.e. carbo-thermal process

27.

Integration of a Schottky diode with a MOSFET

      
Application Number 16647186
Grant Number 11114557
Status In Force
Filing Date 2018-09-14
First Publication Date 2021-04-29
Grant Date 2021-09-07
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein
  • Schöner, Adolf
  • Reshanov, Sergey

Abstract

There is disclosed the integration of a Schottky diode with a MOSFET, more in detail there is a free-wheeling Schottky diode and a power MOSFET on top of a buried grid material structure. Advantages of the specific design allow the whole surface area to be used for MOSFET and Schottky diode structures, the shared drift layer is not limited by Schottky diode or MOSFET design rules and therefore, one can decrease the thickness and increase the doping concentration of the drift layer closer to a punch through design compared to the state of the art. This results in higher conductivity and lower on-resistance of the device with no influence on the voltage blocking performance. The integrated device can operate at higher frequency. The risk for bipolar degradation is avoided.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/47 - Schottky barrier electrodes

28.

MOSFET in sic with self-aligned lateral MOS channel

      
Application Number 17256952
Grant Number 11444192
Status In Force
Filing Date 2019-06-28
First Publication Date 2021-04-29
Grant Date 2022-09-13
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schöner, Adolf
  • Reshanov, Sergey
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein

Abstract

b) are formed by ion implantation by using one masking step. The design is self-aligning so that the length of the MOS channel (17) is defined by simultaneous creating n-type regions on both sides of the channel (17) using one masking step. Any misalignment in the mask is moved to other less critical positions in the device. The risk of punch-through is decreased compared to the prior art. The current distribution becomes more homogenous. The short-circuit capability increases. There is lower Drain-Source specific on-resistance due to a reduced MOS channel resistance. There is a lower JFET resistance due to the possibility to increase the JFET region doping concentration.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device

29.

Vanadium compensated, SI SiC single crystals of NU and PI type and the crystal growth process thereof

      
Application Number 15583538
Grant Number RE048378
Status In Force
Filing Date 2017-05-01
First Publication Date 2021-01-05
Grant Date 2021-01-05
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Wu, Ping
  • Rengarajan, Varatharajan
  • Gupta, Avinash K.
  • Anderson, Thomas E.
  • Ruland, Gary E.
  • Souzis, Andrew E.
  • Xu, Xueping

Abstract

In a crystal growth apparatus and method, polycrystalline source material and a seed crystal are introduced into a growth ambient comprised of a growth crucible disposed inside of a furnace chamber. In the presence of a first sublimation growth pressure, a single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a first gas that includes a reactive component that reacts with and removes donor and/or acceptor background impurities from the growth ambient during said sublimation growth. Then, in the presence of a second sublimation growth pressure, the single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a second gas that includes dopant vapors, but which does not include the reactive component.

IPC Classes  ?

  • H01B 1/02 - Conductors or conductive bodies characterised by the conductive materialsSelection of materials as conductors mainly consisting of metals or alloys
  • H01B 3/02 - Insulators or insulating bodies characterised by the insulating materialsSelection of materials for their insulating or dielectric properties mainly consisting of inorganic substances
  • C30B 29/36 - Carbides
  • H01B 1/22 - Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials

30.

Feeder design with high current capability

      
Application Number 16647202
Grant Number 11158706
Status In Force
Filing Date 2018-09-14
First Publication Date 2020-08-20
Grant Date 2021-10-26
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Elahipanah, Hossein
  • Thierry-Jebali, Nicolas
  • Schöner, Adolf
  • Reshanov, Sergey

Abstract

A feeder design is manufactured as a structure in a SiC semiconductor material comprising at least two p-type grids in an n-type SiC material, comprising at least one epitaxially grown p-type region, wherein an Ohmic contact is applied on the at least one epitaxially grown p-type region, wherein an epitaxially grown n-type layer is applied on at least a part of the at least two p-type grids and the n-type SiC material wherein the at least two p-type grids are applied in at least a first and a second regions at least close to the at least first and second corners respectively and that there is a region in the n-type SiC material between the first and a second regions without any grids.

IPC Classes  ?

  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/868 - PIN diodes

31.

Concept for silicon carbide power devices

      
Application Number 16647067
Grant Number 11276681
Status In Force
Filing Date 2018-09-14
First Publication Date 2020-07-30
Grant Date 2022-03-15
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schöner, Adolf
  • Thierry-Jebali, Nicolas
  • Vieider, Christian
  • Reshanov, Sergey
  • Elahipanah, Hossein
  • Kaplan, Wlodzimierz

Abstract

A modular concept for Silicon Carbide power devices is disclosed where a low voltage module (LVM) is designed separately from a high voltage module (HVM). The LVM having a repeating structure in at least a first direction, the repeating structure repeats with a regular distance in at least the first direction, the HVM comprising a buried grid with a repeating structure in at least a second direction, the repeating structure repeats with a regular distance in at least the second direction, along any possible defined direction. Advantages include faster easier design and manufacture at a lower cost.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

32.

Method for manufacturing a grid

      
Application Number 16647094
Grant Number 11342423
Status In Force
Filing Date 2018-09-14
First Publication Date 2020-07-09
Grant Date 2022-05-24
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Schöner, Adolf
  • Reshanov, Sergey
  • Thierry-Jebali, Nicolas
  • Elahipanah, Hossein

Abstract

A grid is manufactured with a combination of ion implant and epitaxy growth. The grid structure is made in a SiC semiconductor material with the steps of a) providing a substrate comprising a doped semiconductor SiC material, said substrate comprising a first layer (n1), b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions (p2) on the first layer (n1), if necessary with aid of removing parts of the added semiconductor material to form separated second regions (p2) on the first layer (n1), and c) by ion implantation at least once at a stage selected from the group consisting of directly after step a), and directly after step b); implanting ions in the first layer (n1) to form first regions (p1). It is possible to manufacture a grid with rounded corners as well as an upper part with a high doping level. It is possible to manufacture a component with efficient voltage blocking, high current conduction, low total resistance, high surge current capability, and fast switching.

IPC Classes  ?

  • H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
  • H01L 29/40 - Electrodes
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/3065 - Plasma etchingReactive-ion etching
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

33.

Large diameter silicon carbide single crystals and apparatus and method of manufacture thereof

      
Application Number 16458385
Grant Number 11035054
Status In Force
Filing Date 2019-07-01
First Publication Date 2019-10-24
Grant Date 2021-06-15
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Xu, Xueping
  • Zwieback, Ilya
  • Gupta, Avinash K.
  • Rengarajan, Varatharajan

Abstract

In an apparatus and method growing a SiC single crystal, a PVT growth apparatus is provided with a single crystal SiC seed and a SiC source material positioned in spaced relation in a growth crucible. A resistance heater heats the growth crucible such that the SiC source material sublimates and is transported via a temperature gradient that forms in the growth crucible in response to the heater heating the growth crucible to the single crystal SiC seed where the sublimated SiC source material condenses forming a growing SiC single crystal. Purely axial heat fluxes passing through the bottom and the top of the growth crucible form a flat isotherm at least at a growth interface of the growing SiC single crystal on the single crystal SiC seed.

IPC Classes  ?

  • C30B 25/02 - Epitaxial-layer growth
  • C30B 29/36 - Carbides
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
  • C01B 33/025 - Preparation by reduction of silica or silica-containing material with carbon or a solid carbonaceous material, i.e. carbo-thermal process

34.

SiC single crystal sublimation growth apparatus

      
Application Number 16368977
Grant Number 11149359
Status In Force
Filing Date 2019-03-29
First Publication Date 2019-08-15
Grant Date 2021-10-19
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Gupta, Avinash
  • Zwieback, Ilya
  • Semenas, Edward
  • Getkin, Marcus
  • Flynn, Patrick

Abstract

A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.

IPC Classes  ?

  • C30B 29/36 - Carbides
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated

35.

Large diameter, high quality SiC single crystals, method and apparatus

      
Application Number 14506963
Grant Number RE046315
Status In Force
Filing Date 2014-10-06
First Publication Date 2017-02-21
Grant Date 2017-02-21
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Anderson, Thomas E.
  • Souzis, Andrew E.
  • Ruland, Gary E.
  • Gupta, Avinash K.
  • Rengarajan, Varatharajan
  • Wu, Ping
  • Xu, Xueping

Abstract

A method and system of forming large-diameter SiC single crystals suitable for fabricating high crystal quality SiC substrates of 100, 125, 150 and 200 mm in diameter are described. The SiC single crystals are grown by a seeded sublimation technique in the presence of a shallow radial temperature gradient. During SiC sublimation growth, a flux of SiC bearing vapors filtered from carbon particulates is substantially restricted to a central area of the surface of the seed crystal by a separation plate disposed between the seed crystal and a source of the SiC bearing vapors. The separation plate includes a first, substantially vapor-permeable part surrounded by a second, substantially non vapor-permeable part. The grown crystals have a flat or slightly convex growth interface. Large-diameter SiC wafers fabricated from the grown crystals exhibit low lattice curvature and low densities of crystal defects, such as stacking faults, inclusions, micropipes and dislocations.

IPC Classes  ?

  • B32B 3/00 - Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form
  • C30B 11/14 - Single-crystal-growth by normal freezing or freezing under temperature gradient, e.g. Bridgman- Stockbarger method characterised by the seed, e.g. its crystallographic orientation
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 29/36 - Carbides
  • B28D 5/00 - Fine working of gems, jewels, crystals, e.g. of semiconductor materialApparatus therefor

36.

Method for silicon carbide crystal growth by reacting elemental silicon vapor with a porous carbon solid source material

      
Application Number 14475803
Grant Number 09580837
Status In Force
Filing Date 2014-09-03
First Publication Date 2016-03-03
Grant Date 2017-02-28
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Rengarajan, Varatharajan
  • Brouhard, Bryan K.
  • Nolan, Michael C.
  • Anderson, Thomas E.

Abstract

2, are introduced into the crucible via separate inlets and mix in the crucible interior. The crucible is heated in a manner that encourages chemical reaction between the halosilane gas and the reducing gas leading to the chemical reduction of the halosilane gas to elemental silicon (Si) vapor. The produced Si vapor is transported to the solid carbon source material where it reacts with the solid carbon source material yielding volatile Si-bearing and C-bearing molecules. The produced Si-bearing and C-bearing vapors are transported to the SiC single crystal seed and precipitate on the SiC single crystal seed causing growth of a SiC single crystal on the SiC single crystal seed.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C30B 29/36 - Carbides
  • C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
  • C30B 25/02 - Epitaxial-layer growth

37.

Silicon carbide with low nitrogen content and method for preparation

      
Application Number 11784971
Grant Number 08858709
Status In Force
Filing Date 2007-04-10
First Publication Date 2014-10-14
Grant Date 2014-10-14
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Gupta, Avinash K.

Abstract

A physical vapor deposition method of growing a crystal includes providing a seed crystal and a source material in spaced relation inside of a growth crucible that is at least in-part gas permeable to an unwanted gas. The growth chamber is heated whereupon the source material sublimates and is transported via a temperature gradient in the growth chamber to the seed crystal where the sublimated source material precipitates. Concurrent with heating the growth chamber, a purging gas is caused to flow inside or outside of the growth crucible in a manner whereupon the unwanted gas flows from the inside to the outside of the growth crucible via the gas permeable part thereof.

IPC Classes  ?

  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials

38.

Vanadium doped SiC single crystals and method thereof

      
Application Number 14064604
Grant Number 09322110
Status In Force
Filing Date 2013-10-28
First Publication Date 2014-08-21
Grant Date 2016-04-26
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Anderson, Thomas E.
  • Gupta, Avinash K.
  • Nolan, Michael C.
  • Brouhard, Bryan K.
  • Ruland, Gary E.

Abstract

A sublimation grown SiC single crystal includes vanadium dopant incorporated into the SiC single crystal structure via introduction of a gaseous vanadium compound into a growth environment of the SiC single crystal during growth of the SiC single crystal.

IPC Classes  ?

39.

Vanadium compensated, SI SiC single crystals of NU and PI type and the crystal growth process thereof

      
Application Number 13902016
Grant Number 09090989
Status In Force
Filing Date 2013-05-24
First Publication Date 2013-12-05
Grant Date 2015-07-28
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Wu, Ping
  • Rengarajan, Varatharajan
  • Gupta, Avinash K.
  • Anderson, Thomas E.
  • Ruland, Gary E.
  • Souzis, Andrew E.
  • Xu, Xueping

Abstract

In a crystal growth apparatus and method, polycrystalline source material and a seed crystal are introduced into a growth ambient comprised of a growth crucible disposed inside of a furnace chamber. In the presence of a first sublimation growth pressure, a single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a first gas that includes a reactive component that reacts with and removes donor and/or acceptor background impurities from the growth ambient during said sublimation growth. Then, in the presence of a second sublimation growth pressure, the single crystal is sublimation grown on the seed crystal via precipitation of sublimated source material on the seed crystal in the presence of a flow of a second gas that includes dopant vapors, but which does not include the reactive component.

IPC Classes  ?

  • H01B 1/02 - Conductors or conductive bodies characterised by the conductive materialsSelection of materials as conductors mainly consisting of metals or alloys
  • H01B 1/22 - Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 29/36 - Carbides
  • H01B 3/02 - Insulators or insulating bodies characterised by the insulating materialsSelection of materials for their insulating or dielectric properties mainly consisting of inorganic substances

40.

Method for synthesizing ultrahigh-purity silicon carbide

      
Application Number 13951808
Grant Number 09388509
Status In Force
Filing Date 2013-07-26
First Publication Date 2013-11-21
Grant Date 2016-07-12
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Gupta, Avinash K.
  • Wu, Ping
  • Barrett, Donovan L.
  • Ruland, Gary E.
  • Anderson, Thomas E.

Abstract

In a method of forming polycrystalline SiC grain material, low-density, gas-permeable and vapor-permeable bulk carbon is positioned at a first location inside of a graphite crucible and a mixture of elemental silicon and elemental carbon is positioned at a second location inside of the graphite crucible. Thereafter, the mixture and the bulk carbon are heated to a first temperature below the melting point of the elemental Si to remove adsorbed gas, moisture and/or volatiles from the mixture and the bulk carbon. Next, the mixture and the bulk carbon are heated to a second temperature that causes the elemental Si and the elemental C to react forming as-synthesized SiC inside of the crucible. The as-synthesized SiC and the bulk carbon are then heated in a way to cause the as-synthesized SiC to sublime and produce vapors that migrate into, condense on and react with the bulk carbon forming polycrystalline SiC material.

IPC Classes  ?

  • C30B 28/10 - Production of homogeneous polycrystalline material with defined structure from liquids by pulling from a melt
  • C30B 29/36 - Carbides
  • C30B 28/12 - Production of homogeneous polycrystalline material with defined structure directly from the gas state

41.

Large diameter, high quality SiC single crystals, method and apparatus

      
Application Number 13867198
Grant Number 08741413
Status In Force
Filing Date 2013-04-22
First Publication Date 2013-10-24
Grant Date 2014-06-03
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Anderson, Thomas E.
  • Souzis, Andrew E.
  • Ruland, Gary E.
  • Gupta, Avinash K.
  • Rengarajan, Varatharajan
  • Wu, Ping
  • Xu, Xueping

Abstract

A method and system of forming large-diameter SiC single crystals suitable for fabricating high crystal quality SiC substrates of 100, 125, 150 and 200 mm in diameter are described. The SiC single crystals are grown by a seeded sublimation technique in the presence of a shallow radial temperature gradient. During SiC sublimation growth, a flux of SiC bearing vapors filtered from carbon particulates is substantially restricted to a central area of the surface of the seed crystal by a separation plate disposed between the seed crystal and a source of the SiC bearing vapors. The separation plate includes a first, substantially vapor-permeable part surrounded by a second, substantially non vapor-permeable part. The grown crystals have a flat or slightly convex growth interface. Large-diameter SiC wafers fabricated from the grown crystals exhibit low lattice curvature and low densities of crystal defects, such as stacking faults, inclusions, micropipes and dislocations.

IPC Classes  ?

  • B32B 3/00 - Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shapeLayered products comprising a layer having particular features of form

42.

Halosilane assisted PVT growth of SiC

      
Application Number 13471866
Grant Number 08512471
Status In Force
Filing Date 2012-05-15
First Publication Date 2012-09-06
Grant Date 2013-08-20
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Anderson, Thomas E.
  • Gupta, Avinash K.

Abstract

In a physical vapor transport growth technique for silicon carbide a silicon carbide powder and a silicon carbide seed crystal are introduced into a physical vapor transport growth system and halosilane gas is introduced separately into the system. The source powder, the halosilane gas, and the seed crystal are heated in a manner that encourages physical vapor transport growth of silicon carbide on the seed crystal, as well as chemical transformations in the gas phase leading to reactions between halogen and chemical elements present in the growth system.

IPC Classes  ?

43.

SiC single crystal sublimation growth method and apparatus

      
Application Number 13255151
Grant Number 10294584
Status In Force
Filing Date 2010-03-25
First Publication Date 2012-05-03
Grant Date 2019-05-21
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Gupta, Avinash K.
  • Zwieback, Ilya
  • Semenas, Edward
  • Getkin, Marcus L.
  • Flynn, Patrick D.

Abstract

A physical vapor transport growth system includes a growth chamber charged with SiC source material and a SiC seed crystal in spaced relation and an envelope that is at least partially gas-permeable disposed in the growth chamber. The envelope separates the growth chamber into a source compartment that includes the SiC source material and a crystallization compartment that includes the SiC seed crystal. The envelope is formed of a material that is reactive to vapor generated during sublimation growth of a SiC single crystal on the SiC seed crystal in the crystallization compartment to produce C-bearing vapor that acts as an additional source of C during the growth of the SiC single crystal on the SiC seed crystal.

IPC Classes  ?

  • C30B 23/02 - Epitaxial-layer growth
  • C30B 29/36 - Carbides
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated

44.

Axial gradient transport growth process and apparatus utilizing resistive heating

      
Application Number 12632906
Grant Number 09228274
Status In Force
Filing Date 2009-12-08
First Publication Date 2010-06-10
Grant Date 2016-01-05
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Rengarajan, Varatharajan
  • Brouhard, Bryan K.
  • Nolan, Michael C.
  • Zwieback, Ilya

Abstract

A crucible has a first resistance heater is disposed in spaced relation above the top of the crucible and a second resistance heater with a first resistive section disposed in spaced relation beneath the bottom of the crucible and with a second resistive section disposed in spaced relation around the outside of the side of the crucible. The crucible is charged with a seed crystal at the top of an interior of the crucible and a source material in the interior of the crucible in spaced relation between the seed crystal and the bottom of the crucible. Electrical power of a sufficient extent is applied to the first and second resistance heaters to create in the interior of the crucible a temperature gradient of sufficient temperature to cause the source material to sublimate and condense on the seed crystal thereby forming a growing crystal.

IPC Classes  ?

  • C30B 23/06 - Heating of the deposition chamber, the substrate, or the materials to be evaporated
  • C30B 29/36 - Carbides

45.

Guided diameter SiC sublimation growth with multi-layer growth guide

      
Application Number 12522549
Grant Number 08313720
Status In Force
Filing Date 2008-01-15
First Publication Date 2010-03-11
Grant Date 2012-11-20
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Gupta, Avinash K.
  • Semenas, Edward
  • Anderson, Thomas E.

Abstract

In the growth of a SiC boule, a growth guide is provided inside of a growth crucible that is charged with SiC source material at a bottom of the crucible and a SiC seed crystal at a top of the crucible. The growth guide has an inner layer that defines at least part of an opening in the growth guide and an outer layer that supports the inner layer in the crucible. The opening faces the source material with the seed crystal positioned at an end of the opening opposite the source material. The inner layer is formed from a first material having a higher thermal conductivity than the second, different material forming the outer layer. The source material is sublimation grown on the seed crystal in the growth crucible via the opening in the growth guide to thereby form the SiC boule on the seed crystal.

IPC Classes  ?

46.

System for forming SiC crystals having spatially uniform doping impurities

      
Application Number 12573288
Grant Number 08216369
Status In Force
Filing Date 2009-10-05
First Publication Date 2010-01-28
Grant Date 2012-07-10
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Gupta, Avinash K.
  • Semenas, Edward
  • Zwieback, Ilya
  • Barrett, Donovan L.
  • Souzis, Andrew E.

Abstract

A physical vapor transport system includes a growth chamber charged with source material and a seed crystal in spaced relation, and at least one capsule having at least one capillary extending between an interior thereof and an exterior thereof, wherein the interior of the capsule is charged with a dopant. Each capsule is installed in the growth chamber. Through a growth reaction carried out in the growth chamber following installation of each capsule therein, a crystal is formed on the seed crystal using the source material, wherein the formed crystal is doped with the dopant.

IPC Classes  ?

  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials

47.

Intra-cavity gettering of nitrogen in SiC crystal growth

      
Application Number 12067258
Grant Number 09017629
Status In Force
Filing Date 2006-09-27
First Publication Date 2009-07-02
Grant Date 2015-04-28
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Barrett, Donovan L.
  • Gupta, Avinash K.

Abstract

In method of crystal growth, an interior of a crystal growth chamber (2) is heated to a first temperature in the presence of a first vacuum pressure whereupon at least one gas absorbed in a material (4) disposed inside the chamber is degassed therefrom. The interior of the chamber is then exposed to an inert gas at a second, higher temperature in the presence of a second vacuum pressure that is at a higher pressure than the first vacuum pressure. The inert gas pressure in the chamber is then reduced to a third vacuum pressure that is between the first and second vacuum pressures and the temperature inside the chamber is lowered to a third temperature that is between the first and second temperatures, whereupon source material (10) inside the chamber vaporizes and deposits on a seed crystal (12) inside the chamber.

IPC Classes  ?

  • C01B 31/36 - Carbides of silicon or boron
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 29/36 - Carbides
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

48.

Silicon carbide single crystals with low boron content

      
Application Number 11900242
Grant Number 08361227
Status In Force
Filing Date 2007-09-11
First Publication Date 2008-03-27
Grant Date 2013-01-29
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Zwieback, Ilya
  • Anderson, Thomas E.
  • Gupta, Avinash K.

Abstract

In a crystal growth method, an enclosed growth crucible is provided inside of a growth chamber. The growth crucible has polycrystalline source material and a seed crystal disposed in spaced relation therein. The interior of the growth crucible is heated whereupon a temperature gradient forms between the source material and the seed crystal. The temperature gradient is sufficient to cause the source material to sublimate and be transported to the seed crystal where it precipitates on the seed crystal. A gas mixture is caused to flow into the growth crucible and between the polycrystalline source material and an interior surface of the growth crucible. The gas mixture reacts with an unwanted element in the body of the growth crucible to form a gaseous byproduct which then flows through the body of the growth crucible to the exterior of the growth crucible.

IPC Classes  ?

  • C30B 21/02 - Unidirectional solidification of eutectic materials by normal casting or gradient freezing

49.

Method of and system for forming SiC crystals having spatially uniform doping impurities

      
Application Number 11405368
Grant Number 07608524
Status In Force
Filing Date 2006-04-17
First Publication Date 2006-11-02
Grant Date 2009-10-27
Owner II-VI ADVANCED MATERIALS, LLC (USA)
Inventor
  • Gupta, Avinash K.
  • Semenas, Edward
  • Zwieback, Ilya
  • Barrett, Donovan L.
  • Souzis, Andrew E.

Abstract

In a physical vapor transport method and system, a growth chamber charged with source material and a seed crystal in spaced relation is provided. At least one capsule having at least one capillary extending between an interior thereof and an exterior thereof, wherein the interior of the capsule is charged with a dopant, is also provided. Each capsule is installed in the growth chamber. Through a growth reaction carried out in the growth chamber following installation of each capsule therein, a crystal is formed on the seed crystal using the source material, wherein the formed crystal is doped with the dopant.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth