A current mode switching converter includes a transistor switch, an inductor configured to conduct a ramping inductor current as the transistor switch is turned on and off at a particular duty cycle, and an inductor current sensor generating a current sense signal. The current sense signal has an up-slope portion and a down-slope portion. A separate ramp generator generates a ramp voltage for each switching cycle. A slope compensation circuit compensates the ramp voltage, depending on the duty cycle and other factors, to create a compensated ramp voltage. The compensated ramp voltage is then summed with the current sense signal to create a compensated current sense signal for a comparator. The slope compensation circuit forces the compensated current sense signal to have an up-slope greater than an absolute value of its down-slope at least for duty cycles greater than 50% to rapidly dampen perturbations in the duty cycle.
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
A mesh network system includes a plurality of network nodes, a network manager, and at least one access point. The network nodes communicate wirelessly with each other and the at least one access point of the mesh network system. The network manager manages operation of a wireless mesh network including the nodes and the at least one access point. The at least one access point communicates wirelessly with the network nodes, and provides a gateway between the wireless mesh network and the network manager. The at least one network access point is operative to synchronize its operation timing to an external clock, such as a GPS or UTC clock. Furthermore, in wireless mesh networks including multiple access points, the access points can synchronize their operation timing to each other, and can provide timing information to other access points and nodes in the network.
A wireless mesh network system includes network nodes that operate in blink and canopy modes of operation. In operation, a network manager joins nodes operating in the canopy node to the network and allocates network bandwidth to the canopy nodes. The allocated bandwidth includes a first bandwidth allocated for transmitting and receiving data packets between canopy nodes that are joined to the network, and a second bandwidth allocation for receiving network joining messages from nodes that are not joined to the network. The second bandwidth allocation is also used for receiving data messages from nodes operating in the blink mode. Thus, in response to receiving a message that was transmitted from a blink node to a canopy node using the second bandwidth allocation, the network manager identifies the message as a data message and provides the data from the message to a host application.
A switch mode power supply may utilize a switching signal to control one or more power switches in the switch mode power supply. A switch mode power supply controller may generate and/or control this switching signal. The controller may reduce the peak spectral noise of the switch mode power supply by varying the instantaneous switching frequency at a constant slew rate magnitude that changes sign at random times. The instantaneous switching frequency may be controlled by a signal that is generated by integrating a random bit stream. The stream may repeat at a sub-audio frequency. The integrator may be lossy, so that the output does not wonder off to an arbitrary value. The frequency modulation signal may be filtered by a low pass filter.
A threshold detection circuit may sense when current between a power supply and a load reaches a current threshold level. The threshold detection circuit may include a transistor in series with the load; a feedback circuit that causes the voltage drop across the transistor to be constant while the transistor is conducting current between the power supply and the load; a constant current source that delivers a constant current into the load; and a comparator that indicates when the voltage drop across the transistor falls below a voltage threshold level.
Circuits and techniques are described for detecting a ground fault leak between the PSE (10) and the PD (12). Prior to PoDL voltage being applied to the PD (12), a test switch (24) is temporarily closed for sensing a voltage drop in a loop between the positive terminal of the PSE voltage source and any ground leakage path between the PSE (10) and the PD (12). If the resistance,(Rleak) of the ground leakage path is below a certain threshold, a fault is declared. A similar test may be performed without a test switch by supplying a known test current through the loop and sensing the voltage drop. Another test is to connect the positive terminal of the PSE voltage source to the loop and sense the resulting current. After the full PoDL voltage is applied to the PD (12), a ground fault may be detected by sensing the equivalence between the source and return PSE currents.
G01R 31/02 - Testing of electric apparatus, lines, or components for short-circuits, discontinuities, leakage, or incorrect line connection
B60L 3/00 - Electric devices on electrically-propelled vehicles for safety purposesMonitoring operating variables, e.g. speed, deceleration or energy consumption
H02H 3/16 - Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition, with or without subsequent reconnection responsive to fault current to earth, frame or mass
H04L 12/24 - Arrangements for maintenance or administration
H04L 25/08 - Modifications for reducing interferenceModifications for reducing effects due to line faults
7.
FLOATING OUTPUT VOLTAGE BOOST-BUCK REGULATOR USING A BUCK CONTROLLER WITH LOW INPUT AND LOW OUTPUT RIPPLE
A converter generates an output voltage differential across a floating load, such as a string of LEDs. The converter receives an input voltage Vin from a power supply, and the floating output voltage differential may be greater than or less than Vin. The converter uses a first switch and first inductor in a boost mode type configuration, and uses a second switch and second inductor in a buck mode type configuration. The inductors have a common node. The first inductor has another end coupled to ground, and the other end of the second inductor is coupled to the load. Both inductors charge and discharge together depending on the conductivities of the switches. One end of the load will be approximately zero volts, while the other end will be at a negative voltage VEE. The two inductors smooth input current/voltage ripple and output current/voltage ripple, resulting in low EMI.
H02M 3/00 - Conversion of DC power input into DC power output
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and differential Ethernet data over a single twisted wire pair (16) to a Powered Device (PD). Due to start-up perturbations, PD load current variations, and other causes, dV/dt noise is introduced in the power signal. Such noise may be misinterpreted as data unless mitigated somehow. Rather than increasing the values of the passive filtering components conventionally used for decoupling/coupling the power and data from/to the wire pair, active circuitry is provided in the PSE, PD, or both to limit dV/dt in the power signal (32, 34, 36, 38). Such circuitry may be implemented on the same chip as the PSE controller or PD controller. Therefore, the sizes of the passive components in the decoupling/coupling networks may be reduced.
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
A configurable signal-processing circuit may provide a plurality of selectable signal-processing operations. The configurable signal-processing circuit may have a configuration circuit that provides a configuration code that selects a first signal-processing operation from the plurality of selectable signal-processing operations based on a timing pattern for evaluating an input signal and outputting an output signal.
In a method for controlling a current regulator for dimming an LED load, a dimming signal has a duty cycle that controls the LED ON-time and LED OFF time at a fixed frequency. The dimming signal controls a switch in series with the LED load. Prior to the LED ON-time, the regulator is controlled to pre-charge the inductor so that the inductor current at the beginning of the ON-time substantially matches a stored value of the inductor current measured at the end of the previous ON-time. The regulator's feedback loop is frozen during the OFF-time to not change its feedback control signal. Upon the next ON-time, the regulator begins supplying current to the LED load with the pre-charged inductor current, so there is no initial decrease in the delivered LED current. Therefore, the current pulse magnitudes are constant even with very low duty cycles.
A control system is provided for controlling a power receiving circuit which is configured for receiving power wirelessly and producing an output voltage. The power receiving circuit has a resonant LC circuit including an inductive element and a capacitive element coupled in parallel. The control system includes a switching circuit coupled in parallel to the resonant LC circuit, and a feedback loop circuit configured for regulating the output voltage by controlling duration during which the switching circuit is in a conductive state in each cycle of a voltage developed across the resonant LC circuit.
A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (32) supplying DC power and Ethernet data over a single twisted wire pair (14) to a Powered Device (PD). The PSE (32) supplies the DC current (34) and AC data through a cascaded coupling network (30) including a series of AC-blocking inductor stages (L1-L4, CL1-4) having different inductances to substantially filter out the AC component and pass the DC component (34). The data is supplied to the wires via capacitors (C1, C2). The PD may have a matched decoupling network for providing the separated DC power and data to a PD load.
A converter has a boost portion and a buck portion. The boost portion supplies a boosted voltage and includes a first inductor having a first end coupled to the input terminal, a first switch coupled to a second end of the first inductor to charge the first inductor when the first switch is in its on-state, and a first capacitor for being charged to the boosted voltage. The buck portion supplies an output voltage to a load that is less than the boosted voltage and includes a second inductor in series with the load, and a second switch in series with the second inductor and the load to charge the second inductor during an on-state of the second switch. A single controller IC receives feedback signals and controls the switches to have the same duty cycle to achieve a regulated load current or voltage with low EMI.
In a method performed by a PoE system, a PSE provides data and operating voltage over Ethernet wires to a PD. Before the full PoE voltage is supplied, the PSE generates a low current signal received by the PD. A circuit in the PD, connected across its input terminals, has a characteristic analog response to the PSE signal corresponding to the PD's PoE requirements, such as whether the PD is a Type 1 or Type 2 PD. The circuit may be a certain value capacitor, zener diode, resistor, or other circuit. The PSE may generate a fixed current, fixed voltage, or time varying signal. Upon the PSE sensing the magnitude of the analog signal response at a particular time, the PSE associates the response with the PoE requirements of the PD. The PSE then applies the full PoE voltage in accordance with the PD's PoE requirements.
A circuit for providing connection between a first node at a first voltage and a second node at a second voltage. The circuit has a first inductive element having a first terminal coupled to the first node, a first switching element coupled between a second terminal of the first inductive element and the second node, a second inductive element having a first terminal configured for receiving current from the second terminal of the first inductive element, and having a second terminal coupled to a third node, and a second switching element coupled between the first terminal of the second inductive element and the second node. The first and second switching elements are configured for providing alternating current flow paths between the first node and the second node.
A power converting system is responsive to an input signal to produce an output signal regulated with respect to the input signal. The power converting system has an input node for receiving the input signal, an output node for producing the output signal, and first and second inductive elements. The first inductive element has a first node coupled to the input node, the second inductive element has a first node coupled to the output node. A first switching element is coupled to a second node of the first inductive element. A first capacitive element is coupled between the second node of the first inductive element and a second node of the second inductive element.
G05F 1/24 - Regulating voltage or current wherein the variable is actually regulated by the final control device is AC using bucking or boosting transformers as final control devices
17.
FEED FORWARD CURRENT MODE SWITCHING REGULATOR WITH IMPROVED TRANSIENT RESPONSE
A switching regulator circuit incorporates an offset circuit, connected in a control loop of the regulator circuit, that, in response to a signal indicating an imminent load current step, adjusts a duty cycle of a power switch for the current step prior to the regulator circuit responding to a change in output voltage due to the current step. In one embodiment, a load controller issues a digital signal shortly before a load current step. The digital signal is decoded and converted to an analog offset signal in a feedback control loop of the regulator to immediately adjust a duty cycle of the switch irrespective of the output voltage level. By proper timing of the offset, output voltage ripple is greatly reduced. The current offset may also be used to rapidly change the output voltage in response to an external signal requesting a voltage step.
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
An auto-resonant driver for a transmitter inductor drives the inductor at an optimal frequency for maximum efficiency. The transmitter inductor is magnetically coupled, but not physically coupled, to a receiver inductor, and the current generated by the receiver inductor is used to power a load. The system may be used, for example, to remotely charge a battery (as part of the load) or provide power to motors or circuits. A feedback circuit is used to generate the resonant driving frequency. A detector in the transmit side wirelessly detects whether there is sufficient current being generated in the receiver side to achieve regulation by a voltage regulator powering the load. This point is achieved when the transmitter inductor peak voltage suddenly increases as the driving pulse width is ramped up. At that point, the pulse width is held constant for optimal efficiency.
H02J 7/02 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from AC mains by converters
A single stage current sense amplifier (10) is described that generates a differential output that is proportional to a current through a sense resistor (RS). The voltage across the sense resistor (RS) is Vsense. The current sense amplifier (10) includes a differential transconductance amplifier having high impedance input terminals. An on-chip RC filter filters transients in the Vsense signal. A feedback circuit for each leg of the amplifier causes a pair of input transistors(M1, M2) to conduct a fixed constant current irrespective of Vsense, which stabilizes the transconductance. A gain control resistor (Re) is coupled across terminals of the pair of input transistors (M1( M2) and has Vsense across it. A level shifting circuit (M3, M4) coupled to each of the input transistors (M1, M2) lowers a common mode voltage at an output of the amplifier. Chopper circuits at the input and output cancel any offset voltages.
H03F 3/393 - DC amplifiers with modulator at input and demodulator at outputModulators or demodulators specially adapted for use in such amplifiers with semiconductor devices only with field-effect devices
An error signal may be generated that is representative of a difference between a signal representative of the output voltage of a current mode switching power supply and a reference voltage. A peak current threshold signal may be generated that is indicative of a peak current that should be reached in an inductor within the power supply during each cycle of a periodic clock signal and that has a level that is based on the error signal. A switch control signal may be configured to regulate the voltage output of the power supply by closing and then opening at least one power switch during each cycle of the periodic clock signal. The timing of the opening may be based on the peak current threshold signal. Negative slope compensation may be provided that causes the switch control circuit to delay opening the at least one power switch during each cycle of the periodic clock signal in an amount that decreases with increasing duty cycles of the switch control signal. This negative compensation may be provided only when the duty cycle of the switch control signal is less than a threshold, such as 50%.
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
A technique for cancelling out target IM2 components in a wireless receiver's mixer output is disclosed. A differential RF signal and a differential local oscillator (LO) signal are mixed by a mixer to demodulate the RF signal. A first common node signal is generated between a first resistor and a second resistor coupled across the mixer's differential output terminals. A second common node signal is generated between a third resistor and a fourth resistor coupled across the differential output terminals, where a capacitor is coupled between the second common node and a power supply terminal. The second common node signal provides a stable reference signal for IM2 components above a certain frequency. The two common node signals are subtracted to create a difference signal. The difference signal is scaled by a scaling factor obtained during calibration. The scaled difference signal is coupled to the mixer output to offset IM2 distortion.
A technique for combining power to a single load from multiple power supplies using power over Ethernet (PoE) is disclosed. Each power supply is coupled to associated power sourcing equipment (PSE) providing PoE, and each PSE has a current limit. The power supplies supply approximately the same voltage, but the output voltages are typically not exactly equal. All the power supplies are connected via diodes to a common load terminal. The power supply outputting the highest voltage first supplies power to the load terminal, since only its diode is forward biased, until a PoE current limit is reached. Then its duty cycle is limited. The load terminal voltage is then inherently lowered to cause the diode of the power supply with the next highest output voltage to connect it to the load to supply additional power to the load as the first power supply continues to supply its limited current.
An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation, IM3, products. In an embodiment of a Class A amplifier, the linear amplifier is a bipolar, common emitter- configured, CE, transistor (40) using a cascode transistor (16) to provide a fixed collector bias voltage to the CE transistor (40). The CE transistor (40) has a transconductance vs. base -emitter voltage, VBE, characteristic which, when plotted, shows a transconductance that increases with an increasing VBE to a maximum, then drops, then tapers off, wherein there is an inflection point between the maximum transconductance and where the transconductance tapers off. A DC bias circuit (34) provides a DC bias voltage to the base of the CE transistor (40) that causes the CE transistor?s operating point to track the inflection point over a range of temperatures. This operating point causes the IM3 products to be greatly reduced.
A stacked leadframe assembly is disclosed. The stacked leadframe assembly includes a first die having a surface that defines a mounting plane, a first leadframe stacked over and attached to the first die, a second die stacked over and attached to the first leadframe; and a second leadframe stacked over and attached to the second die. The leadframes have die paddles with extended side panels that have attachment surfaces in the mounting plane
Circuits and methods for maintaining a substantially constant input and output current for a charge pump circuit are provided which reduce current variation during switching intervals. The charge pump circuitry of the present invention maintains a current flow path from a current source to the charge pump output which minimizes or eliminates spikes normally associated with the switching intervals
H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
26.
EFFICIENCY MEASURING CIRCUIT FOR DC-DC CONVERTER WHICH CALCULATES INTERNAL RESISTANCE OF SWITCHING INDUCTOR BASED ON DUTY CYCLE
An efficiency measuring circuit may measure the efficiency of a DC-DC converter having a switching inductor with an internal DC resistance and a plurality of electronic switches that control current through the inductor. A duty cycle circuit may measure the duty cycle of current flowing through one of the electronic switches. A current sense circuit may measure the current flowing through one of the electronic switches. An inductor voltage sensor circuit may measure the voltage across the inductor. A computation circuit may compute the internal DC resistance of the switching inductor based in part on the duty cycle measured by the duty cycle circuit and the current measured by the current sense circuit. The computation circuit may also compute the efficiency of the DC-DC converter.
An apparatus and method for a portable device incorporating a battery and a battery charger. In the portable device, there are a plurality of system components configured to facilitate a plurality of functions that the portable device is designed to perform. The battery in the portable device is configured for providing an internal power supply to the plurality of system components in the absence of an external input power supply. The battery charger is configured for charging the battery when the external input power supply is available. The battery charger disclosed herein is capable of supplying system power to the system components when voltage of the battery that is being charged is below a limit, thereby allowing the portable device to operate when voltage of the battery drops below the limit.
H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
H02J 9/06 - Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over
An analog-to-digital converter (ADC) system and method. The ADC system includes a digital control circuit, an amplifier, a capacitor, and an evaluation circuit. The digital control circuit is to sequentially configure the ADC system in first and second configurations to derive a digital representation of an analog signal value. The amplifier circuit includes an amplifier input terminal and an amplifier output terminal. The capacitor has a first terminal, coupled to the amplifier input terminal in the first and second configurations of the ADC system, as well as a second terminal coupled to the amplifier output terminal in the first configuration and to a reference voltage potential selected according to the first digital code in the second configuration. The evaluation circuit is configured to provide a first digital code to represent a first voltage level at the amplifier output terminal in the first configuration of the ADC system.
A system (10) for providing power to a load (12), having first and second power supply inputs respectively responsive to first and second input signals from first (V1) and second (V2) power supply sources to supply power to the load. For example, the first power supply input may be configured for supplying the load with power received from a communication link, such as an Ethernet link, and the second power supply input may be configured for supplying the load with power from an auxiliary power source. A power converter (14) is provided to produce an output signal for supplying power to the load in response to the second input signal. The power converter is controlled to produce the output signal in accordance with a value of the first input signal.
A power supply system has an inductive device, a plurality of switching devices for providing connection of the inductive device to input and output nodes and a ground node, and a switch driver circuit for driving the switching devices so as to enable the power supply to operate in a boost mode to increase the input voltage, in a buck mode to decrease the input voltage, and in a solid-state flyback mode to transfer between the boost mode and the buck mode. In the solid-state flyback mode, the switching devices are controlled to provide switching of the inductive device between an input state in which the inductive device is connected between the input node and the ground node, and an output state in which the inductive device is connected between the ground node and the output node.
G05F 1/40 - Regulating voltage or current wherein the variable is actually regulated by the final control device is AC using discharge tubes or semiconductor devices as final control devices
31.
MONOLITHIC VOLTAGE REFERENCE DEVICE WITH INTERNAL, MULTI-TEMPERATURE DRIFT DATA AND RELATED TESTING PROCEDURES
A testing procedure may determine whether a monolithic voltage reference device meets a temperature drift specification. A first non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a first non-room temperature which is substantially different than room temperature. First non-room temperature information may be stored in a memory within the monolithic voltage reference device which is a function of the first non-room temperature output voltage. A second non-room temperature output voltage of the monolithic voltage reference device may be measured while the monolithic voltage reference device is at a second non-room temperature which is substantially different than the room temperature and the first non-room temperature. Second non-room temperature information may be stored in the memory without destroying the first non-room temperature information which is a function of the second non-room temperature output voltage. A determination may be made whether the monolithic voltage reference device meets the temperature drift specification based on a computation that is a function of both the first non-room temperature information and the second non-room temperature information.
A pulse width modulation circuit may generate an adjustable output signal that periodically transitions between a first and a second state with an adjustable duty cycle. A first pulse generator circuit may be configured to generate a first pulse signal that periodically transitions at an adjustable delay with respect to a periodic reference signal. A second pulse generator circuit may be configured to generate a second pulse signal that periodically transitions at an adjustable delay with respect to the periodic reference signal. A logic circuit may be configured to generate the adjustable output signal based on both the first and the second pulse signals.
An apparatus and method for load sharing among N current supplies, where N > 1. N current supply paths are coupled to corresponding N independent power sources, respectively. A system load is coupled to the outputs of the N current supply paths to receive N current supplies. There is a common current share bus configured to connect to the N current supply paths to provide a common current share signal, used to indicate the current contribution needed from each of the N current supply paths. In this configuration, each of the N current supply paths adjusts an adjustable voltage drop between its power source and the current supply it provides to the system load in accordance with the common current share signal so that the current supplied from each current supply path is consistent with the common current share signal.
An apparatus and method for event synchronization. One or more devices that have a plurality of events to be carried out in a scheduled order in time are connected to a single shared time position clock (TPCLK). There are one or more sequencing controllers coupled with the one or more devices and configured to control the timing of high and low states of the shared TPCLK in accordance with the scheduled order. The synchronization among the plurality of events in the scheduled order is achieved based on the high and low states of the shared TPCLK and such synchronization of the plurality of events in the scheduled order is operated without the presence of master and slave devices.
A flyback controller may include a dimmer input configured to receive a chopped and rectified AC voltage Each cycle of the signal may have an off period which is substantially attenuated but not always zero due to leakage of a dimmer control from which the chopped AC voltage originates, and an on period which substantially tracks the AC voltage The flyback controller may include a control circuit configured to generate a switching signal based on the signal from the dimmer input The switching signal may controllably oscillate between its on and off states during the on periods of the chopped and rectified AC voltage The switching signal may be in the on state during the off periods of the chopped and rectified AC voltage, thereby preventing a voltage build up from the dimmer control leakage
G05F 1/00 - Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
A flyback controller generates a switching signal for controlling delivery of current into a primary winding of a transformer in a flyback converter. The controller may include an output current monitoring circuit configured to generate a signal representative of an average output current in a secondary winding of the transformer based on a peak input current in the primary winding and a duty cycle of current in the secondary winding. The flyback controller may generate a switching signal that causes a chopped AC voltage from a dimmer control to be converted by the flyback converter into an average output current from a secondary winding of the transformer that is DC isolated from the chopped AC voltage and that varies as a function of the setting of the dimmer control. The flyback controller may not utilize a signal from an opto-isolator.
A powered LED circuit may include a power supply configured to generate and deliver an output current at a controllable average value with a substantial ripple component, one or more LEDs connected together, and a ripple reduction circuit connected to the power supply and to the one or more LEDs. The ripple reduction circuit may have a current regulator connected in series with the one or more LEDs which is configured to substantially reduce fluctuations in the current which flows through the one or more LEDs due to the ripple component of the output current, but not fluctuations in the current which flows through the one or more LEDs due to changes in the average value of the output current.
G05F 1/00 - Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
A flyback controller may generate a switching signal with a duty cycle for controlling the delivery of input current into a primary winding of a transformer in a flyback converter that has a secondary winding and that is driven by AC output from a dimmer control that is chopped at a phase angle based on a setting of the dimmer control The switching signal causes the luminance level of light produced by a plurality of LEDs to vary by what appears to the human eye to be a more linear function of the phase angle than if the luminance level actually varied as a linear function of the phase angle.
G05F 1/00 - Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
39.
CIRCUIT, TRIM, AND LAYOUT FOR TEMPERATURE COMPENSATION OF METAL RESISTORS IN SEMI-CONDUCTOR CHIPS
A temperature compensation circuit for generating a temperature compensating reference voltage (VREF) may include a Bandgap reference circuit configured to generate a Bandgap reference voltage (VBGR) that is substantially temperature independent and a proportional- to-absolute-temperature reference voltage (VPTAT) that varies substantially in proportion to absolute temperature. The circuit may also include an operational amplifier that is connected to the Bandgap reference circuit and that has an output on which VREF is based. The circuit may also include a feedback circuit that is connected to the operational amplifier and to the Bandgap reference circuit and that is configured so as to cause VREF to be substantially equal to VPTAT times a constant k1, minus VBGR times a constant k2.
A single-pass method of trimming a network, and a network manufactured according to the method, uses the assumption that the peak INL value is minimized by trimming all the structures in the network to a same target value based upon the boundary conditions of the discretely adjustable elements that make up the structures. Using this assumption, the number of targets that need to be simulated, can be greatly reduced making estimation of peak INL possible in a reasonable amount of testing or manufacturing time. The trim algorithm produces results that are optimum or substantially close to optimum and is guaranteed not to deteriorate the Peak INL compared to the untrimmed Peak INL. An auto-calibration system using the trim method is also provided so that the method can be used in a product in real time if desired.
A system for monitoring an energy storage system composed of multiple cells connected in series has a chain of monitors including at least first and second monitors. The first monitor is configured for monitoring at least a first cell in the energy storage system to produce first monitored data. The second monitor is configured for monitoring at least a second cell in the energy storage system to produce second monitored data. The first monitor is further configured for transferring the first monitored data to the second monitor for delivery to a controller.
G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
42.
FLEXIBLE CONTACTLESS WIRE BONDING STRUCTURE ANAD METHODOLOGY FOR SEMICONDUCTOR DEVICE
A semiconductor device such as a field-effect transistor, improved to reduce device resistance, comprises a die support structure which includes a die paddle integral with a first set of contacts and a second set of contacts that is electrically isolated from the first set, a semiconductor die having its lower surface positioned on, and electrically connected to, the die paddle, and a conductive layer on the upper surface of the die. At least one electrically conductive wire, preferably plural wires, extend laterally across the second surface of the semiconductor die, are in electrical contact with the conductive layer, and interconnect corresponding second leads on opposite sides of the die. The plural wires may be welded to contacts in succession by alternate ball and wedge bonds on each contacts. The conductive layer may be an aluminized layer on which is formed a thin layer a solderable material, such as tin. A solder is deposited on the tin layer, enmeshing the wires. The wires, which preferably are made of copper, then may be bonded to the electrically conductive layer by melting the solder paste, preferably by heating the support structure, allowing the solder to reflow and wet the wires, and then cool to produce a low resistance mass between the leads.
A voltage regulator (100) includes an input connectable to a voltage source (102) and an output connectable to a load (104). The voltage regulator (100) includes an inductor (106) coupled to the output, a switch (110a) between the input and the inductor (106), and a current control loop (112, 120) configured to control the duty cycle of the switch (110a) to regulate voltage at the output, wherein the duty cycle being based on both a peak and valley threshold level of current flowing through the inductor (106).
H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
44.
METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND
A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of the first and second bipolar transistors, in part, defines the voltage at which the n-type region is clamped. To start-up the circuit properly, current is withdrawn from the base/gate terminals of the transistors disposed in the current mirror. The circuit optionally includes a pair of cross-coupled transistors to reduce the output impedance and improve the power supply rejection ratio.
H03K 19/003 - Modifications for increasing the reliability
H03K 17/081 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
Circuits and methods that improve the performance of reference circuits are provided. A reference generator circuit maintains a substantially constant output current over an extended temperature for use as a reference. Output current fluctuations caused by a poorly specified power source or process variations are minimized or eliminated.
Various concepts and techniques are disclosed for measuring the voltage of a power source (110). An apparatus includes a voltage metering circuit (104) and a transformer (106) having a first winding coupled to the voltage metering circuit and a second winding for coupling to a power source.
G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
47.
MEASURING CABLE RESISTANCE IN SYSTEM FOR PROVIDING POWER OVER COMMUNICATION CABLE
A system for providing power to a powered device over a communication cable has a cable resistance measuring mechanism that determines values of response signals detected in response to supplying each of at least three reference signals over the communication cable, and determines the resistance of a pair of wires in the cable based on these values. The cable resistance measuring mechanism may be configured for determining resistance of an Ethernet cable that delivers power to the powered device in a Power over Ethernet system.
A circuit for providing electrical isolation of Power Sourcing Equipment (PSE) circuitry from external circuitry in a Power over Ethernet (PoE) system has an inductive circuit for providing an isolation barrier to electrically isolate an isolated side of the isolation circuit from a non-isolated side of the isolation circuit. A signal path circuitry is configured for transferring bidirectional and/or unidirectional signals over the isolation barrier between respective nodes at the isolated and non-isolated sides.
System and methodology for controlling output current of switching circuitry having an input circuit and an output circuit electrically isolated from each other. A value of the output current may be determined based on input voltage, input current and reflected output voltage representing the voltage in the input circuit which corresponds to the output voltage. A switching element in the input circuit is controlled to produce the determined value of output current.
H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
50.
CURRENT SOURCE WITH INDIRECT LOAD CURRENT SIGNAL EXTRACTION
A switching circuit (220) for supplying current to a load (224) has a switching element (M1, M2), an inductive element (L) coupled to the switching element, and a load current extraction circuit (R3-R6, C3, C4, A2) responsive to current in the inductive element for producing a load current signal as a simulated current approximating current in the load.
H05B 33/08 - Circuit arrangements for operating electroluminescent light sources
H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof
51.
SQUARE CELL HAVING WIDE DYNAMIC RANGE AND POWER DETECTOR IMPLEMENTING SAME
A square cell comprises first and second bipolar transistors each having an emitter, collector and base, the bases of the transistors being connected for receiving an input voltage, and first and second resistors in series with the first and second bipolar transistors respectively and with a source of reference voltage. The collectors are commonly connected to an output node to supply an output current having a component proportional to the square of the input voltage. Enhanced square law conformance may be produced by adding further pairs of bipolar transistors to the cell, with offset voltage elements coupled between bases of successive transistors on each side of the cell.
G01R 21/10 - Arrangements for measuring electric power or power factor by using square-law characteristics of circuit elements, e.g. diodes, to measure power absorbed by loads of known impedance
G06G 7/20 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for evaluating powers, roots, polynomes, mean square values, standard deviation
52.
REDUCING OSCILLATIONS IN SYSTEM WITH FOLDBACK CURRENT LIMIT WHEN INDUCTIVE LOAD IS CONNECTED
System and methodology for driving an inductive load using a pass device for providing hot swap connection to the load. A current limit circuit prevents current supplied to the load from exceeding a current threshold. A foldback circuit controls the current limit circuit to reduce the current threshold when a voltage across the pass device is above a prescribed value. A filter circuit is coupled to the foldback circuit for reducing oscillations when the inductive load is connected to the pass device.
G05F 1/573 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
G06F 1/26 - Power supply means, e.g. regulation thereof
53.
CIRCUIT AND METHODOLOGY FOR HIGH-SPEED, LOW-POWER LEVEL SHIFTING
A level shifting circuit and methodology involving a switching current generator responsive to switching of an input signal for producing a switching current to switch an output signal, and a holding current generator for producing a holding current to hold the logic level of the output signal in accordance with the logic level of the input signal. The holding current is produced independently of the switching current.
System and methodology for supplying power to a load using a pass device for connecting the load. A current limit circuit prevents current supplied to the load from exceeding a current, threshold. A foldback circuit modifies the current threshold in accordance with a prescribed condition. The foldback circuit is configured to vary the current threshold in accordance with an approximate safe operating area of the pass device.
H03K 3/00 - Circuits for generating electric pulsesMonostable, bistable or multistable circuits
G05F 1/573 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overcurrent detector
G06F 1/26 - Power supply means, e.g. regulation thereof
patents
