A method of manufacturing a semiconductor substrate having a deep junction, forming at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer: and forming at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer. The method further includes aligning the at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer with the at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer: and bonding the front sides of the high-resistance wafers to form a wafer assembly having at least one deep p-n junction at a depth of at least 1 micron from the backside of the n-type (p-type) high-resistance wafer.
H01L 31/0352 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
2.
SYSTEM: AND METHOD FOR RADIATION-HARDENED ENGINEERED SUBSTRATES FOR TIME AND SPACE RESOLUTION
The present invention provides among other things a construction and method of producing a radiation-hardened (RADHARD) low-gain avalanche diode (LGAD) device. A p+ (n+) buried gain layer may be implanted deep into a substrate, and the p+ (n+) buried gain layer may be patterned for various applications. The p+ (n+) buried gain layer may be formed using a wafer-to-wafer bonding approach, an epitaxial approach, or a combination thereof, and may be in an engineered substrate. A well-defined epitaxy layer or bonded thin layer with tuned dopant profiles reduces the loss of gain during irradiation due to acceptor removal in the p+ (n+) buried gain layer. Individual pixels may be surrounded by a deep junction termination extension (JTE) implant to moderate the electric field near the edges of the device and prevent early breakdown. Alternatively, a patterned buried layer may terminate the high field region.
H01L 23/552 - Protection against radiation, e.g. light
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
H01L 31/112 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect photo- transistor
3.
METHOD FOR MANUFACTURING DEEP-JUNCTION LOW-GAIN AVALANCHE DETECTORS AND ASSOCIATED SEMICONDUCTOR SUBSTRATES
A method of manufacturing a semiconductor substrate having a deep junction, forming at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer; and forming at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer. The method further includes aligning the at least one p+ region (n+ region) on a front side of a p-type (n-type) high-resistance wafer with the at least one n+ region (p+ region) on a front side of a n-type (p-type) high-resistance wafer; and bonding the front sides of the high-resistance wafers to form a wafer assembly having at least one deep p-n junction at a depth of at least 1 micron from the backside of the n-type (p-type) high-resistance wafer.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/328 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
A VCSEL device having non-coaxial-with-one-another apertures and/or rotationally asymmetric apertures formed in layer(s) of the VCSEL structure to define more than one spatial mode in a light output in operation of the device. An array of such VCSEL devices configured to have different spatial modes at the output of different constituent VCSEL devices. Spatial asymmetry of structure of the constituent VCSEL devices and, therefore, arrays of VCSEL devices causes the overall light output to form an irregular grid of output spots of light. When the VCSEL array is equipped with an appropriate lens array, the spatial components of the light output of the VCSEL array are caused to overlap in the far at the imaging plane in a multiple spatial (and spectral) mode fashion, thereby reducing speckle in imaging applications.
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
01 - Chemical and biological materials for industrial, scientific and agricultural use
05 - Pharmaceutical, veterinary and sanitary products
Goods & Services
Specialty chemicals, namely, chemical additives for general industrial use in the manufacture of a wide variety of goods; Specialty chemicals, namely, chemical additives for use in the manufacture of fabrics and of surfaces of a wide variety of manufactured products, for health and safety related purposes Antimicrobial preparations containing germicides, bactericides, virucides, or fungicides
7.
PASSIVATED SILVER NANOPARTICLE COATINGS AND METHODS OF MAKING THE SAME
ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY (USA)
CACTUS MATERIALS, INC. (USA)
Inventor
Islam, Rafiqul
Perreault, Francois
Abstract
The instant disclosure is directed to passivated silver nanoparticle coatings and methods of making the same. A method may comprise obtaining a substrate having a surface, exposing the surface to a plurality of silver nanoparticles, applying a nucleating agent to the silver nanoparticles to form a plurality of silver cores, and passivating the silver cores by applying a sulfidation agent to the silver cores to form silver sulfide shells around the silver cores, thereby forming a coating comprising a plurality of sulfidated silver nanoparticles having a core-shell structure. The method may be used to form a coating comprising a plurality of sulfidated silver nanoparticles having a core-shell structure.
Semiconductor devices comprising a semiconductor edge filter, a first light absorbing region overlying the semiconductor edge filter and a second light absorbing region underlying the semiconductor edge filter are disclosed. The semiconductor edge filter has a high reflectivity over a first wavelength range absorbed by the overlying light absorbing region and a high transmission over a second wavelength range absorbed by the underlying light absorbing region.
Semiconductor optoelectronic devices having a dilute nitride active region are disclosed. In particular, the semiconductor devices have a dilute nitride active region with at least two bandgaps within a range from 0.7 eV and 1.4 eV. Photodetectors comprising a dilute nitride active region with at least two bandgaps have a reduced dark current when compared to photodetectors comprising a dilute nitride active region with a single bandgap equivalent to the smallest bandgap of the at least two bandgaps.
H01L 31/107 - Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
10.
Electronic devices having displays with infrared components behind the displays
An electronic device having a display with an infrared component (such as a camera, a light source) behind the display. The layer of the display is transparent to infrared light at which the infrared component operates. Infrared sensing functions, when implemented by the component, may be accomplished by transmission of infrared light through the layer of the display, thereby removing the conventional need for cut-outs or holes in the display plane and maximizing the display area.
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
G01S 17/89 - Lidar systems, specially adapted for specific applications for mapping or imaging
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
G01S 7/4865 - Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak
11.
Short wavelength infrared optoelectronic devices having a dilute nitride layer
Semiconductor optoelectronic devices having a dilute nitride active layer are disclosed. In particular, the semiconductor devices have a dilute nitride active layer with a bandgap within a range from 0.7 eV and 1 eV. Photodetectors comprising a dilute nitride active layer have a responsivity of greater than 0.6 A/W at a wavelength of 1.3 μm.
Semiconductor devices and methods of fabricating semiconductor devices having a dilute nitride active layer and at least one semiconductor material overlying the dilute nitride active layer are disclosed. Hybrid epitaxial growth and the use of hydrogen diffusion barrier layers to minimize hydrogen diffusion into the dilute nitride active layer are used to fabricate high-efficiency multijunction solar cells and photonic devices. Hydrogen diffusion barriers can be formed through the use of layer thickness, composition, doping and/or strain.
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/0232 - Optical elements or arrangements associated with the device
H01L 31/0725 - Multiple junction or tandem solar cells
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
H01S 5/183 - Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
H01S 5/30 - Structure or shape of the active regionMaterials used for the active region
Resonant cavity power converters for converting radiation in the wavelength range from 1 micron to 1.55 micron are disclosed. The resonant cavity power converters can be formed from one or more lattice matched GaInNAsSb junctions and can include distributed Bragg reflectors and/or mirrored surfaces for increasing the power conversion efficiency.
Multijunction photovoltaic cells having at least three subcells are disclosed, in which at least one of the subcells comprises a base layer formed of GaInNAsSb. The GaInNAsSb subcells exhibit high internal quantum efficiencies over a broad range of irradiance energies.
H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
H01L 31/0725 - Multiple junction or tandem solar cells
H01L 31/0735 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising only AIIIBV compound semiconductors, e.g. GaAs/AlGaAs or InP/GaInAs solar cells
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/0687 - Multiple junction or tandem solar cells
15.
Hybrid MOCVD/MBE epitaxial growth of high-efficiency lattice-matched multijunction solar cells
Semiconductor devices and methods of fabricating semiconductor devices having a dilute nitride layer and at least one semiconductor material overlying the dilute nitride layer are disclosed. Hybrid epitaxial growth and the use of aluminum barrier layers to minimize hydrogen diffusion into the dilute nitride layer are used to fabricate high-efficiency multijunction solar cells.
H01L 31/0687 - Multiple junction or tandem solar cells
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 31/20 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor material
H01L 31/078 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier including different types of potential barriers provided for in two or more of groups
H01L 31/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/0725 - Multiple junction or tandem solar cells
H01L 31/0735 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising only AIIIBV compound semiconductors, e.g. GaAs/AlGaAs or InP/GaInAs solar cells
A single-step wet etch process is provided to isolate multijunction solar cells on semiconductor substrates, wherein the wet etch chemistry removes semiconductor materials nonselectively without a major difference in etch rate between different heteroepitaxial layers. The solar cells thus formed comprise multiple heterogeneous semiconductor layers epitaxially grown on the semiconductor substrate.
H01L 31/0352 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
H01L 31/0687 - Multiple junction or tandem solar cells
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/028 - Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic System
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 31/0693 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells the devices including, apart from doping material or other impurities, only AIIIBV compounds, e.g. GaAs or InP solar cells
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
18.
Apparatus and method for highly accelerated life testing of solar cells
An apparatus is provided for highly accelerated life testing (HALT) of multi-junction solar cells according to a method that utilizes a high vacuum chamber, as well as lenses and windows transparent to broad spectrum solar radiation from typically a single source to house packaged solar chips and temperature monitoring and control means during testing, thereby allowing substantially greater control of environmental variables such as temperature, atmospheric composition, and light spectrum than is currently available.
H01L 31/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 21/00 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid-state devices, or of parts thereof
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
C22C 28/00 - Alloys based on a metal not provided for in groups
H01L 31/0735 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising only AIIIBV compound semiconductors, e.g. GaAs/AlGaAs or InP/GaInAs solar cells
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 31/078 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier including different types of potential barriers provided for in two or more of groups
Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 31/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
H01L 31/078 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier including different types of potential barriers provided for in two or more of groups
H01L 31/0687 - Multiple junction or tandem solar cells
H01L 31/0693 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells the devices including, apart from doping material or other impurities, only AIIIBV compounds, e.g. GaAs or InP solar cells
Multijunction solar cells having at least four subcells are disclosed, in which at least one of the subcells comprises a base layer formed of an alloy of one or more elements from group III on the periodic table, nitrogen, arsenic, and at least one element selected from the group consisting of Sb and Bi, and each of the subcells is substantially lattice matched. Methods of manufacturing solar cells and photovoltaic systems comprising at least one of the multijunction solar cells are also disclosed.
H01L 31/0687 - Multiple junction or tandem solar cells
H01L 31/0725 - Multiple junction or tandem solar cells
H01L 31/18 - Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
H01L 31/0304 - Inorganic materials including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 31/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
H01L 31/0693 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells the devices including, apart from doping material or other impurities, only AIIIBV compounds, e.g. GaAs or InP solar cells
H01L 31/078 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier including different types of potential barriers provided for in two or more of groups
22.
Method for making semiconductor light detection devices
A semiconductor light detection device fabrication technique is provided in which the cap etch and anti-reflection coating steps are performed in a single, self-aligned lithography module.
A multilayer window structure for a solar cell comprises one or more layers where the bottom layer has an intrinsic material lattice spacing that is substantially the same as the emitter in the plane perpendicular to the direction of epitaxial growth. One or more upper layers of the window structure has progressively higher band gaps than the bottom layer and has intrinsic material lattice spacing is substantially different than the emitter intrinsic material lattice spacing.
Photovoltaic cells with one or more subcells are provided with a wide band gap, pseudomorphic window layer of at least 15 nm in thickness and with an intrinsic material lattice constant that differs by at least 1% from an adjacent emitter layer. This window layer has a higher band gap than a window layer with substantially the same intrinsic material lattice constant as the adjacent emitter layer, which increases the light transmission through the window, thereby increasing the current generation in the solar cell. The quality of being pseudomorphic material preserves a good interface between the window and the emitter, reducing the minority carrier surface recombination velocity. A method is provided for building a wide band gap, pseudomorphic window layer of a photovoltaic cell that has an intrinsic material lattice constant that differs by at least 1% from the adjacent emitter layer.
A device containing a solar cell is provided in the form of a stacked package that has a planar arrangement of conductive laminates at or below the surface of a heat sink. The planar alignment allows placement of electrical connections below the surface of the heat sink and reduces the vertical profile of the device, making it easier to be hermetically sealed. In specific embodiments the solar cell substrate is embedded within the heat sink during the manufacturing phase, eliminating the need for a thermally conductive substrate between the solar cell and the heat sink.
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/052 - Cooling means directly associated or integrated with the PV cell, e.g. integrated Peltier elements for active cooling or heat sinks directly associated with the PV cells
27.
Flexible hermetic semiconductor solar cell package with non-hermetic option
A device containing a solar cell chip that may include a hermetically sealed chamber containing optical matching fluid and a threaded pedestal mounting to allow for replacement of solar cell units and that are easily mountable to a master heat sink.
H01L 31/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 31/042 - PV modules or arrays of single PV cells
H02N 6/00 - Generators in which light radiation is directly converted into electrical energy (solar cells or assemblies thereof H01L 25/00, H01L 31/00)
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/052 - Cooling means directly associated or integrated with the PV cell, e.g. integrated Peltier elements for active cooling or heat sinks directly associated with the PV cells
A stacked package for a solar cell is provided with a planar arrangement of conductive laminates on the surface of the heat sink. The layered conductive laminate offers multi-directional orientation of the solar cell within the package by eliminating any orientation requirements between the chip and the substrate, and offers multiple options for placement of standard or flipped bypass diodes. The packaged solar cell of the invention provides a smaller horizontal and vertical profile than standard solar cell packages, making it easier to hermetically seal the package.
H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details
H01L 31/052 - Cooling means directly associated or integrated with the PV cell, e.g. integrated Peltier elements for active cooling or heat sinks directly associated with the PV cells
29.
Multi-junction solar cell with dilute nitride sub-cell having graded doping
A lattice-matched solar cell having a dilute nitride-based sub-cell has exponential doping to thereby control current-carrying capacity of the solar cell. Specifically a solar cell with at least one dilute nitride sub-cell that has a variably doped base or emitter is disclosed. In one embodiment, a lattice matched multi junction solar cell has an upper sub-cell, a middle sub-cell and a lower dilute nitride sub-cell, the lower dilute nitride sub-cell having doping in the base and/or the emitter that is at least partially exponentially doped so as to improve its solar cell performance characteristics. In construction, the dilute nitride sub-cell may have the lowest bandgap and be lattice matched to a substrate, the middle cell typically has a higher bandgap than the dilute nitride sub-cell while it is lattice matched to the dilute nitride sub-cell. The upper sub-cell typically has the highest bandgap and is lattice matched to the adjacent sub-cell. In further embodiments, a multi junction solar cell according to the invention may comprise four, five or more sub-cells in which the one or more sub-cells may each comprise exponentially doped dilute nitride alloys.
