Semiconductor Energy Laboratory Co., Ltd.

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IPC Class
H01L 29/786 - Thin-film transistors 2,836
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body 2,453
H01L 29/66 - Types of semiconductor device 1,151
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes 839
H01L 51/00 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof 747
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1.

DISPLAY DEVICE

      
Application Number 18726650
Status Pending
Filing Date 2022-12-26
First Publication Date 2025-03-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Sasaki, Toshiki

Abstract

A high-resolution display device with high efficiency is provided. The display device includes a light-emitting element A and a light-emitting element B adjacent to each other over an insulating surface. The light-emitting element A includes a first electrode A, a second electrode A, and a layer A including an organic compound interposed between the first electrode A and the second electrode A. The light-emitting element B includes a first electrode B, a second electrode B, and a layer B including an organic compound interposed between the first electrode B and the second electrode B. The layer A including the organic compound includes a first light-emitting layer A, an intermediate layer A, and a second light-emitting layer A. The intermediate layer A is positioned between the first light-emitting layer A and the second light-emitting layer A. The intermediate layer A includes a mixed layer A of an organic compound having an electron-transport property and lithium or a material including lithium. A distance between facing end portions of the first electrode A and the first electrode B is greater than or equal to 2 μm and less than or equal to 5 μm.

IPC Classes  ?

  • H10K 50/19 - Tandem OLEDs
  • H10K 50/16 - Electron transporting layers
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

2.

METHOD FOR FORMING POSITIVE ELECTRODE ACTIVE MATERIAL AND METHOD FOR FABRICATING LITHIUM-ION BATTERY

      
Application Number 18798072
Status Pending
Filing Date 2024-08-08
First Publication Date 2025-03-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Fukai, Shuji
  • Kuriki, Kazutaka
  • Yoneda, Yumiko
  • Asada, Yosiharu
  • Shimada, Kazuya

Abstract

A method for forming a positive electrode active material applicable to a lithium-ion battery having excellent charge and discharge characteristics even in a low-temperature environment is provided. The method for forming a positive electrode active material includes: a first step of heating lithium cobalt oxide with a median diameter of less than or equal to 10 μm; a second step of mixing a fluorine source and a magnesium source with the lithium cobalt oxide subjected to the first step, thereby forming a first mixture; a third step of heating the first mixture; a fourth step of mixing a nickel source and an aluminum source with the first mixture subjected to the third step, thereby forming a second mixture; and a fifth step of heating the second mixture. The third step and the fifth step are performed in a state where the first mixture is held to have a thickness of less than or equal to 2.0 mm in a first setter. The first step, the third step, and the fifth step are performed in an atmosphere containing oxygen.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • C01G 53/00 - Compounds of nickel
  • H01M 4/04 - Processes of manufacture in general
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/0569 - Liquid materials characterised by the solvents

3.

LIGHT-EMITTING DEVICE

      
Application Number 18728945
Status Pending
Filing Date 2023-01-10
First Publication Date 2025-03-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ohsawa, Nobuharu
  • Sasaki, Toshiki
  • Watabe, Takeyoshi
  • Kido, Hiromitsu
  • Ishimoto, Takuya
  • Kawakami, Sachiko
  • Takabatake, Masatoshi

Abstract

A light-emitting device with high resolution and high efficiency is provided. A first electrode, a second electrode, a first EL layer, an intermediate layer, and a second EL layer are provided, the first electrode is positioned to face the second electrode with the intermediate layer therebetween, the first EL layer is positioned between the first electrode and the intermediate layer, the second EL layer is positioned between the intermediate layer and the second electrode, and the intermediate layer contains an organic compound represented by General Formula (G1) below. A light-emitting device with high resolution and high efficiency is provided. A first electrode, a second electrode, a first EL layer, an intermediate layer, and a second EL layer are provided, the first electrode is positioned to face the second electrode with the intermediate layer therebetween, the first EL layer is positioned between the first electrode and the intermediate layer, the second EL layer is positioned between the intermediate layer and the second electrode, and the intermediate layer contains an organic compound represented by General Formula (G1) below.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/19 - Tandem OLEDs
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/25 - Delayed fluorescence emission using exciplex

4.

IMAGING DEVICE AND ELECTRONIC DEVICE

      
Application Number 18910318
Status Pending
Filing Date 2024-10-09
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sato, Shunsuke
  • Yoneda, Seiichi
  • Negoro, Yusuke
  • Hirose, Takeya
  • Yamazaki, Shunpei

Abstract

An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.

IPC Classes  ?

  • H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

5.

Light-Emitting Element, Light-Emitting Device, Display Device, Electronic Device, and Lighting Device

      
Application Number 18962622
Status Pending
Filing Date 2024-11-27
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Seo, Satoshi
  • Hirakata, Yoshiharu
  • Ishisone, Takahiro

Abstract

An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Förster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Förster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with a local maximum peak on the longest wavelength side of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.

IPC Classes  ?

  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • B60Q 3/10 - Arrangement of lighting devices for vehicle interiorsLighting devices specially adapted for vehicle interiors for dashboards
  • B60Q 3/208 - Sun roofsWindows
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • F21S 6/00 - Lighting devices intended to be free-standing
  • F21S 8/04 - Lighting devices intended for fixed installation intended only for mounting on a ceiling or like overhead structure
  • F21Y 115/10 - Light-emitting diodes [LED]
  • H01L 33/50 - Wavelength conversion elements
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H05B 33/20 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the material in which the electroluminescent material is embedded
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 101/10 - Triplet emission

6.

DISPLAY SYSTEM AND ELECTRONIC DEVICE

      
Application Number 18959928
Status Pending
Filing Date 2024-11-26
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Onuki, Tatsuya
  • Kimura, Hajime

Abstract

Provided is a display system with high display quality and high resolution. The display system includes a first layer and a display portion. The display portion is positioned in a region overlapping with the first layer. The first layer includes a semiconductor substrate containing silicon as a material, and a plurality of first transistors and a plurality of second transistors whose channel formation regions contain silicon are formed over the semiconductor substrate. The first layer includes a first circuit and a second circuit; the first circuit includes a driver circuit for driving the display portion; and the second circuit includes a memory device, a GPU, and an EL correction circuit. The display portion includes a pixel, and the pixel includes a light-emitting device containing organic EL and is electrically connected to the driver circuit. The memory device has a function of retaining image data; the GPU has a function of decoding the image data read from the memory device; and the EL correction circuit has a function of correcting light emitted from the light-emitting device.

IPC Classes  ?

  • G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

7.

Correction Method Of Display Apparatus And Correction System Of The Display Apparatus

      
Application Number 18580291
Status Pending
Filing Date 2022-06-29
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Onuki, Tatsuya
  • Sato, Shunsuke
  • Kurokawa, Yoshiyuki
  • Tsukamoto, Yosuke
  • Onoya, Shigeru

Abstract

A correction method of a display apparatus is provided. A method for evaluating display quality of a display apparatus is provided. The display apparatus includes a display panel, a correction circuit, and a memory. First, first imaging data including all pixels in the display apparatus is acquired in a state where an image with a first grayscale is displayed on the display apparatus. Then, second imaging data including all the pixels in the display apparatus is acquired in a state where an image with a second grayscale is displayed on the display apparatus. Next, correction data is generated based on the first imaging data and the second imaging data. After that, the correction data is output to the memory of the display apparatus. The correction circuit has a function of correcting image data based on the correction data stored in the memory to generate corrected image data and outputting the corrected image data to the display panel.

IPC Classes  ?

  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

8.

LIGHT-EMITTING DEVICE

      
Application Number 18820897
Status Pending
Filing Date 2024-08-30
First Publication Date 2025-03-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Sasaki, Toshiki
  • Ohsawa, Nobuharu
  • Seo, Hiromi
  • Fukuzaki, Shinya

Abstract

A light-emitting device with a low driving voltage and favorable current efficiency which can be used for a high-resolution display apparatus is provided. A tandem light-emitting device that is fabricated through a photolithography process and includes a plurality of light-emitting units and an intermediate layer between the light-emitting units is provided. The intermediate layer includes a first region including a metal or a metal oxide, a first organic compound including a first π-electron deficient heteroaromatic ring with an electron-donating group, and a second organic compound including a second π-electron deficient heteroaromatic ring. The LUMO level of the second organic compound is lower than that of the first organic compound by greater than or equal to 0.30 eV.

IPC Classes  ?

  • H10K 50/19 - Tandem OLEDs
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/16 - Electron transporting layers
  • H10K 85/20 - Carbon compounds, e.g. carbon nanotubes or fullerenes
  • H10K 85/30 - Coordination compounds
  • H10K 85/40 - Organosilicon compounds, e.g. TIPS pentacene
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

9.

ORGANIC COMPOUND AND LIGHT-EMITTING DEVICE

      
Application Number 18814801
Status Pending
Filing Date 2024-08-26
First Publication Date 2025-03-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Morikubo, Miyako
  • Hayashi, Yuki
  • Suzuki, Tsunenori
  • Shingu, Takashi
  • Kawakami, Sachiko
  • Osaka, Harue
  • Seo, Satoshi

Abstract

An organic compound is represented by General Formula (G1). In the formula, each of R1 to R4 independently represents any of hydrogen (including deuterium), a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 6 carbon atoms, a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 carbon atoms, and a substituent represented by General Formula (G1-1). Each of R5 to R8 independently represents any of hydrogen (including deuterium), a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 6 carbon atoms, a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 carbon atoms, and a substituent represented by General Formula (G1-3). At least one of R5 to R8 represents a substituent represented by General Formula (G1-3). An organic compound is represented by General Formula (G1). In the formula, each of R1 to R4 independently represents any of hydrogen (including deuterium), a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 6 carbon atoms, a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 carbon atoms, and a substituent represented by General Formula (G1-1). Each of R5 to R8 independently represents any of hydrogen (including deuterium), a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 6 carbon atoms, a substituted or unsubstituted aromatic hydrocarbon group having 6 to 30 carbon atoms, and a substituent represented by General Formula (G1-3). At least one of R5 to R8 represents a substituent represented by General Formula (G1-3).

IPC Classes  ?

  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • C07D 209/86 - CarbazolesHydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses

10.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18910287
Status Pending
Filing Date 2024-10-09
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Kozuma, Munehiro
  • Aoki, Takeshi
  • Kanemura, Takuro

Abstract

A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1−I2−I3+I4. Note that the potential of the third wiring is changed by firstly inputting a reference potential to the third wiring and then inputting a potential based on internal data or a potential based on information obtained by a sensor.

IPC Classes  ?

  • H04N 25/74 - Circuitry for scanning or addressing the pixel array
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10K 39/32 - Organic image sensors

11.

DISPLAY DEVICE

      
Application Number 18956312
Status Pending
Filing Date 2024-11-22
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Hatsumi, Ryo

Abstract

To provide a display device with excellent display quality, in a display device including a signal line, a scan line, a transistor, a pixel electrode, and a common electrode in a pixel, the common electrode is included in which an extending direction of a region overlapping with the signal line differs from an extending direction of a region overlapping with the pixel electrode in a planar shape and the extending directions intersect with each other between the signal line and the pixel electrode. Thus, a change in transmittance of the pixel can be suppressed; accordingly, flickers can be reduced.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G02F 1/1343 - Electrodes
  • G02F 1/136 - Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/786 - Thin-film transistors

12.

Light-Emitting Element, Light-Emitting Device, Electronic Device, and Lighting Device

      
Application Number 18897415
Status Pending
Filing Date 2024-09-26
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Hashimoto, Naoaki

Abstract

Provided is a novel light-emitting element, a light-emitting element with a long lifetime, or a light-emitting element with high emission efficiency. The light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer containing a fluorescent substance and a host material, a first electron-transport layer containing a first electron-transport material, and a second electron-transport layer containing a second electron-transport material, which are in contact with each other and in this order. The LUMO level of each of the host material and the second electron-transport material is higher than the LUMO level of the first electron-transport material.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/155 - Hole transporting layers comprising dopants
  • H10K 50/16 - Electron transporting layers
  • H10K 50/84 - PassivationContainersEncapsulations
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

13.

DATA PROCESSING DEVICE AND DRIVING METHOD THEREOF

      
Application Number 18957949
Status Pending
Filing Date 2024-11-25
First Publication Date 2025-03-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Kuwabara, Hideaki
  • Dairiki, Koji

Abstract

A data processing device with low power consumption is provided. The data processing device includes a flexible position input portion for sensing proximity or a touch of an object such as a user's palm and finger. The flexible position input portion overlaps with a display portion and includes a first region, a second region facing the first region, and a third region between the first region and the second region. In the case where part of the first region or the second region is held by a user for a certain period, supply of image signals to the part is selectively stopped. Alternatively, a sensing in the part is selectively stopped.

IPC Classes  ?

  • G06F 3/0488 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures
  • G06F 1/3234 - Power saving characterised by the action undertaken
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F 3/04817 - Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance using icons
  • G06F 3/0482 - Interaction with lists of selectable items, e.g. menus

14.

DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD OF MANUFACTURING DISPLAY DEVICE

      
Application Number 18293193
Status Pending
Filing Date 2022-07-26
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hodo, Ryota
  • Jinbo, Yasuhiro
  • Sasamura, Yasunori
  • Sawai, Hiromi

Abstract

A highly reliable display device is provided. The display device includes a first light-emitting element, a second light-emitting element adjacent to the first light-emitting element, a first insulating layer provided between the first light-emitting element and the second light-emitting element, and a second insulating layer over the first insulating layer. The first light-emitting element includes a first conductive layer, a second conductive layer covering an upper surface and a side surface of the first conductive layer, a first EL layer covering an upper surface and a side surface of the second conductive layer, and a common electrode over the first EL layer. The second light-emitting element includes a third conductive layer, a fourth conductive layer covering an upper surface and a side surface of the third conductive layer, a second EL layer covering an upper surface and a side surface of the fourth conductive layer, and the common electrode over the second EL layer. The common electrode is provided over the second insulating layer. The visible light reflectance of the first conductive layer is higher than the visible light reflectance of the second conductive layer. The visible light reflectance of the third conductive layer is higher than the visible light reflectance of the fourth conductive layer.

IPC Classes  ?

15.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18599372
Status Pending
Filing Date 2024-03-08
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Umezaki, Atsushi
  • Miyake, Hiroyuki

Abstract

An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.

IPC Classes  ?

  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G02F 1/1362 - Active matrix addressed cells
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G09G 3/3266 - Details of drivers for scan electrodes
  • G09G 3/3275 - Details of drivers for data electrodes
  • G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/50 - OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements

16.

SEMICONDUCTOR DEVICE

      
Application Number 18599592
Status Pending
Filing Date 2024-03-08
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Koezuka, Junichi
  • Nakazawa, Yasutaka

Abstract

A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, and a conductive layer. The first insulating layer is in contact with part of the top surface of the semiconductor layer, the conductive layer is positioned over the first insulating layer, and the second insulating layer is positioned over the semiconductor layer. The semiconductor layer contains a metal oxide and includes a first region overlapping with the conductive layer and a second region not overlapping with the conductive layer. The second region is in contact with the second insulating layer. The second insulating layer contains oxygen and a first element. The first element is one or more of phosphorus, boron, magnesium, aluminum, and silicon.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G01N 23/223 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by measuring secondary emission from the material by irradiating the sample with X-rays or gamma-rays and by measuring X-ray fluorescence
  • G01N 23/2273 - Measuring photoelectron spectra, e.g. electron spectroscopy for chemical analysis [ESCA] or X-ray photoelectron spectroscopy [XPS]
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes

17.

Display Device

      
Application Number 18722110
Status Pending
Filing Date 2022-12-12
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Aoyama, Tomoya
  • Ikeda, Hisao
  • Nakamura, Daiki

Abstract

A highly reliable display device is provided. A first light-emitting device, a second light-emitting device positioned adjacent to the first light-emitting device, and a first insulating layer are included; the first light-emitting device includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer; the second light-emitting device includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer; part of the first insulating layer is positioned at a position interposed between a side end portion of the first EL layer and a side end portion of the second EL layer; the first light-emitting device emits blue light; the second light-emitting device emits light of a color different from that from the first light-emitting device; the first EL layer includes a first light-emitting unit over the first pixel electrode, a first charge-generation layer over the first light-emitting unit, and a second light-emitting unit over the first charge-generation layer; and the second EL layer includes a third light-emitting unit over the second pixel electrode.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks

18.

OPERATION METHOD OF SEMICONDUCTOR DEVICE

      
Application Number 18727223
Status Pending
Filing Date 2023-01-25
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Rikimaru, Hidefumi
  • Kurokawa, Yoshiyuki
  • Ohshita, Satoru

Abstract

An operation method of a semiconductor device that performs data writing and correction processing is provided. The operation method is for a semiconductor device including a control circuit, a first circuit, a second circuit, a wiring, a cell, and a converter circuit. In the operation method, first, the control circuit transmits, to the first circuit, a first signal corresponding to the value of first data. Next, the first circuit outputs, to the wiring, a first current with an amount corresponding to the first signal. Moreover, the cell retains a first potential corresponding to the amount of first current. Then, the cell makes a second current corresponding to the first potential flow from the wiring, and the converter circuit outputs a second signal corresponding to the amount of second current. Next, the second circuit obtains a difference value between a value corresponding to the second signal and the value of the first data. If the difference value is 0, the operation is terminated. If the difference value is not 0, the control circuit generates an update value obtained by adding the difference value to a value corresponding to the first signal previously transmitted. The first circuit obtains the first signal corresponding to the update value and outputs the updated first current to the cell.

IPC Classes  ?

  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
  • G11C 11/54 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using elements simulating biological cells, e.g. neuron
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

19.

Semiconductor Device

      
Application Number 18816312
Status Pending
Filing Date 2024-08-27
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Murakawa, Tsutomu
  • Sawai, Hiromi
  • Kurata, Motomu
  • Tezuka, Sachiaki
  • Yamada, Jun
  • Yamazaki, Shunpei

Abstract

A semiconductor device that can be highly integrated is provided. The semiconductor device includes first and second transistors. The first transistor includes a semiconductor layer, a pair of first conductive layers, and a pair of second conductive layers over the pair of first conductive layers. The pair of first conductive layers and the pair of second conductive layers function as a source electrode and a drain electrode of the first transistor. A third conductive layer functioning as a gate electrode of the second transistor is in contact with one of the pair of first conductive layers. In a cross-sectional view of the first transistor in the channel width direction, the height of the semiconductor layer is larger than the width of the semiconductor layer. The semiconductor device can include a capacitor, in which the third conductive layer also functions as one of a pair of electrodes.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

20.

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

      
Application Number 18818925
Status Pending
Filing Date 2024-08-29
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hodo, Ryota
  • Sasagawa, Shinya
  • Kurata, Motomu
  • Yamazaki, Shunpei

Abstract

A semiconductor device that operates at high speed is provided. The semiconductor device is fabricated in the following manner: a first coating film over a first insulator and a second coating film over the first coating film are formed; a first layer is formed by partly removing the second coating film; a second layer is formed by partly removing the first coating film using the first layer as a mask; heat treatment is performed; a first oxide semiconductor is formed to cover a top surface of the first insulator, a side surface of the second layer, and a side surface and a top surface of the first layer; a second oxide semiconductor is formed in contact with the side surface of the second layer by processing the first oxide semiconductor by anisotropic etching; the first layer is removed; and a side surface of the second oxide semiconductor that is covered with the second layer is exposed by removing the second layer.

IPC Classes  ?

  • H01L 29/66 - Types of semiconductor device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

21.

LIQUID CRYSTAL DISPLAY DEVICE COMPRISING A PIXEL PORTION HAVING A PLURALITY OF TRANSISTORS

      
Application Number 18936635
Status Pending
Filing Date 2024-11-04
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hatsumi, Ryo
  • Kubota, Daisuke
  • Miyake, Hiroyuki

Abstract

A display device with less light leakage and excellent contrast is provided. A display device having a high aperture ratio and including a large-capacitance capacitor is provided. A display device in which wiring delay due to parasitic capacitance is reduced is provided. A display device includes a transistor over a substrate, a pixel electrode connected to the transistor, a signal line electrically connected to the transistor, a scan line electrically connected to the transistor and intersecting with the signal line, and a common electrode overlapping with the pixel electrode and the signal line with an insulating film provided therebetween. The common electrode includes stripe regions extending in a direction intersecting with the signal line.

IPC Classes  ?

22.

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE, OR DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE

      
Application Number 18948657
Status Pending
Filing Date 2024-11-15
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Oikawa, Yoshiaki
  • Ohsawa, Nobuharu
  • Jintyou, Masami
  • Nakazawa, Yasutaka

Abstract

The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes

23.

DISPLAY DEVICE, AUTHENTICATION METHOD, AND PROGRAM

      
Application Number 18950355
Status Pending
Filing Date 2024-11-18
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kubota, Daisuke
  • Hatsumi, Ryo
  • Kamada, Taisuke
  • Kusunoki, Koji
  • Watanabe, Kazunori
  • Kawashima, Susumu
  • Yoshizumi, Kensuke

Abstract

A display device featuring a touch detection and a fingerprint imaging functions is provided. A display device includes a light-emitting element and a light-receiving element. The light-emitting element includes a first pixel electrode, a light-emitting layer, and a common electrode, and the light-receiving element includes a second pixel electrode, an active layer, and the common electrode. The first pixel electrode and the second pixel electrode are provided on the same plane. The common electrode overlaps with the first pixel electrode with the light-emitting layer therebetween, and overlaps with the second pixel electrode with the active layer therebetween. A first conductive layer, a second conductive layer, and an insulating layer are provided above the common electrode. The insulating layer is provided above the first conductive layer, and the second conductive layer is provided above the insulating layer. The light-receiving element has a function of receiving light emitted from the light-emitting element.

IPC Classes  ?

  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06V 10/147 - Details of sensors, e.g. sensor lenses
  • G06V 40/13 - Sensors therefor

24.

MEMORY DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18950567
Status Pending
Filing Date 2024-11-18
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nagatsuka, Shuhei
  • Onuki, Tatsuya
  • Ishizu, Takahiko
  • Kato, Kiyoshi
  • Yamazaki, Shunpei

Abstract

A memory device including a gain-cell memory cell capable of storing a large amount of data per unit area is provided. A peripheral circuit of the memory device is formed using a transistor formed on a semiconductor substrate, and a memory cell of the memory device is formed using a thin film transistor. A plurality of layers including thin film transistors where memory cells are formed are stacked above the semiconductor substrate, whereby the amount of data that can be stored per unit area can be increased. When an OS transistor with extremely low off-state current is used as the thin film transistor, the capacitance of a capacitor that accumulates charge can be reduced. In other words, the area of the memory cell can be reduced.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • G11C 5/02 - Disposition of storage elements, e.g. in the form of a matrix array
  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • G11C 11/408 - Address circuits
  • G11C 11/4094 - Bit-line management or control circuits
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

25.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE

      
Application Number 18951904
Status Pending
Filing Date 2024-11-19
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

A highly flexible display device and a method for manufacturing the display device are provided. A transistor including a light-transmitting semiconductor film, a capacitor including a first electrode, a second electrode, and a dielectric film between the first electrode and the second electrode, and a first insulating film covering the semiconductor film are formed over a flexible substrate. The capacitor includes a region where the first electrode and the dielectric film are in contact with each other, and the first insulating film does not cover the region.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

26.

TRANSISTOR AND ELECTRONIC DEVICE

      
Application Number 18956568
Status Pending
Filing Date 2024-11-22
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Jinbo, Yasuhiro
  • Kanagawa, Tomosato

Abstract

A semiconductor device with a small variation in transistor characteristics is provided. An oxide semiconductor film, a source electrode and a drain electrode over the oxide semiconductor film, an interlayer insulating film placed to cover the oxide semiconductor film, the source electrode, and the drain electrode, and a gate electrode over the oxide semiconductor film are included; an opening is formed overlapping with a region between the source electrode and the drain electrode in the interlayer insulating film; the gate electrode is placed in the opening in the interlayer insulating film; and the source electrode and the drain electrode include a conductive film having compressive stress.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched

27.

Compound, Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18598245
Status Pending
Filing Date 2024-03-07
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd (Japan)
Inventor
  • Haruyama, Takuya
  • Seo, Satoshi
  • Ohsawa, Nobuharu

Abstract

A novel compound is provided. The novel compound is represented by General Formula (G1). A novel compound is provided. The novel compound is represented by General Formula (G1). A novel compound is provided. The novel compound is represented by General Formula (G1). In General Formula (G1), A represents a substituted or unsubstituted condensed aromatic ring having 10 to 30 carbon atoms or a substituted or unsubstituted condensed heteroaromatic ring having 10 to 30 carbon atoms, and R1 represents a substituted or unsubstituted aryl group having 6 to 25 carbon atoms. Each of Y1 and Y2 independently represents a cycloalkyl group having a bridge structure and having 7 to 10 carbon atoms.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07C 211/61 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings being part of condensed ring systems of the carbon skeleton with at least one of the condensed ring systems formed by three or more rings
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • H10K 50/842 - Containers
  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 101/10 - Triplet emission
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

28.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18603286
Status Pending
Filing Date 2024-03-13
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusumoto, Naoto

Abstract

A display device capable of performing proper display without image signal conversion is provided. In the case of high-resolution display, individual data is supplied to each pixel through a first signal line and a first transistor included in each pixel. In the case of low-resolution display, the same data is supplied to a plurality of pixels through a second signal line and a second transistor electrically connected to the plurality of pixels. When the number of image signals to be displayed is more than one and the image signals support different resolutions, display can be performed without up conversion or down conversion by switching an image signal supply path as described above.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1362 - Active matrix addressed cells

29.

Light-Emitting Element, Display Device, Electronic Device, and Lighting Device

      
Application Number 18892023
Status Pending
Filing Date 2024-09-20
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Seo, Satoshi
  • Ohsawa, Nobuharu

Abstract

A light-emitting element containing a light-emitting material with high luminous efficiency is provided. The light-emitting element includes a host material and a guest material. The host material includes a first organic compound and a second organic compound. In the first organic compound, a difference between a singlet excitation energy level and a triplet excitation energy level is larger than 0 eV and smaller than or equal to 0.2 eV. The HOMO level of one of the first organic compound and the second organic compound is higher than or equal to that of the other organic compound, and the LUMO level of the one of the organic compounds is higher than or equal to that of the other organic compound. The first organic compound and the second organic compound form an exciplex.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

30.

DISPLAY DEVICE

      
Application Number 18905374
Status Pending
Filing Date 2024-10-03
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hirakata, Yoshiharu
  • Miyake, Hiroyuki
  • Inoue, Seiko
  • Yamazaki, Shunpei

Abstract

A display device with low power consumption is provided. Furthermore, a display device in which an image is displayed in a region that can be used in a folded state is provided. The conceived display device includes a display portion that can be opened and folded, a sensing portion that senses a folded state of the display portion, and an image processing portion that generates, when the display portion is in the folded state, an image in which a black image is displayed in part of the display portion.

IPC Classes  ?

  • G06F 1/16 - Constructional details or arrangements
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

31.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18950834
Status Pending
Filing Date 2024-11-18
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Sasagawa, Shinya
  • Tochibayashi, Katsuaki
  • Murakawa, Tsutomu
  • Takahashi, Erika

Abstract

A semiconductor device in which a variation of transistor characteristics is small is provided. The semiconductor device includes a transistor. The transistor includes a first insulator, a first oxide over the first insulator, a first conductor, a second conductor, and a second oxide, which is positioned between the first conductor and the second conductor, over the first oxide, a second insulator over the second oxide, and a third conductor over the second insulator. A top surface of the first oxide in a region overlapping with the third conductor is at a lower position than a position of a top surface of the first oxide in a region overlapping with the first conductor. The first oxide in the region overlapping with the third conductor has a curved surface between a side surface and the top surface of the first oxide, and the curvature radius of the curved surface is greater than or equal to 1 nm and less than or equal to 15 nm.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/66 - Types of semiconductor device
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

32.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18951923
Status Pending
Filing Date 2024-11-19
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusumoto, Naoto

Abstract

A display apparatus having an excellent boosting function is provided. The display apparatus is provided with a pixel having a function of adding data (a boosting function). A capacitor for boosting voltage is provided in the pixel, and data is added by capacitive coupling to be supplied to a display device. The capacitor for boosting voltage and a capacitor for retaining data are placed on top of each other, whereby the capacitance value of the capacitor for boosting voltage can be increased. Thus, the pixel can have an excellent boosting function, without significantly losing the aperture ratio or definition.

IPC Classes  ?

  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

33.

MOVING OBJECT

      
Application Number 18952564
Status Pending
Filing Date 2024-11-19
First Publication Date 2025-03-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Oikawa, Yoshiaki
  • Hayashi, Kentaro

Abstract

A moving object including a display apparatus capable of performing highly visible display is provided. The moving object includes a display unit, an imaging unit, an arithmetic unit, and a control unit. The display unit has a function of displaying a display image. The imaging unit has a function of obtaining a first captured image including the display image and an external view overlapping with the display image. The arithmetic unit has a function of comparing a color of the display image and a color of the external view and correcting the color of the display image on the basis of a comparison result. The control unit has a function of controlling running of the moving object on the basis of the first captured image.

IPC Classes  ?

  • G09G 5/10 - Intensity circuits
  • B60K 35/234 - Head-up displays [HUD] controlling the brightness, colour or contrast of virtual images depending on the driving conditions or on the condition of the vehicle or the driver
  • G06V 20/59 - Context or environment of the image inside of a vehicle, e.g. relating to seat occupancy, driver state or inner lighting conditions

34.

Display Device and Electronic Device

      
Application Number 18954090
Status Pending
Filing Date 2024-11-20
First Publication Date 2025-03-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hirakata, Yoshiharu
  • Ishitani, Tetsuji
  • Kubota, Daisuke
  • Hatsumi, Ryo
  • Nakano, Masaru
  • Hamada, Takashi

Abstract

A display device including a peripheral circuit portion with high operation stability. The display device includes a first substrate and a second substrate. A first insulating layer is on a first plane of the first substrate, and a second insulating layer is on a first plane of the second substrate. An area of the first plane of the first substrate is the same as an area of the first plane of the second substrate. The first plane of the first substrate and the first plane of the second substrate face each other. A bonding layer is between the first insulating layer and the second insulating layer. A protection film is in contact with the first substrate, the first insulating layer, the bonding layer, the second insulating layer, and the second substrate.

IPC Classes  ?

  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
  • G02F 1/1362 - Active matrix addressed cells

35.

DISPLAY SYSTEM

      
Application Number 18711330
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ito, Daigo
  • Hata, Yuki

Abstract

A display apparatus with a novel structure or a display system with a novel structure is provided. The display system includes a first display apparatus capable of AR display and a second display apparatus. The first display apparatus includes a first display portion displaying a first image superimposed on a transmission image. The second display apparatus includes a second display portion. The first display apparatus has a function of obtaining positional information of the second display portion. A display position of the first image is determined on the basis of the positional information of the second display portion.

IPC Classes  ?

36.

ELECTRONIC DEVICE

      
Application Number 18723662
Status Pending
Filing Date 2022-12-15
First Publication Date 2025-02-27
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Ikeda, Hisao
  • Hatsumi, Ryo
  • Hirose, Takeya
  • Tsukamoto, Yosuke

Abstract

An electronic device with low power consumption is provided. The electronic device includes a first display device and a second display device. The first display device includes a first display portion, and the second display device includes a second display portion. A plurality of first pixels are arranged in the first display portion, and a plurality of second pixels are arranged in the second display portion. The first display device overlaps with the second display device. The second display portion is provided to surround at least part of the first display portion in a plan view. The area occupied by each of the first pixels is smaller than the area occupied by each of the second pixels.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

37.

Display Apparatus

      
Application Number 18810137
Status Pending
Filing Date 2024-08-20
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hashimoto, Naoaki
  • Nakamura, Daiki

Abstract

To provide a display apparatus with high display quality. To provide a display apparatus which includes first and second light-emitting devices and in which the first and second light-emitting devices include a common electrode with a light-transmitting property, the first light-emitting device includes a first electrode, a first EL layer, and a first auxiliary electrode with a light-transmitting property, the second light-emitting device includes a second electrode, a second EL layer, and a second auxiliary electrode with a light-transmitting property, the first EL layer is between the first electrode and the common electrode, the second EL layer is between the second electrode and the common electrode, the first auxiliary electrode is between the first EL layer and the common electrode, the second auxiliary electrode is between the second EL layer and the common electrode, and the first auxiliary electrode has a larger thickness than the second auxiliary electrode.

IPC Classes  ?

  • H10K 59/80 - Constructional details
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

38.

DISPLAY DEVICE

      
Application Number 18944201
Status Pending
Filing Date 2024-11-12
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ikeda, Hisao
  • Toyotaka, Kouhei
  • Shishido, Hideaki
  • Miyake, Hiroyuki
  • Yokoyama, Kohei
  • Jinbo, Yasuhiro
  • Dozen, Yoshitaka
  • Nagata, Takaaki
  • Hirasa, Shinichi

Abstract

Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G09G 5/391 - Resolution modifying circuits, e.g. variable screen formats
  • H01L 29/786 - Thin-film transistors
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

39.

SEMICONDUCTOR DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18944525
Status Pending
Filing Date 2024-11-12
First Publication Date 2025-02-27
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Umezaki, Atsushi

Abstract

A first flipflop outputs a first signal synchronized with a first clock signal. In the first transistor, the first clock signal is input to a first terminal and the second signal is output from a second terminal. In the fourth transistor, a first signal is input to a first terminal and a second terminal is electrically connected to a gate of the first transistor. In the sixth transistor, the third signal is input to a first terminal, a second terminal is electrically connected to the gate of the fourth transistor, and the gate of the sixth transistor is electrically connected to the first terminal.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H03K 3/356 - Bistable circuits
  • H03K 4/02 - Generating pulses having essentially a finite slope or stepped portions having stepped portions, e.g. staircase waveform
  • H03K 5/15 - Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors

40.

DOCUMENT SEARCH SYSTEM AND DOCUMENT SEARCH METHOD

      
Application Number 18945924
Status Pending
Filing Date 2024-11-13
First Publication Date 2025-02-27
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamamoto, Kunitaka
  • Momo, Junpei
  • Higashi, Kazuki

Abstract

A document search system that enables efficient document search regardless of the ability of a user is achieved. Document search is performed using a document search system in which database document data is stored. After first document data and second document data are input to the document search system, the document search system extracts a plurality of terms from the first document data. The extraction of the terms is performed using morphological analysis, for example. Next, the extracted terms are weighted on the basis of the second document data. For example, texts included in a document represented by the second document data are classified into first and second texts. Among the terms extracted from the first document data, the weight of the term included in the first text is set larger than the weights of the other terms. The classification of the texts can be performed in accordance with a rule basis or using machine learning. After that, the similarity of the database document data to the first document data is calculated on the basis of the weighted term.

IPC Classes  ?

41.

MEMORY DEVICE

      
Application Number 18947085
Status Pending
Filing Date 2024-11-14
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Matsuzaki, Takanori
  • Onuki, Tatsuya
  • Okamoto, Yuki
  • Uochi, Hideki
  • Okamoto, Satoru
  • Godo, Hiromichi
  • Tsuda, Kazuki
  • Kunitake, Hitoshi

Abstract

A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.

IPC Classes  ?

  • H10B 63/00 - Resistance change memory devices, e.g. resistive RAM [ReRAM] devices

42.

SEMICONDUCTOR DEVICE

      
Application Number 18948642
Status Pending
Filing Date 2024-11-15
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kato, Kiyoshi
  • Kimura, Hajime
  • Miyaguchi, Atsushi
  • Inoue, Tatsunori

Abstract

A semiconductor device in which a memory region at each level of a memory device can be changed is provided. The semiconductor device includes a memory device including a first and a second memory circuit and a control circuit. The first memory circuit includes a first capacitor and a first transistor which has a function of holding charges held in the first capacitor. The second memory circuit includes a second transistor, a second capacitor which is electrically connected to a gate of the second transistor, and a third transistor which has a function of holding charges held in the second capacitor. The first and the third transistors each have a semiconductor layer including an oxide semiconductor, a gate, and a back gate. The voltage applied to the back gate of the first or the third transistor is adjusted, whereby the memory region of each of the first and the second memory circuit is changed.

IPC Classes  ?

  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • G06F 12/0893 - Caches characterised by their organisation or structure
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

43.

STORAGE BATTERY MANAGEMENT SYSTEM, VEHICLE, AND SERVER DEVICE

      
Application Number 18551561
Status Pending
Filing Date 2022-03-11
First Publication Date 2025-02-27
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Osada, Takeshi
  • Inoue, Noboru
  • Katagiri, Haruki
  • Tsukamoto, Yosuke
  • Mikami, Mayumi
  • Tanemura, Kazuki
  • Sasaki, Kousuke

Abstract

A system is provided with which data on the internal state of a storage battery such as SOC-OCV characteristics and FCC can be obtained with high accuracy and highly accurate estimation is possible even in the case of repeating charging and discharging for a long period. The storage battery management system includes a vehicle that includes a unit enabling data transmission and reception; the vehicle includes a storage battery, a balancing circuit electrically connected to the storage battery, and a vehicle control unit having a function of controlling the balancing circuit; the storage battery includes an assembled battery including a plurality of battery cells; the vehicle control unit has a function of selecting an estimated value that most closely shows a state of each of the battery cells included in the assembled battery; and the balancing circuit has a function of being controlled in accordance with the selected estimated value.

IPC Classes  ?

  • B60L 58/22 - Balancing the charge of battery modules
  • B60L 50/60 - Electric propulsion with power supplied within the vehicle using propulsion power supplied by batteries or fuel cells using power supplied by batteries
  • B60L 58/12 - Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries responding to state of charge [SoC]
  • G07C 5/00 - Registering or indicating the working of vehicles
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 50/209 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for prismatic or rectangular cells
  • H01M 50/211 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for pouch cells
  • H01M 50/213 - Racks, modules or packs for multiple batteries or multiple cells characterised by their shape adapted for cells having curved cross-section, e.g. round or elliptic
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

44.

LIGHT-EMITTING DEVICE, DISPLAY DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18940086
Status Pending
Filing Date 2024-11-07
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Seo, Satoshi
  • Sasaki, Toshiki

Abstract

One object of this invention is to provide a novel light-emitting device with low power consumption. The light-emitting device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first electrode, a second electrode, and a light-emitting layer. The second light-emitting element includes the first electrode, a third electrode, and the light-emitting layer. The second electrode comprises only a first conductive film, and the third electrode comprises a second conductive film and a third conductive film. The first electrode has a function of reflecting light. The second conductive film has functions of reflecting light and transmitting light. The first conductive film and the third conductive film each have a function of transmitting light.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 50/17 - Carrier injection layers
  • H10K 50/19 - Tandem OLEDs
  • H10K 50/805 - Electrodes
  • H10K 50/852 - Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
  • H10K 50/856 - Arrangements for extracting light from the devices comprising reflective means
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/40 - OLEDs integrated with touch screens
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

45.

POWER STORAGE UNIT AND SOLAR POWER GENERATION UNIT

      
Application Number 18941267
Status Pending
Filing Date 2024-11-08
First Publication Date 2025-02-27
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takahashi, Minoru
  • Yamazaki, Shunpei
  • Hiroki, Masaaki
  • Takahashi, Kei
  • Momo, Junpei

Abstract

Disclosed is a power storage unit which can safely operate over a wide temperature range. The power storage unit includes: a power storage device; a heater for heating the power storage device; a temperature sensor for sensing the temperature of the power storage device; and a control circuit configured to inhibit charge of the power storage device when its temperature is lower than a first temperature or higher than a second temperature. The first temperature is exemplified by a temperature which allows the formation of a dendrite over a negative electrode of the power storage device, whereas the second temperature is exemplified by a temperature which causes decomposition of a passivating film formed over a surface of a negative electrode active material.

IPC Classes  ?

  • H01M 10/44 - Methods for charging or discharging
  • H01M 10/052 - Li-accumulators
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/46 - Accumulators structurally combined with charging apparatus
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
  • H01M 10/615 - Heating or keeping warm
  • H01M 10/63 - Control systems
  • H01M 10/637 - Control systems characterised by the use of reversible temperature-sensitive devices, e.g. NTC, PTC or bimetal devicesControl systems characterised by control of the internal current flowing through the cells, e.g. by switching
  • H01M 10/6571 - Resistive heaters
  • H02J 7/35 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering with light sensitive cells
  • H02S 10/20 - Systems characterised by their energy storage means

46.

ADDITION METHOD, SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18945896
Status Pending
Filing Date 2024-11-13
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime
  • Fukutome, Takahiro

Abstract

A multiplier circuit includes a first circuit comprising a first transistor, a second transistor, a first capacitor, and a second capacitor. It further includes a second circuit comprising a third transistor, a fourth transistor, a third capacitor, and a fourth capacitor.

IPC Classes  ?

  • G06F 7/499 - Denomination or exception handling, e.g. rounding or overflow
  • G06F 7/501 - Half or full adders, i.e. basic adder cells for one denomination
  • G06F 7/57 - Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups or for performing logical operations
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode
  • G06G 7/16 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for multiplication or division

47.

LIGHT-EMITTING DEVICE

      
Application Number 18947167
Status Pending
Filing Date 2024-11-14
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hirakata, Yoshiharu
  • Aoyama, Tomoya
  • Chida, Akihiro

Abstract

A light-emitting device or a display device that is less likely to be broken is provided. Provided is a light-emitting device including an element layer and a substrate over the element layer. At least a part of the substrate is bent to the element layer side. The substrate has a light-transmitting property and a refractive index that is higher than that of the air. The element layer includes a light-emitting element that emits light toward the substrate side. Alternatively, provided is a light-emitting device including an element layer and a substrate covering a top surface and at least one side surface of the element layer. The substrate has a light-transmitting property and a refractive index that is higher than that of the air. The element layer includes a light-emitting element that emits light toward the substrate side.

IPC Classes  ?

  • H10K 59/40 - OLEDs integrated with touch screens
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • H01L 27/146 - Imager structures
  • H04B 1/3888 - Arrangements for carrying or protecting transceivers
  • H04M 1/02 - Constructional features of telephone sets
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/84 - PassivationContainersEncapsulations
  • H10K 50/844 - Encapsulations
  • H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/60 - OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
  • H10K 59/80 - Constructional details
  • H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates
  • H10K 77/10 - Substrates, e.g. flexible substrates
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

48.

Display Panel, Display Device, Display Module, Electronic Device, and Manufacturing Method of Display Panel

      
Application Number 18948782
Status Pending
Filing Date 2024-11-15
First Publication Date 2025-02-27
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakamura, Daiki
  • Eguchi, Shingo
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Maruyama, Junya
  • Fujita, Kazuhiko
  • Sato, Masataka
  • Kawashima, Susumu

Abstract

Display unevenness in a display panel is suppressed. A display panel with a high aperture ratio of a pixel is provided. The display panel includes a first pixel electrode, a second pixel electrode, a third pixel electrode, a first light-emitting layer, a second light-emitting layer, a third light-emitting layer, a first common layer, a second common layer, a common electrode, and an auxiliary wiring. The first common layer is positioned over the first pixel electrode and the second pixel electrode. The first common layer has a portion overlapping with the first light-emitting layer and a portion overlapping with the second light-emitting layer. The second common layer is positioned over the third pixel electrode. The second common layer has a portion overlapping with the third light-emitting layer. The common electrode has a portion overlapping with the first pixel electrode with the first common layer and the first light-emitting layer provided therebetween, a portion overlapping with the second pixel electrode with the first common layer and the second light-emitting layer provided therebetween, a portion overlapping with the third pixel electrode with the second common layer and the third light-emitting layer provided therebetween, and a portion in contact with a top surface of the auxiliary wiring.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • G06F 1/16 - Constructional details or arrangements
  • H10K 50/14 - Carrier transporting layers
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/18 - Carrier blocking layers
  • H10K 50/814 - Anodes combined with auxiliary electrodes, e.g. ITO layer combined with metal lines
  • H10K 50/818 - Reflective anodes, e.g. ITO combined with thick metallic layers
  • H10K 50/844 - Encapsulations
  • H10K 50/856 - Arrangements for extracting light from the devices comprising reflective means
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 77/10 - Substrates, e.g. flexible substrates

49.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18718315
Status Pending
Filing Date 2022-12-05
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusunoki, Koji
  • Atsumi, Tomoaki
  • Kusumoto, Naoto

Abstract

A display device whose change in chromaticity is small and grayscale controllability is high is provided. The display device can turn on and turn off a light-emitting device by PAM and PWM control (a pulse width control involving changes in amplitude). The display device writes the same input signal (data potential) to a first node and a second node to turn on the light-emitting device in accordance with a potential of the first node and generate a pulse signal in accordance with a potential of the second node. The potential of the first node can be reset in accordance with the generated pulse signal. Therefore, the light-emitting device can emit light for a desired period with a desired emission intensity.

IPC Classes  ?

  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
  • H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

50.

TOUCH PANEL

      
Application Number 18818822
Status Pending
Filing Date 2024-08-29
First Publication Date 2025-02-20
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Shishido, Hideaki
  • Kubota, Daisuke
  • Kubota, Yusuke

Abstract

To provide a thin touch panel, a touch panel having a simple structure, a touch panel which can be easily incorporated into an electronic device, or a touch panel with a small number of components. The touch panel includes pixel electrodes arranged in a matrix, a plurality of signal lines, a plurality of scan lines, a plurality of first wirings extending in a direction parallel to the signal lines, and a plurality of second wirings extending in a direction parallel to the scan line. Part of the first wiring and part of the second wiring function as a pair of electrodes included in a touch sensor. The first wiring and the second wiring each have a stripe shape or form a mesh shape and are each provided between two adjacent pixel electrodes in a plan view.

IPC Classes  ?

  • G02F 1/1333 - Constructional arrangements
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

51.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18934417
Status Pending
Filing Date 2024-11-01
First Publication Date 2025-02-20
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sasaki, Toshinari
  • Sakata, Junichiro
  • Ohara, Hiroki
  • Yamazaki, Shunpei

Abstract

An object is to provide a high reliable semiconductor device including a thin film transistor having stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which an oxide semiconductor film is used for a semiconductor layer including a channel formation region, heat treatment (which is for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor film and reduce impurities such as moisture. Besides impurities such as moisture existing in the oxide semiconductor film, heat treatment causes reduction of impurities such as moisture existing in the gate insulating layer and those in interfaces between the oxide semiconductor film and films which are provided over and below the oxide semiconductor film and are in contact with the oxide semiconductor film.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

52.

DATA PROCESSING SYSTEM AND DATA PROCESSING METHOD

      
Application Number 18939631
Status Pending
Filing Date 2024-11-07
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okano, Tatsuya
  • Oguni, Teppei
  • Akimoto, Kengo

Abstract

A data processing system that can sense fatigue or the like using a neural network is provided. First, a reference image is obtained on the basis of first to n-th images (n is an integer greater than or equal to 2). Next, the first to n-th images and the reference image are input to an input layer of a neural network, first to n-th estimated ages and a reference estimated age are output from an output layer, and first to n-th data and reference data are output from an intermediate layer. After that, first to n-th coordinates are obtained in each of which an x-coordinate is a value corresponding to a difference between the reference estimated age and the first to n-th estimated ages and a y-coordinate is a value corresponding to the degree of similarity between the reference data and the first to n-th data. Next, a query image is input to the input layer, a query estimated age is output from the output layer, query data is output from the intermediate layer, and query coordinates are obtained using the output results. Whether a person of a face included in the query image feels fatigue or the like is determined on the basis of the first to n-th coordinates and the query coordinates.

IPC Classes  ?

  • G06V 40/20 - Movements or behaviour, e.g. gesture recognition
  • G06V 10/74 - Image or video pattern matchingProximity measures in feature spaces
  • G06V 10/762 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using clustering, e.g. of similar faces in social networks
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks
  • G06V 40/16 - Human faces, e.g. facial parts, sketches or expressions

53.

DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18723543
Status Pending
Filing Date 2022-12-15
First Publication Date 2025-02-20
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hodo, Ryota
  • Okazaki, Kenichi
  • Yamazaki, Shunpei

Abstract

A display apparatus with high display quality is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, and a layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, a first common electrode over the first light-emitting layer, and a second common electrode over the first common electrode. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, the first common electrode over the second light-emitting layer, and the second common electrode over the first common electrode. The layer is provided between the first light-emitting device and the second light-emitting device. The second common electrode is provided over the layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays

54.

Light-Emitting Element

      
Application Number 18786775
Status Pending
Filing Date 2024-07-29
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Shitagaki, Satoko
  • Seo, Satoshi
  • Ohsawa, Nobuharu
  • Inoue, Hideko
  • Suzuki, Kunihiko

Abstract

A light-emitting element having high external quantum efficiency is provided. A light-emitting element having a long lifetime is provided. Alight-emitting element is provided which includes a light-emitting layer containing a phosphorescent compound, a first organic compound, and a second organic compound between a pair of electrodes, in which a combination of the first organic compound and the second organic compound forms an exciplex (excited complex). The light-emitting element transfers energy by utilizing an overlap between the emission spectrum of the exciplex and the absorption spectrum of the phosphorescent compound and thus has high energy transfer efficiency. Therefore, a light-emitting element having high external quantum efficiency can be obtained.

IPC Classes  ?

  • H10K 85/30 - Coordination compounds
  • C07D 209/86 - CarbazolesHydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
  • C07D 239/26 - Heterocyclic compounds containing 1,3-diazine or hydrogenated 1,3-diazine rings not condensed with other rings having three or more double bonds between ring members or between ring members and non-ring members with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to ring carbon atoms
  • C07D 241/12 - Heterocyclic compounds containing 1,4-diazine or hydrogenated 1,4-diazine rings not condensed with other rings having three double bonds between ring members or between ring members and non-ring members with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to ring carbon atoms
  • C07D 333/76 - Dibenzothiophenes
  • C07D 409/10 - Heterocyclic compounds containing two or more hetero rings, at least one ring having sulfur atoms as the only ring hetero atoms containing two hetero rings linked by a carbon chain containing aromatic rings
  • C07D 471/04 - Ortho-condensed systems
  • C07F 15/00 - Compounds containing elements of Groups 8, 9, 10 or 18 of the Periodic Table
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

55.

ALL-SOLID-STATE BATTERY AND MANUFACTURING METHOD THEREOF

      
Application Number 18935745
Status Pending
Filing Date 2024-11-04
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Tajima, Ryota
  • Yoneda, Yumiko
  • Momma, Yohei
  • Yamazaki, Shunpei

Abstract

Use of silicon as a negative electrode active material particle causes a problem of expansion and contraction of the negative electrode active material particle due to charging and discharging. A negative electrode active material particle or a plurality of negative electrode active material particles are bound or fixed using a graphene compound to inhibit expansion and contraction of the negative electrode active material particle due to charging and discharging. In an all-solid-state secondary battery, an interface between a solid electrolyte and a negative electrode or an interface between the solid electrolyte and a positive electrode has the highest resistance. In order to reduce the interface resistance, at least the negative electrode active material particle is surrounded by a graphene compound to increase the conductivity. Alternatively, a positive electrode active material particle is surrounded by a graphene compound to increase the conductivity. Carrier ions, e.g., lithium ions, pass through a graphene compound, and thus the graphene compound does not hinder the transfer of lithium ions between the positive electrode and the negative electrode in charging or discharging.

IPC Classes  ?

  • H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/0562 - Solid materials

56.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

      
Application Number 18936334
Status Pending
Filing Date 2024-11-04
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Suzawa, Hideomi
  • Tanaka, Tetsuhiro
  • Watanabe, Hirokazu
  • Sato, Yuhei
  • Yamane, Yasumasa
  • Matsubayashi, Daisuke

Abstract

A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

IPC Classes  ?

57.

SHIFT REGISTER AND DISPLAY DEVICE AND DRIVING METHOD THEREOF

      
Application Number 18938670
Status Pending
Filing Date 2024-11-06
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Koyama, Jun

Abstract

The power consumption of a shift register or a display device including the shift register is reduced. A clock signal is supplied to a shift register by a plurality of wirings, not by one wiring. Any one of the plurality of wirings supplies a clock signal in only part of the operation period of the shift register, not during the whole operation period of the shift register. Therefore, the capacity load caused with the supply of clock signals can be reduced, leading to reduction in power consumption of the shift register.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/3266 - Details of drivers for scan electrodes
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

58.

ELECTRONIC DEVICE

      
Application Number 18938763
Status Pending
Filing Date 2024-11-06
First Publication Date 2025-02-20
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Aoki, Takeshi
  • Kurokawa, Yoshiyuki
  • Ikeda, Takayuki
  • Tamura, Hikaru

Abstract

An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

IPC Classes  ?

  • H01L 27/146 - Imager structures
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 29/786 - Thin-film transistors

59.

Semiconductor Device

      
Application Number 18710857
Status Pending
Filing Date 2022-11-07
First Publication Date 2025-02-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Onuki, Tatsuya

Abstract

A semiconductor device (300A) includes a first layer (20) and a second layer (30) over the first layer. The first layer includes a logic circuit portion (23). The second layer includes a level shifter portion (24) and a pixel circuit (51). The logic circuit portion has a function of supplying a first signal for operating the level shifter portion to the level shifter portion. The level shifter portion has a function of supplying a second signal with a larger amplitude than the first signal to the pixel circuit. The logic circuit portion includes a transistor including silicon in a semiconductor layer where a channel is formed. Each of the level shifter portion and the pixel circuit includes a transistor including a metal oxide in a semiconductor layer where a channel is formed.

IPC Classes  ?

  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H03K 19/0185 - Coupling arrangementsInterface arrangements using field-effect transistors only

60.

DISPLAY MODULE AND ELECTRONIC DEVICE

      
Application Number 18739446
Status Pending
Filing Date 2024-06-11
First Publication Date 2025-02-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takahashi, Kei
  • Kobayashi, Hidetomo

Abstract

Common noise is reduced from light-receiving data. A display module includes a display apparatus and a reading circuit. Each of a first pixel and a second pixel adjacent to each other in the display apparatus includes a light-receiving element and a light-emitting element. The reading circuit includes a differential input circuit. Common noise generated when display data is supplied to a light-emitting element, for example, may affect a first light-receiving signal output by the first pixel and a second light-receiving signal output by the second pixel. A first current is generated using the first light-receiving signal and a ramp signal, and a second current is generated using the second light-receiving signal and a first potential. The differential input circuit is controlled so that the first current and the second current have the same current value, whereby common noise can be removed from the first light-receiving signal.

IPC Classes  ?

  • H10K 59/60 - OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
  • G06F 1/16 - Constructional details or arrangements
  • G06V 40/13 - Sensors therefor
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 77/10 - Substrates, e.g. flexible substrates

61.

IMAGING DEVICE, IMAGING MODULE, ELECTRONIC DEVICE, AND IMAGING SYSTEM

      
Application Number 18929948
Status Pending
Filing Date 2024-10-29
First Publication Date 2025-02-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ikeda, Takayuki
  • Fukutome, Takahiro

Abstract

An imaging device connected to a neural network is provided. An imaging device having a neuron in a neural network includes a plurality of first pixels, a first circuit, a second circuit, and a third circuit. Each of the plurality of first pixels includes a photoelectric conversion element. The plurality of first pixels is electrically connected to the first circuit. The first circuit is electrically connected to the second circuit. The second circuit is electrically connected to the third circuit. Each of the plurality of first pixels generates an input signal of the neuron. The first circuit, the second circuit, and the third circuit function as the neuron. The third circuit includes an interface connected to the neural network.

IPC Classes  ?

  • G06N 3/067 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using optical means
  • G06N 3/04 - Architecture, e.g. interconnection topology
  • G06N 3/065 - Analogue means
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 27/146 - Imager structures
  • H01L 29/786 - Thin-film transistors
  • H04N 23/57 - Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
  • H04N 25/75 - Circuitry for providing, modifying or processing image signals from the pixel array
  • H04N 25/77 - Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

62.

DISPLAY DEVICE AND METHOD FOR FABRICATING DISPLAY DEVICE

      
Application Number 18717635
Status Pending
Filing Date 2022-12-02
First Publication Date 2025-02-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Ikeda, Hisao
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Yanagisawa, Yuichi

Abstract

A method for fabricating a highly reliable display device is provided. A first conductive film is formed; a first film containing a first light-emitting substance is formed over the first conductive film; a first mask film is formed over the first film; the first conductive film, the first film, and the first mask film are processed such that their side surfaces are substantially aligned with each other to form a first conductive layer, a first layer, and a first mask layer; a second conductive film is formed over the first mask layer and a first sidewall insulating layer; a second film containing a second light-emitting substance is formed over the second conductive film; a second mask film is formed over the second film; and the second conductive film, the second film, and the second mask film are processed such that their side surfaces are substantially aligned with each other to form a second conductive layer, a second layer, and a second mask layer and to expose the top surface of the first mask layer.

IPC Classes  ?

63.

SEMICONDUCTOR DEVICE, STORAGE DEVICE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18723731
Status Pending
Filing Date 2022-12-15
First Publication Date 2025-02-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hodo, Ryota
  • Onuki, Tatsuya
  • Kato, Kiyoshi

Abstract

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor; the transistor includes an oxide, a first conductor and a second conductor over the oxide, a first insulator that is placed over the first conductor and the second conductor and includes a first opening and a second opening, a second insulator in the first opening of the first insulator, and a third conductor over the second insulator; the first opening in the first insulator includes a region overlapping with the oxide; the third conductor includes a region overlapping with the oxide with the second insulator therebetween; the capacitor includes the second conductor, a third insulator in the second opening of the first insulator, and a fourth conductor over the third insulator; and the distance between the first conductor and the second conductor is smaller than the width of the first opening in a cross-sectional view of the transistor in a channel length direction.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

64.

SECONDARY BATTERY AND ELECTRONIC DEVICE

      
Application Number 18724035
Status Pending
Filing Date 2022-12-16
First Publication Date 2025-02-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kuriki, Kazutaka
  • Saito, Seiya
  • Ochiai, Teruaki
  • Akimoto, Kengo

Abstract

The relative position shifts of a positive electrode and a negative electrode occur owing to bending in charge or discharge, whereby uneven distribution is caused and potential varies. Not graphite but a lithium metal film is used as the negative electrode. A lithium metal film is formed over one side of the negative electrode current collector by an evaporation method or a sputtering method, and a laminated body is formed such that surfaces of two negative electrode current collectors where no film is formed are in contact with each other.

IPC Classes  ?

  • H01M 50/136 - Flexibility or foldability
  • H01G 11/28 - Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features arranged or disposed on a current collectorLayers or phases between electrodes and current collectors, e.g. adhesives
  • H01G 11/50 - Electrodes characterised by their material specially adapted for lithium-ion capacitors, e.g. for lithium-doping or for intercalation
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 50/105 - Pouches or flexible bags

65.

SEMICONDUCTOR DEVICE

      
Application Number 18928429
Status Pending
Filing Date 2024-10-28
First Publication Date 2025-02-13
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koezuka, Junichi
  • Jintyou, Masami
  • Shima, Yukinori
  • Hamochi, Takashi
  • Nakazawa, Yasutaka

Abstract

A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
  • G02F 1/1339 - GasketsSpacersSealing of cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/45 - Ohmic electrodes
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

66.

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

      
Application Number 18932891
Status Pending
Filing Date 2024-10-31
First Publication Date 2025-02-13
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Aoki, Takeshi
  • Kurokawa, Yoshiyuki
  • Kozuma, Munehiro
  • Kanemura, Takuro
  • Inoue, Tatsunori

Abstract

A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell. The current mirror circuit is electrically connected to the first wiring and the second wiring.

IPC Classes  ?

  • G11C 5/10 - Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting capacitors
  • G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using ferroelectric elements
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

67.

ORGANIC COMPOUND, ORGANIC DEVICE, LIGHT-EMITTING APPARATUS, AND ELECTRONIC APPLIANCE

      
Application Number 18710010
Status Pending
Filing Date 2022-11-18
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hayashi, Yuki
  • Kawakami, Sachiko
  • Hashimoto, Naoaki

Abstract

A novel compound, a synthesis method thereof, and an organic device including the novel compound are provided. A compound represented by General Formula (G1) is provided. In General Formula (G1), each of R1, R2, and R5 to R7 independently represents any of hydrogen (including deuterium), an alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 1 to 60 carbon atoms, and a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms. R3 represents a condensed ring composed of 4 to 10 rings containing nitrogen as an element forming the ring, and R4 represents any of a substituted or unsubstituted condensed ring having 1 to 60 carbon atoms, a substituted or unsubstituted aryl group with a molecular weight of 78 or more, and a substituted or unsubstituted heteroaryl group with a molecular weight of 80 or more. At least one of A1 to A3 represents nitrogen, and each of the others represents substituted carbon. Each of substituents of A1 to A3 independently represents any of hydrogen (including deuterium), an alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 1 to 60 carbon atoms, and a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms. A novel compound, a synthesis method thereof, and an organic device including the novel compound are provided. A compound represented by General Formula (G1) is provided. In General Formula (G1), each of R1, R2, and R5 to R7 independently represents any of hydrogen (including deuterium), an alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 1 to 60 carbon atoms, and a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms. R3 represents a condensed ring composed of 4 to 10 rings containing nitrogen as an element forming the ring, and R4 represents any of a substituted or unsubstituted condensed ring having 1 to 60 carbon atoms, a substituted or unsubstituted aryl group with a molecular weight of 78 or more, and a substituted or unsubstituted heteroaryl group with a molecular weight of 80 or more. At least one of A1 to A3 represents nitrogen, and each of the others represents substituted carbon. Each of substituents of A1 to A3 independently represents any of hydrogen (including deuterium), an alkyl group having 1 to 10 carbon atoms, a substituted or unsubstituted aryl group having 1 to 60 carbon atoms, and a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms.

IPC Classes  ?

  • C07D 403/10 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a carbon chain containing aromatic rings
  • H10K 50/16 - Electron transporting layers
  • H10K 85/60 - Organic compounds having low molecular weight

68.

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18713288
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hodo, Ryota
  • Saito, Satoru
  • Kunitake, Hitoshi
  • Yamazaki, Shunpei
  • Wakuda, Masahiro
  • Hamada, Toshiki

Abstract

A semiconductor device that can be miniaturized or highly integrated and a manufacturing method thereof are provided. A semiconductor device includes a metal oxide, a first conductor and a second conductor over the metal oxide, a first insulator positioned over the metal oxide and between the first conductor and the second conductor, a second insulator over the first insulator, a third insulator over the second insulator, a third conductor over the third insulator, a fourth insulator positioned between the first conductor and the first insulator, and a fifth insulator positioned between the second conductor and the first insulator. The first insulator is in contact with the top surface and the side surface of the metal oxide, and oxygen is less likely to pass through the first insulator than the second insulator. The first conductor, the second conductor, the fourth insulator, and the fifth insulator contain the same metal element. In a cross-sectional view in a channel length direction, a distance from the first conductor to the first insulator is greater than or equal to a thickness of the first insulator and less than or equal to a distance from the third conductor to the metal oxide.

IPC Classes  ?

  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

69.

DISPLAY APPARATUS

      
Application Number 18718878
Status Pending
Filing Date 2022-12-16
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Nakamura, Daiki
  • Sawai, Hiromi
  • Hodo, Ryota

Abstract

A display apparatus with high display quality is provided. In the display apparatus, a dummy pixel portion is a region that does not contribute to display. The dummy pixel portion is positioned adjacent to the outside of a pixel portion in a plan view. The pixel portion includes a first insulating layer, a first pixel electrode and a second pixel electrode over the first insulating layer, a first layer over the first pixel electrode, a second layer over the second pixel electrode, and a common electrode over the first layer and the second layer. The dummy pixel portion includes the first insulating layer, a first conductive layer and a second conductive layer over the first insulating layer, a third layer over the first conductive layer, a fourth layer over the second conductive layer, and the common electrode over the third layer and the fourth layer. The first insulating layer includes a first groove and a second groove. The first groove includes a first region overlapping with the first pixel electrode and a second region overlapping with the second pixel electrode. The second groove includes a third region overlapping with the first conductive layer and a fourth region overlapping with the second conductive layer.

IPC Classes  ?

  • H10K 59/88 - Dummy elements, i.e. elements having non-functional features
  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/80 - Constructional details

70.

Light-Emitting Element, Compound, Organic Compound, Display Module, Lighting Module, Light-Emitting Device, Display Device, Lighting Device, and Electronic Device

      
Application Number 18805886
Status Pending
Filing Date 2024-08-15
First Publication Date 2025-02-06
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Inoue, Hideko
  • Kanamoto, Miki
  • Seo, Hiromi
  • Seo, Satoshi
  • Takahashi, Tatsuyoshi
  • Nakagawa, Tomoka

Abstract

Alight-emitting element having high emission efficiency is provided. A light-emitting element having a low driving voltage is provided. A novel compound which can be used for a transport layer or as a host material or a light-emitting material of a light-emitting element is provided. A novel compound with a benzofuropyrimidine skeleton is provided. Also provided is a light-emitting element which includes the compound with the benzofuropyrimidine skeleton between a pair of electrodes.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/30 - Coordination compounds
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission

71.

DISPLAY DEVICE

      
Application Number 18922673
Status Pending
Filing Date 2024-10-22
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Umezaki, Atsushi

Abstract

By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1343 - Electrodes
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G09G 3/3266 - Details of drivers for scan electrodes
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01H 71/02 - HousingsCasingsBasesMountings
  • H01H 71/10 - Operating or release mechanisms
  • H01L 27/13 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors
  • H10B 99/00 - Subject matter not provided for in other groups of this subclass
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

72.

FLEXIBLE BATTERY MANAGEMENT SYSTEM AND ELECTRONIC DEVICE

      
Application Number 18713462
Status Pending
Filing Date 2022-11-18
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Jinbo, Yasuhiro
  • Tsukamoto, Yosuke
  • Kuriki, Kazutaka
  • Ishitani, Tetsuji
  • Yoshitomi, Shuhei
  • Osada, Takeshi

Abstract

A safe charging environment with respect to a flexible battery capable of following the movement of a housing is provided. A flexible battery management system or an electronic device mounted with the flexible battery includes a sensor that senses a movement of the flexible battery and a charge control circuit having a function of starting charging or stopping charging of the flexible battery on the basis of a signal from the sensor; charging of the flexible battery is started using the charge control circuit when the sensor senses the flexible battery in a first mode where the flexible battery is opened and senses the flexible battery in a second mode where the flexible battery is curved.

IPC Classes  ?

  • H01M 50/247 - MountingsSecondary casings or framesRacks, modules or packsSuspension devicesShock absorbersTransport or carrying devicesHolders specially adapted for portable devices, e.g. mobile phones, computers, hand tools or pacemakers
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
  • H01M 50/238 - Flexibility or foldability
  • H01M 50/284 - MountingsSecondary casings or framesRacks, modules or packsSuspension devicesShock absorbersTransport or carrying devicesHolders with incorporated circuit boards, e.g. printed circuit boards [PCB]

73.

NEGATIVE ELECTRODE FOR POWER STORAGE DEVICE, POWER STORAGE DEVICE, AND ELECTRIC DEVICE

      
Application Number 18826241
Status Pending
Filing Date 2024-09-06
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Miyake, Hiroyuki
  • Inoue, Nobuhiro
  • Yamauchi, Ryo
  • Motoyoshi, Mako
  • Kawakami, Takahiro
  • Mikami, Mayumi
  • Fujita, Miku
  • Yamazaki, Shunpei

Abstract

A power storage device having high capacitance is provided. A power storage device with excellent cycle characteristics is provided. A power storage device with high charge and discharge efficiency is provided. A power storage device including a negative electrode with low resistance is provided. A negative electrode for a power storage device includes a number of composites in particulate forms. The composites include a negative electrode active material, a first functional material, and a compound. The compound includes a constituent element of the negative electrode active material and a constituent element of the first functional material. The negative electrode active material includes a region in contact with at least one of the first functional material or the compound.

IPC Classes  ?

  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01G 11/06 - Hybrid capacitors with one of the electrodes allowing ions to be reversibly doped thereinto, e.g. lithium ion capacitors [LIC]
  • H01G 11/28 - Electrodes characterised by their structure, e.g. multi-layered, porosity or surface features arranged or disposed on a current collectorLayers or phases between electrodes and current collectors, e.g. adhesives
  • H01G 11/30 - Electrodes characterised by their material
  • H01G 11/36 - Nanostructures, e.g. nanofibres, nanotubes or fullerenes
  • H01G 11/50 - Electrodes characterised by their material specially adapted for lithium-ion capacitors, e.g. for lithium-doping or for intercalation
  • H01M 4/134 - Electrodes based on metals, Si or alloys
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries

74.

SOLID-STATE SECONDARY BATTERY AND MANUFACTURING METHOD THEREOF

      
Application Number 18921138
Status Pending
Filing Date 2024-10-21
First Publication Date 2025-02-06
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kuriki, Kazutaka
  • Tajima, Ryota
  • Yoneda, Yumiko

Abstract

An all-solid-state secondary battery having a higher level of safety than a conventional lithium-ion secondary battery using an electrolyte solution, specifically, a thin-film-type solid-state secondary battery, and a manufacturing method thereof are provided. As a solid electrolyte, a mixed material obtained by co-evaporation of SiO and an organic complex of lithium is used. That is, a solid electrolyte layer formed using a mixed material of an inorganic material and an organic material is used in a solid-state secondary battery. The ratio of oxygen to silicon in the solid electrolyte layer is higher than 1 and lower than 2.

IPC Classes  ?

  • H01M 10/0562 - Solid materials
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 10/058 - Construction or manufacture

75.

ELECTRONIC DEVICE

      
Application Number 18697595
Status Pending
Filing Date 2022-09-27
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kozuma, Munehiro
  • Onuki, Tatsuya
  • Kobayashi, Hidetomo
  • Okamoto, Yuki
  • Yamazaki, Shunpei

Abstract

A novel electronic device is provided. The electronic device includes a display apparatus, an arithmetic portion, and a gaze detection portion, and the display apparatus includes a functional circuit and a display portion divided into a plurality of sub-display portions. The gaze detection portion has a function of detecting a gaze of a user. The arithmetic portion has a function of distributing each of the plurality of sub-display portions into a first section or a second section on the basis of a detection result by the gaze detection portion. The first section includes a region overlapping with a gaze point. The functional circuit has a function of making the driving frequency of the second section lower than the driving frequency of the first section. The functional circuit also has a function of making a resolution of an image displayed on the sub-display portions included in the second section lower than a resolution of an image displayed on the sub-display portions included in the first section.

IPC Classes  ?

  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

76.

MEMORY DEVICE

      
Application Number 18780650
Status Pending
Filing Date 2024-07-23
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Matsuzaki, Takanori
  • Yakubo, Yuto
  • Okamoto, Yuki

Abstract

A memory device with a novel structure. A first transistor includes a first oxide semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a first insulating layer, and a second insulating layer. A second transistor includes a second oxide semiconductor layer, the first conductive layer, a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, a third insulating layer, and a fourth insulating layer. In a plan view, the first oxide semiconductor layer includes a region facing the first conductive layer with the first insulating layer therebetween and a region facing the second conductive layer with the second insulating layer therebetween. In a plan view, the second oxide semiconductor layer includes a region facing the fifth conductive layer with the third insulating layer therebetween and a region facing the sixth conductive layer with the fourth insulating layer therebetween. The first oxide semiconductor layer is provided in contact with the third conductive layer and the fourth conductive layer. The second oxide semiconductor layer is provided in contact with the first conductive layer and the seventh conductive layer. In a cross-sectional view, the third conductive layer includes a region overlapping with the first conductive layer, the second conductive layer, the fourth conductive layer, the fifth conductive layer, the sixth conductive layer, and the seventh conductive layer.

IPC Classes  ?

  • H10B 51/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/786 - Thin-film transistors
  • H10B 51/10 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the top-view layout
  • H10B 53/10 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the top-view layout
  • H10B 53/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels

77.

MEMORY DEVICE

      
Application Number 18780752
Status Pending
Filing Date 2024-07-23
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Matsuzaki, Takanori
  • Yakubo, Yuto
  • Okamoto, Yuki
  • Uochi, Hideki

Abstract

A novel memory device is provided. A plurality of memory cells each including two vertical transistors are connected in series. One of the two transistors functions as a transistor for writing data, and the other functions as a transistor for reading the data that has been written to the memory cell. Data written to the memory cell is retained in a gate of the reading transistor. A transistor with low off-state current is used as the writing transistor.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

78.

DISPLAY DEVICE

      
Application Number 18783679
Status Pending
Filing Date 2024-07-25
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Kunio
  • Kawata, Takuya
  • Honda, Yukiko
  • Shibata, Noriko

Abstract

A display device includes first to third light-emitting devices. The first light-emitting device includes a first anode, a first cathode, and a first light-emitting layer between the first anode and the first cathode. The second light-emitting device includes a second anode, a second cathode, and a second light-emitting layer between the second anode and the second cathode. The third light-emitting device includes a third anode; a third cathode; and a third light-emitting layer and a fourth light-emitting layer between the third anode and the third cathode. The fourth light-emitting layer is between the third light-emitting layer and the third cathode and is in contact with the third light-emitting layer. The first to third light-emitting devices have different emission colors. The first and third light-emitting layers include a first light-emitting substance. The second and fourth light-emitting layers include a second light-emitting substance. A peak wavelength of an emission spectrum of the first light-emitting substance and a peak wavelength of an emission spectrum of the second light-emitting substance are different from each other.

IPC Classes  ?

  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 59/80 - Constructional details

79.

SEMICONDUCTOR DEVICE

      
Application Number 18790447
Status Pending
Filing Date 2024-07-31
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Koezuka, Junichi
  • Jintyou, Masami
  • Shima, Yukinori
  • Kurosaki, Daisuke
  • Nakada, Masataka
  • Yamazaki, Shunpei

Abstract

A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

80.

LIQUID CRYSTAL DISPLAY DEVICE

      
Application Number 18795390
Status Pending
Filing Date 2024-08-06
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Kimura, Hajime

Abstract

It is an object to provide a liquid crystal display device which has excellent viewing angle characteristics and higher quality. The present invention has a pixel including a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.

IPC Classes  ?

  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G02F 1/1343 - Electrodes
  • G02F 1/1362 - Active matrix addressed cells
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors
  • H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

81.

LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18887124
Status Pending
Filing Date 2024-09-17
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hashimoto, Naoaki
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Takita, Yusuke
  • Okuyama, Takumu
  • Ohsawa, Nobuharu
  • Yamazaki, Shunpei
  • Sasaki, Toshiki

Abstract

A novel light-emitting device, a light-emitting device with high emission efficiency, a light-emitting device with a long lifetime, or a light-emitting device with low driving voltage is provided. An EL layer includes a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side. The first layer contains a first organic compound and a second organic compound. The fourth layer contains a seventh organic compound. The first organic compound exhibits an electron-accepting property with respect to the second organic compound. A HOMO level of the second organic compound is higher than or equal to −5.7 eV and lower than or equal to −5.4 eV. The fourth layer includes a region where the amount of seventh organic compound is large and a region where the amount of seventh organic compound is small in the thickness direction.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/16 - Electron transporting layers
  • H10K 85/30 - Coordination compounds
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

82.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18704237
Status Pending
Filing Date 2022-10-31
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kozuma, Munehiro
  • Onuki, Tatsuya
  • Kobayashi, Hidetomo
  • Okamoto, Yuki

Abstract

An object of the present invention is to provide a display apparatus that reduces the amount of image data transmitted and maintains high-level display quality, which is a display apparatus (Dp) including a display portion (DIS), a light-emitting portion (SHB), and a light-receiving portion (SJB). The display portion includes a first display region (ALP) and a first circuit region that overlap with each other. The first display region includes a plurality of first display pixels and the first circuit region includes a first driver circuit (DRV). The first driver circuit is electrically connected to the plurality of first display pixels through a plurality of first wirings extended in the first display region. The light-emitting portion has a function of emitting first light, and the light-receiving portion has a function of receiving second light that is reflected by irradiation of an object with the first light and a function of generating information based on the second light. The first driver circuit has a function of, in accordance with the information, one of transmitting a plurality of image signals to the plurality of first wirings and transmitting the same image signal to two or more consecutive adjacent wirings among the plurality of first wirings.

IPC Classes  ?

  • H10K 59/65 - OLEDs integrated with inorganic image sensors
  • G02B 27/01 - Head-up displays
  • H10K 50/19 - Tandem OLEDs
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals

83.

SEMICONDUCTOR DEVICE AND STORAGE DEVICE

      
Application Number 18716572
Status Pending
Filing Date 2022-11-28
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kunitake, Hitoshi
  • Saito, Satoru
  • Takahashi, Masahiro
  • Okuno, Naoki
  • Oota, Masashi

Abstract

A semiconductor device with a high on-state current is provided. A transistor included in the semiconductor device includes a first insulator; a first semiconductor layer over the first insulator; a second semiconductor layer including a channel formation region over the first semiconductor layer; a first conductor and a second conductor over the second semiconductor layer; a second insulator over the second semiconductor layer and between the first conductor and the second conductor; and a third conductor over the second insulator. In a cross-sectional view in a channel width direction of the transistor, the third conductor covers a side surface and a top surface of the second semiconductor layer. The second semiconductor layer has a higher permittivity than the first semiconductor layer. In the cross-sectional view in the channel width direction of the transistor, a length of an interface between the first semiconductor layer and the second semiconductor layer is greater than or equal to 1 nm and less than or equal to 20 nm, and a length from a bottom surface of the second semiconductor layer to a bottom surface of the third conductor in a region not overlapping with the second semiconductor layer is larger than a thickness of the second semiconductor layer.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/775 - Field-effect transistors with one-dimensional charge carrier gas channel, e.g. quantum wire FET
  • H01L 29/792 - Field-effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistor
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 43/20 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

84.

OPTICAL DEVICE AND ELECTRONIC DEVICE

      
Application Number 18716664
Status Pending
Filing Date 2022-12-15
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hatsumi, Ryo
  • Ikeda, Hisao
  • Nakamura, Daiki
  • Hirose, Takeya
  • Tsukamoto, Yosuke

Abstract

A thin optical device having high light utilization efficiency and a small electronic device including the optical device are provided. The thin optical device includes a reflective polarizing plate, a lens, and an optical rotator. The optical device can be a thin optical device that is small in overall length by rotation of the polarization plane of linearly polarized light with the optical rotator and utilization of properties of transmitting and reflecting light of the reflective polarizing plate. Furthermore, the optical device does not use a half mirror; thus, the optical device has a property of high light utilization efficiency, and the power consumption of the electronic device can be reduced and the reliability of the electronic device can be improved.

IPC Classes  ?

  • G02B 27/28 - Optical systems or apparatus not provided for by any of the groups , for polarising
  • G02B 5/30 - Polarising elements
  • G02B 27/01 - Head-up displays
  • H10K 59/90 - Assemblies of multiple devices comprising at least one organic light-emitting element

85.

Organic Compound, Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18763512
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Osaka, Harue
  • Numata, Satoko
  • Ohsawa, Nobuharu
  • Kubota, Yuko
  • Takeda, Kyoko
  • Kido, Hiromitsu

Abstract

An organic compound having high heat resistance is provided. An organic compound represented by a general formula (G1) is provided. In the formula, Q represents carbon or silicon; each of R1 and R2 independently represents an alkyl group, a cycloalkyl group, or an aryl group; n represents an integer from 1 to 3; each of α1 to α4 independently represents a phenylene group or a biphenylene group; at least one of R15, R25, R31 and at least one of R45, R55, and R61 represent single bonds and the others thereof represent H, an alkyl group, or an aryl group; and R11 to R14, R21 to R24, R32 to R35, R41 to R44, R51 to R54, and R62 to R65 represent H, an alkyl group, a cycloalkyl group, or an aryl group. An organic compound having high heat resistance is provided. An organic compound represented by a general formula (G1) is provided. In the formula, Q represents carbon or silicon; each of R1 and R2 independently represents an alkyl group, a cycloalkyl group, or an aryl group; n represents an integer from 1 to 3; each of α1 to α4 independently represents a phenylene group or a biphenylene group; at least one of R15, R25, R31 and at least one of R45, R55, and R61 represent single bonds and the others thereof represent H, an alkyl group, or an aryl group; and R11 to R14, R21 to R24, R32 to R35, R41 to R44, R51 to R54, and R62 to R65 represent H, an alkyl group, a cycloalkyl group, or an aryl group.

IPC Classes  ?

  • C07F 7/08 - Compounds having one or more C—Si linkages
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 85/40 - Organosilicon compounds, e.g. TIPS pentacene
  • H10K 85/60 - Organic compounds having low molecular weight

86.

LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18789774
Status Pending
Filing Date 2024-07-31
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawakami, Sachiko
  • Suzuki, Tsunenori
  • Takita, Yusuke
  • Seo, Satoshi

Abstract

A novel light-emitting element is provided. A light-emitting element with a long lifetime is provided. A light-emitting element with high emission efficiency is provided. A novel organic compound is provided. A novel organic compound having a hole-transport property is provided. A novel hole-transport material is provided. A hole-transport material including an organic compound having a substituted or unsubstituted benzonaphthofuran skeleton and a substituted or unsubstituted amine skeleton is provided. A light-emitting element using the hole-transport material is provided. An organic compound in which an amine skeleton including two aromatic hydrocarbon groups having 6 to 60 carbon atoms is bonded to the 6- or 8-position of the benzonaphthofuran skeleton is provided.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 307/77 - Heterocyclic compounds containing five-membered rings having one oxygen atom as the only ring hetero atom ortho- or peri-condensed with carbocyclic rings or ring systems
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/15 - Hole transporting layers
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

87.

Light-Emitting Device, Light-Emitting Apparatus, Electronic Device, and Lighting Device

      
Application Number 18913185
Status Pending
Filing Date 2024-10-11
First Publication Date 2025-01-30
Owner Semiconductor Energy Laboratory Co, Ltd. (Japan)
Inventor Seo, Satoshi

Abstract

To provide a light-emitting device not only including a light-emitting layer in which energy is efficiently transferred from a host material to a guest material but also having high reliability. The light-emitting device not only includes a light-emitting layer in which the T1 levels and the S1 levels of a host material and a guest material fall within certain ranges so that energy can be efficiently transferred from the host material to the guest material and but also has improved reliability.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

88.

DISPLAY DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME

      
Application Number 18916783
Status Pending
Filing Date 2024-10-16
First Publication Date 2025-01-30
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Umezaki, Atsushi

Abstract

It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.

IPC Classes  ?

  • G09G 3/3266 - Details of drivers for scan electrodes
  • G02F 1/1362 - Active matrix addressed cells
  • G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source

89.

SEMICONDUCTOR DEVICE, DISPLAY APPARATUS, DATA PROCESSING SYSTEM, AND CONTROL SYSTEM OF THE SEMICONDUCTOR DEVICE

      
Application Number 18715300
Status Pending
Filing Date 2022-12-05
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Fujita, Masashi
  • Ohshima, Kazuaki

Abstract

A semiconductor device with a novel structure is provided. The semiconductor device includes a register. The register includes a flip-flop and a plurality of data retention circuits. The flip-flop includes a first transistor in which a semiconductor layer including a channel formation region is silicon, an input terminal of the flip-flop is electrically connected to each of output terminals of the data retention circuits, and an output terminal of the flip-flop is electrically connected to each of input terminals of the data retention circuits. The data retention circuits include a second transistor in which a semiconductor layer including a channel formation region is an oxide semiconductor, and when the second transistor is in a non-conduction state, the data retention circuits have a function of retaining a potential corresponding to data corresponding to a plurality of tasks. A state control portion rewrites data that the flip-flop has on the basis of data retained in the data retention circuits in accordance with the plurality of tasks executed by a processor core.

IPC Classes  ?

  • G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

90.

SEMICONDUCTOR DEVICE

      
Application Number 18715890
Status Pending
Filing Date 2022-11-25
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kunitake, Hitoshi
  • Hodo, Ryota
  • Onuki, Tatsuya

Abstract

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first transistor including a first oxide, a second transistor including a second oxide, and a third oxide. The first oxide includes a channel formation region of the first transistor. The second oxide includes a channel formation region of the second transistor. The third oxide contains the same material as the first oxide and the second oxide. The third oxide is separated from the first oxide and the second oxide. In a top view, the third oxide is positioned between the first oxide and the second oxide. The third oxide is placed in the same layer as the first oxide and the second oxide.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes

91.

SEMICONDUCTOR DEVICE

      
Application Number 18716284
Status Pending
Filing Date 2022-12-08
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kurokawa, Yoshiyuki
  • Fujita, Masashi
  • Ohshima, Kazuaki

Abstract

A novel semiconductor is provided. The semiconductor includes a first component, a second component, and an instruction portion. The first component includes a first memory circuit having a function of storing first setting information in a state where power is supplied, and a second memory circuit having a function of storing the first setting information in a state where power is not supplied. The second component includes a third memory circuit having a function of storing second setting information in a state where power is supplied, and a fourth memory circuit having a function of storing the second setting information in a state where power is not supplied. The instruction portion has a function of controlling whether power is supplied to each of the first component and the second component. Each of the second memory circuit and the fourth memory circuit includes a transistor including a metal oxide in a semiconductor layer where a channel is formed.

IPC Classes  ?

  • G06F 1/3287 - Power saving characterised by the action undertaken by switching off individual functional units in the computer system
  • G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
  • H01L 29/786 - Thin-film transistors

92.

DISPLAY PANEL AND INFORMATION PROCESSING DEVICE

      
Application Number 18754598
Status Pending
Filing Date 2024-06-26
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Osaka, Harue

Abstract

A display panel is provided. The display panel includes a display region, an insulating film, and a sealing film; the display region includes a pixel; and the pixel includes a display element and a color conversion layer. The insulating film covers the display element, the sealing film includes a region, the color conversion layer is sandwiched between the region and the insulating film, and the sealing film includes a region that is on the outside of the display region and in contact with the insulating film. The display element includes a first layer, a second layer, a third layer, and a fourth layer. The first layer contains a first material and a second material, the second layer contains a third material, the third layer contains a light-emitting material and a fourth material, the fourth layer contains a fifth material and a sixth material, the first material has a HOMO level higher than or equal to −5.7 eV and lower than or equal to −5.4 eV, the second material has an acceptor property, the third material has a lower HOMO level than the first material, the fifth material has a HOMO level higher than or equal to −6.0 eV, and the sixth material is an organic complex of alkali metal or an organic complex of alkaline earth metal.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

93.

Semiconductor Device and Memory Device

      
Application Number 18785690
Status Pending
Filing Date 2024-07-26
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Yamaguchi, Daisuke
  • Kawaguchi, Shinobu
  • Komatsu, Yoshihiro
  • Ohno, Toshikazu
  • Yamane, Yasumasa
  • Kanagawa, Tomosato

Abstract

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes an oxide semiconductor, a first insulator in contact with the oxide semiconductor, and a second insulator in contact with the first insulator. The first insulator includes excess oxygen. The second insulator has a function of trapping or fixing hydrogen. Hydrogen in the oxide semiconductor is bonded to the excess oxygen. The hydrogen bonded to the excess oxygen passes through the first insulator and is trapped or fixed in the second insulator. The excess oxygen bonded to the hydrogen remains in the first insulator as the excess oxygen.

IPC Classes  ?

  • H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

94.

ELECTRONIC DEVICE, STORAGE MEDIUM, PROGRAM, AND DISPLAYING METHOD

      
Application Number 18907727
Status Pending
Filing Date 2024-10-07
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Hosoya, Kunio

Abstract

An electronic device is provided which displays an object (body) on a flexible display screen in accordance with a three-dimensional shape of the display screen by utilizing the flexibility of the display screen. An electronic device including a display portion which includes a flexible display device displaying an object on a display screen; a detection portion detecting positional data of a given part of the display screen; and an arithmetic portion calculating a three-dimensional shape of the display screen on the basis of the positional data and computing motion of the object to make the object move according to a given law in accordance with the calculated three-dimensional shape of the display screen.

IPC Classes  ?

  • G06F 1/16 - Constructional details or arrangements
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/0484 - Interaction techniques based on graphical user interfaces [GUI] for the control of specific functions or operations, e.g. selecting or manipulating an object, an image or a displayed text element, setting a parameter value or selecting a range
  • G06T 13/20 - 3D [Three Dimensional] animation
  • G06T 15/00 - 3D [Three Dimensional] image rendering
  • H04M 1/02 - Constructional features of telephone sets

95.

BATTERY AND METHOD FOR MANUFACTURING BATTERY

      
Application Number 18638864
Status Pending
Filing Date 2024-04-18
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takahashi, Minoru
  • Tajima, Ryota

Abstract

A battery capable of changing its form safely is provided. A bendable battery having a larger thickness is provided. A battery with increased capacity is provided. For an exterior body of the battery, a film in the shape of a periodic wave in one direction is used. A space is provided in an area surrounded by the exterior body and between an end portion of the electrode stack that is not fixed and an interior wall of the exterior body. Furthermore, the phases of waves of a pair of portions of the exterior body between which the electrode stack is located are different from each other. In particular, the phases are different from each other by 180 degrees so that wave crest lines overlap with each other and wave trough lines overlap with each other.

IPC Classes  ?

  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
  • H01M 10/04 - Construction or manufacture in general
  • H01M 10/052 - Li-accumulators
  • H01M 10/0585 - Construction or manufacture of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators
  • H01M 50/105 - Pouches or flexible bags
  • H01M 50/119 - Metals
  • H01M 50/124 - Primary casingsJackets or wrappings characterised by the material having a layered structure
  • H01M 50/133 - Thickness
  • H01M 50/136 - Flexibility or foldability
  • H01M 50/141 - Primary casingsJackets or wrappings for protecting against damage caused by external factors for protecting against humidity
  • H01M 50/178 - Arrangements of electric connectors penetrating the casing adapted for the shape of the cells for pouch or flexible bag cells
  • H01M 50/55 - Terminals characterised by the disposition of the terminals on the cells on the same side of the cell
  • H01M 50/553 - Terminals adapted for prismatic, pouch or rectangular cells

96.

Light-Emitting Element, Organic Compound, Light-Emitting Device, Electronic Device, and Lighting Device

      
Application Number 18888691
Status Pending
Filing Date 2024-09-18
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamaguchi, Tomoya
  • Yoshizumi, Hideko
  • Kido, Hiromitsu
  • Takahashi, Tatsuyoshi
  • Seo, Satoshi

Abstract

A novel compound and a light-emitting element with high emission efficiency and a long lifetime are provided. The novel compound includes a benzofuropyrazine skeleton or a benzothienopyrazine skeleton, and each of a benzene ring and a pyrazine ring in the benzofuropyrazine skeleton or the benzothienopyrazine skeleton independently includes a substituent with a total number of carbon atoms of 6 to 100 inclusive. The light-emitting element includes the compound.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

97.

WIRING LAYOUT DESIGN METHOD, PROGRAM, AND RECORDING MEDIUM

      
Application Number 18904115
Status Pending
Filing Date 2024-10-02
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Koumura, Yusuke

Abstract

A novel wiring layout design method is provided. A wiring layout in which a starting terminal group and an end terminal group are electrically connected to each other is generated using layout information and a netlist. In the case where the wiring layout satisfies a design rule, a wiring resistance and a parasitic capacitance of the wiring layout are extracted. The layout information is updated using Q learning and a new wiring layout is generated. In the Q learning, a positive reward is given when the values of the wiring resistance and the parasitic capacitance decrease, and a weight of the neural network is updated in accordance with the reward. In the case where the new wiring layout satisfies the design rule, a wiring resistance and a parasitic capacitance of the new wiring layout are extracted. In the case where the change rate of the wiring resistance and the parasitic capacitance is high, the layout information is updated using the Q learning.

IPC Classes  ?

98.

LIGHT-EMITTING DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18904124
Status Pending
Filing Date 2024-10-02
First Publication Date 2025-01-23
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Seo, Satoshi
  • Ohsawa, Nobuharu

Abstract

A light-emitting device, an electronic device, and a display device each consume less power are provided. The light-emitting device includes a first light-emitting element, a second light-emitting element, and a third light-emitting element that share an EL layer. The EL layer includes a layer containing a light-emitting material that emits blue fluorescence and a layer containing a light-emitting material that emits yellow or green phosphorescence. Light emitted from the second light-emitting element enters a color filter layer or a second color conversion layer, and light emitted from the third light-emitting element enters a first color conversion layer.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 59/32 - Stacked devices having two or more layers, each emitting at different wavelengths
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

99.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18910164
Status Pending
Filing Date 2024-10-09
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Eguchi, Shingo
  • Kubota, Daisuke
  • Kusunoki, Koji
  • Watanabe, Kazunori

Abstract

A display device having both a touch detection function and a function of capturing an image of a shape of a fingerprint or a vein is provided. The display device includes a first substrate, a first light-emitting element, a second light-emitting element, a light-receiving element, a light-blocking layer, a first resin layer, and a second resin layer. The first light-emitting element and the light-receiving element are arranged over the first substrate, and the first resin layer is provided over the first light-emitting element and the light-receiving element. The light-blocking layer is provided over the first resin layer, and the second light-emitting element is provided over the light-blocking layer. The second resin layer is provided over the second light-emitting layer. The first light-emitting element emits visible light upward, and the second light-emitting element emits invisible light upward. The light-receiving element is a photoelectric conversion element having sensitivity to visible light and invisible light. In a plan view, the light-blocking layer includes a portion positioned between the first light-emitting element and the light-receiving element, and the second light-emitting element overlaps with the light-blocking layer and is positioned inside the outline of the light-blocking layer.

IPC Classes  ?

100.

Semiconductor Device and Electronic Device

      
Application Number 18374877
Status Pending
Filing Date 2023-09-29
First Publication Date 2025-01-23
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Umezaki, Atsushi

Abstract

To provide a novel shift register. Transistors 101 to 104 are provided. A first terminal of the transistor 101 is connected to a wiring 111 and a second terminal of the transistor 101 is connected to a wiring 112. A first terminal of the transistor 102 is connected to a wiring 113 and a second terminal of the transistor 102 is connected to the wiring 112. A first terminal of the transistor 103 is connected to the wiring 113 and a gate of the transistor 103 is connected to the wiring 111 or a wiring 119. A first terminal of the transistor 104 is connected to a second terminal of the transistor 103, a second terminal of the transistor 104 is connected to a gate of the transistor 101, and a gate of the transistor 104 is connected to a gate of the transistor 102.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02F 1/133 - Constructional arrangementsOperation of liquid crystal cellsCircuit arrangements
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/3266 - Details of drivers for scan electrodes
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/786 - Thin-film transistors
  • H03K 19/003 - Modifications for increasing the reliability
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