Semiconductor Energy Laboratory Co., Ltd.

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        Trademark 32
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        Europe 2
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New (last 4 weeks) 79
2025 January (MTD) 44
2024 December 83
2024 November 80
2024 October 76
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IPC Class
H01L 29/786 - Thin-film transistors 4,139
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body 2,434
H01L 51/50 - Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED) 1,469
H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes 1,242
H01L 29/66 - Types of semiconductor device 1,143
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NICE Class
09 - Scientific and electric apparatus and instruments 31
42 - Scientific, technological and industrial services, research and design 21
40 - Treatment of materials; recycling, air and water treatment, 8
45 - Legal and security services; personal services for individuals. 3
01 - Chemical and biological materials for industrial, scientific and agricultural use 2
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Status
Pending 1,360
Registered / In Force 9,720
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1.

DISPLAY DEVICE

      
Application Number 18904123
Status Pending
Filing Date 2024-10-02
First Publication Date 2025-01-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yokoyama, Masatoshi
  • Komori, Shigeki
  • Sato, Manabu
  • Okazaki, Kenichi
  • Yamazaki, Shunpei

Abstract

To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.

IPC Classes  ?

2.

BATTERY, ELECTRONIC DEVICE, AND VEHICLE

      
Application Number 18712499
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ishitani, Tetsuji
  • Miyairi, Noriko
  • Higo, Daichi
  • Ogita, Kaori
  • Hirahara, Takashi

Abstract

A nonaqueous solvent that can be used in a wide temperature range, has a low viscosity, has high lithium ion conductivity at low temperatures, or has high heat resistance is provided. The nonaqueous solvent containing an ionic liquid and an organic electrolyte for low-temperature use has a low viscosity even at low temperatures and has high carrier ion conductivity. As the organic electrolyte for low-temperature use, an electrolyte in which methyl ethyl carbonate accounts for greater than or equal to 30 volume % and less than or equal to 65 volume % can be used. A battery using the nonaqueous solvent as an electrolyte can be used in a wide temperature range and thus is preferable.

IPC Classes  ?

  • H01M 10/0569 - Liquid materials characterised by the solvents
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0567 - Liquid materials characterised by the additives
  • H01M 10/0568 - Liquid materials characterised by the solutes
  • H01M 50/105 - Pouches or flexible bags

3.

ELECTRIC VEHICLE AND ANTITHEFT SYSTEM OF SECONDARY BATTERY

      
Application Number 18711808
Status Pending
Filing Date 2022-11-28
First Publication Date 2025-01-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Osada, Takeshi
  • Kakehata, Tetsuya
  • Tsukamoto, Yosuke
  • Onoya, Shigeru
  • Inoue, Noboru
  • Yamazaki, Shunpei

Abstract

An electric vehicle and a system that easily recognize theft of a secondary battery of an electric vehicle typified by an electrically assisted bicycle and prevent the theft are provided. To prevent the theft of a secondary battery that can be detached from an electric vehicle typified by an electrically assisted bicycle or an electric motorcycle, mutual authentication between an electric vehicle body unit and a secondary battery unit is performed. The secondary battery unit at least includes a first memory portion storing first identification information, an authentication portion, and a wireless communication portion.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • B60R 25/045 - Fittings or systems for preventing or indicating unauthorised use or theft of vehicles operating on vehicle systems or fittings, e.g. on doors, seats or windscreens operating on the propulsion system, e.g. engine or drive motor by limiting or cutting the electrical supply to the propulsion unit
  • B62J 43/13 - Arrangements of batteries for propulsion on rider-propelled cycles with additional electric propulsion
  • B62J 43/16 - Arrangements of batteries for propulsion on motorcycles or the like
  • H04L 9/40 - Network security protocols
  • H04W 12/06 - Authentication

4.

Display Device And Method For Manufacturing Display Device

      
Application Number 18712948
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakamura, Daiki
  • Ikeda, Hisao
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Yanagisawa, Yuichi

Abstract

A method for manufacturing a highly reliable display device is provided. A first conductive layer and a second conductive layer are formed; a first conductive film is formed over the first conductive layer and the second conductive layer; a first film is formed over the first conductive film; a first mask film is formed over the first film; the first film and the first mask film are processed to form a first layer and a first mask layer over the first conductive film overlapping with the first conductive layer; an exposed portion of the first conductive film is removed to form a third conductive layer in a region overlapping with the first conductive layer, the first layer, and the first mask layer; a second conductive film is formed over the first mask layer and the second conductive layer; a second film is formed over the second conductive film; a second mask film is formed over the second film; the second film and the second mask film are processed to form a second layer and a second mask layer over the second conductive film overlapping with the second conductive layer; and an exposed portion of the second conductive film is removed to form a fourth conductive layer in a region overlapping with the second conductive layer, the second layer, and the second mask layer.

IPC Classes  ?

5.

ELECTRONIC DEVICE

      
Application Number 18712749
Status Pending
Filing Date 2022-12-09
First Publication Date 2025-01-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hatsumi, Ryo
  • Ikeda, Hisao
  • Nakamura, Daiki
  • Hirose, Takeya
  • Tsukamoto, Yosuke

Abstract

An electronic device with low power consumption is provided. The electronic device includes a first pixel portion and a second pixel portion. A plurality of first pixels are arranged in the first pixel portion. The second pixel portion includes a first region where a plurality of second pixels are arranged and a second region where a plurality of third pixels are arranged. The second region is provided to surround the first region. The first pixel includes a first light-emitting element, the second pixel includes a light-receiving element, and the third pixel includes a second light-emitting element. The area occupied by one of the first pixels is smaller than the area occupied by one of the third pixels.

IPC Classes  ?

  • H10K 59/80 - Constructional details
  • G02B 27/01 - Head-up displays
  • G09G 3/3275 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for data electrodes
  • H10K 59/65 - OLEDs integrated with inorganic image sensors

6.

ELECTRONIC APPARATUS

      
Application Number IB2024056391
Publication Number 2025/012734
Status In Force
Filing Date 2024-07-01
Publication Date 2025-01-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Saito, Toshihiko
  • Miyaguchi, Atsushi

Abstract

Provided is an electronic apparatus having a novel configuration. The present invention includes a display device on which an image based on image data is displayed, a head-mounted housing having the display device, and a data processing device for performing data processing on the image data. The image displays a first object and a second object. The image data of a first region in which the first object is displayed is subjected to a first blur process by the data processing device. The image data of a second region in which the second object is displayed is subjected to a second blur process by the data processing device. The data processing device performs data processing on image data in which the intensity of the first blur process is changed so as to increase and the intensity of second blur process is changed so as to decrease.

IPC Classes  ?

  • G06F 3/0481 - Interaction techniques based on graphical user interfaces [GUI] based on specific properties of the displayed interaction object or a metaphor-based environment, e.g. interaction with desktop elements like windows or icons, or assisted by a cursor's changing behaviour or appearance
  • G02B 27/02 - Viewing or reading apparatus
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/0346 - Pointing devices displaced or positioned by the user; Accessories therefor with detection of the device orientation or free movement in a 3D space, e.g. 3D mice, 6-DOF [six degrees of freedom] pointers using gyroscopes, accelerometers or tilt-sensors
  • G06T 19/00 - Manipulating 3D models or images for computer graphics
  • G06V 40/16 - Human faces, e.g. facial parts, sketches or expressions
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • H04N 5/64 - Constructional details of receivers, e.g. cabinets or dust covers
  • H04N 5/66 - Transforming electric information into light information

7.

METHOD FOR DESIGNING ORGANIC COMPOUND AND SYSTEM FOR DESIGNING ORGANIC COMPOUND

      
Application Number IB2024056392
Publication Number 2025/012735
Status In Force
Filing Date 2024-07-01
Publication Date 2025-01-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Higashi, Kazuki
  • Suzuki, Kunihiko
  • Yoshizumi, Hideko
  • Narukawa, Ryo

Abstract

Provided is a system for designing an organic compound. The present invention is a system for designing an organic compound, comprising a step for generating an organic compound group using a random number sequence, a step for calculating a physical property value of a first organic compound included in the organic compound group by scientific calculation, a step for training a correlation between the molecular structure and the physical property value of the first organic compound through use of a physical property prediction neural network, and a step for generating a second organic compound by a genetic algorithm using the first organic compound.

IPC Classes  ?

  • G16C 20/50 - Molecular design, e.g. of drugs
  • G16C 20/70 - Machine learning, data mining or chemometrics
  • G06N 3/02 - Neural networks
  • G06N 3/126 - Evolutionary algorithms, e.g. genetic algorithms or genetic programming

8.

LIGHT-EMITTING APPARATUS, DISPLAY DEVICE, AND ELECTRONIC APPLIANCE

      
Application Number 18710336
Status Pending
Filing Date 2022-11-16
First Publication Date 2025-01-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting apparatus with high emission efficiency is provided. A light-emitting apparatus including a light-emitting device A and a light-emitting device B is provided. The light-emitting device A includes a first electrode A, a second electrode A, a light-emitting layer A interposed between the first electrode A and the second electrode A, and a first layer A interposed between the first electrode A and the light-emitting layer A. The light-emitting device B includes a first electrode B, a second electrode B, a light-emitting layer B interposed between the first electrode B and the second electrode B, a first layer B interposed between the first electrode B and the light-emitting layer B, and a second layer B interposed between the first electrode B and the light-emitting layer B. The light-emitting layer A contains a light-emitting substance A. The light-emitting layer B contains a light-emitting substance B. An emission peak wavelength of the light-emitting substance A is shorter than an emission peak wavelength of the light-emitting substance B. The first layer A and the first layer B contain the same material. An ordinary refractive index of the second layer B is lower than an ordinary refractive index of the first layer A by a value 0.15 or more, with respect to the emission peak wavelength of the light-emitting substance B.

IPC Classes  ?

9.

LIGHT-EMITTING ELEMENT, DISPLAY MODULE, LIGHTING MODULE, LIGHT-EMITTING DEVICE, DISPLAY DEVICE, ELECTRONIC APPLIANCE, AND LIGHTING DEVICE

      
Application Number 18777704
Status Pending
Filing Date 2024-07-19
First Publication Date 2025-01-16
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Nonaka, Yusuke
  • Ishisone, Takahiro
  • Seo, Satoshi
  • Kawata, Takuya

Abstract

An object of one embodiment of the present invention is to provide a multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance, a separation layer containing a substance having a hole-transport property and a substance having an electron-transport property, and a second light-emitting layer containing two kinds of organic compounds that form an exciplex and a substance that can convert triplet excitation energy into luminescence. Note that a light-emitting element in which light emitted from the first light-emitting layer has an emission spectrum peak on the shorter wavelength side than an emission spectrum peak of the second light-emitting layer is more effective.

IPC Classes  ?

  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 59/32 - Stacked devices having two or more layers, each emitting at different wavelengths
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

10.

DISPLAY DEVICE

      
Application Number 18896991
Status Pending
Filing Date 2024-09-26
First Publication Date 2025-01-16
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Miyake, Hiroyuki
  • Kaneyasu, Makoto

Abstract

A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.

IPC Classes  ?

  • G02F 1/1343 - Electrodes
  • G02F 1/13357 - Illuminating devices
  • G02F 1/136 - Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
  • G02F 1/1362 - Active matrix addressed cells
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors

11.

Semiconductor Device

      
Application Number 18763108
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Murakawa, Tsutomu
  • Isaka, Fumito
  • Kunitake, Hitoshi
  • Jinbo, Yasuhiro

Abstract

A transistor that can be miniaturized is provided. The semiconductor device includes an oxide semiconductor layer, first to fourth conductive layers, and first to fourth insulating layers. Over the first conductive layer including a depressed portion, the first insulating layer, the second conductive layer, the second insulating layer, and the third conductive layer which include a first opening portion overlapping with the depressed portion are provided in this order. The third insulating layer is in contact with at least the side surface of the second conductive layer in the first opening portion. The oxide semiconductor layer is in contact with the top surface of the third conductive layer and the bottom and side surfaces of the depressed portion, and is in contact with the third insulating layer in the first opening portion. The fourth insulating layer is on an inner side of the oxide semiconductor layer in the first opening portion. The fourth conductive layer is on an inner side of the fourth insulating layer in the first opening portion. In a cross-sectional view, the oxide semiconductor layer includes a region overlapping with the second conductive layer with the third insulating layer therebetween and overlapping with the fourth conductive layer with the fourth insulating layer therebetween.

IPC Classes  ?

12.

OXIDE SEMICONDUCTOR LAYER, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18763192
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Isaka, Fumito
  • Sato, Yuichi
  • Ohno, Toshikazu
  • Kunitake, Hitoshi
  • Murakawa, Tsutomu

Abstract

A semiconductor device including an oxide semiconductor layer which is formed over a substrate and includes indium is provided. The oxide semiconductor layer is formed in parallel or substantially in parallel with a surface of the substrate. The oxide semiconductor layer includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a formation surface of the oxide semiconductor layer to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the formation surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron microscope, bright spots arranged in a layered manner in a direction parallel to the formation surface are observed in each of the first region, the second region, and the third region.

IPC Classes  ?

13.

MEMORY DEVICE AND SEMICONDUCTOR DEVICE

      
Application Number 18768111
Status Pending
Filing Date 2024-07-10
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Koyama, Jun
  • Yamazaki, Shunpei

Abstract

An object of one embodiment of the present invention is to propose a memory device in which a period in which data is held is ensured and memory capacity per unit area can be increased. In the memory device of one embodiment of the present invention, bit lines are divided into groups, and word lines are also divided into groups. The word lines assigned to one group are connected to the memory cell connected to the bit lines assigned to the one group. Further, the driving of each group of bit lines is controlled by a dedicated bit line driver circuit of a plurality of bit line driver circuits. In addition, cell arrays are formed on a driver circuit including the above plurality of bit line driver circuits and a word line driver circuit. The driver circuit and the cell arrays overlap each other.

IPC Classes  ?

  • G11C 5/10 - Arrangements for interconnecting storage elements electrically, e.g. by wiring for interconnecting capacitors
  • G11C 7/12 - Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
  • G11C 7/18 - Bit line organisation; Bit line lay-out
  • G11C 11/408 - Address circuits
  • G11C 11/4094 - Bit-line management or control circuits
  • G11C 11/4097 - Bit-line organisation, e.g. bit-line layout, folded bit lines
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

14.

CARBAZOLE DERIVATIVE, AND LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, AND ELECTRONIC DEVICE USING CARBAZOLE DERIVATIVE

      
Application Number 18768495
Status Pending
Filing Date 2024-07-10
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nomura, Hiroko
  • Osaka, Harue
  • Ushikubo, Takahiro
  • Kawakami, Sachiko
  • Seo, Satoshi
  • Shitagaki, Satoko

Abstract

To provide a light-emitting element having high luminous efficiency and to provide a light-emitting device and an electronic device which consumes low power and is driven at low voltage, a carbazole derivative represented by the general formula (1) is provided. In the formula, α1, α2, α3, and α4 each represent an arylene group having less than or equal to 13 carbon atoms; Ar1 and Ar2 each represent an aryl group having less than or equal to 13 carbon atoms; R1 represents any of a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted phenyl group, and a substituted or unsubstituted biphenyl group; and R2 represents any of an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted phenyl group, and a substituted or unsubstituted biphenyl group. In addition, l, m, and n are each independently 0 or 1.

IPC Classes  ?

  • C07D 209/86 - Carbazoles; Hydrogenated carbazoles with only hydrogen atoms, hydrocarbon or substituted hydrocarbon radicals, directly attached to carbon atoms of the ring system
  • H10K 85/60 - Organic compounds having low molecular weight

15.

Light-Emitting Element, Display Device, Electronic Device, and Lighting Device

      
Application Number 18777928
Status Pending
Filing Date 2024-07-19
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

An object is to provide a light-emitting element with high emission efficiency. The light-emitting element contains first to third organic compounds. The first organic compound has a function of converting triplet excitation energy into light. The second organic compound has a benzofuropyrimidine skeleton or a benzothienopyrimidine skeleton. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is light emitted from the third organic compound that receives excitation energy from the first organic compound or from an exciplex formed by the first and second organic compounds.

IPC Classes  ?

  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes
  • G09G 3/3275 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for data electrodes
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

16.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18885890
Status Pending
Filing Date 2024-09-16
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Umezaki, Atsushi
  • Kimura, Hajime

Abstract

A transistor whose channel region includes an oxide semiconductor is used as a pull down transistor. The band gap of the oxide semiconductor is 2.0 eV or more, preferably 2.5 eV or more, more preferably 3.0 eV or more. Thus, hot carrier degradation in the transistor can be suppressed. Accordingly, the circuit size of the semiconductor device including the pull down transistor can be made small. Further, a gate of a pull up transistor is made to be in a floating state by switching of on/off of the transistor whose channel region includes an oxide semiconductor. Note that when the oxide semiconductor is highly purified, the off-state current of the transistor can be 1 aA/μm (1×10−18 A/μm) or less. Therefore, the drive capability of the semiconductor device can be improved.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G02F 1/133 - Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
  • G02F 1/1362 - Active matrix addressed cells
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/786 - Thin-film transistors

17.

METAL OXIDE FILM, SEMICONDUCTOR DEVICE, AND DISPLAY DEVICE

      
Application Number 18887099
Status Pending
Filing Date 2024-09-17
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koezuka, Junichi
  • Okazaki, Kenichi
  • Tsubuku, Masashi

Abstract

A metal oxide film containing a crystal part is provided. Alternatively, a metal oxide film with highly stable physical properties is provided. Alternatively, a metal oxide film with improved electrical characteristics is provided. Alternatively, a metal oxide film with which field-effect mobility can be increased is provided. A metal oxide film including In, M (M is Al, Ga, Y, or Sn), and Zn includes a first crystal part and a second crystal part; the first crystal part has c-axis alignment; the second crystal part has no c-axis alignment; and the existing proportion of the second crystal part is higher than the existing proportion of the first crystal part.

IPC Classes  ?

  • C23C 14/08 - Oxides
  • C23C 14/34 - Sputtering
  • C30B 23/00 - Single-crystal growth by condensing evaporated or sublimed materials
  • C30B 23/02 - Epitaxial-layer growth
  • C30B 29/22 - Complex oxides
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/786 - Thin-film transistors

18.

DISPLAY DEVICE

      
Application Number 18888227
Status Pending
Filing Date 2024-09-18
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime

Abstract

A display device that is suitable for increasing in size is achieved. Three or more source lines are provided for each pixel column. Video signals having the same polarity are input to adjacent source lines during one frame period. Dot inversion driving is used to reduce a flicker, crosstalk, or the like.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors
  • G02F 1/1362 - Active matrix addressed cells
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/027 - Making masks on semiconductor bodies for further photolithographic processing, not provided for in group or
  • H01L 21/465 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/4763 - Deposition of non-insulating-, e.g. conductive-, resistive-, layers on insulating layers; After-treatment of these layers
  • H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

19.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18889614
Status Pending
Filing Date 2024-09-19
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sato, Manabu
  • Matsumoto, Hironori
  • Nakada, Masataka

Abstract

An inexpensive display device with a narrow bezel is provided. The display device includes a first pixel including a light-emitting device, a second pixel including a light-receiving device, and a reading circuit for reading data obtained by the second pixel. The reading circuit includes a first circuit included in a mounted IC chip and a second circuit monolithically formed over a substrate over which a pixel circuit is formed. With this structure, a circuit corresponding to the second circuit can be omitted from the IC chip, so that the IC chip can be downsized.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06V 40/13 - Sensors therefor
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • H10K 39/34 - Organic image sensors integrated with organic light-emitting diodes [OLED]

20.

Display Device

      
Application Number 18892996
Status Pending
Filing Date 2024-09-23
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kubota, Daisuke
  • Hatsumi, Roy
  • Kamada, Taisuke

Abstract

A display device having a photosensing function is provided. A display device having a biometric authentication function typified by fingerprint authentication is provided. A display device having both a touch panel function and a biometric authentication function is provided. The display device includes a first substrate, a light guide plate, a first light-emitting element, a second light-emitting element, and a light-receiving element. The first substrate and the light guide plate are provided to face each other. The first light-emitting element and the light-receiving element are provided between the first substrate and the light guide plate. The first light-emitting element has a function of emitting first light through the light guide plate. The second light-emitting element has a function of emitting second light to a side surface of the light guide plate. The light-receiving element has a function of receiving the second light and converting the second light into an electric signal. The first light includes visible light, and the second light includes infrared light.

IPC Classes  ?

  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06V 40/13 - Sensors therefor

21.

OCCUPANT PROTECTION DEVICE

      
Application Number 18894169
Status Pending
Filing Date 2024-09-24
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Ikeda, Takayuki
  • Kurokawa, Yoshiyuki

Abstract

An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.

IPC Classes  ?

  • B60R 21/0134 - Electrical circuits for triggering safety arrangements in case of vehicle accidents or impending vehicle accidents including means for detecting collisions, impending collisions or roll-over responsive to imminent contact with an obstacle
  • B60R 21/00 - Arrangements or fittings on vehicles for protecting or preventing injuries to occupants or pedestrians in case of accidents or other traffic risks
  • B60R 21/01 - Electrical circuits for triggering safety arrangements in case of vehicle accidents or impending vehicle accidents
  • B60R 21/013 - Electrical circuits for triggering safety arrangements in case of vehicle accidents or impending vehicle accidents including means for detecting collisions, impending collisions or roll-over
  • G06V 20/56 - Context or environment of the image exterior to a vehicle by using sensors mounted on the vehicle

22.

DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD FOR FABRICATING DISPLAY DEVICE

      
Application Number 18698963
Status Pending
Filing Date 2022-10-14
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sasagawa, Shinya
  • Hodo, Ryota
  • Sugaya, Kentaro
  • Yanagisawa, Yuichi

Abstract

A high-resolution display device is provided. A first light-emitting device and a second light-emitting device are included over an insulating surface. A first sidewall insulating layer is in contact with a side surface of a first pixel electrode included in the first light-emitting device, and a second sidewall insulating layer is in contact with a side surface of a second pixel electrode included in the second light-emitting device. The first light-emitting device overlaps with a first coloring layer, and the second light-emitting device overlaps with a second coloring layer that transmits light of a color different from a color of light transmitted through the first coloring layer. The first light-emitting device and the second light-emitting device share a common electrode. A first layer included in the first light-emitting device, a second layer included in the second light-emitting device, and a material layer positioned over the top surface of an insulating layer and positioned between the first sidewall insulating layer and the second sidewall insulating layer contain the same light-emitting material and are apart from one another.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 50/19 - Tandem OLEDs

23.

LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ORGANIC COMPOUND, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18708907
Status Pending
Filing Date 2022-11-16
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nagasaka, Akira
  • Iwaki, Yuji
  • Kawakami, Sachiko
  • Suzuki, Tsunenori
  • Takahashi, Tatsuyoshi
  • Haruyama, Takuya
  • Seo, Satoshi

Abstract

A fluorescent light-emitting device using a host material that is less likely to form an oxygen adduct and having a high emission efficiency is provided. In addition, a highly reliable electronic device or light-emitting device is provided. A light-emitting device including at least a light-emitting layer between an anode and a cathode is provided. The light-emitting layer includes a first organic compound that is a light-emitting substance emitting fluorescent light and a second organic compound having a fluoranthene skeleton. The maximum peak wavelength of the first organic compound is λmax (nm), and in the case where λn (nm) represents a wavelength of an intensity corresponding to 1/e of a maximum peak intensity in an emission spectrum of the first organic compound, λ1 (nm) represents the shortest wavelength λn in a wavelength longer than the λmax, and λ2 (nm) represents the longest wavelength Ln in a wavelength shorter than λmax, a difference between the λ1 and the λ2 is greater than or equal to 5 nm and less than or equal to 45 nm.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07F 5/02 - Boron compounds
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants

24.

SECONDARY BATTERY AND ELECTRONIC DEVICE

      
Application Number 18712312
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kakehata, Tetsuya
  • Ishitani, Tetsuji
  • Kuriki, Kazutaka
  • Kimura, Masayuki
  • Jinbo, Yasuhiro

Abstract

A secondary battery that can inhibit degradation of an electrode is provided. A flexible secondary battery is provided. A flexible secondary battery includes a positive electrode, a negative electrode, and an exterior body surrounding the positive electrode and the negative electrode. The positive electrode includes a positive electrode current collector and a positive electrode active material layer provided over the positive electrode current collector. The negative electrode includes a negative electrode current collector and a negative electrode active material layer provided over the negative electrode current collector. One or both of the positive electrode current collector and the negative electrode current collector have rubber elasticity.

IPC Classes  ?

  • H01M 4/66 - Selection of materials
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries

25.

STORAGE CIRCUIT, PROCESSING DEVICE, AND ELECTRONIC EQUIPMENT

      
Application Number IB2024056390
Publication Number 2025/008730
Status In Force
Filing Date 2024-07-01
Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yakubo, Yuto
  • Ohshima, Kazuaki
  • Isaka, Fumito
  • Yamazaki, Shunpei

Abstract

Provided is a storage circuit comprising: a volatile memory which performs writing and reading quickly; and a non-volatile memory which is capable of backing up data. The storage circuit has a first layer and a second layer that is positioned above the first layer. The first layer has a semiconductor substrate that has silicon and a first circuit and a second circuit that are formed on the semiconductor substrate. Furthermore, the second layer has a first ferroelectric capacitor and a second ferroelectric capacitor. Furthermore, the first ferroelectric capacitor and the second ferroelectric capacitor each have a dielectric. The first circuit functions as a flip-flop circuit which holds first digital data, and the second circuit functions to write the first digital data to be paired with each of the first ferroelectric capacitor and the second ferroelectric capacitor. The dielectric has an oxide that contains hafnium and zirconium.

IPC Classes  ?

  • H10B 53/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
  • G11C 14/00 - Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
  • H03K 3/037 - Bistable circuits
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

26.

DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18707662
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ohsawa, Nobuharu
  • Sasaki, Toshiki
  • Hashimoto, Naoaki

Abstract

A novel display apparatus that is highly convenient, useful, or reliable is provided. The display apparatus includes a first light-emitting device and a second light-emitting device. A gap is provided between the second light-emitting device and the first light-emitting device. The first light-emitting device includes a first pixel electrode, a common electrode, and a first unit. The first unit is sandwiched between the first pixel electrode and the common electrode and contains a first organic compound L. The first organic compound L includes a plurality of 2,2′-bipyridine skeletons or a plurality of 1,10′-phenanthroline skeletons. The second light-emitting device includes a second pixel electrode, the common electrode, and a third unit. The third unit is sandwiched between the second pixel electrode and the common electrode. The third unit contains the first organic compound L. A gap is provided between the third unit and the first unit.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 50/16 - Electron transporting layers
  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks

27.

DISPLAY DEVICE

      
Application Number 18709968
Status Pending
Filing Date 2022-11-08
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Katayama, Masahiro
  • Goto, Naoto
  • Okazaki, Kenichi

Abstract

A display device in which crosstalk is inhibited is provided. The display device includes a first insulating layer including a first region and a second region having a lower top surface level than the first region, a second insulating layer including a region overlapping with the first region, a light-emitting device including a region overlapping with the first region with the second insulating layer therebetween, a stack including a region overlapping with the second region, and a third insulating layer including a region overlapping with the stack; the second insulating layer includes a protruding portion overlapping with the second region; the light-emitting device includes at least a light-emitting layer, a first upper electrode over the light-emitting layer, and a second upper electrode over the first upper electrode; the second upper electrode includes a region overlapping with the third insulating layer; and the stack contains the same material as the light-emitting layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 59/80 - Constructional details

28.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18711187
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Atsumi, Tomoaki
  • Kusunoki, Koji
  • Shishido, Hideaki
  • Kawashima, Susumu

Abstract

A display apparatus with high luminance and a long lifetime is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a substrate and a plurality of driver circuit regions, and the second layer includes a plurality of display regions. The substrate is a glass substrate. Each of the plurality of driver circuit regions includes a driver circuit, and the driver circuit includes a transistor including silicon in a channel formation region. Each of the plurality of display regions includes a pixel, and the pixel includes a light-emitting diode and a transistor including a metal oxide in a channel formation region. Specifically, the light-emitting diode is preferably a micro light-emitting diode. The driver circuit included in one of the plurality of driver circuit regions has a function of driving the display pixel included in one of the plurality of display regions.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

29.

Semiconductor Device

      
Application Number 18712398
Status Pending
Filing Date 2022-11-17
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kunitake, Hitoshi
  • Hodo, Ryota
  • Murakawa, Tsutomu

Abstract

A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a first insulator, a first metal oxide, a first conductor, a second conductor, and a third conductor. The first metal oxide includes a first depressed portion, a second depressed portion, and a third depressed portion positioned between the first depressed portion and the second depressed portion. The first conductor is provided to fill the first depressed portion, and the second conductor is provided to fill the second depressed portion. A top surface of the first conductor and a top surface of the second conductor are level with or substantially level with a top surface of the first metal oxide. The first insulator is provided inside the third depressed portion. The third conductor is provided over the first insulator and includes a region overlapping with the first metal oxide with the first insulator therebetween.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

30.

OXIDE SEMICONDUCTOR LAYER, METHOD FOR FORMING THE OXIDE SEMICONDUCTOR LAYER, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18748238
Status Pending
Filing Date 2024-06-20
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Isaka, Fumito
  • Sato, Yuichi
  • Ohno, Toshikazu
  • Kunitake, Hitoshi
  • Murakawa, Tsutomu

Abstract

Provided are a transistor with favorable electrical characteristics, a transistor with a high on-state current, a transistor with low parasitic capacitance, or a transistor, a semiconductor device, or a memory device which can be miniaturized or highly integrated. An oxide semiconductor layer included in the transistor, the semiconductor device, or the memory device includes a first region, a second region over the first region, and a third region over the second region. The first region is located in a range from a surface on which the oxide semiconductor layer is to be formed to greater than or equal to 0 nm to less than or equal to 3 nm in a direction substantially perpendicular to the surface. In cross-sectional observation of the oxide semiconductor layer using a transmission electron 10 microscope, bright spots arranged in a layered manner in a direction parallel to the surface are observed in each of the first region, the second region, and the third region.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/66 - Types of semiconductor device
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

31.

Light-Emitting Device

      
Application Number 18757107
Status Pending
Filing Date 2024-06-27
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sasaki, Toshiki
  • Ohsawa, Nobuharu
  • Seo, Hiromi
  • Fukuzaki, Shinya

Abstract

A light-emitting device that can be used in a high-resolution display apparatus and has a low driving voltage and high current efficiency is provided. A tandem light-emitting device is fabricated through a photolithography process and includes a plurality of light-emitting units and an intermediate layer therebetween. The intermediate layer includes a layer that includes a metal oxide and an organic compound having a phenanthroline ring with an electron-donating group. The layer of the intermediate layer is in contact with a light-emitting unit on the anode side.

IPC Classes  ?

  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 71/20 - Changing the shape of the active layer in the devices, e.g. patterning

32.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18760313
Status Pending
Filing Date 2024-07-01
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Murakawa, Tsutomu
  • Hayashi, Kentaro

Abstract

A low-cost semiconductor device is provided. A memory cell including a first transistor, a second transistor, and a capacitor is provided. The second transistor is located above the first transistor and the capacitor. In the capacitor, one of a pair of electrodes, a dielectric layer, and the other of the pair of electrodes are provided in this order. A gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and the other of the pair of electrodes of the capacitor are the same conductive layer. A gate insulating layer of the first transistor and the dielectric layer of the capacitor are the same insulating layer. A semiconductor layer of the first transistor and the one of the pair of electrodes of the capacitor are provided along a sidewall of an opening portion included in a first interlayer insulating layer. A semiconductor layer of the second transistor is provided along a sidewall of an opening portion included in a second interlayer insulating layer over the first transistor and the capacitor. The first transistor and the second transistors are vertical transistors, and the capacitor is a trench capacitor.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices

33.

Anthracene Compound For Host Material, Light-Emitting Device, Light-Emitting Apparatus, Electronic Apparatus, and Lighting Apparatus

      
Application Number 18762410
Status Pending
Filing Date 2024-07-02
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Suzuki, Hiroki
  • Seo, Satoshi
  • Kadoma, Hiroshi
  • Suzuki, Tsunenori
  • Hashimoto, Naoaki

Abstract

A novel compound for a host material is provided. A compound for a host material that is capable of increasing the lifetime of a light-emitting device is provided. A light-emitting device with a long lifetime is provided. A material whose thermophysical properties such as a glass transition temperature are high is provided. An anthracene compound for a host material represented by General Formula (G1) below is provided. (Note that in General Formula (G1), R1 to R7 each independently represent hydrogen or an aryl group having 1 to 25 carbon atoms.)

IPC Classes  ?

  • C07C 15/28 - Anthracenes
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/60 - Organic compounds having low molecular weight

34.

METHOD FOR PRODUCING SECONDARY BATTERY

      
Application Number 18763866
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kawatsuki, Atsushi
  • Okuzawa, Naoto
  • Mikami, Mayumi
  • Momma, Yohei

Abstract

One embodiment of the present invention is to provide a high-capacity lithium ion secondary battery and a production method thereof. To perform surface modification, a spherical resin is subjected to first heat treatment at a temperature higher than or equal to 500° C. in an inert atmosphere. By the heating, the contraction of a particle, the void formation due to a gas release from an inside of the particle, the crack on a particle surface, and the like are caused so as to form a support for sulfur that is to be mixed later. Obtained spherical particles and sulfur powder are mixed and then stored in a container. The mixture in the container is subjected to second heat treatment at a temperature higher than or equal to 120° C. without being exposed to outside air.

IPC Classes  ?

  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
  • H01M 4/58 - Selection of substances as active materials, active masses, active liquids of polyanionic structures, e.g. phosphates, silicates or borates
  • H01M 4/60 - Selection of substances as active materials, active masses, active liquids of organic compounds

35.

METHOD FOR DRIVING LIQUID CRYSTAL DISPLAY DEVICE

      
Application Number 18776588
Status Pending
Filing Date 2024-07-18
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Koyama, Jun
  • Miyake, Hiroyuki

Abstract

The liquid crystal display device includes a first substrate provided with a terminal portion, a switching transistor, a driver circuit portion, and a pixel circuit portion including a pixel transistor and a plurality of pixels, a second substrate provided with a common electrode electrically connected to the terminal portion through the switching transistor, and liquid crystal between a pixel electrode and the common electrode. In a period during which a still image is switched to a moving image, the following steps are sequentially performed: a first step of supplying the common potential to the common electrode; a second step of supplying a power supply voltage to the driver circuit portion; a third step of supplying a clock signal to the driver circuit portion; and a fourth step of supplying a start pulse signal to the driver circuit portion.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

36.

SEMICONDUCTOR DEVICE AND CHARGE CONTROL SYSTEM

      
Application Number 18783743
Status Pending
Filing Date 2024-07-25
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Onuki, Tatsuya
  • Ikeda, Takayuki
  • Yamazaki, Shunpei

Abstract

A structure that includes a circuit for controlling the safe operation of a secondary battery but can overcome space limitations owing to miniaturization of the housing is provided. A charge control circuit is provided over a flexible substrate and bonded to an external surface of the secondary battery. The charge control circuit is electrically connected to at least one of two terminals of the secondary battery and controls charging. To prevent overcharge, both an output transistor of a charging circuit and a blocking switch are brought into off state substantially concurrently. Blocking two paths which connect to the battery can quickly stop charging when overcharge is detected and reduce damage to the battery owing to the overcharge.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/786 - Thin-film transistors
  • H01M 10/44 - Methods for charging or discharging
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling

37.

SEMICONDUCTOR DEVICE

      
Application Number 18892704
Status Pending
Filing Date 2024-09-23
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Umezaki, Atsushi

Abstract

A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.

IPC Classes  ?

  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

38.

METHOD FOR FORMING OXIDE SEMICONDUCTOR FILM, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18892792
Status Pending
Filing Date 2024-09-23
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Watanabe, Masahiro
  • Mashiyama, Mitsuo
  • Okazaki, Kenichi
  • Nakashima, Motoki
  • Kishida, Hideyuki

Abstract

The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/8234 - MIS technology
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/66 - Types of semiconductor device

39.

SEMICONDUCTOR DEVICE

      
Application Number 18894175
Status Pending
Filing Date 2024-09-24
First Publication Date 2025-01-09
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hirose, Takeya
  • Yoneda, Seiichi
  • Ikeda, Takayuki
  • Yamazaki, Shunpei

Abstract

A semiconductor device capable of holding analog data is provided. Two holding circuits, two bootstrap circuits, and one source follower circuit are formed with use of four transistors and two capacitors. A memory node is provided in each of the two holding circuits; a data potential is written to one of the memory nodes and a reference potential is written to the other of the memory nodes. At the time of data reading, the potential of the one memory node is increased in one of the bootstrap circuits, and the potential of the other memory node is increased in the other of the bootstrap circuits. A potential difference between the two memory nodes is output by the source follower circuit. With use of the source follower circuit, the output impedance can be reduced.

IPC Classes  ?

  • G11C 7/16 - Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
  • G11C 11/40 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
  • G11C 11/54 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
  • G11C 27/02 - Sample-and-hold arrangements
  • H01L 29/786 - Thin-film transistors

40.

SEMICONDUCTOR DEVICE AND BATTERY PACK

      
Application Number 18894219
Status Pending
Filing Date 2024-09-24
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takahashi, Kei
  • Okamoto, Yuki
  • Ito, Minato
  • Ishizu, Takahiko
  • Inoue, Hiroki
  • Yamazaki, Shunpei

Abstract

A semiconductor device with reduced power consumption is provided. The semiconductor device includes a node ND1, a node ND2, a resistor, a capacitor, and a comparison circuit. The resistor is electrically connected in series between one of a positive electrode and a negative electrode of a secondary battery and a first terminal. The resistor has a function of converting current flowing between the one of the positive electrode and the negative electrode of the secondary battery and the first terminal into a first voltage. The first voltage is added to a voltage of the node ND2 through the capacitor. The comparison circuit has a function of comparing a voltage of the node ND1 and the voltage of the node ND2. The comparison circuit outputs a signal that notifies detection of overcurrent when the voltage of the node ND2 is higher than the voltage of the node ND1.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/44 - Methods for charging or discharging
  • H03K 3/0231 - Astable circuits
  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit

41.

LIGHT-EMITTING DEVICE, LIGHTING DEVICE, AND DISPLAY DEVICE

      
Application Number 18895584
Status Pending
Filing Date 2024-09-25
First Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Matsuda, Shinpei
  • Kawata, Takuya

Abstract

A light-emitting device, a lighting device, a display device, or the like in which the state of a back surface side can be observed when light is not emitted is provided. The light-emitting device includes a plurality of light-emitting portions and a region transmitting visible light in a region other than the light-emitting portions. Alternatively, the light-emitting device includes a plurality of light-transmitting portions transmitting visible light and a light-emitting portion that can emit light in a region other than the light-transmitting portions. When light is not emitted, the state of a back surface side of the light-emitting device is visible through the region transmitting visible light. When light is emitted, the state of the back surface side of the light-emitting device can be made less visible by diffusion of light emitted from the light-emitting portion.

IPC Classes  ?

  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 50/822 - Cathodes characterised by their shape
  • H10K 50/854 - Arrangements for extracting light from the devices comprising scattering means
  • H10K 50/858 - Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
  • H10K 59/40 - OLEDs integrated with touch screens
  • H10K 71/80 - Manufacture or treatment specially adapted for the organic devices covered by this subclass using temporary substrates

42.

SEMICONDUCTOR DEVICE

      
Application Number IB2024056394
Publication Number 2025/008731
Status In Force
Filing Date 2024-07-01
Publication Date 2025-01-09
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Toyotaka, Kouhei
  • Matsuzaki, Takanori
  • Yakubo, Yuto

Abstract

Provided is a semiconductor device having a novel configuration. The semiconductor device includes a first arithmetic operation block in which a first arithmetic operation core and a first memory are provided such as to overlap each other and a second arithmetic operation block in which a second arithmetic operation core and a second memory are provided such as to overlap each other. Each of the first memory and the second memory includes a transistor having an oxide semiconductor in a channel formation region. The first arithmetic operation core has a function of performing an arithmetic operation using first data held in the first memory. The second arithmetic operation core has a function of performing an arithmetic operation using second data held in the second memory. A read bit line which is used to read the first data and is electrically connected to the first memory is electrically connected to a first sense amplifier circuit provided in the first arithmetic operation block. A write bit line which is used to write the second data and is electrically connected to the second memory is electrically connected to the first sense amplifier circuit.

IPC Classes  ?

  • G11C 5/02 - Disposition of storage elements, e.g. in the form of a matrix array
  • G06F 12/00 - Accessing, addressing or allocating within memory systems or architectures
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/786 - Thin-film transistors
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components

43.

INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING SYSTEM

      
Application Number IB2024056008
Publication Number 2025/003840
Status In Force
Filing Date 2024-06-20
Publication Date 2025-01-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Momo, Junpei
  • Oikawa, Yoshiaki
  • Takase, Natsuko
  • Yamazaki, Shunpei

Abstract

Provided is an information processing device using a dialog model which is easy for a user to use. The information processing device includes a reception unit, a processing unit, and an output unit. The reception unit receives first data from a computer via a first network. The processing unit is configured to execute: a process for acquiring, by using the first data, first text data corresponding to an instruction sentence, and second text data corresponding to at least another partial sentence; a process for acquiring, by inputting the first text data to a natural language processing model, third text data corresponding to a correction sentence of the instruction sentence; and a process for acquiring, by inputting the second text data and the third text data to the dialog model via a second network, fourth text data corresponding to a response sentence. The output unit outputs, to the computer via the first network, second data based on the fourth text data.

IPC Classes  ?

44.

SEMICONDUCTOR DEVICE

      
Application Number IB2024056118
Publication Number 2025/003856
Status In Force
Filing Date 2024-06-24
Publication Date 2025-01-02
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Toyotaka, Kouhei
  • Yakubo, Yuto

Abstract

Provided is a highly reliable semiconductor device. A storage circuit including an OS transistor is combined with a latch circuit including an Si transistor. The storage circuit including the OS transistor is less likely to cause a software error. A logic value of the latch circuit is compared with a logic value of the storage circuit including the OS transistor, and data equal to a logic value of the storage circuit including the OS transistor is supplied to the latch circuit including the Si transistor in accordance with the comparison result.

IPC Classes  ?

  • G11C 29/00 - Checking stores for correct operation; Testing stores during standby or offline operation
  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
  • G11C 11/00 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C 11/404 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
  • G11C 11/412 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
  • G11C 29/44 - Indication or identification of errors, e.g. for repair

45.

SEMICONDUCTOR DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18742105
Status Pending
Filing Date 2024-06-13
First Publication Date 2024-12-26
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Sato, Manabu
  • Matsumoto, Hironori
  • Abe, Takayuki
  • Koezuka, Junichi

Abstract

A highly reliable semiconductor device or display device is provided. The semiconductor device has a function of inhibiting hot-carrier degradation of a transistor and includes a switch which includes a plurality of transistors connected in series and a diode connected to a node between the transistors. An appropriate potential supplied from the diode to the node can lower a source-drain voltage before the transistor is turned on, so that hot-carrier degradation can be inhibited.

IPC Classes  ?

  • G09G 3/3241 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
  • G09G 3/3275 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for data electrodes

46.

DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND TELEVISION DEVICE

      
Application Number 18751482
Status Pending
Filing Date 2024-06-24
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Seo, Satoshi
  • Osaka, Harue

Abstract

A display device having a long lifetime is provided. A large-sized display device is provided. A display device includes a first light-emitting device and a second light-emitting device. The first light-emitting device includes a hole-injection layer, a first light-emitting layer, and an electron-transport layer. The second light-emitting device includes a second light-emitting layer. The hole-injection layer contains a first compound and a second compound. The first light-emitting layer contains a third compound that emits light of a first color. The second light-emitting layer contains a fourth compound that emits light of a second color. The electron-transport layer contains a fifth compound. The first compound has a property of accepting electrons from the second compound. The second compound has a HOMO level higher than or equal to −5.7 eV and lower than or equal to −5.4 eV. The fifth compound has a HOMO level higher than or equal to −6.0 eV and an electron mobility higher than or equal to 1×10A−7 cm{circumflex over ( )}2/Vs and lower than or equal to 5×10{circumflex over ( )}−5 cm{circumflex over ( )}2/Vs when the square root of electric field strength [V/cm] is 600.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
  • H10K 71/13 - Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

47.

DISPLAY DEVICE

      
Application Number 18820880
Status Pending
Filing Date 2024-08-30
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Miyaguchi, Atsushi

Abstract

To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G02B 26/02 - Optical devices or arrangements for the control of light using movable or deformable optical elements for controlling the intensity of light
  • G02F 1/1333 - Constructional arrangements
  • G02F 1/1345 - Conductors connecting electrodes to cell terminals
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • G02F 1/167 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on translational movement of particles in a fluid under the influence of an applied field characterised by the electro-optical or magneto-optical effect by electrophoresis
  • G06F 1/16 - Constructional details or arrangements
  • G09G 5/00 - Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
  • H01L 23/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details of semiconductor or other solid state devices
  • H05K 1/02 - Printed circuits - Details
  • H05K 5/00 - Casings, cabinets or drawers for electric apparatus

48.

CURRENT COLLECTOR, SECONDARY BATTERY, ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREOF

      
Application Number 18822848
Status Pending
Filing Date 2024-09-03
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hiroki, Masaaki
  • Tajima, Ryota

Abstract

Part of an electrode, specifically a current collector and an active material layer, for a secondary battery is subjected to cutting processing to have a complex shape. For example, a stack of the first current collector and the first active material layer has a first slit and a second slit. Each of the first slit and the second slit passing across the first current collector and the first active material layer and extending from an edge of the first current collector. Another stack of the second current collector and the second active material layer has a third slit and a fourth slit. Each of the third slit and the fourth slit passing across the second current collector and the second active material layer and extending from an edge of the second current collector.

IPC Classes  ?

  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/139 - Processes of manufacture

49.

COMPOSITE OXIDE SEMICONDUCTOR AND TRANSISTOR

      
Application Number 18825421
Status Pending
Filing Date 2024-09-05
First Publication Date 2024-12-26
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Hosaka, Yasuharu
  • Shima, Yukinori
  • Koezuka, Junichi
  • Okazaki, Kenichi

Abstract

A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.

IPC Classes  ?

  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/786 - Thin-film transistors

50.

INFORMATION PROCESSING DEVICE, DISPLAY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18830873
Status Pending
Filing Date 2024-09-11
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Isa, Toshiyuki
  • Endo, Akio
  • Tsukamoto, Yosuke
  • Koyama, Jun

Abstract

An electronic device including a large display region and with improved portability is provided. An electronic device with improved reliability is provided. An information processing device includes a first film, a panel substrate, and at least a first housing. The panel substrate has flexibility and a display region, and the first film has a visible-light-transmitting property and flexibility. The first housing includes a first slit, the panel substrate includes a region positioned between the first film and a second film, the first slit has a function of storing the region, and one or both of the panel substrate and the first film can slide along the first slit.

IPC Classes  ?

  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G06F 1/16 - Constructional details or arrangements

51.

METHOD FOR FORMING COMPOSITE OXIDE AND METHOD FOR FORMING LITHIUM ION BATTERY

      
Application Number 18692527
Status Pending
Filing Date 2022-09-09
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Saito, Jo
  • Kawatsuki, Atsushi
  • Momma, Yohei
  • Yoshitomi, Shuhei
  • Nakanishi, Kenta
  • Kakehata, Tetsuya

Abstract

A method for forming a positive electrode active material that can be used for a lithium ion battery having excellent discharge characteristics even in a low-temperature environment is provided. The method includes a first step in which lithium cobalt oxide with a median diameter (D50) of less than or equal to 10 μm is heated at a temperature higher than or equal to 700° C. and lower than or equal to 1000° C. for longer than or equal to 1 hour and shorter than or equal to 5 hours, a second step in which a first mixture is formed by mixing a fluorine source and a magnesium source to the lithium cobalt oxide subjected to the first step, a third step in which the first mixture is heated at a temperature higher than or equal to 800° C. and lower than or equal to 1100° C. for longer than or equal to 1 hour and shorter than or equal to 10 hours, a fourth step in which a second mixture is formed by mixing a nickel source and an aluminum source to the first mixture subjected to the third step, and a fifth step in which the second mixture is heated at a temperature higher than or equal to 800° C. and lower than or equal to 950° C. for longer than or equal to 1 hour and shorter than or equal to 5 hours.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • C01G 51/00 - Compounds of cobalt
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0569 - Liquid materials characterised by the solvents

52.

Display Apparatus, Electronic Device, And Operation Method Of Light-Emitting Apparatus

      
Application Number 18696212
Status Pending
Filing Date 2022-09-22
First Publication Date 2024-12-26
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Ohshima, Kazuaki
  • Inoue, Tatsunori

Abstract

A display apparatus capable of capturing an image and an electronic device with a reduced number of components are provided. The display apparatus includes a display portion including a first region and a second region. The first region includes an image capturing pixel, and the second region includes a light-emitting pixel. The light-emitting pixel includes a light-emitting device emitting one of infrared light and visible light, and the image capturing pixel includes a light-receiving device receiving one of infrared light and visible light. Specifically, the center portion of the display portion is a region of a circle centered at the intersection of two diagonal lines running across the display portion, and the radius of the circle is less than or equal to L/8, where L is the length of the diagonal line of the display portion. The first region and the center portion overlap with each other in a region. It is preferable that the second region have a tetragonal frame shape and the first region be positioned inside the frame shape.

IPC Classes  ?

53.

DISPLAY DEVICE

      
Application Number 18698966
Status Pending
Filing Date 2022-10-14
First Publication Date 2024-12-26
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Hodo, Ryota
  • Sawai, Hiromi
  • Shishido, Hideaki
  • Nakamura, Daiki

Abstract

A display device that can easily achieve a higher resolution is provided. A display device with high display quality is provided. The display device includes a pixel electrode, a first organic layer, a second organic layer, a first insulating layer, a second insulating layer, and a common electrode. The first insulating layer includes a first portion in contact with part of a top surface of the pixel electrode, a second portion in contact with a side surface of the pixel electrode, and a third portion not in contact with the pixel electrode. The first organic layer includes a fourth portion in contact with another part of the top surface of the pixel electrode and a fifth portion in contact with the first portion. The second organic layer is in contact with the third portion and isolated from the first organic layer. The second insulating layer covers the fifth portion and the second organic layer and is in contact with the first insulating layer between the first organic layer and the second organic layer. The common electrode includes a portion overlapping with the fourth portion and a portion overlapping with the second organic layer with the second insulating layer therebetween. The first organic layer and the second organic layer contain the same material.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]

54.

METHOD FOR MANUFACTURING DISPLAY DEVICE

      
Application Number 18709741
Status Pending
Filing Date 2022-11-04
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Miyairi, Hidekazu
  • Iikubo, Yoichi

Abstract

A high-resolution display device is provided. A pixel electrode is formed over a first insulating layer, surface treatment is performed to hydrophobize a region of the first insulating layer that is exposed from the pixel electrode, a first film including a light-emitting material is formed over the pixel electrode, a first sacrificial film is formed over the first film, a first layer and a first sacrificial layer are formed to cover the pixel electrode by processing the first film and the first sacrificial film, and the first layer is in contact with the first insulating layer in a region not overlapping with the pixel electrode.

IPC Classes  ?

  • H10K 71/40 - Thermal treatment, e.g. annealing in the presence of a solvent vapour
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass

55.

DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC APPARATUS

      
Application Number IB2024055817
Publication Number 2024/261607
Status In Force
Filing Date 2024-06-14
Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Okazaki, Kenichi
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Nakamura, Daiki
  • Egi, Yuji

Abstract

Provided is a novel display device that has superior convenience, utility, and reliability. The display device includes a first light-emitting device, a second light-emitting device, and a first insulation layer. The first light-emitting device comprises a first electrode, a second electrode, and a first unit. The first unit is sandwiched between the first electrode and the second electrode, has a first side surface, and includes a light-emitting material. The second light-emitting device comprises a third electrode, a fourth electrode, and a second unit. The third electrode is adjacent to the first electrode with a first gap therebetween. The second unit is sandwiched between the third electrode and the fourth electrode and has a second side surface that is opposite the first side surface. The second unit is at a second gap from the first unit, and the second gap overlaps the first gap. The second unit includes a light-emitting material. The first insulation layer contacts the first side surface and the second side surface, has a thickness that is 0.35–0.5 times the width of the second gap, and includes silicon and nitrogen.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H10K 50/805 - Electrodes
  • H10K 50/844 - Encapsulations

56.

DISPLAY APPARATUS

      
Application Number IB2024055818
Publication Number 2024/261608
Status In Force
Filing Date 2024-06-14
Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Okazaki, Kenichi
  • Aoyama, Tomoya
  • Sugisawa, Nozomu
  • Nakamura, Daiki
  • Egi, Yuji

Abstract

Provided is a display apparatus with high display quality. Provided is a display apparatus including first and second light-emitting devices having first and second EL layers, respectively, disposed adjacently on a first insulating layer, and second to fourth insulating layers provided therebetween, wherein the second insulating layer is in contact with a portion of the top and side surfaces of the first and second EL layers as well as the top surface of the first insulating layer located between the first and second light emitting devices, the third insulating layer is located on the second insulating layer, with the outline of the third insulating layer located on the inside of the outline of the second insulating layer, the fourth insulating layer is located on the third insulating layer, with the outline of the fourth insulating layer located on the outside of the outline of the third insulating layer, and the second and fourth insulating layers are inorganic insulating films produced by PEALD.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 50/844 - Encapsulations
  • H10K 59/32 - Stacked devices having two or more layers, each emitting at different wavelengths
  • H10K 59/80 - Constructional details
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
  • H10K 71/16 - Deposition of organic active material using physical vapour deposition [PVD], e.g. vacuum deposition or sputtering

57.

SPECIFICATION CREATION ASSISTANCE METHOD, PROGRAM, AND SPECIFICATION CREATION ASSISTANCE DEVICE

      
Application Number IB2024055885
Publication Number 2024/261617
Status In Force
Filing Date 2024-06-17
Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Momo, Junpei
  • Nakashima, Motoki
  • Takase, Natsuko

Abstract

The present invention facilitates the creation of specifications. This specification creation assistance method includes a first step of collecting a first group of information pertaining to a summary of an invention, a second step of collecting a second group of information pertaining to an embodiment, a third step of generating patent claim data on the basis of the first and second groups of information, and a fourth step of generating specification data on the basis of the first group of information, the second group of information, and the patent claim data. In the first and second steps, the first and second groups of information, respectively, are collected by performing first processing two or more times. The first processing involves generating question data, accepting input data in response to the question data, and generating informational data from the input data. The question data and the informational data are generated by a dialogue model. The question data in the second and subsequent iterations of the first processing is generated using at least the informational data generated in the immediately preceding iteration.

IPC Classes  ?

  • G06Q 50/18 - Legal services; Handling legal documents

58.

Display Device

      
Application Number 18791973
Status Pending
Filing Date 2024-08-01
First Publication Date 2024-12-26
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Aoyama, Tomoya
  • Kusunoki, Koji
  • Yoshizumi, Kensuke

Abstract

A display device having high light-extraction efficiency is provided. A low-power display device is provided. In a red or green pixel included in the display device, a light-emitting element, an optically functional layer, and a wavelength-conversion layer are stacked in this order. The light-emitting element emits blue light, the optically functional layer transmits the blue light and reflects red and green light, and the wavelength-conversion layer converts the blue light into red or green light. The blue light emitted by the light-emitting element passes through the optically functional layer and enters the wavelength-conversion layer, and red or green light is emitted to the outside. The red or green light emitted from the wavelength-conversion layer to the optically functional layer side is reflected by the optically functional layer and emitted to the outside, which improves light-extraction efficiency.

IPC Classes  ?

  • H01L 33/50 - Wavelength conversion elements
  • H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
  • H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector

59.

LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18794017
Status Pending
Filing Date 2024-08-05
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hashimoto, Naoaki
  • Suzuki, Tsunenori
  • Seo, Satoshi
  • Seo, Hiromi
  • Kido, Hiromitsu

Abstract

A light-emitting element that includes a fluorescent material and has a high emission efficiency is provided. A light-emitting element in which a delayed fluorescence component due to TTA accounts for a high proportion of emissive components is provided. A novel light-emitting device with a high emission efficiency and a low power consumption is provided. A light-emitting element includes an anode, a cathode, and an EL layer. The EL layer includes a light-emitting layer including a host material and an electron-transport layer including a first material in contact with the light-emitting layer. The LUMO level of the first material is lower than that of the host material. The proportion of a delayed fluorescence component due to TTA is greater than or equal to 10 percent of the light emission from the EL layer. The proportion of the delayed fluorescence component due to TTA may be greater than or equal to 15 percent of the light emission.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes
  • G09G 3/3275 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for data electrodes
  • H01L 27/146 - Imager structures
  • H10K 50/14 - Carrier transporting layers
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 50/818 - Reflective anodes, e.g. ITO combined with thick metallic layers
  • H10K 50/842 - Containers
  • H10K 50/856 - Arrangements for extracting light from the devices comprising reflective means
  • H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
  • H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/32 - Stacked devices having two or more layers, each emitting at different wavelengths
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/40 - OLEDs integrated with touch screens
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/00 - Properties of the organic materials covered by group
  • H10K 101/10 - Triplet emission

60.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18817534
Status Pending
Filing Date 2024-08-28
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Jinbo, Yasuhiro
  • Ishikawa, Jun
  • Tezuka, Sachiaki
  • Kakehata, Tetsuya

Abstract

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a first oxide; a first conductor and a second conductor over the first oxide; a first insulator over the first conductor; a second insulator over the second conductor; a third insulator over the first insulator and the second insulator; a second oxide positioned over the first oxide and between the first conductor and the second conductor; a fourth insulator over the second oxide; a third conductor over the fourth insulator; a fifth insulator in contact with a top surface of the third insulator, a top surface of the second oxide, a top surface of the fourth insulator, and a top surface of the third conductor; a fourth conductor embedded in an opening formed in the first insulator, the third insulator, and the fifth insulator and in contact with the first conductor; and a fifth conductor embedded in an opening formed in the second insulator, the third insulator, and the fifth insulator and in contact with the second conductor. The third insulator includes, in the vicinity of an interface with the fourth conductor and in the vicinity of an interface with the fifth conductor, a region having a higher nitrogen concentration than a different region of the third insulator.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 29/66 - Types of semiconductor device

61.

LIGHT-EMITTING ELEMENT, LIGHT-EMITTING DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18826249
Status Pending
Filing Date 2024-09-06
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Seo, Satoshi

Abstract

A novel light-emitting element is provided. Alternatively, a novel light-emitting element which can achieve both high efficiency and a long lifetime is provided. The light-emitting element includes a light-emitting layer between a pair of electrodes. The light-emitting element includes a first light-emitting layer and a second light-emitting layer. The first light-emitting layer includes a fluorescent material. The second light-emitting layer includes a phosphorescent material. A difference in peak value between a first emission spectrum of light from the first light-emitting layer and a second emission spectrum of light from the second light-emitting layer is 30 nm or less.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • C09K 11/02 - Use of particular materials as binders, particle coatings or suspension media therefor
  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 101/10 - Triplet emission

62.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18669136
Status Pending
Filing Date 2024-05-20
First Publication Date 2024-12-26
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Koezuka, Junichi
  • Jintyou, Masami

Abstract

A semiconductor device includes first to fourth conductive layers, first and second insulating layers, and a semiconductor layer. The first insulating layer is over the first conductive layer. The second conductive layer is over the first insulating layer. The second conductive layer and the first insulating layer include an opening reaching the first conductive layer. The semiconductor layer is in the opening. The second insulating layer is over the semiconductor layer. The third conductive layer is over the second insulating layer to fill the opening. The first insulating layer includes a depressed portion surrounding the opening in a plan view. The fourth conductive layer fills the depressed portion. Inside the opening, one side of the semiconductor layer faces the third conductive layer with the second insulating layer therebetween, and the other side of the semiconductor layer faces the fourth conductive layer with the first insulating layer therebetween.

IPC Classes  ?

  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

63.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE

      
Application Number 18738930
Status Pending
Filing Date 2024-06-10
First Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Jintyou, Masami
  • Dobashi, Masayoshi
  • Koezuka, Junichi

Abstract

A transistor that can be miniaturized and highly reliable is provided. A semiconductor device includes a transistor and a first insulating layer. The transistor includes first to third conductive layers, a semiconductor layer, and a second insulating layer. The first insulating layer includes a first layer and a second layer over the first layer. The first insulating layer is over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is over the second layer. The semiconductor layer is in contact with the first and second conductive layers and with a side surface of the first layer inside the first opening. The second insulating layer covers the semiconductor layer in the first opening, and the third conductive layer covers the second insulating layer in the first opening. The first insulating layer includes a second opening at a position different from the first opening. The second insulating layer is in contact with the first layer inside the second opening. The first layer includes an oxide insulating film, and the second layer includes an insulating film having an oxygen barrier property.

IPC Classes  ?

  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

64.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18818786
Status Pending
Filing Date 2024-08-29
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor Yamazaki, Shunpei

Abstract

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/22 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
  • H01L 29/221 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device

65.

INFORMATION PROCESSING DEVICE

      
Application Number 18818889
Status Pending
Filing Date 2024-08-29
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kusunoki, Koji
  • Kawashima, Susumu
  • Watanabe, Kazunori
  • Yoshimoto, Satoshi

Abstract

A novel information processing device that is highly convenient or reliable is provided. The information processing device includes a sensor portion, a communication portion, a display portion, and an arithmetic device; the sensor portion has a function of obtaining position information, and the communication portion has a function of obtaining map information and legal speed limit information. The arithmetic device identifies first legal speed limit information from the map information on the basis of the position information, the arithmetic device generates first image information including the first legal speed limit information, and the display portion has a function of displaying the first image information.

IPC Classes  ?

  • G08G 1/0967 - Systems involving transmission of highway information, e.g. weather, speed limits
  • G01C 21/34 - Route searching; Route guidance
  • G02F 1/1334 - Constructional arrangements based on polymer-dispersed liquid crystals, e.g. microencapsulated liquid crystals
  • G02F 1/1337 - Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

66.

SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER, MEMORY DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18820481
Status Pending
Filing Date 2024-08-30
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kimura, Hajime

Abstract

A semiconductor device with large memory capacity is provided. A semiconductor device includes first to fourth insulators, a first conductor, a second conductor, and a first semiconductor, and the first semiconductor includes a first surface and a second surface. A first side surface of the first conductor is included on the first surface of the first semiconductor, and a first side surface of the first insulator is included on a second side surface of the first conductor. The second insulator is included in a region including a second side surface and a top surface of the first insulator, a top surface of the first conductor, and the second surface of the first semiconductor. The third insulator is included on a formation surface of the second insulator, and the fourth insulator is included on a formation surface of the third insulator. The second conductor is included in a region overlapping the second surface of the first semiconductor in a region where the fourth insulator is formed. The third insulator has a function of accumulating charge. A tunnel current is induced between the second surface of the first semiconductor and the third insulator with the second insulator therebetween by supply of a potential to the second conductor.

IPC Classes  ?

  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H10B 41/27 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
  • H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels

67.

IMAGE PROCESSING SYSTEM

      
Application Number 18706408
Status Pending
Filing Date 2022-11-07
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kusunoki, Koji
  • Kubota, Daisuke
  • Yoshizumi, Kensuke

Abstract

A display apparatus or an electronic device with low power consumption is provided. An image processing system capable of reducing the amount of communication data is provided. The image processing system includes a display portion, an input portion, an arithmetic portion, and an image processing portion. The input portion has a function of obtaining positional information on pointing operation by a user. The arithmetic portion has a function of defining a first region and a second region in accordance with the positional information. The image processing portion has a function of executing image processing on a portion of a first image to generate a second image, the portion corresponding to the first region. The display portion has a function of displaying the second image.

IPC Classes  ?

  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
  • G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
  • G06F 3/04886 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures by partitioning the display area of the touch-screen or the surface of the digitising tablet into independently controllable areas, e.g. virtual keyboards or menus
  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • H10K 59/40 - OLEDs integrated with touch screens

68.

BATTERY

      
Application Number 18718903
Status Pending
Filing Date 2022-12-02
First Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Takahashi, Tatsuyoshi
  • Tajima, Ryota
  • Kuriki, Kazutaka
  • Mikami, Mayumi

Abstract

To provide a battery in which electrode distortion is suppressed in connecting an electrode terminal and a current collector exposed portion. The battery includes an electrode, an exterior body surrounding the electrode, and a lead extending from the inside to the outside of the exterior body. The electrode includes a current collector and an active material layer. The electrode includes a first region where the active material layer is provided over the current collector, and a second region where the current collector is exposed. The second region of the electrode includes a third region where the current collector is folded. The lead is connected to the electrode in the third region.

IPC Classes  ?

  • H01M 50/533 - Electrode connections inside a battery casing characterised by the shape of the leads or tabs
  • H01M 50/105 - Pouches or flexible bags
  • H01M 50/178 - Arrangements of electric connectors penetrating the casing adapted for the shape of the cells for pouch or flexible bag cells

69.

DISPLAY APPARATUS AND METHOD FOR MANUFACTURING DISPLAY APPARATUS

      
Application Number 18701269
Status Pending
Filing Date 2022-10-14
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Hodo, Ryota
  • Sasamura, Yasunori
  • Sasagawa, Shinya

Abstract

A display apparatus with high display quality is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first coloring layer, a second coloring layer, and a first insulating layer. The first light-emitting device includes a first pixel electrode over the first insulating layer, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer. The second light-emitting device includes a second pixel electrode over the first insulating layer, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer. The first coloring layer is provided to overlap with the first light-emitting device. The second coloring layer is provided to overlap with the second light-emitting device. The first coloring layer and the second coloring layer transmit light of different wavelength ranges. The first insulating layer includes a depressed portion between the first pixel electrode and the second pixel electrode. A third EL layer is provided in the depressed portion of the first insulating layer. The first EL layer, the second EL layer, and the third EL layer contain the same material. The sum of the thickness of the first pixel electrode and the depth of the depressed portion is larger than the thickness of the third EL layer.

IPC Classes  ?

70.

DISPLAY DEVICE AND ELECTRONIC DEVICE

      
Application Number 18701699
Status Pending
Filing Date 2022-10-24
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawashima, Susumu
  • Kusunoki, Koji
  • Atsumi, Tomoaki

Abstract

A display device whose change in chromaticity is small and grayscale controllability is high is provided. Light emission of the light-emitting device can be performed by PAM and PWM control (a pulse width control involving changes in amplitude), so that the amount of change in chromaticity can be reduced and the controllability on the low grayscale side can be increased. The display device includes a pulse-signal-generation portion and a light-emitting control portion in a pixel and is capable of charging a signal potential in the light-emitting control portion and then discharging the signal potential in accordance with a pulse signal generated in the pulse-signal-generation portion. Thus, the light-emitting device can emit light in a desired period with desired emission intensity.

IPC Classes  ?

  • G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

71.

DISPLAY DEVICE AND METHOD FOR FABRICATING DISPLAY DEVICE

      
Application Number 18702404
Status Pending
Filing Date 2022-10-13
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Hodo, Ryota
  • Sawai, Hiromi

Abstract

A high-resolution display device and a fabrication method thereof are provided. The display device includes a first insulating layer, a second insulating layer, a first light-emitting element, a second light-emitting element, and a resin layer. The first light-emitting element includes a first pixel electrode, a first organic layer, and a common electrode, and the second light-emitting element includes a second pixel electrode, a second organic layer, and the common electrode. The first insulator has a groove. The groove has a region overlapping with the first pixel electrode and a region overlapping with the second pixel electrode. The second insulating layer has a region in contact with part of the top surface of the first organic layer, a region in contact with the side surface of the first organic layer, and a region in contact with the first insulating layer below the first pixel electrode. The resin layer is positioned between the first organic layer and the second organic layer. The common electrode is provided to cover the top surface of the resin layer.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/124 - Insulating layers formed between TFT elements and OLED elements

72.

DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE

      
Application Number 18706407
Status Pending
Filing Date 2022-11-07
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Nakamura, Daiki
  • Sugisawa, Nozomu
  • Katayama, Masahiro
  • Goto, Naoto
  • Okazaki, Kenichi

Abstract

A display device with high display quality is provided. The display device includes a first organic insulating layer, a first inorganic insulating layer and a second inorganic insulating layer over the first organic insulating layer, a first light-emitting element, a second light-emitting element, and a second organic insulating layer. The first light-emitting element includes a first pixel electrode over the first inorganic insulating layer, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer. The second light-emitting element includes a second pixel electrode over the second inorganic insulating layer, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer. The second organic insulating layer is provided between the first EL layer and the second EL layer, and the common electrode is provided over the second organic insulating layer. The first organic insulating layer includes a depressed portion in a region overlapping with the second organic insulating layer, the first inorganic insulating layer includes a first projecting portion overlapping with the depressed portion, and the second inorganic insulating layer includes a second projecting portion overlapping with the depressed portion.

IPC Classes  ?

  • H10K 59/122 - Pixel-defining structures or layers, e.g. banks
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 71/60 - Forming conductive regions or layers, e.g. electrodes
  • H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

73.

ELECTRONIC DEVICE

      
Application Number 18722062
Status Pending
Filing Date 2022-12-09
First Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Hatsumi, Ryo
  • Ikeda, Hisao
  • Nakamura, Daiki
  • Hirose, Takeya
  • Tsukamoto, Yosuke

Abstract

An electronic device that can provide a high sense of immersion is provided. An electronic device with low power consumption is provided. The electronic device includes a first display device, a second display device, a first half mirror, an eyepiece lens, and a first lens. The first display device displays a first image, and the second display device displays a second image. The first display device is provided at a position so that the first image is reflected by the first half mirror and enters the eyepiece lens. The second display device is provided at a position so that the second image passes through the first half mirror and enters the eyepiece lens. The first lens is provided between the second display device and the first half mirror. The pixel density of the first display device and that of the second display device are equal to each other. The first image is presented with a first viewing angle through the eyepiece lens, and the second image is presented with a second viewing angle greater than the first viewing angle through the eyepiece lens.

IPC Classes  ?

  • G02B 27/09 - Beam shaping, e.g. changing the cross-sectioned area, not otherwise provided for
  • G02B 25/00 - Eyepieces; Magnifying glasses
  • H10K 59/80 - Constructional details

74.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18761378
Status Pending
Filing Date 2024-07-02
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koezuka, Junichi

Abstract

In a transistor including an oxide semiconductor layer, an oxide insulating layer is formed so as to be in contact with the oxide semiconductor layer. Then, oxygen is introduced (added) to the oxide semiconductor layer through the oxide insulating layer, and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor layer, so that the oxide semiconductor layer is highly purified.

IPC Classes  ?

  • H01L 21/385 - Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
  • G02F 1/1343 - Electrodes
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/51 - Insulating materials associated therewith
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/786 - Thin-film transistors

75.

LIGHT-EMITTING DEVICE, LIGHT-EMITTING APPARATUS, ELECTRONIC DEVICE, AND LIGHTING DEVICE

      
Application Number 18814781
Status Pending
Filing Date 2024-08-26
First Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Seo, Satoshi
  • Suzuki, Tsunenori
  • Okuyama, Takumu
  • Takita, Yusuke
  • Hashimoto, Naoaki
  • Seo, Hiromi
  • Ohsawa, Nobuharu
  • Sasaki, Toshiki
  • Yamazaki, Shunpei

Abstract

A novel light-emitting device is provided. Alternatively, a light-emitting device with high emission efficiency is provided. Alternatively, a light-emitting device having a long lifetime is provided. Alternatively, a light-emitting device having low driving voltage is provided. A light-emitting device including an EL layer including a first layer, a second layer, a third layer, a light-emitting layer, and a fourth layer in this order from the anode side is provided. The first layer includes a first organic compound and a second organic compound. The fourth layer includes a seventh organic compound. The first organic compound exhibits an electron-accepting property with respect to the second organic compound. The HOMO level of the second organic compound is from −5.7 eV to −5.4 eV. The HOMO level of the seventh organic compound is −6.0 eV or higher.

IPC Classes  ?

  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 50/15 - Hole transporting layers
  • H10K 50/16 - Electron transporting layers
  • H10K 50/17 - Carrier injection layers
  • H10K 85/30 - Coordination compounds
  • H10K 85/60 - Organic compounds having low molecular weight
  • H10K 101/10 - Triplet emission
  • H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values
  • H10K 101/40 - Interrelation of parameters between multiple constituent active layers or sublayers, e.g. HOMO values in adjacent layers

76.

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

      
Application Number 18817672
Status Pending
Filing Date 2024-08-28
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Koyama, Jun
  • Miyake, Hiroyuki

Abstract

An object of an embodiment of the present invention is to manufacture a semiconductor device with high display quality and high reliability, which includes a pixel portion and a driver circuit portion capable of high-speed operation over one substrate, using transistors having favorable electric characteristics and high reliability as switching elements. Two kinds of transistors, in each of which an oxide semiconductor layer including a crystalline region on one surface side is used as an active layer, are formed in a driver circuit portion and a pixel portion. Electric characteristics of the transistors can be selected by choosing the position of the gate electrode layer which determines the position of the channel. Thus, a semiconductor device including a driver circuit portion capable of high-speed operation and a pixel portion over one substrate can be manufactured.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/24 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only inorganic semiconductor materials not provided for in groups , ,  or
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/786 - Thin-film transistors
  • H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

77.

POSITIVE ELECTRODE ACTIVE MATERIAL FOR SECONDARY BATTERY, SECONDARY BATTERY, BATTERY MANAGEMENT UNIT, AND ELECTRONIC DEVICE

      
Application Number 18819233
Status Pending
Filing Date 2024-08-29
First Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Oguni, Teppei
  • Miwa, Takuya

Abstract

A lithium-ion secondary battery including a lithium-containing complex phosphate as a positive electrode active material is provided. Furthermore, a positive electrode active material with high diffusion rate of lithium ions is provided to provide a lithium-ion secondary battery with high output. A positive electrode active material of a lithium-ion secondary battery includes a first plate-like component and a second plate-like component, a third prismatic component between the first component and the second component, and a space between the first component and the second component.

IPC Classes  ?

  • H01M 4/136 - Electrodes based on inorganic compounds other than oxides or hydroxides, e.g. sulfides, selenides, tellurides, halogenides or LiCoFy
  • C01B 25/45 - Phosphates containing plural metal, or metal and ammonium
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 4/36 - Selection of substances as active materials, active masses, active liquids
  • H01M 4/58 - Selection of substances as active materials, active masses, active liquids of polyanionic structures, e.g. phosphates, silicates or borates
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells

78.

SEMICONDUCTOR DEVICE, STORAGE DEVICE, AND ELECTRONIC DEVICE

      
Application Number 18691163
Status Pending
Filing Date 2022-09-08
First Publication Date 2024-12-19
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Matsuzaki, Takanori
  • Onuki, Tatsuya
  • Kato, Kiyoshi

Abstract

A semiconductor device with high storage capacity and low power consumption is provided. The semiconductor device includes first to third conductors, first and second transistors, and an MTJ element. The MTJ element includes a free layer and a fixed layer. In the semiconductor device, the first conductor, the second conductor, the free layer, the fixed layer, the first and second transistors, and the third conductor are provided in this order from the bottom. In particular, in a plan view, the third conductor is positioned in a region overlapping with the first conductor. The first conductor is electrically connected to the second conductor, and the second conductor is electrically connected to the free layer and a first terminal of the first transistor. The fixed layer is electrically connected to a first terminal of the second transistor, and a second terminal of the first transistor is electrically connected to a second terminal of the second transistor and the third conductor. The first transistor and the second transistor each include a metal oxide in a channel formation region.

IPC Classes  ?

  • H10N 50/10 - Magnetoresistive devices
  • G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
  • H10N 50/85 - Magnetic active materials
  • H10N 52/85 - Magnetic active materials

79.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number IB2024055638
Publication Number 2024/256943
Status In Force
Filing Date 2024-06-10
Publication Date 2024-12-19
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Koezuka, Junichi
  • Kurosaki, Daisuke
  • Jintyou, Masami
  • Yasumoto, Seiji

Abstract

Provided is a semiconductor device that includes a transistor having a large ON current. The semiconductor device includes: a semiconductor layer; first to third conductive layers; and first and second insulative layers. The first insulative layer includes a first opening that reaches the first conductive layer. The second conductive layer is located above the first insulative layer and includes a second opening in a region overlapping the first opening. The semiconductor layer includes: a first region adjoining the upper surface of the first conductive layer; and a second region adjoining a lateral surface of the first insulative layer. The second insulative layer is located above the semiconductor layer. The third conductive layer includes a region overlapping the semiconductor layer with the second insulative layer disposed therebetween. The first region and the second insulative layer each include a first element. The first element is boron or phosphorus. The concentration of the first element in the second region is no more than 0.001 times the concentration of the first element in the first region. The angle formed by the lateral surface of the first insulative layer and the upper surface of the first conductive layer is 66 degrees to 90 degrees.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10K 59/10 - OLED displays

80.

SEMICONDUCTOR DEVICE

      
Application Number 18422699
Status Pending
Filing Date 2024-01-25
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor Umezaki, Atsushi

Abstract

One of the objects is to improve display quality by reduction in malfunctions of a circuit. In a driver circuit formed using a plurality of pulse output circuits having first to third transistors and first to fourth signal lines, a first clock signal is supplied to the first signal line; a preceding stage signal is supplied to the second signal line; a second clock signal is supplied to the third signal line; an output signal is output from the fourth signal line. Duty ratios of the first clock signal and the second clock signal are different from each other. A period during which the second clock signal is changed from an L-level signal to an H-level signal after the first clock signal is changed from an H-level signal to an L-level signal is longer than a period during which the preceding stage signal is changed from an L-level signal to an H-level signal.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
  • G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
  • G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
  • H01L 21/477 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

81.

ELECTRONIC DEVICE AND AUTHENTICATION METHOD FOR ELECTRONIC DEVICE

      
Application Number 18809758
Status Pending
Filing Date 2024-08-20
First Publication Date 2024-12-12
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Kusunoki, Koji
  • Kubota, Daisuke
  • Hatsumi, Ryo

Abstract

An electronic device having an authentication method with a high security level is provided. The electronic device includes a pixel portion, a sensor portion, an authentication portion, and a housing. The pixel portion includes a display element and a light-receiving element. The pixel portion has a function of turning on the display element. The pixel portion has a function of obtaining authentication information by capturing an image of a target object touching the pixel portion. The sensor portion has a function of detecting attachment or detachment to a living body or an object. The authentication portion has a function of performing authentication processing with the use of the authentication information. The housing includes a first surface and a second surface opposite to the first surface. The pixel portion is positioned on the first surface and the sensor portion is positioned on the second surface.

IPC Classes  ?

  • G06V 40/13 - Sensors therefor
  • G06F 1/16 - Constructional details or arrangements
  • G06F 3/042 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means

82.

STORAGE BATTERY ELECTRODE, MANUFACTURING METHOD THEREOF, STORAGE BATTERY, AND ELECTRONIC DEVICE

      
Application Number 18810764
Status Pending
Filing Date 2024-08-21
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Ikenuma, Tatsuya
  • Kawakami, Takahiro
  • Momma, Yohei
  • Ochiai, Teruaki

Abstract

In manufacture of a storage battery electrode containing graphene as a conductive additive, the efficiency of reduction of graphene oxide under mild conditions is increased, and cycle characteristics and rate characteristics of a storage battery are improved. Provided is a manufacturing method of a storage battery electrode. In the manufacturing method, a first mixture containing an active material, graphene oxide, and a solvent is formed; a reducing agent is added to the first mixture and the graphene oxide is reduced to form a second mixture; a binder is mixed with the second mixture to form a third mixture; and the third mixture is applied to a current collector and the solvent is evaporated to form an active material layer.

IPC Classes  ?

  • H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
  • H01M 4/04 - Processes of manufacture in general
  • H01M 4/139 - Processes of manufacture
  • H01M 10/052 - Li-accumulators

83.

ORGANIC COMPOUND AND LIGHT-EMITTING DEVICE

      
Application Number 18672209
Status Pending
Filing Date 2024-05-23
First Publication Date 2024-12-12
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kawakami, Sachiko
  • Kajiyama, Kazuki

Abstract

To provide a novel organic compound that is highly convenient, useful, or reliable. To provide a novel organic compound that is highly convenient, useful, or reliable. To provide a novel organic compound that is highly convenient, useful, or reliable. General Formula (G2), X represents a sulfur atom or an oxygen atom; R1, R2, R6 to R9, R20 to R26, R30 to R34, R40 to R43, R103 to R105, R135, and R136 each independently represent hydrogen (including deuterium), a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 10 carbon atoms, a substituted or unsubstituted aryl group having 10 to 30 carbon atoms, a substituted or unsubstituted dibenzothiophenyl group, a substituted or unsubstituted dibenzofuranyl group; n represents an integer of 1 to 4, when n is 2 or more, two or more R40s may be the same as or different from each other, and the same applies to two or more R41s to R43s.

IPC Classes  ?

  • C09K 11/06 - Luminescent, e.g. electroluminescent, chemiluminescent, materials containing organic luminescent materials
  • H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
  • H10K 85/60 - Organic compounds having low molecular weight

84.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18679945
Status Pending
Filing Date 2024-05-31
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Watanabe, Kazunori
  • Kusunoki, Koji
  • Nonaka, Taiki
  • Adachi, Hiroki
  • Takeshima, Koichi

Abstract

A display device with high display quality is provided. A display device with low power consumption is provided. In the display device, a first transistor, a second transistor, a first conductive layer, and a light-emitting diode package are included in a pixel. The light-emitting diode package includes a first light-emitting diode, a second light-emitting diode, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first light-emitting diode includes a first electrode and a second electrode. The second light-emitting diode includes a third electrode and a fourth electrode. One of a source and a drain of the first transistor is electrically connected to the first electrode through the second conductive layer. A display device with high display quality is provided. A display device with low power consumption is provided. In the display device, a first transistor, a second transistor, a first conductive layer, and a light-emitting diode package are included in a pixel. The light-emitting diode package includes a first light-emitting diode, a second light-emitting diode, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first light-emitting diode includes a first electrode and a second electrode. The second light-emitting diode includes a third electrode and a fourth electrode. One of a source and a drain of the first transistor is electrically connected to the first electrode through the second conductive layer. 10 One of a source and a drain of the second transistor is electrically connected to the third electrode through the third conductive layer. The first conductive layer is electrically connected to each of the second electrode and the fourth electrode through the fourth conductive layer. A constant potential is supplied to the first conductive layer.

IPC Classes  ?

  • H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid state devices all the devices being of a type provided for in the same subgroup of groups , or in a single subclass of , , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/786 - Thin-film transistors
  • H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

85.

PHOTOELECTRIC CONVERSION DEVICE MATERIAL AND DISPLAY DEVICE

      
Application Number 18690357
Status Pending
Filing Date 2022-09-02
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kubota, Daisuke
  • Sugimoto, Kazuya
  • Yamashita, Akio
  • Niikura, Yasuhiro
  • Kawakami, Sachiko
  • Tada, Anna

Abstract

A novel and highly convenient, useful, or reliable material for a photoelectric conversion device is provided. The photoelectric conversion device includes a first electrode, a second electrode, a first layer, a second layer, and a third layer. The first layer is held between the first electrode and the second electrode; the second layer is held between the second electrode and the first layer; the third layer is held between the second electrode and the second layer; and the third layer has higher electron mobility than the first layer. The material is used in the second layer, the material contains an anthracene skeleton, and the anthracene skeleton is bonded to a diarylamino group, a diheteroarylamino group, or an arylheteroarylamino group.

IPC Classes  ?

  • H10K 85/60 - Organic compounds having low molecular weight
  • C07C 211/61 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings being part of condensed ring systems of the carbon skeleton with at least one of the condensed ring systems formed by three or more rings
  • H10K 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group

86.

DISPLAY APPARATUS AND ELECTRONIC DEVICE INCLUDING THE DISPLAY APPARATUS

      
Application Number 18695921
Status Pending
Filing Date 2022-10-03
First Publication Date 2024-12-12
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Kusunoki, Koji
  • Atsumi, Tomoaki
  • Shishido, Hideaki
  • Kawashima, Susumu

Abstract

A display apparatus with a novel structure is provided. The display apparatus includes a display portion where a first transistor and a display element are provided to be stacked. The display portion includes a first sub-display portion and a second sub-display portion. The first sub-display portion and the second sub-display portion each include a plurality of pixel circuits each controlling the display element and a gate line driver circuit outputting a signal for driving the plurality of pixel circuits. The gate line driver circuit and the plurality of pixel circuits each include a first transistor. In the display portion, the number of image rewriting times per unit time for image data in the first sub-display portion is smaller than the number of image rewriting times per unit time for image data in the second sub-display portion.

IPC Classes  ?

  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
  • G09G 3/3266 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] - Details of drivers for scan electrodes
  • H10K 59/127 - Active-matrix OLED [AMOLED] displays comprising two substrates, e.g. display comprising OLED array and TFT driving circuitry on different substrates
  • H10K 59/131 - Interconnections, e.g. wiring lines or terminals
  • H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

87.

OPTICAL DEVICE

      
Application Number 18698873
Status Pending
Filing Date 2022-10-06
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Fujita, Masashi
  • Kurokawa, Yoshiyuki
  • Godo, Hiromichi
  • Inoue, Seiko
  • Furutani, Kazuma
  • Toyotaka, Kouhei

Abstract

An optical device of the present invention includes a display apparatus (10) and an optical system (12). The display apparatus (10) includes a display region (60) and a sensor region (52). The optical system (12) includes a first mirror (21) and a second mirror (22). The first mirror (21) includes a first surface and a second surface. The display region (60) has a function of emitting first light (31). The first mirror (21) is provided on an optical path of the first light (31) and has a function of transmitting the first light (31) incident on the first surface to the second surface and a function of reflecting second light (33) incident on the second surface. The second mirror (22) is provided on an optical path of the second light (33) and has a function of reflecting the second light (33). The sensor region (52) has a function of detecting the second light (33) via the first mirror (21) and the second mirror (22).

IPC Classes  ?

  • G02B 27/01 - Head-up displays
  • G02B 27/00 - Optical systems or apparatus not provided for by any of the groups ,
  • H04N 13/344 - Displays for viewing with the aid of special glasses or head-mounted displays [HMD] with head-mounted left-right displays
  • H04N 13/383 - Image reproducers using viewer tracking for tracking with gaze detection, i.e. detecting the lines of sight of the viewer's eyes

88.

DISPLAY DEVICE

      
Application Number 18698878
Status Pending
Filing Date 2022-11-17
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Tsukamoto, Yosuke
  • Hatsumi, Ryo
  • Kusunoki, Koji

Abstract

High definition and a large screen are achieved with the use of a direct-view image display device including a small number of optical systems or no optical system. A personal image display device providing the sense of immersion is achieved. A display device of the present invention is a display device placed at least on the front side of a user's visual field. The display device uses a flexible film, has a curved surface, and has a display surface on the user's side of the display device. Display is performed inside a space on the user's side of the display device, and the rear surface of the display device is placed on the side opposite to the user's side of the display device. The user's side of the display device may be provided with a large display region, or a see-through display region of the display device may display only some marks.

IPC Classes  ?

  • H04N 13/344 - Displays for viewing with the aid of special glasses or head-mounted displays [HMD] with head-mounted left-right displays
  • G02B 27/01 - Head-up displays
  • H04N 13/368 - Image reproducers using viewer tracking for two or more viewers
  • H04N 13/383 - Image reproducers using viewer tracking for tracking with gaze detection, i.e. detecting the lines of sight of the viewer's eyes
  • H04N 13/398 - Synchronisation thereof; Control thereof

89.

Display Apparatus

      
Application Number 18702195
Status Pending
Filing Date 2022-10-11
First Publication Date 2024-12-12
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Yanagisawa, Yuichi
  • Nakamura, Daiki
  • Sawai, Hiromi

Abstract

A display apparatus with high display quality is provided. The display apparatus includes a pixel portion and a dummy pixel portion placed outside the pixel portion and not contributing to display; the pixel portion includes a plurality of light-emitting devices; each of the light-emitting devices includes a pixel electrode, a first layer that includes a light-emitting layer, and a common electrode; the first layers of adjacent pixels of a plurality of pixels are separated by a first insulating layer containing an inorganic material and a second insulating layer containing an organic material; the side surface of the first layer includes a region in contact with the first insulating layer; the second insulating layer is over and in contact with the first insulating layer and is placed below the common electrode; the dummy pixel portion includes a plurality of dummy light-emitting devices; each of the dummy light-emitting devices includes a conductive layer and a second layer; the side surface of the second layer includes a region in contact with the first insulating layer; the second insulating layer is over and in contact with the first insulating layer; the conductive layer contains the same material as the pixel electrode; and the second layer contains the same material as the light-emitting layer.

IPC Classes  ?

90.

LITHIUM ION BATTERY

      
Application Number 18703508
Status Pending
Filing Date 2022-10-14
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Saito, Seiya
  • Kakehata, Tetsuya
  • Kuriki, Kazutaka
  • Nakao, Taisuke
  • Arai, Kenji

Abstract

A lithium ion battery having excellent discharge characteristics even at a temperature below freezing is provided. The lithium ion battery includes a positive electrode containing a positive electrode active material, an electrolyte solution, and a negative electrode containing a negative electrode active material that is a carbon material; the carbon material has peaks at 2θ of greater than or equal to 20° and less than or equal to 24°, 2θ of greater than or equal to 42° and less than or equal to 46.5°, and 2θ of greater than or equal to 78° and less than or equal to 82° in X-ray diffraction (XRD) analysis; and a value of the discharge capacity obtained by subjecting the lithium ion battery to constant current and constant voltage charging (0.1 C, 4.5 V, and a termination current of 0.01 C) at 25° C. and then discharging at −40° C. is higher than or equal to 40% of a value of the discharge capacity in discharging at 25° C.

IPC Classes  ?

  • H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
  • H01M 4/02 - Electrodes composed of, or comprising, active material
  • H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodes; Lithium-ion batteries
  • H01M 10/0569 - Liquid materials characterised by the solvents

91.

SEMICONDUCTOR DEVICE

      
Application Number IB2024055383
Publication Number 2024/252245
Status In Force
Filing Date 2024-06-03
Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Okamoto, Yuki
  • Koumura, Yusuke

Abstract

Provided is a novel semiconductor device. In this invention, a memory cell includes a first transistor and a first capacitor. The gate of the first transistor is electrically connected to a word line, one of either the source or the drain is electrically connected to one terminal of the first capacitor, and the other is electrically connected to the gate of a second transistor and one of either the source or the drain of a third transistor. One of either the source or the drain of the second transistor and the other of either the source or the drain of the third transistor are electrically connected to a second sense circuit via a bit line. The second sense circuit functions to output first data according to the potential of the bit line. A storage circuit functions to retain second data according to the number of times the memory cell has been accessed. An input/output circuit functions to select, according to the second data, one of either inverting or not inverting the first data for output.

IPC Classes  ?

  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
  • G11C 5/02 - Disposition of storage elements, e.g. in the form of a matrix array
  • G11C 7/06 - Sense amplifiers; Associated circuits
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10B 99/00 - Subject matter not provided for in other groups of this subclass

92.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number IB2024055384
Publication Number 2024/252246
Status In Force
Filing Date 2024-06-03
Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Yamazaki, Shunpei
  • Isaka, Fumito
  • Egi, Yuji
  • Numata, Shiyuu
  • Tokumaru, Ryo
  • Ishikawa, Jun
  • Tezuka, Sachiaki

Abstract

Provided is a novel semiconductor device. The semiconductor device includes: a first conductive layer; a ferroelectric layer located above the first conductive layer; and a second conductive layer located above the ferroelectric layer. The first conductive layer has a first recess. The ferroelectric layer includes a region formed along the first recess. The ferroelectric layer includes a second recess in a region overlapping the first recess. The second conductive layer is provided so as to fill the second recess. The ferroelectric layer includes hafnium, zirconium, and oxygen. In X-ray diffraction analysis, the ferroelectric layer has a peak near 2θ=30.4°. In the X-ray diffraction analysis, the ferroelectric layer is such that the intensity of 2θ=28.5° is no more than 0.1 times the peak intensity of said peak, and the intensity of 2θ=31.6° is no more than 0.1 times the peak intensity of said peak.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
  • H01L 29/786 - Thin-film transistors

93.

DISPLAY APPARATUS, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number IB2024055385
Publication Number 2024/252247
Status In Force
Filing Date 2024-06-03
Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Nakamura, Daiki
  • Hatsumi, Ryo
  • Ikeda, Hisao
  • Tsukamoto, Yosuke

Abstract

Provided is a novel display apparatus that is excellent in terms of convenience, usefulness, or reliability. This display apparatus includes a first functional layer, a second functional layer, a first substrate, and a second substrate. The first functional layer includes a first region and a second region, and the first functional layer is bent in the second region. The first region is sandwiched between the second functional layer and the first substrate, the first region comprises a first layer and a pixel circuit, and the pixel circuit is sandwiched between the second functional layer and the first layer. The second region is adjacent to the first region, the second region comprises a second layer and a first shift register, the second layer is continuous to the first layer, and the first shift register is formed on the second layer. The second functional layer is sandwiched between the second substrate and the first region, the second functional layer comprises a display device, and the display device is electrically connected to the pixel circuit.

IPC Classes  ?

  • G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
  • G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
  • H10K 50/10 - OLEDs or polymer light-emitting diodes [PLED]
  • H10K 59/10 - OLED displays

94.

SEMICONDUCTOR DEVICE

      
Application Number IB2024055386
Publication Number 2024/252248
Status In Force
Filing Date 2024-06-03
Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Onuki, Tatsuya
  • Yamazaki, Shunpei

Abstract

Provided is a transistor having a favorable electrical characteristic, a transistor having a large on-current, or a transistor having a small parasitic capacitance. Provided is a miniaturized transistor, a semiconductor device capable of achieving high integration, a storage device, or a display device. The transistor is a semiconductor device comprising a first conductive layer, a second conductive layer, a first semiconductor layer, a second semiconductor layer, a gate insulating layer, and a gate electrode, wherein the second insulating layer is positioned on the first insulating layer, the second semiconductor layer and the second conductive layer overlapping each other are positioned between the second insulating layer and the first insulating layer, the first insulating layer, the second conductive layer, the second semiconductor layer, and the second insulating layer are provided with an opening part reaching the first conductive layer, the first semiconductor layer is in contact with the upper surface of the first conductive layer and a side wall of the opening part, the gate electrode has a portion positioned on the second insulating layer, and the gate insulating layer has, in the opening part, a portion sandwiched between the first semiconductor layer and the gate electrode.

IPC Classes  ?

  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H01L 29/786 - Thin-film transistors
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region

95.

SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS

      
Application Number IB2024055387
Publication Number 2024/252249
Status In Force
Filing Date 2024-06-03
Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Hayashi, Kentaro

Abstract

Provided is a semiconductor device which can achieve miniaturization or high integration. A first transistor and a second transistor stacked on each other are provided and a capacitor is provided therebetween. A channel formation region of each of the first and second transistors is provided in a direction along a side wall of an opening part provided in an interlayer insulation layer. A semiconductor layer, a gate insulating layer, and a gate electrode are provided in this order inside the opening part. Moreover, a back gate electrode is provided such that an upper surface and a lower surface are covered with the interlayer insulating layer and the back gate electrode has an opening part overlapping the abovementioned opening part. A back gate insulating layer is provided so as to have a region positioned inside the opening part of the back gate electrode. The capacitor includes: one electrode electrically connecting the gate electrode of the first transistor and the source electrode or the drain electrode of the second transistor; a dielectric layer covering a part of the side surface of the one electrode; and the other electrode.

IPC Classes  ?

  • H01L 29/786 - Thin-film transistors
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
  • H01L 21/8234 - MIS technology
  • H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
  • H01L 27/088 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
  • H10B 12/00 - Dynamic random access memory [DRAM] devices
  • H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
  • H10K 50/00 - Organic light-emitting devices
  • H10K 59/12 - Active-matrix OLED [AMOLED] displays
  • H10K 59/123 - Connection of the pixel electrodes to the thin film transistors [TFT]

96.

Light-Emitting Apparatus, Display Device And Electronic Appliance

      
Application Number 18696693
Status Pending
Filing Date 2022-09-20
First Publication Date 2024-12-12
Owner Semiconductor Energy Laboratory Co., Ltd. (Japan)
Inventor
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting apparatus including a light-emitting device A and a light-emitting device B is provided. The light-emitting device A includes a first electrode A, a second electrode A, a light-emitting layer A interposed between the first electrode A and the second electrode A, a first layer A interposed between the first electrode A and the light-emitting layer A, and a second layer A interposed between the first layer A and the light-emitting layer A. The light-emitting device B includes a first electrode B, a second electrode B, a light-emitting layer B interposed between the first electrode B and the second electrode B, a first layer B interposed between the first electrode B and the light-emitting layer B, a second layer B positioned between the first layer B and the light-emitting layer B, and a third layer B interposed between the first electrode B and the light-emitting layer B. The light-emitting layer A contains a light-emitting substance A. The light-emitting layer B contains a light-emitting substance B. The emission peak wavelength of the light-emitting substance A is shorter than the emission peak wavelength of the light-emitting substance B. The first layer A and the first layer B contain the same material. The second layer A and the second layer B contain the same material. The ordinary refractive index of the first layer A is lower than the ordinary refractive index of the second layer A at the emission peak wavelength of the light-emitting substance A. The ordinary refractive index of the first layer B is lower than the ordinary refractive index of the second layer B at the emission peak wavelength of the light-emitting substance B. The third layer B is positioned between the first electrode B and the first layer B, between the first layer B and the second layer B, or between the second layer B and the light-emitting layer B.

IPC Classes  ?

  • H10K 59/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group
  • H10K 59/80 - Constructional details

97.

DISPLAY APPARATUS AND ELECTRONIC DEVICE

      
Application Number 18699473
Status Pending
Filing Date 2022-10-14
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kimura, Hajime
  • Inoue, Tatsunori

Abstract

A display apparatus with high display quality is provided. One embodiment of the present invention is a display apparatus including a pixel and a circuit. The pixel includes a light-emitting device, a driving transistor, first to fourth switches, and a first capacitor. The circuit includes a fifth switch, a sixth switch, and a second capacitor. A gate of the driving transistor is electrically connected to a first terminal of the first switch, a first terminal of the second switch, and a first terminal of the first capacitor. One of a source and a drain of the driving transistor is electrically connected to a second terminal of the first capacitor, a first terminal of the fourth switch, and an anode of the light-emitting device. The other of the source and the drain of the driving transistor is electrically connected to a second terminal of the second switch and a first terminal of the third switch. A second terminal of the first switch is electrically connected to a first terminal of the second capacitor. A first terminal of the fifth switch is electrically connected to a first terminal of the sixth switch and a second terminal of the second capacitor.

IPC Classes  ?

  • G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

98.

DISPLAY DEVICE, DISPLAY MODULE, AND ELECTRONIC DEVICE

      
Application Number 18699489
Status Pending
Filing Date 2022-10-17
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Kusunoki, Koji
  • Seo, Satoshi
  • Yamazaki, Shunpei

Abstract

A high-resolution display device is provided. The display device includes first to third light-emitting devices, first and second color conversion layers, first to third coloring layers, and an insulating layer. The first to third light-emitting devices each include a pixel electrode, a light-emitting layer over the pixel electrode, and a common electrode over the light-emitting layer. The pixel electrode is provided in each light-emitting device. Each of the first to third light-emitting devices emits white light. The common electrode is shared by the light-emitting devices. Light emitted from the first light-emitting device is converted into red light in the first color conversion layer and the first coloring layer. Light emitted from the second light-emitting device is converted into green light in the second color conversion layer and the second coloring layer. Light emitted from the third light-emitting device is converted into blue light in the third coloring layer. The first to third coloring layers each include a region overlapping with the adjacent coloring layer. The insulating layer is positioned between the light-emitting devices adjacent to each other.

IPC Classes  ?

  • H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
  • H10K 59/80 - Constructional details

99.

Light-Emitting Apparatus

      
Application Number 18699760
Status Pending
Filing Date 2022-10-03
First Publication Date 2024-12-12
Owner Semiconductor Energy Labratory Co., Ltd. (Japan)
Inventor
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting apparatus including a first light-emitting device and a second light-emitting device is provided. The first light-emitting device includes a first electrode, a second electrode, a first light-emitting layer positioned between the first electrode and the second electrode, a first layer positioned between the first electrode and the first light-emitting layer, and a second layer positioned between the first layer and the first light-emitting layer. The second light-emitting device includes a third electrode, a fourth electrode, a second light-emitting layer positioned between the third electrode and the fourth electrode, a third layer positioned between the third electrode and the second light-emitting layer, a fourth layer positioned between the third layer and the second light-emitting layer, and a fifth layer positioned between the third electrode and the second light-emitting layer. The first light-emitting layer includes a first light-emitting substance. The second light-emitting layer includes a second light-emitting substance.

IPC Classes  ?

100.

LIGHT-EMITTING APPARATUS, DISPLAY DEVICE, AND ELECTRONIC APPLIANCE

      
Application Number 18700885
Status Pending
Filing Date 2022-10-25
First Publication Date 2024-12-12
Owner SEMICONDUCTOR ENERGY LABORATORY CO., LTD. (Japan)
Inventor
  • Watabe, Takeyoshi
  • Ohsawa, Nobuharu
  • Seo, Satoshi

Abstract

A light-emitting apparatus with high emission efficiency is provided. A light-emitting apparatus including a light-emitting device A and a light-emitting device B is provided. The light-emitting device A includes a first electrode A, a second electrode A, a light-emitting layer A between the first electrode A and the second electrode A, and a first layer A between the first electrode A and the light-emitting layer A. The light-emitting device B includes a first electrode B, a second electrode B, a light-emitting layer B between the first electrode B and the second electrode B, a first layer B between the first electrode B and the light-emitting layer B, and a second layer B between the first electrode B and the light-emitting layer B. The light-emitting layer A contains a light-emitting substance A. The light-emitting layer B contains a light-emitting substance B. An emission peak wavelength of the light-emitting substance A is shorter than an emission peak wavelength of the light-emitting substance B. The first layer A and the first layer B contain the same material. The ordinary refractive index of the first layer A is lower than the ordinary refractive index of the light-emitting layer A at the emission peak wavelength of the light-emitting substance A. The ordinary refractive index of the first layer A is less than or equal to 1.75 at the emission peak wavelength of the light-emitting substance A.

IPC Classes  ?

  • H10K 59/80 - Constructional details
  • H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
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