A novel semiconductor device that is highly convenient, useful, or reliable can be provided. The semiconductor device includes a first functional layer, a second functional layer, and a first conductive layer. The second functional layer overlaps with the first functional layer and includes a functional element. The functional element includes a first electrode. The first functional layer includes a first layer, a spacer, and a transistor, and is sandwiched between the second functional layer and the spacer. The first layer includes a first opening portion and has an insulating property. The spacer includes a first plane, a second plane, a third plane, and a second opening portion. The first plane, the second plane, and the third plane each have an insulating property. The second plane faces the first plane, and the second plane is positioned closer to the first layer than the first plane is. The third plane connects the first plane and the second plane to each other and is positioned at the side surface of the second opening portion. The transistor includes a second electrode, a third electrode, a fourth electrode, a semiconductor layer, and an insulating layer. The first conductive layer electrically connects the third electrode and the first electrode to each other through the first opening portion.
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
2.
LIQUID CRYSTAL DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
Disclosed is a liquid crystal display device which can be used in a variety of situations and applications. The liquid crystal display device comprises: a first substrate comprising a first display region, a second display region, and a third display region wherein the first display region, the second display region, and the third display region are continuously formed; a second substrate having a form which fits the first substrate; and a liquid crystal interposed between the first substrate and the second substrate. The second display region is interposed between the first display region and the second display region. The second display region is curved, and the first display region and the second display region are substantially flat.
G02F 1/13 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Provided is a display device with high display quality. A first pixel, a second pixel provided adjacent to the first pixel, a first insulating layer, a second insulating layer over the first insulating layer, and a third insulating layer over the second insulating layer are included; the first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer; the second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer; the first insulating layer and the third insulating layer each contain an inorganic material; the second insulating layer contains an organic material; the second insulating layer overlaps with the side surface of the first EL layer and the side surface of the second EL layer with the first insulating layer therebetween; the second insulating layer overlaps with the common electrode with the third insulating layer therebetween; and the third insulating layer is in contact with the first insulating layer in a region not overlapping with the second insulating layer.
A material having favorable ferroelectricity is provided. An embodiment of the present invention is a metal oxide film including a first layer and a second layer. The first layer contains first oxygen and hafnium, and the second layer contains second oxygen and zirconium. The hafnium and the zirconium are bonded to each other with the first oxygen positioned therebetween, and the second oxygen is bonded to the zirconium.
The light-emitting device includes a first electrode, a second electrode, and an organic compound layer between the first electrode and the second electrode. The organic compound layer includes a first light-emitting unit, an intermediate layer, and a second light-emitting unit in this order from the first electrode side. The first light-emitting unit includes a first light-emitting layer, and the second light-emitting unit includes a second light-emitting layer. The intermediate layer includes a first layer, a second layer, and a third layer in this order from the first electrode side, with the second layer being in contact with the first layer and the third layer. The spin density of the first layer is lower than or equal to 1×1017 spins/cm3. The LUMO level of a material included in the second layer is greater than or equal to −4.30 eV and less than or equal to −3.00 eV.
A semiconductor device with stable operation is provided. The semiconductor device includes a first transistor, a second transistor, a third transistor, and a first capacitor. One of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the second transistor. The other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor and a first terminal of the first capacitor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor and a second terminal of the first capacitor. Note that the semiconductor device can be provided in a driver circuit having a function of transmitting a signal for displaying an image to a display device.
A minute transistor is provided that includes a first insulator, a second insulator, a first, conductor, a second conductor, and third conductor, in which an angle is formed between a side surface of the first insulator and a top surface of the first conductor, and a length between the first conductor and a surface of the second conductor closest to the first conductor is at least greater than a length between the first conductor and the third conductor.
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10D 62/80 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
H10D 64/68 - Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
H10D 84/03 - Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
H10D 87/00 - Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
An aspect of the present invention provides a material having a higher purity than conventional ones in order to enhance durability. Recycling for purification with a recycling liquid chromatography device is performed over a long time. Thereafter, one peak profile which includes a peak assigned to the structure of a desired iridium complex and is obtained from a chromatograph thus obtained with the recycling liquid chromatography device is divided into at least three portions. A recovery fraction including a maximal value of the peak is selectively recovered to perform purification.
Provided is a miniaturized or highly integrated semiconductor device. The present invention has first to third transistors. The first transistor has a first semiconductor layer, a first conductive layer, and a second conductive layer. The second transistor has the first semiconductor layer, the first conductive layer, and a third conductive layer. The third transistor has a second semiconductor layer, a fourth conductive layer, and the second conductive layer. The first conductive layer has a first opening overlapping the second conductive layer and a second opening overlapping the third conductive layer. The fourth conductive layer has a third opening overlapping the second conductive layer. The first semiconductor layer is in contact with a side surface of the first conductive layer in the first opening and a side surface of the first conductive layer in the second opening. The second semiconductor layer is in contact with a side surface of the fourth conductive layer in the third opening. In plan view, the center-to-center distance between the first opening and the second opening is shorter than the center-to-center distance between the first opening and the third opening.
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 41/70 - Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
H10D 1/68 - Capacitors having no potential barriers
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 87/00 - Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
Provided is a novel semiconductor device. The gate of a second transistor is connected to a first terminal of a fifth transistor and a first terminal of a second capacitive element. A second terminal of the second capacitive element is connected to a first terminal of a first transistor, a first terminal of a sixth transistor, and a first terminal of a third capacitive element. A first terminal of the second transistor is connected to a second terminal of the fifth transistor, a first terminal of a third transistor, the gate of a fourth transistor, and a first terminal of a first capacitive element. A second terminal of the second transistor is connected to a second terminal of the sixth transistor. A first terminal of the fourth transistor is connected to a first terminal of a light-emitting element. The channel length of the second transistor is greater than the channel length of the fourth transistor.
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G09G 3/30 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels
G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
H10H 20/00 - Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
H10H 29/10 - Integrated devices comprising at least one light-emitting semiconductor component covered by group
H10H 29/39 - Connection of the pixel electrodes to the driving transistors
A semiconductor device with favorable electrical characteristics is to be provided. The semiconductor device includes a cylindrical semiconductor layer, a first conductive layer in contact with a bottom surface of the semiconductor layer, a second conductive layer in contact with a top surface of the semiconductor layer, a first insulating layer covering at least part of a side surface of the semiconductor layer, and a third conductive layer facing the side surface of the semiconductor layer with the first insulating layer therebetween. The first insulating layer includes a first region between the semiconductor layer and the third conductive layer and a second region between the first conductive layer and the third conductive layer. The width of the first region in the direction from the semiconductor layer toward the third conductive layer is equal to or substantially equal to the width of the second region in the direction from the first conductive layer toward the third conductive layer.
A document search system that enables efficient document search regardless of the ability of a user is achieved. Document search is performed using a document search system in which database document data is stored. After first document data and second document data are input to the document search system, the document search system extracts a plurality of terms from the first document data. The extraction of the terms is performed using morphological analysis, for example. Next, the extracted terms are weighted on the basis of the second document data. For example, texts included in a document represented by the second document data are classified into first and second texts. Among the terms extracted from the first document data, the weight of the term included in the first text is set larger than the weights of the other terms. The classification of the texts can be performed in accordance with a rule basis or using machine learning. After that, the similarity of the database document data to the first document data is calculated on the basis of the weighted term.
A novel information processing system that is highly convenient, useful, or reliable is provided. The information processing system includes a first component, a second component, and a third component. The first component has a function of receiving a document and transmitting it to the third component and a function of receiving and providing a comment. The second component has a function of generating a question, an answer, and the comment with the use of a large language model. The third component has a function of receiving the document, the question, the answer, and the comment and internally sharing them, and a function of transmitting a prompt to the second component. The third component also has a function of creating the prompt. Thus, the question, the answer, and the comment regarding the document can be generated.
A novel semiconductor device is provided. The memory cell includes a first transistor and a first capacitor. A gate of the first transistor is electrically connected to a word line. One of a source and a drain of the first transistor is electrically connected to one terminal of the first capacitor. The other of the source and the drain of the first transistor is electrically connected to a gate of the second transistor and one of a source and a drain of the third transistor. One of a source and a drain of the second transistor and the other of the source and the drain of the third transistor are electrically connected to the second sensing circuit through a bit line. The second sensing circuit has a function of outputting first data corresponding to a potential of the bit line. The memory circuit has a function of retaining second data corresponding to the number of times the memory cell is accessed. The input/output circuit has a function of, in accordance with the second data, determining whether to invert or not to invert the first data and outputting the first data.
H10D 62/83 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
To provide a display device in which the degree of freedom in the external shape can be increased. A display portion includes a first region, a second region, and a third region, the first to third regions each include a pixel circuit, the second region includes a component of a gate driver circuit, and the third region includes a component of a source driver circuit. A vertical transistor can be used as transistors that are components of the driver circuits. The vertical transistor has an advantage in that it can easily have a short channel length and a large channel width and thus can easily increase the on-state current. In addition, the vertical transistor can have a small occupation area, and components are easily distributed in a plurality of pixels.
The resolution of a display apparatus having a light detection function is increased. The display apparatus includes a light-emitting device and a light-emitting and light-receiving device. The light-emitting device includes a first pixel electrode, a first light-emitting layer, and a common electrode; the light-emitting and light-receiving device includes a second pixel electrode, a second light-emitting layer, an active layer, and the common electrode; the active layer includes an organic compound; the first light-emitting layer is positioned between the first pixel electrode and the common electrode; the second light-emitting layer and the active layer are each positioned between the second pixel electrode and the common electrode; the light-emitting device has a function of emitting light of a first color; and the light-emitting and light-receiving device has a function of emitting light of a second color and a function of receiving light of the first color. The light-emitting and light-receiving device functions as both a light-emitting device and a light-receiving device, whereby a pixel can have a light-receiving function without an increase in the number of subpixels included in the pixel. Furthermore, the pixel can be provided with a light-receiving function without a reduction in the resolution of the display apparatus or a reduction in the aperture ratio of each subpixel.
A secondary battery with little deterioration is provided. A highly reliable secondary battery is provided. A positive electrode active material included in the secondary battery includes a crystal of lithium cobalt oxide. The positive electrode active material includes a first region including a surface parallel to the (001) plane of the crystal and a second region including a surface parallel to a plane intersecting with the (001) plane. The positive electrode active material contains magnesium. The first region includes a portion with a magnesium concentration that is higher than or equal to 0.5 atomic % and lower than or equal to 10 atomic %. The second region includes a portion with a magnesium concentration that is higher than the magnesium concentration in the first region and is higher than or equal to 4 atomic % and lower than or equal to 30 atomic %. Furthermore, the second region includes a portion with a fluorine concentration that is higher than a fluorine concentration in the first region and is higher than or equal to 0.5 atomic % and lower than or equal to 10 atomic %.
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01M 4/02 - Electrodes composed of, or comprising, active material
H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/134 - Electrodes based on metals, Si or alloys
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
A semiconductor device that can be miniaturized or highly integrated is provided. Over a first layer, a second layer, a mask, and a first resist mask are formed in this order; a first opening portion is formed in the first resist mask; the first opening portion is reduced in size in a plan view; a second opening portion is formed in a position of the mask that overlaps with the first opening portion; the first resist mask is removed; a second resist mask is formed over the mask provided with the second opening portion; a third opening portion is formed in the second resist mask; the third opening portion is reduced in size in the plan view; a fourth opening portion is formed in a position of the mask that overlaps with the third opening portion and does not overlap with the second opening portion; the second resist mask is removed; a fifth opening portion is formed in each position of the second layer that overlaps with the second opening portion or overlaps with the fourth opening portion; the mask is removed; and an oxide semiconductor in contact with a side surface of the second layer and a top surface of the first layer is formed inside the fifth opening portion.
A light-emitting device can be folded in such a manner that a flexible light-emitting panel is supported by a plurality of housings which are provided spaced from each other and the light-emitting panel is bent so that surfaces of adjacent housings are in contact with each other. Furthermore, in the light-emitting device, in which part or the whole of the housings have magnetism, the two adjacent housings can be fixed to each other by a magnetic force when the light-emitting device is used in a folded state.
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
G06F 1/16 - Constructional details or arrangements
H01F 1/147 - Alloys characterised by their composition
H05K 5/00 - Casings, cabinets or drawers for electric apparatus
A novel organic compound is provided. Alternatively, an organic compound that emits light with favorable chromaticity is provided. Alternatively, an organic compound that emits blue light with favorable chromaticity is provided. Alternatively, a light-emitting element with favorable emission efficiency is provided. Alternatively, an organic compound with an excellent carrier-transport property is provided. The organic compound includes any of a substituted or unsubstituted dibenzofurobisbenzofuran skeleton, a substituted or unsubstituted dibenzothienobisbenzothiophene skeleton, a substituted or unsubstituted benzobisbenzothienobenzofuran skeleton, and a substituted or unsubstituted dibenzothienobisbenzofuran skeleton and one or two amino groups. In the organic compound, the amino group includes a substituted or unsubstituted heteroaryl group and any of a substituted or unsubstituted aromatic hydrocarbon group having 6 to 25 carbon atoms and a substituted or unsubstituted heteroaryl group having 5 to 25 carbon atoms.
Provided is a display apparatus having a high display quality. The present invention has: a first light-emitting device having a first light-emitting layer; a second light-emitting device adjacent to the first light-emitting device and having a second light-emitting layer; a third light-emitting device adjacent to the second light-emitting device and having a third light-emitting layer; and partition walls between the first device and the second device and between the second device and the third device. The distance d1 between the first light-emitting device and the second light-emitting device is 3-25 times the distance d2 between the second light-emitting device and the third light-emitting device.
G09F 9/302 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements characterised by the form or geometrical disposition of the individual elements
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H05B 33/12 - Light sources with substantially two-dimensional radiating surfaces
H05B 33/14 - Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of the electroluminescent material
H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
A positive electrode active material that can be used in a lithium-ion secondary battery and in which conductivity is improved and/or insertion and extraction of lithium ions are promoted is provided. A secondary battery includes a positive electrode active material; the positive electrode active material contains an additive element whose oxide can be a semiconductor, magnesium, and lithium cobalt oxide; the positive electrode active material includes a crack; the positive electrode active material includes a surface portion and a crack portion; the surface portion is a region within 10 nm from a surface other than the crack portion in a direction substantially perpendicular to the surface; the crack portion is a region within 10 nm from a surface of the crack portion in a direction substantially perpendicular to the surface and is a region other than the surface portion; magnesium is detected from the surface portion and the crack portion; the element whose oxide can be a semiconductor is detected from the surface portion; and the element whose oxide can be a semiconductor is one or two selected from nickel and titanium.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/02 - Electrodes composed of, or comprising, active material
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
23.
SEMICONDUCTOR DEVICE, DRIVER CIRCUIT, AND DISPLAY APPARATUS
A semiconductor device capable of low-speed operation is provided. The semiconductor device includes first to eighth transistors and first and second capacitor elements. Gates of the first transistor and the second transistor are connected to each other. A first terminal of the first transistor is electrically connected to a first terminal of the fourth transistor and a first terminal of the fifth transistor. A first terminal of the third transistor is electrically connected to a first terminal of the second transistor, a gate of the fourth transistor, a first terminal of the first capacitor element, a gate of the seventh transistor, and a first terminal of the eighth transistor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor element. A first terminal of the sixth transistor is electrically connected to a second terminal of the second capacitor element, a first terminal of the seventh transistor, and a gate of the eighth transistor.
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
G09G 3/3266 - Details of drivers for scan electrodes
G09G 3/3275 - Details of drivers for data electrodes
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
A battery module that includes a circuit for safe control and that is capable of space-saving is to be provided. The battery module includes a flexible printed circuit (FPC) board, an exterior body, a positive electrode, and a negative electrode; the FPC board includes a first resin layer, a second resin layer, a third resin layer, a first metal layer positioned between the first resin layer and the second resin layer, and a second metal layer positioned between the second resin layer and the third resin layer; the first resin layer and the exterior body are bonded to each other at a sealing portion; the positive electrode includes a positive electrode current collector; the negative electrode includes a negative electrode current collector; and in a sealed space surrounded by the first resin layer, the exterior body, and the sealing portion, the first resin layer includes a first opening reaching the first metal layer, the first resin layer, the first metal layer, and the second resin layer each include a second opening reaching the second metal layer, the positive electrode current collector is connected to the first metal layer in the first opening, and the negative electrode current collector is connected to the second metal layer in the second opening.
H01M 50/284 - MountingsSecondary casings or framesRacks, modules or packsSuspension devicesShock absorbersTransport or carrying devicesHolders with incorporated circuit boards, e.g. printed circuit boards [PCB]
25.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A semiconductor device including a transistor having a minute size is provided. A semiconductor device includes a semiconductor layer, first to fourth conductive layers, and first and second insulating layers. The second conductive layer is provided over the first conductive layer and includes a first opening overlapping with the first conductive layer. The third conductive layer is provided over the second conductive layer and includes a second opening overlapping with the first opening. The first insulating layer is in contact with a sidewall of the first opening. The semiconductor layer is provided over the first conductive layer, the first insulating layer, and the third conductive layer. The semiconductor layer includes a first region in contact with the top surface of the first conductive layer, a second region in contact with the side surface of the first insulating layer, and a third region in contact with the top surface of the third conductive layer. The second insulating layer is provided over the semiconductor layer. The fourth conductive layer is provided over the second insulating layer. The fourth conductive layer faces the second conductive layer with the second insulating layer, the semiconductor layer, and the first insulating layer therebetween. Each of the first region and the third region has a lower resistance than the second region.
A higher-definition or higher-resolution display apparatus is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, a first insulating layer, a first coloring layer, and a second coloring layer. The first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer. The second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer. The first insulating layer covers side surfaces of the first pixel electrode, the second pixel electrode, the first light-emitting layer, and the second light-emitting layer. The first coloring layer is placed to overlap with the first light-emitting device. The second coloring layer is placed to overlap with the second light-emitting device. The first light-emitting device and the second light-emitting device have a function of emitting white light. The first coloring layer and the second coloring layer have a function of transmitting visible light of different colors.
A secondary battery with little deterioration is provided. A secondary battery with high safety is provided. A separator having excellent characteristics is provided. A separator achieving the secondary battery with high safety is provided. A novel separator is provided. In the separator, a polymer porous film and a layer including a ceramic-based material containing a metal oxide microparticle are stacked, the thickness of the layer including a ceramic-based material is greater than or equal to 1 μm and less than or equal to 100 μm, and the film thickness of the polymer porous film is greater than or equal to 4 μm and less than or equal to 50 μm.
H01M 50/451 - Separators, membranes or diaphragms characterised by the material having a layered structure comprising layers of only organic material and layers containing inorganic material
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
H01M 50/403 - Manufacturing processes of separators, membranes or diaphragms
Provided is a novel semiconductor device. The semiconductor device comprises: a first circuit that has the function of supplying, to a second circuit, a current which has the same value as the total of currents supplied to n input terminals; and a second circuit that has the function of setting the value of the current which has been supplied from the first circuit to 1/n and supplying the current to an output terminal, wherein the first circuit has a transistor that includes an oxide semiconductor in a semiconductor layer in which a channel is formed, the second circuit has a transistor that includes silicon in a semiconductor layer in which a channel is formed, and the first circuit and the second circuit have mutually overlapping regions.
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
29.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising micro-sized transistors. The semiconductor device comprises two vertical transistors (a first transistor and a second transistor) and a first insulating layer. The first transistor is an n-channel transistor, and the second transistor is a p-channel transistor. The first insulating layer is provided in a band shape so as to have a region sandwiched between a source electrode and a drain electrode of the first transistor and between a source electrode and a drain electrode of the second transistor. The first transistor and the second transistor are connected in series. A semiconductor layer of the first transistor has a region facing a first side surface of the first insulating layer. A semiconductor layer of the second transistor has a region facing a second side surface of the first insulating layer. The first side surface and the second side surface of the first insulating layer face each other.
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H10B 10/00 - Static random access memory [SRAM] devices
Provided is a computation device. The computation device has: a computation circuit unit that has a plurality of computation cells for retaining first data; a drive circuit that outputs second data to the computation circuit unit; a first sample-and-hold circuit unit; a switch unit; and a second sample-and-hold circuit unit. The computation circuit unit supplies a first current to the first sample-and-hold circuit unit, said first current corresponding to the sum of currents flowing through the computation cells to which the second data has been supplied. First sample-and-hold circuits retain a plurality of items of third data that correspond to the first current, by switching the second data. The switch unit supplies a second current to the second sample-and-hold circuit unit, said second current corresponding to the sum of currents flowing from the plurality of first sample-and-holds circuits via switches. Second sample-and-hold circuits retain a plurality of items of fourth data that correspond to the second current, by switching switch paths.
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
Provided is a semiconductor device capable of calculating two different types of functions. The semiconductor device has first and second current generation circuits, a current source, and wiring. The first current generation circuit has a first input terminal and a first output terminal. The second current generation circuit has a second input terminal, a third input terminal, and a second output terminal. The current source has a third output terminal. The first output terminal is connected to the second input terminal and to the wiring, and the third input terminal is connected to the third output terminal. The first current generation circuit has, as a mirroring function, a function for generating a second current to flow through the first output terminal, with reference to a first current flowing through the first input terminal. The current source has a function for causing a fourth current to flow through the third output terminal. The second current generation circuit has, as a mirroring function, a function for generating a fifth current to be caused to flow to the second output terminal, such generation performed by referencing the smaller of: the amount of a differential current between the second current and a third current flowing through the wiring; and the amount of the fourth current.
G06G 7/14 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for addition or subtraction
G06G 7/16 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for multiplication or division
G06G 7/25 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for discontinuous functions, e.g. backlash, dead zone, limiting, absolute value, or peak value
G06N 3/063 - Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
32.
INFORMATION PROCESSING METHOD AND INFORMATION PROCESSING DEVICE
Provided is an information processing device that contributes to smooth execution of design work. According to the present invention, design information including a design drawing such as a circuit diagram and a specification is accepted, after which a language model is caused to generate design commands based on the design information. Design is performed on the basis of the design commands, and design results are acquired. The language model is caused to extract any defect included in the design results and estimate the cause of the defect. Literature is acquired by performing a search on the basis of the defect and cause. The language model is caused to generate human resource search information on the basis of the acquired literature. The human resource search information includes the skills required to resolve the defect, the time required to resolve the defect, etc. A search for a human resource suitable for resolving the defect is performed on the basis of the human resource search information. Defect-related information including the defect, the cause, and the retrieved literature is transmitted to the retrieved human resource to request resolution of the defect.
G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
A novel display module that is highly convenient, useful, or reliable is provided. The display module includes a first support, a second support, a first adhesive layer, a gap, a fluid layer, and a display apparatus. The first support overlaps with the second support. The first support has flexibility. The second support has higher elasticity than the first support. The first adhesive layer bonds the first support and the second support to each other. The first adhesive layer fomes the gap between the first support and the second support. The gap holds the fluid layer. The fluid layer has fluidity within the range of 0° C. to 80° C., and the difference in refractive index between the fluid layer and the first support is greater than 0 and less than or equal to 0.2. The display apparatus is sandwiched between the first support and the second support, has a function of performing display toward the first support, and includes a first display region, a second display region, and a third display region. The first display region is fixed between the first support and the first adhesive layer. The second display region is sandwiched between the first display region and the third display region, can be bent, and is positioned inside the gap. The third display region is positioned inside the gap and slides inside the gap in accordance with bending of the second display region.
A method for forming a lithium-rich positive electrode active material particle which enables high charge and discharge capacities and has a stable crystal structure is provided. The method for forming the positive electrode active material particle includes the steps of: mixing a lithium source and an M source (M is one or more selected from Mn, Ni, Co, Cr, Mo, Nb, V, Fe, Ti, and Ru) to form a first mixture; heating the first mixture at higher than or equal to 850° C. and lower than 950° C. to synthesize a first composite oxide; mixing the first composite oxide and an additive element source to form a second mixture; and heating the second mixture at higher than or equal to 850° C. and lower than or equal to 950° C. The additive element source includes a fluorine source and a magnesium source.
C01G 53/502 - Complex oxides containing nickel and at least one other metal element containing alkali metals, e.g. LiNiO2 containing manganese of the type (MnO2)n-, e.g. Li(NixMn1-x)O2 or Li(MyNixMn1-x-y)O2 containing lithium and cobalt
H01M 4/02 - Electrodes composed of, or comprising, active material
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/505 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of manganese of mixed oxides or hydroxides containing manganese for inserting or intercalating light metals, e.g. LiMn2O4 or LiMn2OxFy
H01M 4/58 - Selection of substances as active materials, active masses, active liquids of inorganic compounds other than oxides or hydroxides, e.g. sulfides, selenides, tellurides, halogenides or LiCoFySelection of substances as active materials, active masses, active liquids of polyanionic structures, e.g. phosphates, silicates or borates
35.
LIGHT-EMITTING ELEMENT, DISPLAY DEVICE, ELECTRONIC DEVICE, AND LIGHTING DEVICE
A light-emitting element containing a light-emitting material and having high light emission efficiency is provided. The light-emitting element includes a host material and a guest material. The host material includes at least a first molecule and a second molecule having the same molecular structure. The guest material has a function of exhibiting fluorescence or converting triplet excitation energy into light emission. The first molecule and the second molecule each include a first skeleton, a second skeleton, and a third skeleton, and the first skeleton and the second skeleton are bonded to each other through the third skeleton. The first skeleton includes at least one of a π-electron rich heteroaromatic skeleton and an aromatic amine skeleton and the second skeleton includes a π-electron deficient heteroaromatic skeleton. The first molecule and the second molecule have a function of forming an excited complex.
A novel light-emitting device is provided. A light-emitting device with high emission efficiency is provided. A light-emitting device having a long lifetime is provided. A light-emitting device with low driving voltage is provided. The light-emitting device includes an anode, a cathode, and an EL layer between the anode and the cathode. The EL layer includes a light-emitting layer and an electron-transport layer. The electron-transport layer is positioned between the light-emitting layer and the cathode. The electron-transport layer contains an electron-transport material. The electron-transport material is an organic compound including a first skeleton, a second skeleton, and a third skeleton. The first skeleton has a function of transporting electrons. The second skeleton has a function of accepting holes. The third skeleton includes a monocyclic π-electron deficient heteroaromatic ring.
H10K 85/60 - Organic compounds having low molecular weight
C07D 401/10 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing two hetero rings linked by a carbon chain containing aromatic rings
C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered
H10K 50/11 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
An input/output device includes a first sensor electrode and a second sensor electrode. In addition, the input/output device includes a first electrode and a second electrode which are electrodes for a display element, and a substrate sandwiched between the first sensor electrode and the second sensor electrode. The second sensor electrode is formed concurrently with the first electrode using the same material. The input/output device sensors a change in capacitance of a capacitor formed between the first sensor electrode and the second sensor electrode. Furthermore, a third sensor electrode to which a floating potential is applied may be provided to overlap with the first electrode. In the input/output device, either a liquid crystal element or a light-emitting element may be used, or both the liquid crystal element and the light-emitting element may be used.
A semiconductor device of one embodiment of the present invention includes a semiconductor, an insulator, a first conductor, and a second conductor. In the semiconductor device, a top surface of the semiconductor has a region in contact with the insulator; a side surface of the semiconductor has a region in contact with the insulator; the first conductor has a first region overlapping with the semiconductor with the insulator positioned therebetween; the first region has a region in contact with the top surface of the semiconductor and a region in contact with the side surface of the semiconductor; the second conductor has a second region in contact with the semiconductor; and the first region and the second region do not overlap with each other.
H10D 62/80 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
39.
ORGANIC COMPOUND, MATERIAL FOR INTERMEDIATE LAYER, AND LIGHT EMITTING DEVICE
Provided is a novel organic compound with which it is possible to provide a light emitting device having good reliability. Provided is an organic compound represented by structural formula (G1). In the organic compound expressed by general formula (G1), at least one from among R20to R27is a group represented by general formula (g1). In the group represented by general formula (g1), R1to R16each independently represent hydrogen (including deuterium) or a C1-C10 alkyl group, and s, t, u, and v each independently represent a value of 0-3. Ar1 represents a substituted or unsubstituted arylene group. m represents a value of 0-2. When m is 2, the two substituted or unsubstituted arylene groups may be the same or different from each other.
Provided is a display device with which high definition is easily achieved. The provided display device combines high display quality and high definition. The display device comprises pixel electrodes, EL layers, upper electrodes, first insulating layers, and partition walls. Each first insulating layer comprises a first portion, a second portion, and a third portion therebetween. The height of the second portion from a formation target surface is shorter than that of the first portion. The height of the upper surface of the third portion changes from the first portion to the second portion. Each partition wall has conductivity, is positioned on top of a first portion of a first insulating layer, and has a reverse tapered shape in a cross-sectional view. Each EL layer contains a light-emitting compound and is in contact with an upper surface of a pixel electrode and a second portion of a first insulating layer. Each upper electrode covers an upper surface and an end portion of an EL layer and is in contact with a side surface of a partition wall.
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
H10K 50/824 - Cathodes combined with auxiliary electrodes
A high-resolution display device is provided. A display device with both high display quality and high resolution is provided. The display device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. An insulating layer is included between the first pixel electrode and the second pixel electrode. The insulating layer includes a first region overlapping with the first EL layer, a second region overlapping with the second EL layer, and a third region positioned between the first region and the second region. A side surface of the first EL layer and a side surface of the second EL layer are positioned over the insulating layer and are provided to face each other. The common electrode is provided along the side surface of the first EL layer, the side surface of the second EL layer, and a top surface of the insulating layer. A width of the insulating layer is greater than or equal to 2 times and less than or equal to 4 times that of a distance between the first pixel electrode and the second pixel electrode.
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
A semiconductor device with favorable electrical characteristics is provided. Alternatively, a transistor in which the breakdown voltage of a gate insulating layer is high is provided. In the semiconductor device, a first conductive layer and a second conductive layer positioned at different levels with a first insulating layer therebetween are one and the other of a source electrode and a drain electrode of a first transistor. The first insulating layer has a first opening reaching the first conductive layer. The second conductive layer is provided over the first insulating layer. A semiconductor layer includes a first region covering the top surface of the first conductive layer, a second region covering a side surface of the first opening, and a third region covering the top surface of the second conductive layer and overlapping with a gate electrode. A gate insulating layer includes a fourth region provided to face a sidewall of the first opening, a fifth region covering the top surface of the third region, and a sixth region covering the top surface of the second conductive layer and being positioned outward from an end portion of the gate electrode in a top view. The thickness of the fifth region is larger than the thickness of the fourth region and the thickness of the sixth region.
A display device with both high display quality and high resolution is provided. The display device includes a light-emitting element and a connection portion. The connection portion is provided along an outer periphery of a display region where the light-emitting element is provided. The light-emitting element includes a pixel electrode, a first EL layer over the pixel electrode, a second EL layer over the first EL layer, and a common electrode over the second EL layer. The connection portion includes a connection electrode, a second EL layer over the connection electrode, and the common electrode over the second EL layer. The second EL layer includes a first region in contact with the connection electrode and a second region in contact with the common electrode. The area of a region where the first region and the second region overlap with each other in a top view is greater than or equal to 40000 square micrometers. The second EL layer includes a region where the film thickness is greater than or equal to 0.5 nm and less than or equal to 1.5 nm. The second EL layer contains a substance with a high electron-injection property.
H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
A semiconductor device that can be miniaturized or highly integrated is to be provided. The semiconductor device includes a first conductor and a second conductor that are over an oxide and separated from each other; a third conductor in contact with a part of a top surface of the first conductor; a fourth conductor in contact with a part of a top surface of the second conductor; a first insulator that is positioned over the third conductor and the fourth conductor and has an opening overlapping with a region between the third conductor and the fourth conductor; a second insulator that is positioned in the opening of the first insulator and in contact with another part of the top surface of the first conductor, another part of the top surface of the second conductor, a side surface of the third conductor, and a side surface of the fourth conductor; a third insulator that is in contact with a top surface of the oxide, a side surface of the first conductor, a side surface of the second conductor, and a side surface of the second insulator; and a fifth conductor that is positioned over the third insulator. A distance between the first conductor and the second conductor is smaller than a distance between the third conductor and the fourth conductor. The second insulator includes a first layer and a second layer over the first layer. The first layer includes a nitride insulator, and the second layer includes an oxide insulator.
H10D 80/30 - Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups , e.g. assemblies comprising integrated circuit processor chips
A novel data processing system comprising a first component, a second component, and a third component is provided. The first component receives a document, prior art literature, and a scope of claims and transmits them to the third component; the second component performs processing with a large language model; and the third component shares the received data and creates prompts. The third component has a function of creating and executing a prompt chain and a function of creating an annotated document. The system is configured to find a description related to the scope of claims in the prior art literature and a description related to the description in the prior art literature from the document. The system is configured to attach an annotation to a position of the description in the document.
An electronic device that enables smooth communication is provided. The electronic device includes a display portion including a first camera; a second camera; and an image processing portion. The second camera is positioned in a region not overlapping with the display portion. The first camera has a function of generating a first image of a subject, and the second camera has a function of generating a second image of the subject. The image processing portion includes a generator that performs learning using training data. The training data includes an image including a person's face. The image processing portion has a function of making the first image clear when the first image is input to the generator and a function of tracking the gaze of the subject on the basis of the second image.
An object is to provide a light-emitting display device in which a pixel including a thin film transistor using an oxide semiconductor has a high aperture ratio. The light-emitting display device includes a plurality of pixels each including a thin film transistor and a light-emitting element. The pixel is electrically connected to a first wiring functioning as a scan line. The thin film transistor includes an oxide semiconductor layer over the first wiring with a gate insulating film therebetween. The oxide semiconductor layer is extended beyond the edge of a region where the first wiring is provided. The light-emitting element and the oxide semiconductor layer overlap with each other.
H10H 20/817 - Bodies characterised by the crystal structures or orientations, e.g. polycrystalline, amorphous or porous
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor, a capacitor, and a first insulating layer. The first insulating layer is provided over a first conductive layer and a second conductive layer and includes a first opening reaching the first conductive layer and a second opening reaching the second conductive layer. The transistor is a vertical transistor in which a channel formation region is provided along the side wall of the first opening. The capacitor is a vertical capacitor in which a pair of electrodes and a dielectric are provided along the side surface of the second opening.
A display device that has a function of emitting visible light and infrared light and a function of detecting light. The display device is a display device including a first light-emitting device, a second light-emitting device, and a light-receiving device, in a display portion. The first light-emitting device includes a first pixel electrode, a first optical adjustment layer, a first light-emitting layer, a second light-emitting layer, and a common electrode. The second light-emitting device includes a second pixel electrode, a second optical adjustment layer, the first light-emitting layer, the second light-emitting layer, and the common electrode. The light-receiving device includes a third pixel electrode, an active layer, and the common electrode. The active layer includes an organic compound. The first light-emitting device emits infrared light emitted by the first light-emitting layer. The second light-emitting device emits visible light emitted by the second light-emitting layer. The light-receiving device has a function of absorbing at least part of visible light and infrared light.
A semiconductor device with less variation in transistor characteristics is provided. The semiconductor device includes a semiconductor film, a pair of blocking films over the semiconductor film, and an insulating film provided over the semiconductor film and between the pair of blocking films. The semiconductor film includes a pair of n-type regions and an i-type region provided between the pair of n-type regions. The n-type regions overlap with the blocking films. The i-type region overlaps with the insulating film.
Provided is a wireless power receiving device reduced in size, thickness, or weight. A vehicle comprises the wireless power receiving device. The wireless power receiving device is disposed at a bottom portion of a vehicle body of the vehicle and comprises a power receiving coil unit and a lifting/lowering device. The lifting/lowering device comprises a wire and a motor, the motor being fixed to the bottom portion of the vehicle body. The power receiving coil unit is connected to the motor via the wire, and is raised and lowered by rotation of the motor.
H02J 50/90 - Circuit arrangements or systems for wireless supply or distribution of electric power involving detection or optimisation of position, e.g. alignment
A semiconductor device with high storage capacity and low power consumption is provided. The semiconductor device includes first to third conductors, first and second transistors, and an MTJ element. The MTJ element includes a free layer and a fixed layer. In the semiconductor device, the first conductor, the second conductor, the free layer, the fixed layer, the first and second transistors, and the third conductor are provided in this order from the bottom. In particular, in a plan view, the third conductor is positioned in a region overlapping with the first conductor. The first conductor is electrically connected to the second conductor, and the second conductor is electrically connected to the free layer and a first terminal of the first transistor. The fixed layer is electrically connected to a first terminal of the second transistor, and a second terminal of the first transistor is electrically connected to a second terminal of the second transistor and the third conductor. The first transistor and the second transistor each include a metal oxide in a channel formation region.
G11C 11/16 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes a first transistor, a first FTJ element, and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element and an input terminal of the second FTJ element. In data writing, polarization is caused in each of the first FTJ element and the second FTJ element in accordance with the data. In data reading, voltage with which the polarization does not change is applied between the output terminal of the first FTJ element and the input terminal of the second FTJ element. At this time, the first transistor is turned on, whereby a differential current between current flowing through the first FTJ element and current flowing through the second FTJ element flows through the first transistor. Obtaining the differential current using a read circuit or the like enables the data written to the first FTJ element and the second FTJ element to be read.
A driver circuit includes a circuit 200, a transistor 101_1, and a transistor 101_2. A signal is selectively input from the circuit 200 to a gate of the transistor 101_1 and the transistor 101_2, so that the transistor 101_1 and the transistor 101_2 are controlled to be on or off. The transistor 101_1 and the transistor 101_2 are turned on or off; thus, the wiring 112 and the wiring 111 become conducting or non-conducting.
G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
H10D 62/80 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
A display device that has high display quality is provided. A highly reliable display device is provided. A display device with low power consumption is provided and a display device that can easily achieve a higher resolution is provided. A display device with both high display quality and a high resolution is provided. A display device with high contrast is provided. The display device includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a first transistor including silicon in a channel formation region. The second layer includes a second transistor including a metal oxide in a channel formation region. The third layer includes a first light-emitting element, a second light-emitting element, a third light-emitting element, an EL layer including a light-emitting layer exhibiting white light, a first coloring layer over the first light-emitting element, a second coloring layer over the second light-emitting element, and a third coloring layer over the third light-emitting element. Crosstalk is not observed between the second light-emitting element and the third light-emitting element.
H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
A light-emitting device with high emission efficiency and low driving voltage is provided. A light-emitting apparatus, an electronic device, and a lighting device with low power consumption are provided. The following organic compound is provided: the organic compound has an arylamine structure; and when the organic compound is deposited to be a film, the ordinary refractive index of the deposited film with respect to light with a wavelength of 458 nm is greater than or equal to 1.50 and less than or equal to 1.75, the birefringence Δn of the deposited film with respect to light with a wavelength of 458 nm is greater than or equal to 0 and less than or equal to 0.008, or the alignment order parameter of the deposited film with respect to light with a wavelength corresponding to the longest wavelength where an absorption peak appears in the absorption spectrum is greater than or equal to −0.07 and less than or equal to 0.00.
H10K 85/60 - Organic compounds having low molecular weight
C07C 211/61 - Compounds containing amino groups bound to a carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings of the carbon skeleton having amino groups bound to carbon atoms of six-membered aromatic rings being part of condensed ring systems of the carbon skeleton with at least one of the condensed ring systems formed by three or more rings
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and an insulator; the insulator is provided over one of a source and a drain of the transistor; the other of the source and the drain of the transistor is provided over the insulator; an opening portion reaching one of the source and the drain is provided in the insulator and the other of the source and the drain; an oxide semiconductor included in the transistor is in contact with a top surface of one of the source and the drain, a side surface of the insulator, and a side surface of the other of the source and the drain that are in the opening portion; a gate insulator of the transistor is provided over the oxide semiconductor; a gate of the transistor is provided over the gate insulator; the oxide semiconductor includes a first region in contact with one of the source and the drain, a second region in contact with the insulator, and a third region in contact with the other of the source and the drain; the first and third regions have lower resistance than the second region; and the second region has a lower potential than the first and third regions.
Provided is a semiconductor device comprising micro-sized transistors. The semiconductor device comprises two vertical transistors (a first transistor and a second transistor) and a first insulating layer. The first transistor is a n-channel transistor, and the second transistor is a p-channel transistor. The first insulating layer has a groove portion. A first semiconductor layer functioning as a channel formation region of the first transistor is provided on one side surface of the groove portion, and a second semiconductor layer functioning as a channel formation region of the second transistor is provided on the other side surface of the groove portion. On the first semiconductor layer and the second semiconductor layer, a gate insulating layer and a gate electrode for the two transistors are provided in this order. The source electrodes or the drain electrodes of the two transistors are connected to each other. The two transistors share the gate insulating layer and the gate electrode.
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Provided is a novel semiconductor device. This semiconductor device comprises a first storage circuit including a flip-flop circuit, and a second storage circuit including first to third transistors and a storage element. A first terminal of the first transistor is electrically connected to a first terminal of the first storage circuit. A second terminal of the first transistor is electrically connected to a first terminal of the second transistor and a first terminal of the storage element. A second terminal of the second transistor is electrically connected to a first terminal of the third transistor and a second terminal of the first storage circuit. A magnetic tunnel junction element is used as the storage element.
H10B 61/00 - Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
G11C 14/00 - Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
A conversation device having high security is provided. The conversation device includes a reception unit, a processing unit, and a presentation unit. The reception unit has a function of receiving input information showing a user's instruction in a conversation. The processing unit has a function of performing processing using the monitoring model and a function of performing processing using the conversational model. The processing unit has a function of determining whether or not to transmit the input information to the conversational model, on the basis of the input information with the use of the monitoring model. In the case where the monitoring model transmits the input information to the conversational model, the processing unit has a function of generating output information on the basis of the input information with the use of the conversational model. The output information can show a response in a conversation. The presentation unit has a function of presenting the output information and a function of presenting error information showing that the output information is not presented. The conversational model is a language model, which is a different type of model from the monitoring model.
A semiconductor device with high display quality is provided. The semiconductor device includes first to eighth transistors, first to third capacitors, and a light-emitting device. A first terminal of the first transistor is connected to a first terminal of the third transistor and a first terminal of the sixth transistor; a gate of the first transistor is connected to a first terminal of the first capacitor and a first terminal of the eighth transistor; a second terminal of the sixth transistor is connected to a first terminal of the seventh transistor and an anode of the light-emitting device; and a second terminal of the third transistor is connected to a second terminal of the eighth transistor and a first terminal of the fourth transistor. A second terminal of the first capacitor is connected to a first terminal of the second transistor, a first terminal of the fifth transistor, a first terminal of the second capacitor, and a first terminal of the third capacitor.
H10H 29/32 - Active-matrix LED displays characterised by the geometry or arrangement of elements within a subpixel, e.g. arrangement of the transistor within its RGB subpixel
G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.
A novel display panel that is highly convenient or reliable is provided. The display panel includes a first pixel; the first pixel includes a first display element, a first color conversion layer, and a first absorption layer; the first display element emits first light; the first absorption layer overlaps with the first display element; and the first absorption layer absorbs the first light. Furthermore, the first color conversion layer is sandwiched between the first display element and the first absorption layer; the first color conversion layer converts the first light into second light; and the second light has a spectrum including a high proportion of light with a long wavelength compared with the first light.
G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
A semiconductor device having favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a first transistor, a second transistor, a first insulating layer, and a second insulating layer. The first transistor includes a first semiconductor layer, a first gate insulating layer, and a first gate electrode. The first semiconductor layer includes a metal oxide. The second transistor includes a second semiconductor layer, a second gate insulating layer, and a second gate electrode. The second semiconductor layer includes crystalline silicon. The first insulating layer includes a region overlapping with the first transistor with the second insulating layer therebetween. The second insulating layer includes a region overlapping with the second transistor with the first insulating layer therebetween. The second insulating layer has higher film density than the first insulating layer.
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
A high-resolution display device with reduced display unevenness is provided. In the display device, a plurality of pixels are included over a substrate; each of the plurality of pixels includes a transistor and a light-emitting element; the light-emitting element includes a first electrode, an EL layer over the first electrode, and a second electrode over the EL layer; the first electrode is electrically connected to the transistor; in the plurality of pixels, the first electrodes in adjacent pixels are separated by an insulating layer; the second electrode includes a conductive material having light-transmitting property with respect to visible light; the second electrode of each of the plurality of pixels is shared; and light is emitted from the second electrode side. A wiring is included; in a plane view with respect to the substrate, the wiring is placed in a region where the EL layer is not placed; and the second electrode is placed over and in contact with the wiring.
A memory device with few transistor manufacturing steps is provided. Each of a first selection transistor, a cell transistor, and a second selection transistor included in a memory string includes a cylindrical structure body. The structure body includes an oxide semiconductor, an insulator, and a conductor concentrically in an inward direction from a side surface. In the memory string, the transistors can be arranged in the lateral direction, and the first selection transistor and the second selection transistor can be formed in the same step. Accordingly, the number of transistor manufacturing steps can be reduced.
H10B 43/35 - EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
H10B 43/27 - EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
67.
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
Provided is a semiconductor device comprising a transistor having a large on-current. The semiconductor device comprises a semiconductor layer, a first electrically conductive layer, a second electrically conductive layer, a third electrically conductive layer, a first insulation layer, and a second insulation layer. The first insulating layer has a first opening reaching the first conductive layer. The semiconductor layer includes a metal oxide and is in contact with an upper surface and a side surface of the first insulating layer and with an upper surface of the first conductive layer. The second conductive layer has a region in contact with the upper surface of the semiconductor layer, and a second opening overlapping the first opening. The lower surface end of the second opening of the second conductive layer coincides with, or is positioned further inside of, the upper surface end of the second opening side of the semiconductor layer. The second insulating layer is provided on the semiconductor layer and the second conductive layer so as to have a region located inside the first opening and a region located inside the second opening. The third conductive layer is provided on the second insulating layer so as to have a region located inside the first opening.
G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Provided is a secondary battery or an electrolyte solution that exhibits excellent battery characteristics below zero. The secondary battery has an electrolyte solution, wherein: the electrolyte solution has a first organic compound, a second organic compound, and a lithium salt; the electrolyte solution has a freezing point of lower than -30°C; the lithium salt has LiPF6; the lithium ion coordination energy of the first organic compound or the lithium ion coordination energy of the second organic compound is -35[kJ/mol] or less; and the difference between the lithium ion coordination energy of the first organic compound and the lithium ion coordination energy of the second organic compound is 5 [kJ/mol] or less.
Provided is a semiconductor device which has good electrical characteristics. The semiconductor device comprises: an oxide semiconductor; a first conductor and a second conductor which are located on the oxide semiconductor; a third conductor which is in contact with the upper surface of the first conductor; a fourth conductor which is in contact with the upper surface of the second conductor; a first insulator which is disposed on the third conductor and the fourth conductor and has an opening in a region between the third conductor and the fourth conductor; a second insulator which is disposed on the oxide semiconductor in the opening; and a fifth conductor which is disposed on the second insulator in the opening. The oxide semiconductor contains indium. The first conductor and the second conductor each contain a conductive oxide. The sum of the contact resistance between the first conductor and the oxide semiconductor and the contact resistance between the second conductor and the oxide semiconductor is equal to or less than 2 × 104 Ω.
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
70.
METHOD FOR FORMING METAL OXIDE, AND SEMICONDUCTOR DEVICE
Provided is a semiconductor device having good electrical properties. This method for forming a metal oxide includes: a first step for forming, on an insulator, an island-shaped first layer having crystals; a second step for forming a metal oxide covering the first layer; a third step for processing the metal oxide into an island shape; and a fourth step for crystallizing the metal oxide. In the third step, the island-shaped metal oxide has a first region, a second region, and a third region. The first region is in contact with the first layer. The second region is adjacent to the first region and is located between the first region and the third region. In a plan view, the width of the third region along a first direction is narrower than the width of the second region along the first direction. The third step is performed at a temperature lower than the temperature of the fourth step.
H10D 84/80 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
Provided is a semiconductor device that has excellent electrical properties. This semiconductor device comprises a metal oxide layer, a gate insulating layer on the metal oxide layer, and a gate electrode on the gate insulating layer. The metal oxide layer has a first portion and a second portion on the first portion. The value of the potential barrier of the second portion is lower than the value of the potential barrier of the first portion. The value of the potential barrier of the second portion is at least 0 meV and less than 7 meV. The first portion includes a first element. The first element is at least one of gallium and aluminum.
C23C 16/22 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
C23C 16/455 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into the reaction chamber or for modifying gas flows in the reaction chamber
H10D 84/83 - Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups or , e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
H10D 87/00 - Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
An electronic device with good visibility of display is provided. The electronic device includes a reflective liquid crystal display device for displaying information, and part of external light taken into the electronic device can be supplied to the reflective liquid crystal display device to be used as a light source of display light. Thus, the visibility of display can be increased even when external light is intense. Furthermore, since external light is utilized for display, power consumption can be reduced compared with a transmissive liquid crystal display device that constantly uses a light source, a self-luminous organic EL display device, and the like.
After first and second documents are received, a text generation language model generates a summary sentence of the second document. A difference presentation language model presents a difference in the first document from the summary sentence. When the difference is not appropriate, the difference presentation language model is made to present a difference again on the basis of a first instruction document created by a user. When the difference is appropriate, the difference presentation language model is made to confirm that the difference is absent in the second document. The difference presentation language model is fine-tuned using a plurality of data points each including an order sentence, two learning texts, and a learning response sentence. Among the plurality of data points, some of the learning response sentences show the absence of a difference between the two learning texts, and the rest show a difference between the two learning texts.
A light-emitting device with high resistance to heat in a fabrication process is provided. The light-emitting device includes an EL layer between an anode and a cathode. The EL layer includes at least a light-emitting layer and an electron-transport layer that includes a first electron-transport layer in contact with the light-emitting layer and a second electron-transport layer in contact with the first electron-transport layer. The first electron-transport layer includes a first heteroaromatic compound including at least one heteroaromatic ring. The second electron-transport layer includes a second heteroaromatic compound that includes at least one heteroaromatic ring and is different from the first heteroaromatic compound. The first heteroaromatic compound has a difference of 20° C. or less between the crystallization temperature (Tpc) of a powder state and the crystallization temperature (Ttc) of a thin film state. The second heteroaromatic compound has a difference of 100° C. or less between Tpc and Ttc.
C07D 401/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, at least one ring being a six-membered ring with only one nitrogen atom containing three or more hetero rings
C07D 403/10 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing two hetero rings linked by a carbon chain containing aromatic rings
C07D 403/14 - Heterocyclic compounds containing two or more hetero rings, having nitrogen atoms as the only ring hetero atoms, not provided for by group containing three or more hetero rings
C07D 409/10 - Heterocyclic compounds containing two or more hetero rings, at least one ring having sulfur atoms as the only ring hetero atoms containing two hetero rings linked by a carbon chain containing aromatic rings
C07D 491/048 - Ortho-condensed systems with only one oxygen atom as ring hetero atom in the oxygen-containing ring the oxygen-containing ring being five-membered
C07D 519/00 - Heterocyclic compounds containing more than one system of two or more relevant hetero rings condensed among themselves or condensed with a common carbocyclic ring system not provided for in groups or
Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that consumes low power. Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that is highly integrated. The power storage system includes a secondary battery and a measurement circuit; the measurement circuit includes a resistor, a capacitor, and an inductor; one terminal of the resistor is electrically connected to one electrode of the capacitor; the other terminal of the resistor is electrically connected to one terminal of the inductor; one terminal of the inductor is electrically connected to a positive electrode of the secondary battery; and the measurement circuit has a function of measuring impedance of the secondary battery by measuring current of the resistor.
G01R 31/389 - Measuring internal impedance, internal conductance or related variables
H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
A multifunctional display apparatus or electronic device is provided. An electronic device that can switch between VR display and AR display is provided. The electronic device includes a first display apparatus, a second display apparatus, a lens, a screen, a wearing tool, and a housing. The wearing tool has a function of fixing the housing to a head. The housing has a function of being transformed into a first mode that closes to block view and a second mode that opens to allow a front side to be viewed. The electronic device has a function of providing a first image displayed on the first display apparatus through the lens and the screen in the first mode, and a function of providing a second image projected to the screen from the second display apparatus in the second mode.
A positive electrode active material with a small decrease in discharging capacity in charging and discharging cycles is provided. The positive electrode active material contains cobalt, nickel, and oxygen. The proportion of nickel in the sum of the cobalt and the nickel, Ni/(Co+Ni), is greater than 0.175 and less than or equal to 0.215. When the positive electrode active material in a state of being charged to 4.5 V (vs. Li/Li+) is analyzed by powder X-ray diffraction using CuKα1 radiation, diffraction peaks are observed at at least two or more of 2θ±18.526±0.1°, 2θ=37.391±0.1°, 2θ=37.628±0.1°, 2θ=39.015±0.1°, 2θ=44.947±0.1°, 2θ=49.029±0.1°, and 2θ=58.857±0.1°.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
B60L 50/64 - Constructional details of batteries specially adapted for electric vehicles
C01G 53/42 - Complex oxides containing nickel and at least one other metal element containing alkali metals, e.g. LiNiO2
01 - Chemical and biological materials for industrial, scientific and agricultural use
09 - Scientific and electric apparatus and instruments
42 - Scientific, technological and industrial services, research and design
Goods & Services
Chemicals; chemical elements; oxides; aromatics [chemicals];
organic halogenides; nitrogen compounds; heterocyclic
compounds; chemicals for fabricating semiconductors;
chemicals used as raw materials for semiconductor elements;
chemical agents for forming electrodes; chemicals used as
raw materials for electrodes; chemicals used as raw
materials for electrode of secondary batteries; chemicals
for industrial purposes or manufacturing process; metallic
oxides for industrial purposes; non-metallic oxides for
industrial purposes; chemical agents for forming insulators;
chemicals used as raw materials for insulators; chemicals
used as raw materials for electroluminescence (EL) elements;
ionic liquids for secondary batteries. Solar batteries; batteries; storage batteries; lithium ion
secondary batteries; telecommunication machines and
apparatus; semiconductor elements; electronic circuits;
liquid crystal displays; liquid crystal display panels;
displays using organic electroluminescence (EL) elements;
memory chips; memory modules; semiconductor memories;
computer memory devices; flash memory cards; semiconductor
integrated circuits including CPUs; semiconductor chips for
image processing; programmable semiconductor chips;
semiconductor elements for image sensors; digital cameras
and accessories or parts thereof; digital video cameras and
accessories thereof; CMOS cameras; CCD cameras; touch
panels; measuring machines, apparatus, and accessories or
parts thereof; photographic machines, apparatus, and
accessories thereof; cinematographic machines and apparatus;
electrodes for electronic components or semiconductor
elements; electrodes for lithium ion secondary batteries;
electrodes and parts thereof; on-board liquid crystal
display devices; on-board visual display units; on-board
organic electroluminescence (EL) display devices; mobile
phones; smartphones; television apparatus; sound
reproduction apparatus; computers and computer peripheral
devices; notebook computers; laptop computers; tablet
computers; personal computers; microcomputers; other
computers; computer monitors; touch panels for computers;
electronic tags; integrated circuit cards (smart cards);
card readers for integrated circuit cards or magnetic cards;
card writers for integrated circuit cards or magnetic card;
radio transmitters and receivers; digital data memory
devices; optical machines and apparatus; video telephones;
telecommunication machines and apparatus for video telephone
system; coin counting or coin sorting machines; photo copy
machines; electronic calculators; electronic desk
calculators; voting machines; flat panel display screens;
head mounted displays; random access memory (RAM) cards;
memory card readers and memory card writers; data memory
devices; semiconductor memory devices; storage mediums
recorded with computer programs; computer data storage
mediums; electronic circuits (not including those recorded
with computer programs); graphic boards; computer keyboards;
motherboards; electronic circuit boards; computer hardware;
computer hard disks; solid state drives; liquid crystal
displays with touch sensor function; organic EL displays
with touch sensor function; navigation devices; display
devices for car navigation systems; personal digital
assistants in the shape of a watch; mobile computers in the
shape of a watch; smartphones in the shape of a watch;
electronic publications; portable terminals for displaying
electronic publications; electronic control systems for
automobiles; measuring machines and apparatus for detecting
information relating to automobiles; electronic calculator
programs; applications for computer software (commercially
available and downloadable via telecommunications lines);
computer software (recorded); magnetic cards with recorded
computer programs; computer programs (recorded); computer
programs (commercially available and downloadable via
telecommunications lines); computer software for cloud
computing; downloadable software for cloud computing;
downloadable computer programs and downloadable computer
software for artificially generating human voice and text;
downloadable computer programs and downloadable computer
software for processing, generating, understanding, and
analyzing natural language; downloadable computer programs
and downloadable computer software for machine
learning-based language and speech processing software;
downloadable computer chatbot software for simulating
conversations; downloadable computer programs and
downloadable computer software for creating and generating
text. Technical research; testing, research, and development in
the field of chemistry; testing, research, and development
relating to science; testing, research, and development
relating to machines and apparatus; testing, research, and
development of metal materials; testing, research, and
development in the fields of material science and electrical
engineering; testing, research, and development relating to
electricity; testing, research, and development relating to
telecommunication machines and apparatus; testing, research,
and development relating to electronic circuits,
semiconductor elements, integrated circuits, and large-scale
integrated circuits; testing, research, and development
relating to semiconductors; testing, research, and
development relating to metal oxides, semiconductors, and
telecommunication machines and apparatus; providing
technical research information relating to manufacture and
processing of metal oxides, semiconductors, and
telecommunication machines and apparatus; testing,
investigation, or research relating to science; providing
information on testing, investigation, or research relating
to science; industrial development; providing information
relating to technical research; providing information and
data relating to scientific and technical research and
development; providing scientific and technical information;
technical consultancy relating to product development;
design of electronic circuits, semiconductor elements,
integrated circuits, and large-scale integrated circuits;
providing consultancy or information relating to design of
electronic circuits, semiconductor power elements,
integrated circuits, and large-scale integrated circuits;
design, coding, or maintenance of electronic calculator
programs; providing electronic calculator programs;
maintenance of computer software; design of computer
software; consultancy relating to design, coding, or
maintenance of computer software; technological advice
relating to computers, automobiles and industrial machines;
leasing computer software; installing computer programs;
providing application software by online (SaaS); updating
computer software; providing computer software for cloud
computing; design, coding, or maintenance of operating
software for accessing and using cloud computing network;
leasing operating software for accessing and using cloud
computing network; design and development of operating
software for accessing and using cloud computing network;
providing online non-downloadable computer software for
artificially generating human voice and text; providing
online non-downloadable computer software for processing,
generating, understanding, and analyzing natural language;
providing online non-downloadable computer software for
machine learning-based language and speech processing
software; providing online non-downloadable computer chatbot
software for simulating conversations; providing online
non-downloadable computer software for creating and
generating text; research and development in the field of
artificial intelligence; research, design, and development
of computer programs and computer software.
A light-emitting device having favorable characteristics and a wide range of material choices. The light-emitting device includes an anode over an insulating surface, a cathode opposite to the anode, and a first electron-transport layer and a second electron-transport layer which are between the anode and the cathode. The first electron-transport layer and the second electron-transport layer are in contact with each other. The second electron-transport layer and the cathode are in contact with each other. The GSP_Slope (mV/nm) of an evaporated film of a material included in the second electron-transport layer is larger than the GSP_Slope (mV/nm) of an evaporated film of a material included in the first electron-transport layer. The thickness of the second electron-transport layer is greater than 0 nm and less than 10 nm. The GSP_Slope (mV/nm) is represented by ΔV/Δd, where ΔV (mV) is an amount of change in a surface potential with respect to an amount of change in a thickness Δd (nm).
To increase emission efficiency of a fluorescent light-emitting element by efficiently utilizing a triplet exciton generated in a light-emitting layer. The light-emitting layer of the light-emitting element includes at least a host material and a guest material. The triplet exciton generated from the host material in the light-emitting layer is changed to a singlet exciton by triplet-triplet annihilation (TTA). The guest material (fluorescent dopant) is made to emit light by energy transfer from the singlet exciton. Thus, the emission efficiency of the light-emitting element is improved.
A novel semiconductor device is provided. The semiconductor device includes a memory cell including a transistor and a capacitor that includes a ferroelectric; a word line; a bit line; and a plate line. A gate of the transistor is electrically connected to the word line. One of a source and a drain of the transistor is electrically connected to the bit line. The other of the source and the drain of the transistor is electrically connected to one electrode of the capacitor. The other electrode of the capacitor is electrically connected to the plate line. The semiconductor device has a function of supplying a potential that controls an on state or an off state of the transistor to the word line, a function of supplying a first potential or a second potential to the bit line, and a function of supplying a third potential, a fourth potential, or a fifth potential to the plate line.
G11C 11/22 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using ferroelectric elements
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
H10D 1/68 - Capacitors having no potential barriers
Provided is a light-emitting element with high external quantum efficiency and a low drive voltage. The light-emitting element includes a light-emitting layer which contains a phosphorescent compound and a material exhibiting thermally activated delayed fluorescence between a pair of electrodes, wherein a peak of a fluorescence spectrum and/or a peak of a phosphorescence spectrum of the material exhibiting thermally activated delayed fluorescence overlap(s) with a lowest-energy-side absorption band in an absorption spectrum of the phosphorescent compound, and wherein the phosphorescent compound exhibits phosphorescence in the light-emitting layer by voltage application between the pair of electrodes.
Provided is a semiconductor device including a transistor having high saturation. The semiconductor device is provided with a vertical transistor including a back gate electrode. In the semiconductor device, a lower electrode, a spacer, and an upper electrode are provided in this order. The spacer includes a first opening portion reaching the lower electrode, and the upper electrode includes a second opening portion including a region overlapping with the first opening portion. The back gate electrode is provided in the first opening portion and includes a region in contact with the lower electrode. A back gate insulating layer, a semiconductor layer, a gate insulating layer, and a gate electrode are provided in this order to cover the back gate electrode. After the formation of the first opening portion and the second opening portion, a conductive film is formed to cover the first opening portion and is subjected to anisotropic etching, whereby the back gate electrode can be formed. An insulating film is formed to cover the back gate electrode and is subjected to anisotropic etching, whereby the back gate insulating layer can be formed.
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
H10K 59/123 - Connection of the pixel electrodes to the thin film transistors [TFT]
H10K 65/00 - Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element and at least one organic radiation-sensitive element, e.g. organic opto-couplers
84.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE
A transistor with low parasitic capacitance is provided. A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a transistor whose source electrode and drain electrode are positioned at different levels and an insulating layer provided between the source electrode and the drain electrode; the insulating layer includes a first opening reaching one of the source electrode and the drain electrode; the other of the source electrode and the drain electrode is provided over the insulating layer and includes a second opening overlapping with the first opening; a semiconductor layer includes a region provided in the first opening; a gate insulating layer and a gate electrode are provided in this order over the semiconductor layer; the gate electrode has a two-layer structure; the end portion of the lower layer of the gate electrode overlaps with the other of the source electrode and the drain electrode; the upper layer of the gate electrode includes a first region extending outward from the end portion of the lower layer; and a gap is provided between the first region and the other of the source electrode and the drain electrode.
A transistor with small parasitic capacitance is provided. A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a first conductive layer, a second conductive layer, a third conductive layer, an oxide semiconductor layer, a first insulating layer, and a second insulating layer. The first insulating layer is positioned over the first conductive layer. The second conductive layer is positioned over the first insulating layer. The first insulating layer and the second conductive layer have an opening reaching the first conductive layer. In the opening, the oxide semiconductor layer is in contact with at least the top surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer. The second insulating layer is positioned over the oxide semiconductor layer in the opening. The third conductive layer overlaps with the oxide semiconductor layer with the second insulating layer therebetween in the opening. In a cross-sectional view, the width of the third conductive layer is smaller than or equal to the width of the opening in the second conductive layer.
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 53/10 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the top-view layout
H10B 53/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
H10B 53/40 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the peripheral circuit region
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
H10K 59/123 - Connection of the pixel electrodes to the thin film transistors [TFT]
H10K 59/124 - Insulating layers formed between TFT elements and OLED elements
H10K 59/131 - Interconnections, e.g. wiring lines or terminals
A novel semiconductor device is provided. A power management portion and a data retention portion are provided in a first layer; a setting information retention portion, a power switch portion, and a backup portion are provided in a second layer over the first layer; the data retention portion has a function of retaining data; the power management portion has a function of supplying an instruction for controlling power gating to the power switch portion and supplying, to the setting information retention portion, setting information indicating whether to block power supply to the data retention portion by the power gating; the setting information retention portion has a function of retaining the setting information supplied from the power management portion; the power switch portion has a function of switching whether to block power supply to the data retention portion on the basis of the instruction and the setting information retained in the setting information retention portion; and the backup portion has a function of storing and retaining the data on the basis of a signal supplied from the power management portion.
G11C 11/417 - Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
G11C 11/4074 - Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
H10D 1/68 - Capacitors having no potential barriers
H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
H10D 86/80 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
A novel light-emitting device which is highly convenient, useful, or reliable can be provided. The light-emitting device includes a first electrode, a second electrode, a first unit, and a first layer. The second electrode overlaps with the first electrode, the second electrode contains a metal atom, and the second electrode contains a carbon atom at a predetermined concentration. The first unit is sandwiched between the first electrode and the second electrode, and the first unit contains a first light-emitting material. The first layer is sandwiched between the second electrode and the first unit, the first layer contains the first organic compound and the second organic compound, the first organic compound has an acid dissociation constant pKa larger than or equal to 8, and the second organic compound has a polarization term δp smaller than or equal to a predetermined value in the solubility parameter δ.
A novel semiconductor device is provided. The semiconductor device includes a first conductive layer, a first insulating layer over the first conductive layer, a second conductive layer over the first insulating layer, a first semiconductor layer, a second insulating layer over the first semiconductor layer, a third insulating layer over the second insulating layer, and a third conductive layer over the third insulating layer. An opening portion reaching the first conductive layer is provided in the first insulating layer and the second conductive layer. In the opening portion, the first semiconductor layer includes a region in contact with the top surface of the first conductive layer, a region in contact with a side surface of the first insulating layer, and a region in contact with a side surface of the second conductive layer. The second insulating layer has a barrier property against oxygen. The third insulating layer is a ferroelectric containing hafnium, zirconium, at least one of the Group 3 elements in the periodic table, and oxygen, and the content percentage of at least one of the Group 3 elements in the periodic table in the third insulating layer is higher than or equal to 0.1 atomic % and lower than or equal to 5 atomic %.
H10B 53/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
H10B 12/00 - Dynamic random access memory [DRAM] devices
H10B 53/20 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the three-dimensional arrangements, e.g. with cells on different height levels
H10D 1/68 - Capacitors having no potential barriers
H10D 30/69 - IGFETs having charge trapping gate insulators, e.g. MNOS transistors
H10D 64/68 - Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
A semiconductor device with a novel structure is provided. First to third element layers are included. The second element layer is stacked over the first element layer. The third element layer is stacked over the second element layer. A first storage portion is provided in the second element layer. A second storage portion is provided in the third element layer. The first element layer includes a first sense amplifier circuit portion electrically connected to the first storage portion, and a second sense amplifier circuit portion electrically connected to the second storage portion. The first sense amplifier circuit portion and the second sense amplifier circuit portion each include a first transistor including a first semiconductor layer including silicon in a channel formation region. The first storage portion includes a second transistor including a second semiconductor layer including an oxide semiconductor in a channel formation region. The second storage portion includes a third transistor including a third semiconductor layer including an oxide semiconductor in a channel formation region. The third element layer provided with the second storage portion is provided by stacking a plurality of element layers.
H10B 12/00 - Dynamic random access memory [DRAM] devices
G11C 11/405 - Digital stores characterised by the use of particular electric or magnetic storage elementsStorage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
G11C 11/4091 - Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
90.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device that occupies a small area is provided. The semiconductor device includes a first insulating layer, a second insulating layer over the first insulating layer, and a transistor. The transistor includes a semiconductor layer, a third insulating layer, a fourth insulating layer, a gate electrode, a source electrode, and a drain electrode. The source electrode and the drain electrode are provided over the first insulating layer. The second insulating layer has an opening reaching the first insulating layer and overlapping with a part of the source electrode and a part of the drain electrode. The semiconductor layer and the third insulating layer are provided along a perimeter of the opening. The semiconductor layer is provided in contact with a side surface of the second insulating layer in the opening, a top surface of the first insulating layer in the opening, a top surface of the source electrode, and a top surface of the drain electrode. The third insulating layer is positioned over the semiconductor layer. The fourth insulating layer covers the third insulating layer and the semiconductor layer and is in contact with the first insulating layer. The gate electrode overlaps with the opening and is positioned over the fourth insulating layer. At least a part of the semiconductor layer is opposite to the gate electrode with the third insulating layer and the fourth insulating layer therebetween.
The present invention provides positive electrode active material particles that have low lithium ion diffusion resistance. Positive electrode active material particles according to the present invention include lithium, cobalt, oxygen, magnesium, fluorine, nickel, and aluminum. The positive electrode active material particles have O-Mg-F linkages. The positive electrode active material particles have an edge region that includes, in order from the inside to the outside, a region that has a layered rock salt–type crystal structure of the R-3m space group, a region that has a spinel-type crystal structure, and a region that has a rock salt–type crystal structure. It is preferable that surface layer portions of the positive electrode active material particles have O-Mg-F linkages. It is preferable that the percentage of magnesium in O-Mg-F linkages at the surface layer portions as analyzed by XPS be 5%–30%.
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
The present invention provides a display device in which a high definition is easily achieved. The present invention also provides a display device that has a high display quality and a high definition. The present invention additionally provides a display device that has a high contrast. The present invention further provides a display device that is highly reliable. The display device includes an insulating layer, a partition wall on the insulating layer, a pixel electrode, an EL layer on the pixel electrode, and an upper electrode. The insulating layer covers an end of the pixel electrode, a first partition wall includes a first layer and a second layer on the first layer, the upper electrode includes a region in contact with the side surface of the first layer and a region in contact with the upper surface of the EL layer, and an angle formed by the bottom surface of the first layer and the side surface of the first layer is greater than 90 degrees and less than 180 degrees. With respect to a first material included in the insulating layer, a force required for separating a second material included in the first layer is less than 8 N. When the second material and a third material included in the second layer are wet-etched using the same solution, the etching rate for the third material is slower than the etching rate for the second material.
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
Provided is a display device in which high definition is easily achieved. The display device comprises a pixel electrode, an EL layer, an upper electrode, and a partition wall. The partition wall is spaced apart from the pixel electrode in plan view. The EL layer contains a light-emitting compound and is in contact with an upper surface of the pixel electrode. The partition wall is electrically conductive and has a first portion, a second portion, and a third portion from the top. In a cross-sectional view, the width of the third portion is smaller than that of the first portion and larger than that of the second portion. The upper electrode covers the upper surface and an end portion of the EL layer and is in contact with the third portion.
H10K 59/122 - Pixel-defining structures or layers, e.g. banks
G09F 9/00 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
H10K 50/824 - Cathodes combined with auxiliary electrodes
A novel organometallic complex is provided. One embodiment of the present invention provides a novel organometallic complex having a high quantum yield. An Ir complex has a structure including a 1H-naphtho[1,2-d]imidazole skeleton as a ligand and being represented by General Formula (G-1) below. Of Ns included in the 1H-naphtho[1,2-d]imidazole skeleton, N that is not bonded to Ir is bonded to a substituted or unsubstituted aryl group.
A novel organometallic complex is provided. One embodiment of the present invention provides a novel organometallic complex having a high quantum yield. An Ir complex has a structure including a 1H-naphtho[1,2-d]imidazole skeleton as a ligand and being represented by General Formula (G-1) below. Of Ns included in the 1H-naphtho[1,2-d]imidazole skeleton, N that is not bonded to Ir is bonded to a substituted or unsubstituted aryl group.
A novel organometallic complex is provided. One embodiment of the present invention provides a novel organometallic complex having a high quantum yield. An Ir complex has a structure including a 1H-naphtho[1,2-d]imidazole skeleton as a ligand and being represented by General Formula (G-1) below. Of Ns included in the 1H-naphtho[1,2-d]imidazole skeleton, N that is not bonded to Ir is bonded to a substituted or unsubstituted aryl group.
In General Formula (G-1), each of R1 to R10 independently represents any of hydrogen, an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 7 carbon atoms, a substituted or unsubstituted aryl group having 6 to 25 carbon atoms, and an electron-withdrawing group, and Ar represents a substituted or unsubstituted aryl group having 6 to 25 carbon atoms.
A novel organic compound and a light-emitting device using the organic compound are provided. The organic compound is represented by General Formula (G1). In General Formula (G1), Ar1 represents any one of General Formulae (g1-1) to (g1-3). Each of R1 to R8 independently represents hydrogen, an alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, a substituted or unsubstituted aryl group having 6 to 15 carbon atoms, or a substituted or unsubstituted heteroaryl group having 1 to 30 carbon atoms. Any one of R1 to R4 represents General Formula (g2-1) or (g2-2). Each of Ar2 and Ar3 independently represents a substituted or unsubstituted aryl group having 6 to 60 carbon atoms or a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms.
A novel organic compound and a light-emitting device using the organic compound are provided. The organic compound is represented by General Formula (G1). In General Formula (G1), Ar1 represents any one of General Formulae (g1-1) to (g1-3). Each of R1 to R8 independently represents hydrogen, an alkyl group having 1 to 6 carbon atoms, a cycloalkyl group having 3 to 10 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, a substituted or unsubstituted aryl group having 6 to 15 carbon atoms, or a substituted or unsubstituted heteroaryl group having 1 to 30 carbon atoms. Any one of R1 to R4 represents General Formula (g2-1) or (g2-2). Each of Ar2 and Ar3 independently represents a substituted or unsubstituted aryl group having 6 to 60 carbon atoms or a substituted or unsubstituted heteroaryl group having 1 to 60 carbon atoms.
H10K 85/60 - Organic compounds having low molecular weight
C07D 405/10 - Heterocyclic compounds containing both one or more hetero rings having oxygen atoms as the only ring hetero atoms, and one or more rings having nitrogen as the only ring hetero atom containing two hetero rings linked by a carbon chain containing aromatic rings
A touch panel with higher sensing accuracy or higher detection sensitivity is provided. The touch panel includes a first conductive layer, a second conductive layer, a plurality of display elements, and a scan line. In a plan view, the first conductive layer has an outline including a first portion that is linear and parallel to a first direction. In the plan view, the second conductive layer has an outline including a second portion that is linear and parallel to the first direction. The first portion and the second portion face each other. The display element is in a position not overlapping with the first conductive layer nor the second conductive layer. The scan line has a portion extending in a second direction. An angle between the first direction and the second direction is greater than or equal to 30° and less than or equal to 60°.
A display device capable of displaying high-quality images can be provided. A display device includes a first light-emitting element, a second light-emitting element, a first protective layer, a second protective layer, and a gap. The first light-emitting element includes a first lower electrode, a first EL layer over the first lower electrode, a first upper electrode over the first EL layer, and the second light-emitting element includes a second lower electrode, a second EL layer over the second lower electrode, and a second upper electrode over the second EL layer. The first light-emitting element and the second light-emitting element are adjacent to each other. The first protective layer is provided over the first light-emitting element and the second light-emitting element and includes a region in contact with the side surface of the first EL layer and the side surface of the second EL layer. The second protective layer is provided over the first protective layer. The gap is provided between the first EL layer and the second EL layer and is provided between the first protective layer and the second protective layer.
A display device in which a puddle in the vicinity of a partition of a light-emitting element is reduced when a light-emitting layer is formed by a wet process is provided. The display device includes a first anode; a second anode adjacent to the first anode in an X direction; a third anode adjacent to the first anode in a Y direction; a hole-injection layer provided across the first anode to the third anode; a partition provided over the hole-injection layer; a first light-emitting layer; a second light-emitting layer; a third light-emitting layer; and a cathode. The partition includes, in a top view, a first region positioned between the first anode and the third anode and extending in the X direction, and a second region positioned between the first anode and the second anode and extending in the Y direction. The height of the first region is larger than the height of the second region in a cross-sectional view of the partition.
H10K 71/13 - Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
H10K 71/60 - Forming conductive regions or layers, e.g. electrodes
A positive electrode active material which can improve cycle characteristics of a secondary battery is provided. Two kinds of regions are provided in a superficial portion of a positive electrode active material such as lithium cobaltate which has a layered rock-salt crystal structure. The inner region is a non-stoichiometric compound containing a transition metal such as titanium, and the outer region is a compound of representative elements such as magnesium oxide. The two kinds of regions each have a rock-salt crystal structure. The inner layered rock-salt crystal structure and the two kinds of regions in the superficial portion are topotaxy; thus, a change of the crystal structure of the positive electrode active material generated by charging and discharging can be effectively suppressed. In addition, since the outer coating layer in contact with an electrolyte solution is the compound of representative elements which is chemically stable, the secondary battery having excellent cycle characteristics can be obtained.
H01M 4/131 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/02 - Electrodes composed of, or comprising, active material
H01M 4/1315 - Electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/134 - Electrodes based on metals, Si or alloys
H01M 4/1391 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx
H01M 4/13915 - Processes of manufacture of electrodes based on mixed oxides or hydroxides, or on mixtures of oxides or hydroxides, e.g. LiCoOx containing halogen atoms, e.g. LiCoOxFy
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01M 4/86 - Inert electrodes with catalytic activity, e.g. for fuel cells
H01M 10/0525 - Rocking-chair batteries, i.e. batteries with lithium insertion or intercalation in both electrodesLithium-ion batteries
A lithium-ion secondary battery with excellent cycle performance and safety is provided. The lithium-ion secondary battery includes a positive electrode, a negative electrode, and an electrolyte solution. The positive electrode includes lithium cobalt oxide whose median diameter (D50) is greater than 12 μm. The lithium cobalt oxide includes magnesium in its surface portion. The negative electrode includes a graphite particle, a silicon particle, and a high molecular including a carboxy group.
H01M 4/02 - Electrodes composed of, or comprising, active material
H01M 4/36 - Selection of substances as active materials, active masses, active liquids
H01M 4/38 - Selection of substances as active materials, active masses, active liquids of elements or alloys
H01M 4/525 - Selection of substances as active materials, active masses, active liquids of inorganic oxides or hydroxides of nickel, cobalt or iron of mixed oxides or hydroxides containing iron, cobalt or nickel for inserting or intercalating light metals, e.g. LiNiO2, LiCoO2 or LiCoOxFy
H01M 4/583 - Carbonaceous material, e.g. graphite-intercalation compounds or CFx
H01M 4/62 - Selection of inactive substances as ingredients for active masses, e.g. binders, fillers
H01M 10/0563 - Liquid materials, e.g. for Li-SOCl2 cells
