Renesas Electronics Corporation

Japan

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[Owner] Renesas Electronics Corporation 6,096
Renesas Electronics America Inc. 310
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2025 May (MTD) 12
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H01L 29/66 - Types of semiconductor device 634
H01L 23/00 - Details of semiconductor or other solid state devices 548
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate 517
H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched 372
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions 362
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09 - Scientific and electric apparatus and instruments 71
42 - Scientific, technological and industrial services, research and design 45
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1.

SEMICONDUCTOR DEVICE AND MEMORY MODULE

      
Application Number 18788898
Status Pending
Filing Date 2024-07-30
First Publication Date 2025-05-08
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Yamane, Kazunori
  • Akashige, Takanori

Abstract

To provide a semiconductor device and a memory module capable of correctly maintaining the phase relationship between a data signal and a data strobe signal that determines the latch timing of the data signal. A variable delay circuit VDLYs_A generates respective data strobe signals DQSin, DQSin_M by delaying an input data strobe signal MDQS by delay amounts ST1, ST2. A timing adjustment circuit TMCT adjusts the delay amount ST1 based on the determination of matching/mismatching between a data signal DQo from a main slicer SLr and a data signal DQo_M from a monitor slicer SLr_M, while changing the delay amount ST2,

IPC Classes  ?

  • G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
  • G11C 7/10 - Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

2.

SEMICONDUCTOR NONVOLATILE MEMORY DEVICE

      
Application Number 18938668
Status Pending
Filing Date 2024-11-06
First Publication Date 2025-05-08
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Suzuki, Junichi
  • Miki, Atsunori

Abstract

A semiconductor nonvolatile memory device or the like capable of narrowing a cell voltage distribution range while suppressing write delay is provided. The semiconductor nonvolatile memory device includes: a plurality of gate lines; a plurality of bit lines intersecting the plurality of gate lines; and a plurality of memory cells connected to respectively intersection points between the gate lines and the bit lines. The plurality of memory cells are connected to one gate line selected from among the plurality of gate lines respectively via the different bit lines, and the semiconductor nonvolatile memory device further includes a plurality of write bit line current or voltage control circuits respectively controlling bit line currents in order to simultaneously perform writing into the plurality of memory cells.

IPC Classes  ?

  • G11C 16/34 - Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
  • G11C 16/10 - Programming or data input circuits
  • G11C 16/24 - Bit-line control circuits

3.

CURRENT SENSE CIRCUIT

      
Application Number 18883388
Status Pending
Filing Date 2024-09-12
First Publication Date 2025-05-08
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Ishizeki, Yoshiaki
  • Tanaka, Makoto

Abstract

A current sense circuit is provided. The circuit includes a current mirror circuit QN1, QN2, and diode-connected QP1, QP2, QP3, and QP4 with their bases connected together, stacking such that the diode-connected side (QN1, QP1, QP3) aligns and connecting the emitter of QP2 to the collector of QP4. Furthermore, the gates of MP1 and MP2 are connected to the collector of QN2 and QP2, respectively. Additionally, the source of MP1 is connected to the drain of MP3 via the source of MP2 and also connected to the source of a Sense MOS. Moreover, the emitter of QP4 is connected to the source of MP4 via R1, and the drain of MP4 is connected to the source (OUT terminal) of a Main MOS. Furthermore, the gates of MP3 and MP4 are connected to the emitters of QN1 and QN2.

IPC Classes  ?

  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

4.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18937178
Status Pending
Filing Date 2024-11-05
First Publication Date 2025-05-08
Owner Renesas Electronics Corporation (Japan)
Inventor Isozaki, Seiya

Abstract

A method of manufacturing a semiconductor device includes: a step of forming a sealing body, and a step of irradiating a laser light to a region, which is covering a part of each of the plurality of leads, of the sealing body. Each of the plurality of leads of a lead frame LF includes a first portion having a first upper surface and a first lower surface opposite the first upper surface, and a second portion having a thickness smaller than the first portion. The second portion has a second upper surface, and a second lower surface opposite the second upper surface. In the step of irradiating the laser light, the second lower surface is exposed from the sealing body by selectively irradiating the region with the laser light.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

5.

SEMICONDUCTOR DEVICE

      
Application Number 18918189
Status Pending
Filing Date 2024-10-17
First Publication Date 2025-05-08
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Narita, Koki
  • Hiyama, Naoaki

Abstract

A semiconductor device having a semiconductor chip with a first circuit, a second circuit, a third circuit, a first protection element, and a resistor circuit, the first circuit and the third circuit mutually input and output unidirectional or bidirectional signals via the second circuit, the first protection element is electrically connected to a first node which electrically connects a first terminal and the second circuit, and the resistor circuit is provided between the first node and a second node which electrically connects the first terminal, the first circuit, and the second circuit and is located upstream of the first node.

IPC Classes  ?

  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

6.

CONFIGURABLE CONTROL FOR TWO-LEVEL AND THREE-LEVEL BUCK CONVERTERS

      
Application Number 18500602
Status Pending
Filing Date 2023-11-02
First Publication Date 2025-05-08
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Shin, Kee Ho
  • Johnson, Phillip Marc
  • Lim, Sungkeun
  • Chen, Yen-Mo

Abstract

Apparatuses, devices, and methods for operating a voltage converter are described. A semiconductor device can include a switching circuit and a controller. The switching circuit can include a plurality of switching elements. The controller can determine an operation mode of the switching circuit. In response to the operation mode indicating a two-level operation mode, the controller can program the switching circuit to operate as a two-level voltage converter. In response to the operation mode indicating a three-level operation mode, the controller can program the switching circuit to operate as a three-level converter.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/00 - Conversion of DC power input into DC power output
  • H02M 3/06 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

7.

SEMICONDUCTOR DEVICE

      
Application Number 18915623
Status Pending
Filing Date 2024-10-15
First Publication Date 2025-05-01
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Morishita, Yasuyuki
  • Narita, Koki
  • Maeda, Satoshi

Abstract

A semiconductor device includes a semiconductor chip having a plurality of layers formed on a surface. Here, a power supply wiring to which a power supply voltage is supplied, a ground wiring to which a ground voltage is supplied, MOS transistors connected to the power supply and ground wirings, and a trigger circuit, which is electrically connected to a gate electrode of the MOS transistor via a first wiring, are formed in the plurality of layers. The MOS transistors and the trigger circuit are formed in a first layer, the first wiring is formed in a second layer which is an upper layer of the first layer, and the first wiring includes a first portion extending in a first direction and a second portion which extends in a second direction intersecting the first direction and is electrically connected to the first portion.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H02H 9/04 - Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage

8.

SEMICONDUCTOR DEVICE, METHOD FOR CONTROLLING THE SEMICONDUCTOR DEVICE, AND CONTROL PROGRAM

      
Application Number 18915626
Status Pending
Filing Date 2024-10-15
First Publication Date 2025-05-01
Owner Renesas Electronics Corporation (Japan)
Inventor Morishita, Fukashi

Abstract

A semiconductor device according to this disclosure includes: a comparator circuit; a counter circuit; and a latch circuit that stores a count value of the counter circuit at a timing when an output signal of the comparator circuit changes, the counter circuit includes: a multiphase signal generator; and a plurality of flip-flop circuits including a first-stage flip-flop and second-stage and subsequent flip-flops, the first-stage flip-flop takes in an inverted signal of an output signal of a flip-flop in a final stage and each of the second-stage and subsequent flip-flops takes in an output signal of a flip-flop in a preceding stage in synchronization with each of the plurality of clock signals, and an output signal of each of the plurality of flip-flop circuits is output as a count signal of the count value.

IPC Classes  ?

  • H04N 25/633 - Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current by using optical black pixels
  • H03K 5/24 - Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
  • H03K 23/00 - Pulse counters comprising counting chainsFrequency dividers comprising counting chains
  • H03L 7/081 - Details of the phase-locked loop provided with an additional controlled phase shifter
  • H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
  • H04N 25/40 - Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled

9.

SEMICONDUCTOR DEVICE AND WRITING METHOD

      
Application Number 18921336
Status Pending
Filing Date 2024-10-21
First Publication Date 2025-05-01
Owner Renesas Electronics Corporation (Japan)
Inventor Sakaguchi, Kouichi

Abstract

Access time from a CPU to a register can be reduced while complication of software is prevented. A semiconductor device includes: a decoder circuit determining a write-source process; a write-enable setting storage circuit storing a write-enable setting that indicates a processor enabled to execute writing into each bit of a write-destination register; a masking/merging circuit generating a value to be written back into the write-destination register on the basis of the write-enable setting and the write-source processor; and a write-back circuit writing back the value to be written back into the write-destination register.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

10.

ADAPTIVE ZERO VOLTAGE SWITCHING FOR NEAR FIELD COMMUNICATION

      
Application Number 18498368
Status Pending
Filing Date 2023-10-31
First Publication Date 2025-05-01
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor Sautto, Marco

Abstract

Systems and methods for operating a wireless power transfer device are described. A circuit can generate a first signal that indicates a voltage at a node between a first high-side (HS) transistor and a first low-side (LS) transistor in a switching converter falling below ground. The circuit can delay a gate-source voltage of a second LS transistor in the switching converter to generate a second signal. The circuit can merge the first signal and the second signal to generate a third signal. A controller can use the third signal to trigger a rising edge of a command signal to turn on the first LS transistor at a specific time. The first LS transistor being turned on at the specific time reduces a diode conduction time of a body diode of the first LS transistor.

IPC Classes  ?

  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • H02J 50/12 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling of the resonant type
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 7/219 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
  • H03K 17/13 - Modifications for switching at zero crossing
  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H03K 17/296 - Modifications to provide a choice of time-intervals for executing more than one switching action and automatically terminating their operation after the programme is completed

11.

SEMICONDUCTOR DEVICE, READING METHOD AND PROGRAM

      
Application Number 18915557
Status Pending
Filing Date 2024-10-15
First Publication Date 2025-05-01
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Hamaguchi, Akira
  • Kubo, Yuji

Abstract

A semiconductor device includes a non-volatile memory (NVM) capable of data-writing even after the semiconductor device is shipped. When a read request is made, the semiconductor reads and outputs the content stored in the area of the NVM in place of the replacement target data in the instruction codes stored in a read only memory. Therefore, after shipping of the semiconductor device, even if a defect such as fragility in the code used at the start of the semiconductor device is found, replacement data in place of 10 the data to be replaced it can be obtained. That is, the semiconductor device, replacement process using the modified patches of Boot ROM cord is enabled.

IPC Classes  ?

  • G06F 11/10 - Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens

12.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18921312
Status Pending
Filing Date 2024-10-21
First Publication Date 2025-05-01
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Takaishi, Ryusei
  • Hasegawa, Koichi

Abstract

A method of manufacturing a semiconductor device includes, after a wire bonding step, a step of determining a quality as to whether or not a whole of an end portion of a wire is located within a bonding region. A semiconductor chip includes a plurality of position determining opening patterns arranged in a region located around a main opening portion including the bonding region in plan view. The bonding region has a rectangular shape having an area smaller than an opening area of the main opening portion in plan view. The bonding region is defined by the plurality of position determining opening patterns.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

13.

SEMICONDUCTOR DEVICE

      
Application Number 18916890
Status Pending
Filing Date 2024-10-16
First Publication Date 2025-04-17
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Kakuda, Shinichi
  • Kaneda, Yoshinobu
  • Nishiyama, Takayuki
  • Ono, Mitsuhiro

Abstract

A semiconductor device is protected from glitch attacks (FIA). A reset data transfer controller RDTC executes N times of data transfer, transferring data DT stored in a first memory MEM1a to a main register REGm during the first data transfer, and transferring data DT stored in the first memory MEM1a to a sub-register REGs during the Nth data transfer. A comparison circuit CMP1 determines the match/mismatch between the data DTm transferred to the main register REGm and the data DTs transferred to the sub-register REGs, and outputs a determination result signal RS representing the determination result. A system controller SYSC activates a processor PRC when the determination result signal RS indicates a match, and causes the reset data transfer controller RDTC to execute the N times of data transfer again when it indicates a mismatch.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

14.

SEMICONDUCTOR DEVICE

      
Application Number 18905245
Status Pending
Filing Date 2024-10-03
First Publication Date 2025-04-10
Owner Renesas Electronics Corporation (Japan)
Inventor Sakai, Iori

Abstract

High speed of an analog-digital converter of a semiconductor device is achieved. A voltage quantizer circuit includes: a first comparator including a first input transistor inputting differential input voltages, and defining a value of a first bit of a digital signal; and a second comparator including a second input transistor being different from the first input transistor, and defining a value of a second bit of the digital signal. A correction code decision circuit decides a correction code for correcting a common-mode voltage of the differential input voltages, based on a conversion end signal output from the voltage quantizer circuit. A common-mode voltage regulator circuit regulates the common-mode voltage by adding or subtracting a corrected voltage based on the correction code to or from the differential input voltages.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

15.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18904186
Status Pending
Filing Date 2024-10-02
First Publication Date 2025-04-10
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Moriyama, Takashi
  • Kawai, Tohru

Abstract

A semiconductor device includes a semiconductor substrate, a multilayer wiring structure formed on the semiconductor substrate, a guard ring formed so as to surround a circuit formation region and penetrate the multilayer wiring structure, and a pad formed on the multilayer wiring structure. A protective film is formed so as to cover the multilayer wiring structure, the guard ring, and the pad. A trench is formed so as to penetrate the protective film and reach an inside of the multilayer wiring structure. The trench is formed so as to surround the guard ring. The guard ring includes a wiring formed on the multilayer wiring structure. The trench is spaced apart from and adjacent to the wiring. A bottom surface of the trench is inclined so as to be continuously deepened in a direction from the circuit formation region toward a peripheral region surrounding the circuit formation region.

IPC Classes  ?

  • H01L 23/58 - Structural electrical arrangements for semiconductor devices not otherwise provided for
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

16.

ON-CHIP NOISE MEASUREMENT IN A TRANSCEIVER, METHOD AND SYSTEM THEREOF

      
Application Number 18418336
Status Pending
Filing Date 2024-01-21
First Publication Date 2025-04-03
Owner
  • Renesas Electronics Corporation (Japan)
  • Steradian Semiconductors Private Limited (India)
Inventor
  • Rajendran, Gireesh
  • Joshi, Alok Prakash
  • Zhishan, Xu

Abstract

According to an aspect, a transceiver comprises a transmitter section having a first PLL (phased locked loop) providing a first reference signal to the transmitter section, a receiver section having a second PLL providing a second reference signal to the receiver section, a coupler coupling the second PLL to the transmitter section when the transceiver is operative in a test mode measuring a first noise component introduced by the first PLL. The first reference signal is coupled to the receiver section internally within the transceiver as a local reference signal to the receiver section both in the test mode and a functional mode.

IPC Classes  ?

  • H04B 1/40 - Circuits
  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H04L 5/00 - Arrangements affording multiple use of the transmission path

17.

FAILURE ANALYSIS DEVICE AND FAILURE ANALYSIS METHOD

      
Application Number 18478207
Status Pending
Filing Date 2023-09-29
First Publication Date 2025-04-03
Owner RENESAS ELECTRONICS CORPORATION (Japan)
Inventor
  • Ogushi, Toru
  • Uesugi, Sho
  • Funatsu, Yukihisa

Abstract

A failure analysis device is for analyzing a failure of the semiconductor device equipped with a logic circuit and a memory circuit. It has a storage device and a processor. The storage device stores fail bit data obtained by testing the memory circuit and failure diagnosis data obtained by failure diagnosis for test results of the logic circuit. The processor extracts the fail I/O value from the fail bit data, extracts the data of the memory connection port which is the connection port to the memory circuit from among the estimated failure parts included in the failure diagnosis data, and determines match/not-match between the fail I/O value and the port ID value included in the data of the memory connection port.

IPC Classes  ?

  • G11C 29/10 - Test algorithms, e.g. memory scan [MScan] algorithmsTest patterns, e.g. checkerboard patterns
  • G11C 29/18 - Address generation devicesDevices for accessing memories, e.g. details of addressing circuits
  • G11C 29/38 - Response verification devices

18.

PASS THROUGH MODE IN BATTERY CHARGER

      
Application Number 18473606
Status Pending
Filing Date 2023-09-25
First Publication Date 2025-03-27
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Lim, Sungkeun
  • Chen, Yen-Mo
  • Han, Chong
  • Han, Dongwoo

Abstract

Systems and methods for operating a battery charger are described. A controller can operate a battery charger under a charging mode to use an adapter power to support a system power of the battery charger. The controller can detect the adapter power reaches a maximum, transition the battery charger into a discharging mode to decrease a battery charging current in the battery charger to support the system power and decrease a system voltage at the output of the battery charger. The controller can detect the system voltage is less than a battery voltage of the battery by an offset and transition the battery charger from the discharging mode to a pass-through mode that continues to discharge the battery, where the PTM can cause the battery charger to discharge the battery without performing switching.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

19.

FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTION METHOD

      
Application Number 18773937
Status Pending
Filing Date 2024-07-16
First Publication Date 2025-03-27
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Miyaguchi, Akira
  • Kawakita, Daisuke
  • Hirano, Masaaki
  • Suzuki, Shogo

Abstract

A failure detection circuit is provided in the target circuit having a first circuit area for operating in synchronization with the first clock signal, a first detection circuit for outputting a first detection result obtained by transitioning the voltage level in synchronization with the first clock signal, the first clock signal a second detection circuit for outputting a second detection result obtained by transitioning the voltage level in synchronization with, and a first comparison circuit for outputting a first comparison result by comparing the first detection result and the second detection result. Accordingly, by the failure detection circuit, it is possible to detect the failure accurately.

IPC Classes  ?

  • G01R 31/317 - Testing of digital circuits
  • H03K 3/037 - Bistable circuits
  • H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

20.

BIOSIGNAL MONITORING SYSTEM WITH DETACHABLE ELECTRONICS AND WIRELESS RECHARGEABLE BATTERY

      
Application Number 18757354
Status Pending
Filing Date 2024-06-27
First Publication Date 2025-03-27
Owner Renesas Electronics Corporation (Japan)
Inventor Naurath, Dirk

Abstract

Systems and methods for sensing and processing biosignals are described. An example system can include a first device configured to sense at least one biosignal and a second device. The second device can receive the at least one biosignal from the first device. The second device can receive power via a first wireless interface. The second device can charge a rechargeable battery using the received power. The second device can receive a signal via the first wireless interface, wherein the signal encodes credentials of a user. The second device can demodulate the signal to decode the user credentials. The second device can authenticate the user credentials. The second device can, in response to authentication of the user credentials, communicate the at least one biosignal to a user device via a second wireless interface.

IPC Classes  ?

  • A61B 5/145 - Measuring characteristics of blood in vivo, e.g. gas concentration or pH-value
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons
  • A61B 5/117 - Identification of persons
  • H02J 50/20 - Circuit arrangements or systems for wireless supply or distribution of electric power using microwaves or radio frequency waves
  • H04W 4/80 - Services using short range communication, e.g. near-field communication [NFC], radio-frequency identification [RFID] or low energy communication
  • H04W 12/06 - Authentication

21.

SEMICONDUCTOR DEVICE

      
Application Number 18780767
Status Pending
Filing Date 2024-07-23
First Publication Date 2025-03-20
Owner Renesas Electronics Corporation (Japan)
Inventor Nagata, Nao

Abstract

According to one embodiment, the semiconductor device 1 includes a semiconductor substrate having an upper surface and a lower surface, and an emitter wiring, wherein when viewed from the upper surface side, the semiconductor substrate has an active region including a plurality of IGBTs, a termination region, and a main junction region, wherein the semiconductor substrate of the main junction region has an N− type drift layer and a P type junction impurity layer, wherein the semiconductor substrate of the termination region has an N− type drift layer and a P type floating layer, wherein at least the main junction region has a trench electrode provided inside the trench, and a trench insulating film provided between the trench electrode and the semiconductor substrate, and wherein the trench electrode and the P type junction impurity layer are connected to the emitter wiring.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

22.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18808400
Status Pending
Filing Date 2024-08-19
First Publication Date 2025-03-20
Owner Renesas Electronics Corporation (Japan)
Inventor Tamimoto, Hideaki

Abstract

A first surface of a die pad has: a first region; a second region that includes points respectively overlapping with four corners of a semiconductor chip; and a third region that is located around the second region. Also, a plurality of grooves is formed in the die pad at the second region. Also, each of the plurality of grooves terminates at a position not reaching each of the first region and the third region. Also, the plurality of grooves includes: a plurality of first grooves each extending in an extending direction of one of two diagonal lines of the semiconductor chip; and a plurality of second grooves each extending in an extending direction of another one of the two diagonal lines. Also, in each of the plurality of first grooves is arranged so as to intersect with one or more of the plurality of second grooves.

IPC Classes  ?

  • H01L 23/495 - Lead-frames
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

23.

POSITION SENSOR SYSTEM

      
Application Number 18963873
Status Pending
Filing Date 2024-11-29
First Publication Date 2025-03-20
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Pichler, Rudolf
  • Janisch, Josef
  • Oswald, Thomas

Abstract

A position sensor system having at least two receiver coil sets, at least one transmitter coil and a signal conditioning processor, wherein each receiver coil set of the at least two receiver coil sets includes at least two separate receiver coils including a sine receiver coil and a cosine receiver coil, wherein the signal conditioning processor is included in an integrated circuit, and wherein the at least two receiver coil sets, the at least one transmitter coil and the integrated circuit including the signal conditioning processor are located on a printed circuit board.

IPC Classes  ?

  • G01D 5/20 - Mechanical means for transferring the output of a sensing memberMeans for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for convertingTransducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying inductance, e.g. by a movable armature

24.

SEMICONDUCTOR DEVICE INCLUDING GATE ELECTRODE FOR APPLYING TENSILE STRESS TO SILICON SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18966471
Status Pending
Filing Date 2024-12-03
First Publication Date 2025-03-20
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Sayama, Hirokazu
  • Ohta, Kazunobu
  • Oda, Hidekazu
  • Sugihara, Kouhei

Abstract

A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced.

IPC Classes  ?

  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/3215 - Doping the layers
  • H01L 21/8234 - MIS technology
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H10B 10/00 - Static random access memory [SRAM] devices
  • H10B 12/00 - Dynamic random access memory [DRAM] devices

25.

CARRIER TAPE

      
Application Number 18773673
Status Pending
Filing Date 2024-07-16
First Publication Date 2025-03-13
Owner Renesas Electronics Corporation (Japan)
Inventor Nakajima, Kouji

Abstract

A carrier tape includes a first layer component having a recess and a first opening in a center of the recess, and a second layer component housed in the recess, the second layer having a center arranged parallel to the recess, a step part arranged around the center by a step falling from the center, a second opening overlapping the first opening arranged in the center, and a third opening arranged in the step part.

IPC Classes  ?

  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

26.

SEMICONDUCTOR DEVICE

      
Application Number 18773957
Status Pending
Filing Date 2024-07-16
First Publication Date 2025-03-13
Owner Renesas Electronics Corporation (Japan)
Inventor Osawa, Kazuaki

Abstract

A semiconductor device according to the embodiment includes a semiconductor chip having a first MOSFET formed in a first region of a semiconductor substrate, a detection element formed in a second region within the first region, a source electrode formed above the first region and connected to a source of the first MOSFET, and a source electrode material arranged to cover the detection element and stitch-bonded to the source electrode.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices

27.

MULTI-REGION TRANSMITTER OUTPUT WAVEFORM CONTROL

      
Application Number 18463717
Status Pending
Filing Date 2023-09-08
First Publication Date 2025-03-13
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Finn, Steven Ernest
  • Won, Chan Youn
  • Atluri, Suresh

Abstract

Systems and methods for operating a driver circuit are described. In a first region of a transition from an input signal to an output signal, a circuit can control a slew rate of the output signal to a first rate. The first region can terminate prior to the output signal reaching a predefined threshold voltage. In a second region of the transition, the circuit can reduce the slew rate of the output signal to a second rate lower than the first rate. The output signal crosses the predefined threshold voltage in the second region. In a third region of the transition, the circuit can increase the slew rate of the output signal to a third rate greater than the second rate. The transition can complete in the third region. The circuit can output the output signal to drive a transistor in an output drive stage of the driver circuit.

IPC Classes  ?

  • H03K 5/04 - Shaping pulses by increasing durationShaping pulses by decreasing duration
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

28.

SEMICONDUCTOR-MEMORY DEVICE

      
Application Number 18825268
Status Pending
Filing Date 2024-09-05
First Publication Date 2025-03-13
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Suzuki, Junichi
  • Yamashina, Tomoki

Abstract

To reduce the time required for data writing. A semiconductor memory device is provided, comprising a memory cell having a gate electrode including a selection gate and a memory gate, a source line connected to a source, and a bit line connected to a drain, an extraction part that extracts a current flowing from the source side to the drain side during writing in the memory cell from the bit line, a discharge part that has a higher ability to pass current than the extraction part and lowers the voltage of the bit line, a charge part that has a higher ability to pass current than the discharge part and applies a voltage to the bit line, and a control part that, when starting to write to the memory cell, lowers the voltage of the bit line by the discharge part and applies a voltage to the bit line by the charge part.

IPC Classes  ?

29.

PLANAR LITZ COIL FOR WIRELESS POWER TRANSFER

      
Application Number 18043468
Status Pending
Filing Date 2023-02-03
First Publication Date 2025-03-13
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Yuan, Sheng
  • Jiang, Shangfeng
  • Zhou, Weiwei
  • Huang, Jiangjian
  • Tang, Bo

Abstract

Structures, devices, and methods for wireless power transfer systems are described. A structure can include a plurality of strands arranged into a first coil layer and a second coil layer. The plurality of strands can be formed on a parallel path surrounding a center of the structure. The plurality of strands can extend away from the center on the first coil layer. The plurality of strands can extend towards the center on the second coil layer. For every fixed interval along a length of the structure, a first strand among the plurality of strands can be looped from the first coil layer to the second coil layer and a second strand among the plurality of strands can be looped from the second coil layer to the first coil layer.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling

30.

SEMICONDUCTOR DEVICE

      
Application Number 18780789
Status Pending
Filing Date 2024-07-23
First Publication Date 2025-03-06
Owner Renesas Electronics Corporation (Japan)
Inventor Nakamura, Shunichi

Abstract

Improve the reliability of a semiconductor device. A resistive element Rg is filled in a trench TR formed in a well region PW of a semiconductor substrate. The resistive element Rg and the trench TR have an endless shape in plan view. The resistive element Rg is connected to a first contact member PG that is electrically connected to a gate pad GP, and a second contact member PG that is electrically connected to a gate wiring GW. Furthermore, a third contact member PG, which electrically connects an emitter electrode EE to the well region PW, is positioned in an area surrounded by an endless shape of the resistive element Rg, between the first and second contact members PG in a Y direction.

IPC Classes  ?

  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect

31.

MEMORY DEVICE

      
Application Number 18806844
Status Pending
Filing Date 2024-08-16
First Publication Date 2025-03-06
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Miura, Tomohiro
  • Satou, Kouji
  • Nagata, Shunya

Abstract

Providing a memory device that initializes memory cell data in a batch by specifying initialization data, or a memory device that initializes memory cell data in a batch by partially masking the initialization area. A memory device is provided that includes a control circuit that receives an initialization mode signal transmitted from an initialization control circuit and generates an internal clock and a write control signal, an IO (Input/Output) input circuit that applies a Low level to the True side or Bar side of a bit line according to initialization data transmitted from the initialization control circuit, and a selection circuit that simultaneously selects multiple word lines and multiple bit lines, and writes the initialization data simultaneously into a memory cell connected to the selected word lines and bit lines.

IPC Classes  ?

  • G11C 29/12 - Built-in arrangements for testing, e.g. built-in self testing [BIST]
  • G11C 29/42 - Response verification devices using error correcting codes [ECC] or parity check

32.

DUMBBELL COIL FOR WIRELESS POWER TRANSFER

      
Application Number 18043433
Status Pending
Filing Date 2022-12-30
First Publication Date 2025-03-06
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Yuan, Sheng
  • Huang, Jiangjian
  • Tang, Bo
  • Zeng, Hulong

Abstract

A wireless power apparatus may include a power receiver having an elongated core member with a long axis and a receiver conductor wound spirally around the elongated core member to form an elongated receiver coil, the power receiver configured to receive power from a power transmitter having a transmitter conductor being wound circularly around a center point and disposed in a plane to form a planar transmitter coil, the planar transmitter coil configured to be connected to an alternating current power source to wirelessly transmit power, the planar transmitter coil having a transmitter coil radial axis starting at the center point and defining a transmitting region from an inner edge of the planar transmitter coil to an outer edge of the planar transmitter coil along the transmitter coil radial axis.

IPC Classes  ?

  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
  • H01F 27/24 - Magnetic cores
  • H01F 27/30 - Fastening or clamping coils, windings, or parts thereof togetherFastening or mounting coils or windings on core, casing, or other support

33.

FLIPPING COIL FOR WIRELESS POWER TRANSFER

      
Application Number 18043444
Status Pending
Filing Date 2023-02-03
First Publication Date 2025-03-06
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Yuan, Sheng
  • Jiang, Shangfeng
  • Zhou, Weiwei
  • Huang, Jiangjian
  • Tang, Bo
  • Zeng, Hulong

Abstract

Structures, devices, and methods for wireless power transfer systems are described. A structure can include a plurality of strands a plurality arranged into a coil layer. For every fixed interval along a length of the structure, the plurality of strands can be folded at a lateral angle and vertically inverted in response to being folded at the lateral angle. The plurality of strands being folded can cause the plurality of strands to surround a center of the structure in a parallel path.

IPC Classes  ?

  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/061 - Winding flat conductive wires or sheets
  • H01F 41/074 - Winding flat coils
  • H02J 50/00 - Circuit arrangements or systems for wireless supply or distribution of electric power
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling

34.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18799362
Status Pending
Filing Date 2024-08-09
First Publication Date 2025-03-06
Owner Renesas Electronics Corporation (Japan)
Inventor Shimizu, Yoshiharu

Abstract

In plan view, an electrode pad of a semiconductor chip includes: a first region that contains a center of an exposed portion of the electrode pad; a second region that is located around the first region; and a third region that is located around the first region and that is located between the first region and the second region. Here, a first groove that separates a plurality of semiconductor elements formed in a semiconductor substrate from each other is formed in the semiconductor substrate. The semiconductor substrate includes: a fourth region that overlaps with the third region but not overlaps with each of the first region and the second region, and a fifth region that overlaps with the first region but not overlaps with the third region. And, the first groove is formed in the semiconductor substrate at the fifth region but not at the fourth region.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
  • H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
  • H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
  • H01L 23/498 - Leads on insulating substrates

35.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18817322
Status Pending
Filing Date 2024-08-28
First Publication Date 2025-03-06
Owner Renesas Electronics Corporation (Japan)
Inventor Iwakiri, Kazuhiko

Abstract

The technology of improving the adhesion of the barrier metal film is provided. The semiconductor device includes: a floating region formed between a trench gate electrode and a trench emitter electrode; a stacked film formed on the floating region; an interlayer insulating film formed on the stacked film; a plug penetrating the interlayer insulating film and reaching the stacked film; a barrier metal film formed to cover the interlayer insulating film and the plug; and a metal film formed on the barrier metal film.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/49 - Metal-insulator semiconductor electrodes
  • H01L 29/66 - Types of semiconductor device

36.

A POWER STAGE CONTROLLER

      
Application Number 18454399
Status Pending
Filing Date 2023-08-23
First Publication Date 2025-02-27
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Labbe, Benoit
  • Bumgarner, Adam Matthew
  • Lalithambika, Vinod Aravindakshan
  • Warrington, Allan Richard

Abstract

A controller for controlling a power stage having one or more phases is presented. The controller includes a reference circuit that generates a reference signal; a ramp generator generating a feedback ramp signal based on a feedback signal of the power stage; and a modulator generating a control signal for controlling at least one phase of the power stage. The control signal may include a series of pulses in which each pulse is associated with a corresponding phase of the power stage.

IPC Classes  ?

  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 1/00 - Details of apparatus for conversion

37.

POWER CONVERTER CONTROLLER

      
Application Number 18454433
Status Pending
Filing Date 2023-08-23
First Publication Date 2025-02-27
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Labbe, Benoit
  • Warrington, Allan Richard
  • Bumgarner, Adam Matthew

Abstract

A power converter controller is presented. The controller includes a ramp generator for generating a ramp signal and a ramp adjuster. The ramp adjuster compares a feedback signal of the converter with a threshold signal to obtain a comparison signal, and to adjust an amplitude of the ramp signal based on the comparison signal. Also presented is a constant on time COT power converter including the above controller.

IPC Classes  ?

  • H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

38.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18941036
Status Pending
Filing Date 2024-11-08
First Publication Date 2025-02-27
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Inoue, Zen
  • Higa, Yudai

Abstract

A semiconductor device includes a first well region, a second well region, a body region, and a cathode region. The impurity concentration of the body region is higher than the impurity concentration of the first well region, and the impurity concentration of the second well region is higher than the impurity concentration of the body region. In plan view, the body region includes the cathode region, and the cathode region includes the second well region. The cathode region configures a cathode of a Zener diode, and the first well region, the second well region, and the body region configure an anode of the Zener diode.

IPC Classes  ?

  • H01L 29/866 - Zener diodes
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H01L 29/66 - Types of semiconductor device

39.

SKEW CORNER DRIVER COMPENSATION

      
Application Number 18455436
Status Pending
Filing Date 2023-08-24
First Publication Date 2025-02-27
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Finn, Steven Ernest
  • Sluder, Preston Blaire

Abstract

Systems and methods for skew compensation in a push-pull driver are described. A device can include a first circuit configured to output a skew measurement of an output driver stage in a driver circuit. The device can further include a second circuit configured to determine a first skew parameter based on the skew measurement and apply a first bias that is dependent on the skew measurement to drive a high-side transistor in the output driver stage. The device can further include a third circuit configured to determine a second skew parameter based on the skew measurement and apply a second bias that is dependent on the skew measurement to drive a low-side transistor in the output driver stage. The first bias and the second bias can be complementary.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 17/06 - Modifications for ensuring a fully conducting state
  • H03K 19/003 - Modifications for increasing the reliability

40.

ARBITER FOR NON-PERSISTENT SIGNALS

      
Application Number 18454271
Status Pending
Filing Date 2023-08-23
First Publication Date 2025-02-27
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor
  • Sautto, Marco
  • Sokolov, Danil
  • Waterworth, Robert
  • Khomenko, Victor

Abstract

Systems and devices for signal arbitration are described. A first asynchronous circuit can receive and sanitize a first non-persistent signal representing a first request to generate a first persistent signal. A second asynchronous circuit can receive and sanitize a second non-persistent signal representing a second request to generate a second persistent signal. A mutual exclusive circuit can arbitrate between the first persistent signal and the second persistent signal and output a grant signal to issue a grant. A control circuit can control an operation mode of the first and second asynchronous circuits based on a control signal, a first grant signal indicating a grant status of the first request, a second grant signal indicating a grant status of the second request, the first persistent signal and the second persistent signal.

IPC Classes  ?

  • H03K 19/20 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
  • H03K 3/037 - Bistable circuits

41.

APPARATUS COMPRISING A CONTROLLER FOR A SWITCHING CONVERTER

      
Application Number 18447760
Status Pending
Filing Date 2023-08-10
First Publication Date 2025-02-20
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor
  • Mo, Chi
  • Zhai, Shubing
  • Ding, Xueqiang
  • Xue, Xin

Abstract

An apparatus comprising a controller for a switching converter for receiving an input voltage and for providing an output voltage, the switching converter comprising a first switch and an energy storage element, the controller being configured to provide a first control signal to the first switch, the first control signal having a switching frequency, and control the switching frequency such that the switching frequency is substantially unaffected by variations in one or more of a load current, an equivalent series resistance of the energy storage element, and a turn on resistance of the first switch.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/14 - Arrangements for reducing ripples from DC input or output

42.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DIAGNOSTIC DEVICE

      
Application Number 18795290
Status Pending
Filing Date 2024-08-06
First Publication Date 2025-02-13
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Maeda, Yoichi
  • Matsushima, Jun

Abstract

The technology provided enables the acceleration of the clock. The semiconductor device comprises a counter circuit configured to generate a read signal when the count number reaches a predetermined number, a buffer configured to store test data and sequentially output the test data in the order stored when the read signal indicates a valid value, and a first scan test circuit that sequentially captures the test data output from the buffer.

IPC Classes  ?

  • G06F 1/12 - Synchronisation of different clock signals

43.

SEMICONDUCTOR DEVICE

      
Application Number 18798978
Status Pending
Filing Date 2024-08-09
First Publication Date 2025-02-13
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Ebata, Tomohiko
  • Matsui, Tetsuo

Abstract

A semiconductor device is provided. The semiconductor device is capable of operating accurately by suppressing errors caused by dielectric relaxation phenomena. The semiconductor device includes a first capacitive element, a first switch circuit, a first inversion signal generating circuit, a second capacitive element, and a negative feedback circuit.

IPC Classes  ?

  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/12 - Analogue/digital converters

44.

SEMICONDUCTOR DEVICE

      
Application Number 18932997
Status Pending
Filing Date 2024-10-31
First Publication Date 2025-02-13
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Kawai, Tohru
  • Nakashiba, Yasutaka

Abstract

A semiconductor device has a semiconductor substrate, a first insulating layer, a first inductor, a second insulating layer, a second inductor, a pad and an annular wiring. The first insulating layer is formed on the semiconductor substrate. The first inductor is directly formed on the first insulating layer. The second insulating layer is formed on the first insulating layer such that the second insulating layer covers the first inductor. The second inductor is directly formed on the second insulating layer such that the second inductor faces the first inductor. The pad is directly formed on the second insulating layer. The pad is electrically connected with the second inductor. The annular wiring is electrically connected with the pad. The annular wiring is spaced apart from the second inductor. The annular wiring surrounds the second inductor without forming a vertex in plan view.

IPC Classes  ?

  • H01L 23/64 - Impedance arrangements
  • H01F 27/00 - Details of transformers or inductances, in general

45.

REALITY AI

      
Application Number 1838424
Status Registered
Filing Date 2024-12-05
Registration Date 2024-12-05
Owner Renesas Electronics Corporation (Japan)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Integrated circuits; electronic integrated circuits; large scale integrated circuits; semi-conductors; semiconductor chips; semiconductor chipsets; microprocessors; semi-conductor memories; electronic semi-conductors; circuit boards; chips [integrated circuits]; computer software; computer programs; computer hardware and software for use in implementing internet of things [IoT]; computer hardware; computer software platforms, recorded or downloadable; computers and computer peripherals; DC/DC converters; AC/DC converters; converters, electric; electrical power supplies; components for electrical power supplies; accessories for electrical power supplies; electronic power control machines and apparatus; power control device; electronic power supplies; electric current control devices; power distribution or control machines and apparatus; rotary converters; phase modifiers; solar batteries; accumulators [batteries]; electrical cells and batteries; current sensors and testers for measuring semiconductor characteristics; electric or magnetic meters and testers; electric wires and cables; telecommunication machines and apparatus; personal digital assistants; vehicle drive training simulators; sports training simulators; laboratory apparatus and instruments; photographic machines and apparatus; cinematographic machines and apparatus; optical machines and apparatus; measuring or testing machines and instruments; magnetic cores; resistance wires; electrodes; game programs for home video game machines; electronic circuits and CD-ROMs recorded with programs for hand-held games with liquid crystal displays; phonograph records; downloadable music files; downloadable image files; recorded video discs and video tapes; electronic publications; exposed cinematographic films; exposed slide films; slide film mounts; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers and recording discs; data processing apparatus and computers; electronic agendas; amplifiers; antennas; bar code readers; electric cables; fiber optic cables; encoded magnetic cards; cassette players; commutators; compact discs [audio-video]; computer game programs; computer memories; recorded or downloadable computer programs; computers; printers for use with computers; electric contacts; control panels for power distributing; magnetic data media; optical data media; optical discs; blank magnetic discs; disk drives for computers; downloadable electronic publications; integrated circuit cards; inverters [electricity]; lasers, not for medical purposes; magnetic tapes; meters; modems; electric monitoring apparatus; monitors for computer; mouse for computers; digital color photocopiers; portable telephones; radio pagers; optical character readers; remote control apparatus; electric resistances; scanners for computer; electric sockets; sound recording apparatus; sound recording magnetic discs and video tapes; sound reproducing apparatus; sound transmitting apparatus; personal stereos; electric switches; switches; telephone apparatus; thermostats; telecommunication transmitters; video cassettes; video game cartridges; video recorders; video telephones; air-gas producers for laboratory use; thermostats for laboratory use; hygrostats for laboratory use; glassware for laboratory experiments; porcelain instruments for laboratory experiments; furnaces for laboratory experiments; laboratory experimental machines and apparatus; models/specimens for laboratory use; tilting pan heads [for laboratory use]; cameras; range finders; photo-developing/printing/enlarging or finishing apparatus; tripods [for cameras]; bellows [photography]; spools; slide projectors; self-timers; power supply equipment for photography flash bulbs; flash lamps; viewfinders; lens hoods; flash guns; shutter releases; optical lenses; exposure meters; projectors [projection apparatus]; transparent sheets [exposed films] for overhead projectors; photograph developing or finishing apparatus; cinematographic cameras; projection screens; editing machines for movie films; lens barrels [for telescopes]; tripods [for telescopes]; periscopes; binoculars; reflectors [for telescopes]; prisms [telescopes]; telescopes; magnifying glasses; metallurgical microscopes; biological microscopes; polarizing microscopes; stereoscopes; microscopes; temperature indicators; gasometers; thermometers; water meters; balances/scales; tape measures; masu [Japanese box-shaped volume measure]; planimeters; rules; standard-unit measuring machines and apparatus; pressure gauges/manometers; level gauges; acoustic meters; tachometers; accelerometers; refractometers; luminoflux meters; photometers; altimeters; hygrometers; illuminometers; vibration gauges; noise meters; logs; speedometers [speed indicators]; calorimeters; viscosimeters; densitometers/concentration meters; gravimeters/aerometers; densimeters [density meters]; dynamometers; flowmeters; derived-unit measuring machines and apparatus; angle gauges; angle dividing apparatus [measuring instruments]; spherometers; inclinometers; interferometers; straightness testers; projectors; graduation checkers [calibration checkers]; length gauges; screw-thread measuring machines and instruments; comparators; surface roughness testers; flatness testers; precision measuring machines and instruments; automatic pressure controllers; automatic liquid-flow controllers; automatic fluid-composition controllers; automatic liquid-level controllers; automatic temperature controllers; automatic combustion controllers; automatic vacuum controllers; automatic calorie controllers; programmable logic controllers; automatic adjusting/regulating machines and instruments; metal compression testers; metal hardness testers; metal strength testers; rubber testing machines; concrete testing machines; cement testing machines; textile testing machines; plastic testing machines; lumber testing machines; material testing machines and instruments; alidades; meteorological instruments; base plates for measuring instruments; distance measuring machines or apparatus [range finders]; clinometers; magnetic compasses; compass needles; gyro compasses; gyromagnetic compasses; analysis instruments for photogrammetric purposes; levels [spirit levels]; precision theodolites; measuring rods; surveying chains; electronic target location apparatus; transits for surveying; levelling rods for surveying; sextants; surveying machines and instruments; meridian transits; astronomical spectroscopes; zenith telescopes; astrometric measuring apparatus and instruments; electronic charts for identifying hiding-power of paint; rust-formation testing pieces; relays; circuit breakers; power controllers; current rectifiers; connectors; circuit closers; capacitors; resistors; distributing boxes; distribution boards [electricity]; fuses; lightning arresters; transformers; induction voltage regulators; reactors [electricity]; phase meters; oscillographs; circuit testers; antenna measuring apparatus; detectors; magnetic measuring apparatus; frequency meters; vacuum tube characteristic measuring apparatus; watt hour meters; ammeters; wattmeters; oscillators; electrical power testers; interphones; automatic telephone exchange apparatus; manual telephone exchange apparatus; telephone sets; teletypewriters; automatic telegraph apparatus; phototelegraphy apparatus; manual telegraph apparatus; facsimile machines; audio frequency transmission apparatus; cable-type carrier-frequency apparatus; power-line-type frequency-carrier apparatus; open-wire-type frequency-carrier apparatus; carrier-frequency repeaters; transmission machines and apparatus for telecommunication; television receivers; television transmitters; radio receivers [radios]; radio transmitters; broadcasting machines and apparatus; portable radio communication apparatus; aeronautical radio communication apparatus; multichannel radio communication apparatus for fixed stations; monochannel radio communication apparatus for fixed stations; radio communication apparatus for vehicles; marine radio communication apparatus; radio communication machines and apparatus; navigation apparatus for vehicles; beacon apparatus; direction finders; radar apparatus; loran apparatus; radio machines and apparatus; remote control telemetering apparatus; loudspeakers/megaphones; compact disc players; juke boxes; tape recorders; electric phonographs; record players; audio frequency devices and apparatus; video disc players; video frequency devices and apparatus; cabinets for loudspeakers; coils, electric; magnetic tape erasers; magnetic tape cleaners; magnetic head erasers; magnetic head cleaners; speakers; stands and racks for telecommunication machine and apparatus; dials [for photographic transparencies]; fuses for communication apparatus; tapes for tape recorders; change-over switches; distribution boards; pickups; video tapes; indicator lights for telecommunication apparatus; electrical phonomotors; headphones; protectors for telecommunication apparatus; microphones; record cleaners [cleaning apparatus for phonograph records]; blank record discs; cleaning apparatus for phonograph records; parts and accessories for telecommunication machines and apparatus; geiger counters; cyclotrons; X-ray apparatus, not for medical use; betatrons, not for medical use; magnetic surveying machines; magnetic object detectors; shielding cases for magnetic discs; seismic wave surveying machines; hydrophone machines and apparatus; ultrasonic depth sounders; ultrasonic flaw detectors; ultrasonic sensors; electrostatic copying machines; remote control apparatus for opening and closing doors; electronic microscopes; desk-top computers; word processors; X-rays tubes, not for medical use; tubes for photographic instruments; vacuum tubes; rectifier tubes; cathode ray tubes; discharge tubes; electron tubes; thermistors; diodes; transistors; electronic circuits and CD-ROMs recorded with program for handheld liquid crystal display game; pre-recorded video discs and tapes; semi-conductor devices; semi-conductor integrated circuits including CPU; electronic circuits; magnetic drums, magnetic discs, magnetic tapes, CD-ROMs, electronic circuits and other storage mediums recorded with a program for developing and designing of semi-conductor devices, integrated circuits including CPU, electronic circuits and other electronic machines; microcontrollers; microcomputers; programs for microcomputers; circuits for testing/evaluating of microcomputers, microcontrollers, microprocessors and semi-conductor integrated circuits; semi-conductor integrated circuits; semi-conductor commutators; downloadable electronic publications for semi-conductors; silicon wafers for semi-conductors; DVD players; DVD recorders and digital video cameras; digital still cameras; video cameras; liquid crystal displays; plasma display television sets; light emitting diodes [LED]; printed circuit boards; notebook computers; handheld computers; personal digital assistants [PDA]; data processing apparatus; electrostatic copying machines; printers; cathode ray tube displays; computer peripheral equipment; compact discs [CD]; digital versatile disks [DVD]; encoded magnetic, optical and integrated circuit cards; magnetic cards; video projectors; semi-conductor testing apparatus; computer software in the field of artificial intelligence. Design of electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design and testing of semiconductor for others; designing of machines, apparatus, instruments [including their parts] or systems composed of such machines, apparatus and instruments; design of semiconductor devices; design of semiconductor chips; design of integrated circuits; design and updating of computer software; provision of technological information in relation to semiconductor including integrated circuits; design of computer-simulated models; computer programming; technological advice relating to computers, automobiles and industrial machines; testing or research in relation to electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design, development, testing and inspection of power management integrated circuits (PMICs); testing and research services relating to machines, apparatus and instruments; Software as a service [SaaS]; Platform as a service [PaaS]; leasing of a database server to third parties; rental of computers; providing computer programs on data networks; rental of laboratory apparatus and instruments; providing meteorological information; architectural design; surveying; geological surveys; testing, inspection and research services in the fields of pharmaceuticals, cosmetics and foodstuffs; research on building construction or city planning; testing and research services in the field of preventing pollution; testing and research services in the field of electricity; testing and research services in the field of civil engineering; testing, inspection and research services in the fields of agriculture, livestock breeding and fisheries; rental of measuring apparatus; rental of telescopes; rental of technical drawing instruments; design and development of computer hardware and software; authenticating works of art; calibration [measuring]; computer software design; computer system design; computer systems analysis; consultancy in the field of computer hardware; consultation in environment protection; conversion of data or documents from physical to electronic media; creating and maintaining web sites for others; data conversion of computer programs and data, not physical conversion; design of interior decor; dress designing; duplication of computer programs; engineering; graphic arts designing; hosting computer sites [web sites]; industrial design; installation of computer software; maintenance of computer software; material testing; packaging design; physics [research]; technical project studies; quality control; recovery of computer data; rental of computer software; research and development for others; updating of computer software; styling [industrial design]; technical research; textile testing; underwater exploration; vehicle roadworthiness testing; consultancy and advice in the field of design of semi-conductor devices; testing, checking and research of semi-conductor devices; providing information about design of semi-conductor devices/consultancy and advice in the field of design of semi-conductor devices, testing, checking and research in the field of semi-conductor devices; guidance and advice in the field of design of semi-conductor chips; testing, checking and research in the field of semi-conductor chips/consultancy and advice in the field of design of semi-conductor chips, testing, checking and research in the field of semi-conductor chips; consultancy and advice in the field of design of integrated circuits; testing, checking and research in the field of integrated circuits; providing information about design of integrated circuits/consultancy and advice in the field of design of integrated circuits, testing, checking and research in the field of integrated circuits; design of microcomputers; consultancy and advice in the field of design of microcomputers; testing, checking and research in the field of microcomputers; providing information about design of microcomputers/consultancy and advice in the field of design of microcomputers, testing, checking and research in the field of microcomputer; design of IC cards; consultancy and advice in the field of design of IC cards; testing, checking and research in the field of IC cards; providing information about design of IC cards/consultancy and advice in the field of design of IC cards, testing, checking and research in the field of IC cards; design of semi-conductor memory; consultancy and advice in the field of design of semi-conductor memory; testing, checking and research in the field of semi-conductor memory; providing information about design of semi-conductor memory/consultancy and advice in the field of design of semi-conductor memory, testing, checking and research in the field of semi-conductor memory; design of circuit boards; consultancy and advice in the field of design of circuit boards; testing, checking and research in the field of circuit boards; providing information about design of circuit boards/consultancy and advice in the field of design of circuit boards, testing, checking and research in the field of circuit boards; design of semi-conductor manufacturing apparatus; consultancy and advice in the field of design of semi-conductor manufacturing apparatus; testing, checking and research in the field of semi-conductor manufacturing apparatus; providing information about design of semi-conductor manufacturing apparatus/consultancy and advice in the field of design of semi-conductor manufacturing apparatus, testing, checking and research in the field of semi-conductor manufacturing apparatus; design of semi-conductor testing apparatus; consultancy and advice in the field of design of semi-conductor testing apparatus; testing, checking and research in the field of semi-conductor testing apparatus; providing information about design of semi-conductor testing apparatus/consultancy and advice in the field of design of semi-conductor testing apparatus, testing, checking and research in the field of semi-conductor testing apparatus; design of semi-conductor checking apparatus; consultancy and advice in the field of design of semi-conductor checking apparatus; testing, checking and research in the field of semi-conductor checking apparatus; providing information about design of semi-conductor checking apparatus/consultancy and advice in the field of design of semi-conductor checking apparatus, testing, checking and research in the field of semi-conductor checking apparatus; information relating to the use of electronic calculators; information relating to the use of microcomputers; provision of technological information relating to the use of semi-conductor manufacturing apparatus; information relating to the use of semi-conductor testing apparatus; information relating to the use of semi-conductor checking apparatus; computer programming and maintenance of computer software and CAD; rental of computer software and CAD; research, developing and designing of semi-conductor devices, integrated circuits, CPUS and electronic circuits for others; surveys, advice, consultation, and providing information in the field of research, developing, and designing for others of semi-conductors and devices, integrated circuits, CPUS and electronic circuits; research, developing, designing, programming and maintenance of computer software for others; surveys, advice, consultation, and providing information in the field of research, developing, designing, programming and maintenance of computer software; technical reports for others in the field of research, developing, designing, programming and maintenance of semi-conductor devices, integrated circuits, CPUs and electronic circuits; technical writing for others in the field of computer software; providing information in the field of research, developing, and designing for others of semi-conductor devices, integrated circuits, CPUs and electronic circuits by means of a global computer network; providing temporary use of on-line non-downloadable applications software (for use in the field of semi-conductor production, for use in electronic circuit design); evaluation of technologies for manufacturing semi-conductors for others; providing technology information for research, developing and designing of semi-conductor devices, integrated circuits, CPUs and electronic circuits; mechanical testing and research; rental of semi-conductor testing apparatus; providing information about rental of semi-conductor testing apparatus; rental of semi-conductor checking apparatus; providing information about rental of semi-conductor checking apparatus; inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus; providing information about inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus; providing temporary use of on-line non-downloadable artificial intelligence computer programs on data networks.

46.

SEMICONDUCTOR DEVICE

      
Application Number 18799138
Status Pending
Filing Date 2024-08-09
First Publication Date 2025-02-13
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Ebata, Tomohiko
  • Matsui, Tetsuo

Abstract

A semiconductor device is provided. The semiconductor device is capable of operating accurately by suppressing errors caused by dielectric relaxation phenomena. The semiconductor device includes a first capacitive element, a signal cancellation circuit, a sampling circuit, a negative feedback circuit, an AD converter, and an addition-and-subtraction circuit.

IPC Classes  ?

  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/12 - Analogue/digital converters
  • H03M 1/14 - Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit

47.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18769072
Status Pending
Filing Date 2024-07-10
First Publication Date 2025-02-06
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Shiraishi, Nobuhito
  • Kunimune, Yorinobu
  • Kato, Yoshimi
  • Ito, Nozomi
  • Yang, Mengnan
  • Sonoda, Kenichiro

Abstract

A semiconductor device includes a first dielectric film, a resistor element disposed on the first dielectric film, and a second dielectric film disposed on the resistor element. The resistor element contains silicon, chromium, and carbon. The silicon concentration in the resistor element increases from a center part of the resistor element towards an upper surface of the resistor element, and also increases from the center part of the resistor element towards a lower surface of the resistor element.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials

48.

SEMICONDUCTOR DEVICE

      
Application Number 18775102
Status Pending
Filing Date 2024-07-17
First Publication Date 2025-02-06
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Tsuchiya, Keita
  • Kariyazaki, Shuuichi
  • Sakamoto, Kazuo

Abstract

The performance of a semiconductor device can be improved. A plurality of protruding electrodes of a semiconductor chip includes: a plurality of first protruding electrodes arranged at positions overlapping a first region of an insulating layer, a plurality of second protruding electrodes arranged at positions overlapping a second region of the insulating layer, and a plurality of third protruding electrodes arranged at positions overlapping a third region of the insulating layer. The plurality of first protruding electrodes is arranged at a first pitch, the plurality of second protruding electrodes is arranged at a second pitch, and the plurality of third protruding electrodes is arranged at a third pitch different from each of the first pitch and the second pitch.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/498 - Leads on insulating substrates
  • H01L 23/528 - Layout of the interconnection structure

49.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18776808
Status Pending
Filing Date 2024-07-18
First Publication Date 2025-02-06
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Yamaguchi, Tadashi
  • Inoue, Shinji

Abstract

The reliability of a semiconductor device is improved. In this disclosure, a gate insulating film is formed on a silicon carbide semiconductor substrate in a process using a material gas containing a halogen element and a metal element by an ALD method.

IPC Classes  ?

  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

50.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME

      
Application Number 18922646
Status Pending
Filing Date 2024-10-22
First Publication Date 2025-02-06
Owner RENESAS ELECTRONICS CORPORATION (Japan)
Inventor
  • Hotta, Katsuhiko
  • Sasahara, Kyoko

Abstract

For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an interlayer insulating film is dry etched with a photoresist film formed thereover as a mask, and interconnect trenches are formed by terminating etching at the surface of a stopper film formed in the interlayer insulating film. The stopper film is made of an SiCN film having a low optical reflectance, thereby causing it to serve as an antireflective film when the photoresist film is exposed.

IPC Classes  ?

  • H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
  • H01L 21/8234 - MIS technology
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/525 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials

51.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18775122
Status Pending
Filing Date 2024-07-17
First Publication Date 2025-01-30
Owner Renesas Electronics Corporation (Japan)
Inventor Matsuura, Hitoshi

Abstract

A semiconductor device including an IGBT with improved switching characteristics is provided. Inside trenches formed inside a semiconductor substrate of an active cell, a trench gate electrode and a trench emitter electrode are formed through a gate insulating film. An n-type hole barrier region is formed inside the semiconductor substrate located between the trenches. A p-type base region is formed inside the hole barrier region. An n-type emitter region is formed inside the base region. A p-type floating region is formed inside the semiconductor substrate of an inactive cell. A depth of the floating region is shallower than each depth of the trenches, and is deeper than a depth of the base region.

IPC Classes  ?

  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/66 - Types of semiconductor device

52.

NON-VOLATILE MEMORY AND REWRITE CONTROL METHOD THEREOF

      
Application Number 18783136
Status Pending
Filing Date 2024-07-24
First Publication Date 2025-01-30
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Hanyu, Masami
  • Nagai, Yoshihiro
  • Ooga, Hirofumi

Abstract

The present invention provides a non-volatile memory system capable of suppressing excessive stress to normal cells and ensuring data retention margin of normal cells. In one embodiment of the non-volatile memory system, it determines whether or not error correction is possible for addresses judged to fail in the erase verify process, counts the number of addresses determined to be error-correctable, and if the number of such addresses is less than or equal to a predetermined number, the erase process is determined to be normal.

IPC Classes  ?

  • G11C 29/42 - Response verification devices using error correcting codes [ECC] or parity check
  • G11C 29/26 - Accessing multiple arrays

53.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18772473
Status Pending
Filing Date 2024-07-15
First Publication Date 2025-01-30
Owner Renesas Electronics Corporation (Japan)
Inventor Nagahama, Yu

Abstract

The reliability of the semiconductor device is improved. A field plate electrode FP is formed inside the trench TR via an insulating film IF1. The other part of the field plate electrode FP is selectively retracted toward the bottom of the trench TR so that a part of the field plate electrode FP remains as a lead-out part FPa. A silicon oxide film OX1 is formed on the upper surface of the field plate electrode FP by thermal oxidation. The insulating film IF1 located on the upper surface TS of the semiconductor substrate SUB and the silicon oxide film OX1 are removed, and the insulating film IF1 is retracted so that its upper surface position is lower than the upper surface position of the field plate electrode FP.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 21/311 - Etching the insulating layers
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

54.

SEMICONDUCTOR DEVICE

      
Application Number 18777820
Status Pending
Filing Date 2024-07-19
First Publication Date 2025-01-30
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Kiryu, Toshiki
  • Ogata, Toma
  • Yayama, Kosuke
  • Shimogawa, Toyohiro

Abstract

While suppressing the influence of voltage noise, the adjustment range of the power supply voltage generated based on the reference voltage is expanded. The semiconductor device includes a reference voltage generation circuit, a regulator, a buffer, and a voltage control circuit. The reference voltage generation circuit is configured to be able to adjust the reference voltage. The regulator is configured to be able to change the output ratio of the power supply voltage to the reference voltage based on the control signal. The semiconductor device further includes a voltage control circuit for outputting a voltage control signal to the regulator to switch the output ratio.

IPC Classes  ?

  • G11C 5/14 - Power supply arrangements
  • G11C 7/22 - Read-write [R-W] timing or clocking circuitsRead-write [R-W] control signal generators or management
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

55.

STEP-DOWN CONVERTER WITH DUAL TRANSFORMERS

      
Application Number CN2023108356
Publication Number 2025/015601
Status In Force
Filing Date 2023-07-20
Publication Date 2025-01-23
Owner
  • RENESAS ELECTRONICS AMERICA INC. (USA)
  • JI, Fei (USA)
Inventor
  • Ji, Fei
  • Yuan, Sheng
  • Xie, Tao

Abstract

Systems and devices for voltage converters are described. A circuit can include a plurality of switching elements, a first transformer and a second transformer. The first transformer can be configured to receive an input voltage at a first voltage level. The first transformer can be further configured to reduce the input voltage to generate an output voltage based on states of the plurality of switches. The output voltage can be at a second voltage level that is less than the first voltage level. The second transformer can be connected to the first transformer in parallel. The second transformer can be configured to perform ripple cancellation on the output voltage. The second transformer can be further configured to provide the output voltage to a load that operates under the second voltage level.

IPC Classes  ?

  • H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M 1/14 - Arrangements for reducing ripples from DC input or output

56.

ELECTRONIC DEVICE

      
Application Number 18770072
Status Pending
Filing Date 2024-07-11
First Publication Date 2025-01-23
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Oikawa, Ryuichi
  • Kariyazaki, Shuuichi

Abstract

The performance of an electronic device can be improved. The electronic device includes a wiring substrate, a semiconductor memory device disposed on the wiring substrate, and a semiconductor control device disposed on the wiring substrate. The wiring substrate includes a first fixed potential wiring and a second fixed potential wiring, and a plurality of signal wirings arranged between the first fixed potential wiring and the second fixed potential wiring. The plurality of signal wirings includes a first signal wiring adjacent to the first fixed potential wiring, a second signal wiring adjacent to the first signal wiring, and a third signal wiring adjacent to the second signal wiring. A first distance between the first signal wiring and the second signal wiring is smaller than a second distance between the second signal wiring and the third signal wiring.

IPC Classes  ?

  • H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
  • H10B 80/00 - Assemblies of multiple devices comprising at least one memory device covered by this subclass

57.

SEMICONDUCTOR DEVICE

      
Application Number 18767265
Status Pending
Filing Date 2024-07-09
First Publication Date 2025-01-16
Owner Renesas Electronics Corporation (Japan)
Inventor Morishita, Yasuyuki

Abstract

A semiconductor device is provided. The semiconductor device includes an input/output cell, a core logic circuit, a first power supply cell, a second power supply cell, a third power supply cell and a fourth power supply cell. Each of the power supply cells includes a protection circuit and a bidirectional diode.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

58.

SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREOF

      
Application Number 18767433
Status Pending
Filing Date 2024-07-09
First Publication Date 2025-01-16
Owner Renesas Electronics Corporation (Japan)
Inventor Ito, Kenichi

Abstract

To provide a semiconductor device and a control method for a semiconductor device that realizes high-speed processing. The semiconductor device includes a storage unit, an encryption processing unit, and a hash processing unit. The data stored in the storage unit is transferred to the encryption processing unit for each pre-calculation data of the first calculation unit, the encryption processing unit applies the calculation processing to generate post-calculation data. The generated first calculation unit of the post-calculation data is transferred to the hash processing unit, the hash processing unit applies the hash calculation process to the post-calculation data of the second calculation unit. The post-calculation data is transferred to the storage unit, and the calculation processing and the hash calculation processing are performed in parallel.

IPC Classes  ?

  • G06F 21/72 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
  • G06F 21/79 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
  • G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices

59.

SEMICONDUCTOR DEVICE

      
Application Number 18766799
Status Pending
Filing Date 2024-07-09
First Publication Date 2025-01-16
Owner Renesas Electronics Corporation (Japan)
Inventor Maekawa, Keiichi

Abstract

A field plate electrode FP and a gate electrode GE are formed inside a plurality of trenches TR1. An outer peripheral trench TR2 surrounds the plurality of trenches TR1 in plan view. A field plate electrode FP (lead-out portion FPa) is formed inside the outer peripheral trench TR2. The outer peripheral trench TR2 has an extending part TR2a extending in the Y direction, an extending part TR2b extending in the X direction, and a corner part TR2c extending in a direction different from the X and Y directions in plan view and connecting the extending part TR2a and the extending part TR2b. In the Y-direction, the distance L2 between the end part 10 of the closest trench TR1 closest to the extending part TR2a and the extending part TR2b is longer than the distance L3 between the end part 10 of the other trench TR1 and the extending part TR2b.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

60.

SEMICONDUCTOR DEVICE

      
Application Number 18768246
Status Pending
Filing Date 2024-07-10
First Publication Date 2025-01-16
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Igarashi, Takayuki
  • Nakashiba, Yasutaka

Abstract

A semiconductor device includes a semiconductor substrate, a first coil, a second coil, a third coil, and a fourth coil, an insulating layer, and a first shield. The semiconductor substrate has a device region and a peripheral region. The peripheral region is present around the device region in a plan view. The first coil and the second coil are arranged on the device region and are arranged in a first direction in a plan view. The third coil and the fourth coil are respectively opposed to the first coil and the second coil via the insulating layer. The first shield is arranged between the semiconductor substrate and the first and second coils and overlaps with the first coil and the second coil in a plan view. A width of the first shield in a second direction orthogonal to the first direction is larger than a width of the first coil in the second direction and a width of the second coil in the second direction. The first shield is electrically connected to a reference potential.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

61.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18666131
Status Pending
Filing Date 2024-05-16
First Publication Date 2025-01-09
Owner Renesas Electronics Corporation (Japan)
Inventor Furuya, Keiichi

Abstract

A semiconductor substrate includes a p-type substrate body, an n-type buried layer on the p-type substrate body, and a p-type semiconductor layer on the n-type buried layer. A DTI region penetrates through the p-type semiconductor layer and the n-type buried layer, and reaches the p-type substrate body. An n-type semiconductor region, which is a cathode region of a Zener diode, and a p-type anode region of the Zener diode are formed in the semiconductor layer. The p-type anode region includes a p-type first semiconductor region formed under the n-type semiconductor region, and a p-type second semiconductor region formed under the p-type first semiconductor region. A PN junction is formed between the p-type first semiconductor region and the n-type semiconductor region. An impurity concentration of the p-type second semiconductor region is higher than an impurity concentration of the p-type first semiconductor region.

IPC Classes  ?

  • H01L 29/866 - Zener diodes
  • H01L 21/8234 - MIS technology
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/08 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
  • H01L 29/66 - Types of semiconductor device

62.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18762960
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-09
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Omizu, Yuto
  • Nagahama, Yu

Abstract

A field plate electrode FP is formed inside the trench TR via an insulating film IF1. The insulating film IF1 is retracted so that the position of the upper surface of the insulating film IF1 is lower than the position of the upper surface of the field plate electrode FP. An embedded insulating film EF1 is formed to cover the field plate electrode FP and the insulating film IF1. The embedded insulating film EF1 is retracted so that the position of the upper surface of the embedded insulating film EF1 is lower than the position of the upper surface of the field plate electrode FP. A gate insulating film GI is formed inside the trench TR, and an insulating film IF2 is formed to cover the field plate electrode FP. A gate electrode is formed on the field plate electrode FP via the insulating film IF2.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

63.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18763910
Status Pending
Filing Date 2024-07-03
First Publication Date 2025-01-09
Owner Renesas Electronics Corporation (Japan)
Inventor Goto, Yotaro

Abstract

A dielectric film, which contacts a field plate electrode, is formed between the field plate electrode and a gate electrode, and a recess is formed at an upper surface of the dielectric film and between a drain region and the gate electrode.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

64.

SEMICONDUCTOR DEVICE

      
Application Number 18890208
Status Pending
Filing Date 2024-09-19
First Publication Date 2025-01-09
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Kaya, Yoshinori
  • Eikyu, Katsumi
  • Shimomura, Akihiro
  • Yanagigawa, Hiroshi
  • Mori, Kazuhisa

Abstract

To reduce on-resistance while suppressing a characteristic variation increase of a vertical MOSFET with a Super Junction structure, the vertical MOSFET includes a semiconductor substrate having an n-type drift region, a p-type base region formed on the surface of the n-type drift region, a plurality of p-type column regions disposed in the n-type drift region at a lower portion of the p-type base region by a predetermined interval, a plurality of trenches whose bottom surface reaches a position deeper than the p-type base region and that is disposed between the adjacent p-type column regions, a plurality of gate electrodes formed in the plurality of trenches, and an n-type source region formed on the side of the gate electrode in the p-type base region.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device

65.

DEVICE AND METHOD OF SECURE DECRYPTION BY VIRTUALIZATION AND TRANSLATION OF PHYSICAL ENCRYPTION KEYS

      
Application Number 18892225
Status Pending
Filing Date 2024-09-20
First Publication Date 2025-01-09
Owner Renesas Electronic Corporation (Japan)
Inventor
  • Nasser, Ahmad
  • Winder, Eric

Abstract

Example implementations include a system of secure decryption by virtualization and translation of physical encryption keys, the system having a key translation memory operable to store at least one physical mapping address corresponding to at least one virtual key address, a physical key memory operable to store at least one physical encryption key at a physical memory address thereof; and a key security engine operable generate at least one key address translation index, obtain, from the key translation memory, the physical mapping address based on the key address translation index and the virtual key address, and retrieve, from the physical key memory, the physical encryption key stored at the physical memory address.

IPC Classes  ?

  • G06F 12/14 - Protection against unauthorised use of memory

66.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18892925
Status Pending
Filing Date 2024-09-23
First Publication Date 2025-01-09
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Sakai, Atsushi
  • Eikyu, Katsumi
  • Okamoto, Yasuhiro
  • Hisada, Kenichi
  • Machida, Nobuo

Abstract

Semiconductor device has a cell region and a peripheral region, and has a drift layer, a trench, an gate dielectric film on an inner wall of the trench, a gate electrode, and a p-type first semiconductor region below the trench in the cell region on a semiconductor substrate. Further, in the peripheral region on the semiconductor substrate, p-type second semiconductor region is formed in the same layer as the p-type first semiconductor region, a width of the p-type first semiconductor region and a width of the p-type second semiconductor region are different.

IPC Classes  ?

  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

67.

FOREIGN OBJECT DETECTION BASED ON TRANSMITTER INPUT PARAMETER

      
Application Number 18821148
Status Pending
Filing Date 2024-08-30
First Publication Date 2024-12-26
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Jeong, Chan Young
  • Qi, Tao
  • Ryu, Young Chul
  • Choi, Kwangmuk
  • Agrawal, Pooja
  • Solanki, Krishal Jaswantsinh
  • Dzebic, Adnan

Abstract

Systems, apparatuses, and methods for detecting a foreign object on a wireless power charging region are described. A circuit can detect an object inductively coupled to a wireless power transmitter. The circuit can further measure an input parameter prior to a power transfer stage, the input parameter can be one of an input current and an input power. The circuit can further compare the measured input parameter with a predetermined value. The circuit can further determine whether the object is a foreign object or the wireless power receiver based on a result of the comparison between the measured input parameter with the predetermined value.

IPC Classes  ?

  • H02J 50/60 - Circuit arrangements or systems for wireless supply or distribution of electric power responsive to the presence of foreign objects, e.g. detection of living beings
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices

68.

DRIVER FOR DRIVING AN ELECTROMECHANICAL DEVICE

      
Application Number 18337505
Status Pending
Filing Date 2023-06-20
First Publication Date 2024-12-26
Owner Renesas Electronics America Inc. (USA)
Inventor Lawton, Joshua

Abstract

A driver for driving an electromechanical device having a solenoid and a mechanical switch. The driver includes an input port, a ground port, first and second output ports connectable to the electromechanical device; and two power switches. A controller operates in a first mode to charge the solenoid and close the mechanical switch, a second mode to maintain the mechanical switch closed, and a third mode to discharge the solenoid and open the mechanical switch. In the first and second modes, the low-side power switch is on and the high-side power switch is controlled to switch between an on-state and an off-state by the controller. In the on-state a path is formed between the input port and ground via the high-side and low-side power switches, and the solenoid. In the off-state a path is formed between ground and ground via a ground diode, the solenoid and the low-side power switch.

IPC Classes  ?

  • H01H 47/32 - Energising current supplied by semiconductor device
  • H03K 17/56 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices

69.

SEMICONDUCTOR DEVICE

      
Application Number 18666149
Status Pending
Filing Date 2024-05-16
First Publication Date 2024-12-26
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Nakashiba, Yasutaka
  • Igarashi, Takayuki

Abstract

Providing a semiconductor device that can suppress the heat generation in a transformer. The semiconductor device comprises first, second, third and fourth coils, a lead wire, and an insulating layer. The lead wire is formed on the same layer as the first and second coils. The first and second coils are adjacent to each other through the lead wire in a plan view and are electrically connected in series through the lead wire. The insulating layer covers the first and second coils, and the lead wire. The third coil is formed on the first coil so as to face the first coil through the insulating layer. The fourth coil is formed on the second coil so as to face the second coil through the insulating layer. The third and fourth coils are adjacent to each other in a plan view and are electrically connected to each other.

IPC Classes  ?

  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 27/01 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate

70.

FemtoClock

      
Application Number 1829457
Status Registered
Filing Date 2024-09-06
Registration Date 2024-09-06
Owner Renesas Electronics Corporation (Japan)
NICE Classes  ?
  • 09 - Scientific and electric apparatus and instruments
  • 42 - Scientific, technological and industrial services, research and design

Goods & Services

Clock generators for computers; oscillators; frequency synthesizers; central processing unit [CPU] clocks; resonators; integrated circuits; electronic integrated circuits; large scale integrated circuits; semiconductors; semiconductor chips; semiconductor chipsets; microprocessors; semi-conductor memories; electronic semi-conductors; circuit boards; chips [integrated circuits]; computer software; computer programs; computer hardware and software for use in implementing the Internet of Things [IoT]; computer hardware; computer software platforms, recorded or downloadable; computers and computer peripherals; DC/DC converters; AC/DC converters; converters, electric; electrical power supplies; components for electrical power supplies; accessories for electrical power supplies; electronic power control machines and apparatus; power control devices; electronic power supplies; electric current control devices; power distribution or control machines and apparatus; rotary converters; phase modifiers; solar batteries; accumulators [batteries]; electrical cells and batteries; current sensors and testers for measuring semiconductor characteristics; electric or magnetic meters and testers; electric wires and cables; telecommunication machines and apparatus; personal digital assistants; vehicle drive training simulators; sports training simulators; laboratory apparatus and instruments; photographic machines and apparatus; cinematographic machines and apparatus; optical machines and apparatus; measuring or testing machines and instruments; magnetic cores; resistance wires; electrodes; game programs for home video game machines; electronic circuits and CD-ROMs recorded with programs for hand-held games with liquid crystal displays; phonograph records; downloadable music files; downloadable image files; recorded video discs and video tapes; electronic publications; exposed cinematographic films; exposed slide films; slide film mounts; apparatus for recording, transmission or reproduction of sound or images; magnetic data carriers and recording discs; data processing apparatus and computers; electronic agendas; amplifiers; antennas; bar code readers; electric cables; fiber optic cables; encoded magnetic cards; cassette players; commutators; compact discs [audio-video]; computer game programs; computer memories; recorded or downloadable computer programs; computers; printers for use with computers; electric contacts; control panels for power distributing; magnetic data media; optical data media; optical discs; blank magnetic discs; disk drives for computers; downloadable electronic publications; integrated circuit cards; inverters [electricity]; lasers, not for medical purposes; magnetic tapes; meters; modems; electric monitoring apparatus; monitors for computer; mice for computers; digital color photocopiers; portable telephones; radio pagers; optical character readers; remote control apparatus; electric resistances; scanners for computer; electric sockets; sound recording apparatus; sound recording magnetic discs and video tapes; sound reproducing apparatus; sound transmitting apparatus; personal stereos; electric switches; switches; telephone apparatus; thermostats; telecommunication transmitters; video cassettes; video game cartridges; video recorders; video telephones; air-gas producers for laboratory use; thermostats for laboratory use; hygrostats for laboratory use; glassware for laboratory experiments; porcelain instruments for laboratory experiments; furnaces for laboratory experiments; laboratory experimental machines and apparatus; models/specimens for laboratory use; tilting pan heads [for laboratory use]; cameras; range finders; photo-developing/printing/enlarging or finishing apparatus; tripods [for cameras]; bellows [photography]; spools; slide projectors; self-timers; power supply equipment for photography flash bulbs; flash lamps; viewfinders; lens hoods; flash guns; shutter releases; optical lenses; exposure meters; projectors [projection apparatus]; transparent sheets [exposed films] for overhead projectors; photograph developing or finishing apparatus; cinematographic cameras; projection screens; editing machines for movie films; lens barrels [for telescopes]; tripods [for telescopes]; periscopes; binoculars; reflectors [for telescopes]; prisms [telescopes]; telescopes; magnifying glasses; metallurgical microscopes; biological microscopes; polarizing microscopes; stereoscopes; microscopes; temperature indicators; gasometers; thermometers; water meters; balances/scales; tape measures; masu [Japanese box-shaped volume measure]; planimeters; rules; standard-unit measuring machines and apparatus; pressure gauges/manometers; level gauges; acoustic meters; tachometers; accelerometers; refractometers; luminoflux meters; photometers; altimeters; hygrometers; illuminometers; vibration gauges; noise meters; logs; speedometers [speed indicators]; calorimeters; viscosimeters; densitometers/concentration meters; gravimeters/aerometers; densimeters [density meters]; dynamometers; flowmeters; derived-unit measuring machines and apparatus; angle gauges; angle dividing apparatus [measuring instruments]; spherometers; inclinometers; interferometers; straightness testers; projectors; graduation checkers [calibration checkers]; length gauges; screw-thread measuring machines and instruments; comparators; surface roughness testers; flatness testers; precision measuring machines and instruments; automatic pressure controllers; automatic liquid-flow controllers; automatic fluid-composition controllers; automatic liquid-level controllers; automatic temperature controllers; automatic combustion controllers; automatic vacuum controllers; automatic calorie controllers; programmable logic controllers; automatic adjusting/regulating machines and instruments; metal compression testers; metal hardness testers; metal strength testers; rubber testing machines; concrete testing machines; cement testing machines; textile testing machines; plastic testing machines; lumber testing machines; material testing machines and instruments; alidades; meteorological instruments; base plates for measuring instruments; distance measuring machines or apparatus [range finders]; clinometers; magnetic compasses; compass needles; gyro compasses; gyromagnetic compasses; analysis instruments for photogrammetric purposes; levels [spirit levels]; precision theodolites; measuring rods; surveying chains; electronic target location apparatus; transits for surveying; levelling rods for surveying; sextants; surveying machines and instruments; meridian transits; astronomical spectroscopes; zenith telescopes; astrometric measuring apparatus and instruments; electronic charts for identifying hiding-power of paint; rust-formation testing pieces; relays; circuit breakers; power controllers; current rectifiers; connectors; circuit closers; capacitors; resistors; distributing boxes; distribution boards [electricity]; fuses; lightning arresters; transformers; induction voltage regulators; reactors [electricity]; phase meters; oscillographs; circuit testers; antenna measuring apparatus; detectors; magnetic measuring apparatus; frequency meters; vacuum tube characteristic measuring apparatus; watt hour meters; ammeters; wattmeters; oscillators; electrical power testers; interphones; automatic telephone exchange apparatus; manual telephone exchange apparatus; telephone sets; teletypewriters; automatic telegraph apparatus; phototelegraphy apparatus; manual telegraph apparatus; facsimile machines; audio frequency transmission apparatus; cable-type carrier-frequency apparatus; power-line-type frequency-carrier apparatus; open-wire-type frequency-carrier apparatus; carrier-frequency repeaters; transmission machines and apparatus for telecommunication; television receivers; television transmitters; radio receivers [radios]; radio transmitters; broadcasting machines and apparatus; portable radio communication apparatus; aeronautical radio communication apparatus; multichannel radio communication apparatus for fixed stations; monochannel radio communication apparatus for fixed stations; radio communication apparatus for vehicles; marine radio communication apparatus; radio communication machines and apparatus; navigation apparatus for vehicles; beacon apparatus; direction finders; radar apparatus; LORAN apparatus; radio machines and apparatus; remote control telemetering apparatus; loudspeakers/megaphones; compact disc players; juke boxes; tape recorders; electric phonographs; record players; audio frequency devices and apparatus; video disc players; video frequency devices and apparatus; cabinets for loudspeakers; coils, electric; magnetic tape erasers; magnetic tape cleaners; magnetic head erasers; magnetic head cleaners; speakers; stands and racks for telecommunication machines and apparatus; dials [for photographic transparencies]; fuses for communication apparatus; tapes for tape recorders; change-over switches; distribution boards; pickups; video tapes; indicator lights for telecommunication apparatus; electrical phonomotors; headphones; protectors for telecommunication apparatus; microphones; record cleaners [cleaning apparatus for phonograph records]; blank record discs; cleaning apparatus for phonograph records; parts and accessories for telecommunication machines and apparatus; geiger counters; cyclotrons; X-ray apparatus, not for medical use; betatrons, not for medical use; magnetic surveying machines; magnetic object detectors; shielding cases for magnetic discs; seismic wave surveying machines; hydrophone machines and apparatus; ultrasonic depth sounders; ultrasonic flaw detectors; ultrasonic sensors; electrostatic copying machines; remote control apparatus for opening and closing doors; electronic microscopes; desk-top computers; word processors; X-rays tubes, not for medical use; tubes for photographic instruments; vacuum tubes; rectifier tubes; cathode ray tubes; discharge tubes; electron tubes; thermistors; diodes; transistors; electronic circuits and CD-ROMs recorded with program for handheld liquid crystal display game; pre-recorded video discs and tapes; semi-conductor devices; semi-conductor integrated circuits including CPU; electronic circuits; magnetic drums, magnetic discs, magnetic tapes, CD-ROMs, electronic circuits and other storage mediums recorded with a program for developing and designing of semi-conductor devices, integrated circuits including CPU, electronic circuits and other electronic machines; microcontrollers; microcomputers; programs for microcomputers; circuits for testing/evaluating of microcomputers, microcontrollers, microprocessors and semi-conductor integrated circuits; semi-conductor integrated circuits; semi-conductor commutators; downloadable electronic publications for semi-conductors; silicon wafers for semi-conductors; DVD players; DVD recorders and digital video cameras; digital still cameras; video cameras; liquid crystal displays; plasma display television sets; light emitting diodes [LED]; printed circuit boards; notebook computers; handheld computers; personal digital assistants [PDA]; data processing apparatus; electrostatic copying machines; printers; cathode ray tube displays; computer peripheral equipment; compact discs [CD]; digital versatile disks [DVD]; encoded magnetic, optical and integrated circuit cards; magnetic cards; video projectors; semi-conductor testing apparatus. Design of electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design and testing of semiconductor for others; designing of machines, apparatus, instruments [including their parts] or systems composed of such machines, apparatus and instruments; design of semiconductor devices; design of semiconductor chips; design of integrated circuits; design and updating of computer software; provision of technological information in relation to semiconductor including integrated circuits; design of computer-simulated models; computer programming; technological advice relating to computers, automobiles and industrial machines; testing or research in relation to electronic circuit, semiconductor devices, integrated circuits and large scale integrated circuits; design, development, testing and inspection of power management integrated circuits (PMICs); testing and research services relating to machines, apparatus and instruments; software as a service [SaaS]; platform as a service [PaaS]; leasing of a database server to third parties; rental of computers; providing computer programs on data networks; rental of laboratory apparatus and instruments; providing meteorological information; architectural design; surveying; geological surveys; testing, inspection and research services in the fields of pharmaceuticals, cosmetics and foodstuffs; research on building construction or city planning; testing and research services in the field of preventing pollution; testing and research services in the field of electricity; testing and research services in the field of civil engineering; testing, inspection and research services in the fields of agriculture, livestock breeding and fisheries; rental of measuring apparatus; rental of telescopes; rental of technical drawing instruments; design and development of computer hardware and software; authenticating works of art; calibration [measuring]; computer software design; computer system design; computer systems analysis; consultancy in the field of computer hardware; consultation in environment protection; conversion of data or documents from physical to electronic media; creating and maintaining web sites for others; data conversion of computer programs and data, not physical conversion; design of interior decor; dress designing; duplication of computer programs; engineering; graphic arts designing; hosting computer sites [web sites]; industrial design; installation of computer software; maintenance of computer software; material testing; packaging design; physics [research]; technical project studies; quality control; recovery of computer data; rental of computer software; research and development for others; updating of computer software; styling [industrial design]; technical research; textile testing; underwater exploration; vehicle roadworthiness testing; consultancy and advice in the field of design of semi-conductor devices; testing, checking and research of semi-conductor devices; providing information about design of semi-conductor devices/consultancy and advice in the field of design of semi-conductor devices, testing, checking and research in the field of semi-conductor devices; guidance and advice in the field of design of semi-conductor chips; testing, checking and research in the field of semi-conductor chips/consultancy and advice in the field of design of semi-conductor chips, testing, checking and research in the field of semi-conductor chips; consultancy and advice in the field of design of integrated circuits; testing, checking and research in the field of integrated circuits; providing information about design of integrated circuits/consultancy and advice in the field of design of integrated circuits, testing, checking and research in the field of integrated circuits; design of microcomputers; consultancy and advice in the field of design of microcomputers; testing, checking and research in the field of microcomputers; providing information about design of microcomputers/consultancy and advice in the field of design of microcomputers, testing, checking and research in the field of microcomputer; design of IC cards; consultancy and advice in the field of design of IC cards; testing, checking and research in the field of IC cards; providing information about design of IC cards/consultancy and advice in the field of design of IC cards, testing, checking and research in the field of IC cards; design of semi-conductor memory; consultancy and advice in the field of design of semi-conductor memory; testing, checking and research in the field of semi-conductor memory; providing information about design of semi-conductor memory/consultancy and advice in the field of design of semi-conductor memory, testing, checking and research in the field of semi-conductor memory; design of circuit boards; consultancy and advice in the field of design of circuit boards; testing, checking and research in the field of circuit boards; providing information about design of circuit boards/consultancy and advice in the field of design of circuit boards, testing, checking and research in the field of circuit boards; design of semi-conductor manufacturing apparatus; consultancy and advice in the field of design of semi-conductor manufacturing apparatus; testing, checking and research in the field of semi-conductor manufacturing apparatus; providing information about design of semi-conductor manufacturing apparatus/consultancy and advice in the field of design of semi-conductor manufacturing apparatus, testing, checking and research in the field of semi-conductor manufacturing apparatus; design of semi-conductor testing apparatus; consultancy and advice in the field of design of semi-conductor testing apparatus; testing, checking and research in the field of semi-conductor testing apparatus; providing information about design of semi-conductor testing apparatus/consultancy and advice in the field of design of semi-conductor testing apparatus, testing, checking and research in the field of semi-conductor testing apparatus; design of semi-conductor checking apparatus; consultancy and advice in the field of design of semi-conductor checking apparatus; testing, checking and research in the field of semi-conductor checking apparatus; providing information about design of semi-conductor checking apparatus/consultancy and advice in the field of design of semi-conductor checking apparatus, testing, checking and research in the field of semi-conductor checking apparatus; information relating to the use of electronic calculators; information relating to the use of microcomputers; provision of technological information relating to the use of semi-conductor manufacturing apparatus; information relating to the use of semi-conductor testing apparatus; information relating to the use of semi-conductor checking apparatus; computer programming and maintenance of computer software and CAD software; rental of computer software and CAD software; research, developing and designing of semi-conductor devices, integrated circuits, CPUs and electronic circuits for others; surveys, advice, consultation, and providing information in the field of research, developing, and designing for others of semi-conductors and devices, integrated circuits, CPUs and electronic circuits; research, developing, designing, programming and maintenance of computer software for others; surveys, advice, consultation, and providing information in the field of research, developing, designing, programming and maintenance of computer software; preparation of technical reports for others in the field of research, developing, designing, programming and maintenance of semi-conductor devices, integrated circuits, CPUs and electronic circuits; technical writing for others in the field of computer software; providing information in the field of research, developing, and designing for others of semi-conductor devices, integrated circuits, CPUs and electronic circuits by means of a global computer network; providing temporary use of on-line non-downloadable applications software (for use in the field of semi-conductor production, for use in electronic circuit design); evaluation of technologies for manufacturing semi-conductors for others; providing technology information for research, developing and designing of semi-conductor devices, integrated circuits, CPUs and electronic circuits; mechanical testing and research; rental of semi-conductor testing apparatus; providing information about rental of semi-conductor testing apparatus; rental of semi-conductor checking apparatus; providing information about rental of semi-conductor checking apparatus; inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus; providing information about inspection of semi-conductor manufacturing apparatus, semi-conductor testing apparatus and semi-conductor checking apparatus.

71.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18641596
Status Pending
Filing Date 2024-04-22
First Publication Date 2024-12-19
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Koshimizu, Makoto
  • Tsubaki, Shigeki

Abstract

An anode region and a cathode region of a photodiode are formed in a semiconductor substrate. At a main surface of the semiconductor substrate, a plurality of first STI regions are formed on the cathode region, and an oxide film is formed between the plurality of first STI regions. A shield electrode is formed on the plurality of first STI regions and the oxide film. A thickness of each of the plurality of first STI regions is smaller than a thickness of second STI region.

IPC Classes  ?

  • H01L 27/144 - Devices controlled by radiation
  • H01L 21/762 - Dielectric regions
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 31/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof - Details

72.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18646495
Status Pending
Filing Date 2024-04-25
First Publication Date 2024-12-19
Owner Renesas Electronics Corporation (Japan)
Inventor Takahashi, Fumitoshi

Abstract

In a semiconductor substrate, an n-type cathode region, an n-type well region, and a p-type anode region are formed. An impurity concentration of the cathode region is higher than an impurity concentration of the well region. In plan view, the anode region includes the cathode region, and the well region includes the anode region and the cathode region. A depth of the well region from an upper surface of the semiconductor substrate is greater than a depth of the anode region from the upper surface of the semiconductor substrate. A depth of the cathode region from the upper surface of the semiconductor substrate is greater than the respective depths of the anode region and the well region.

IPC Classes  ?

  • H01L 29/866 - Zener diodes
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC
  • G05F 3/18 - Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using Zener diodes
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 29/66 - Types of semiconductor device

73.

SEMICONDUCTOR DEVICE

      
Application Number 18646506
Status Pending
Filing Date 2024-04-25
First Publication Date 2024-12-19
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Igarashi, Ryuichi
  • Matsubara, Katsushige
  • Terashima, Kazuaki

Abstract

A semiconductor device includes a scratchpad memory, a memory controller, and a MAC (multiply-accumulation) unit. The scratchpad memory is configured to store image data of N channels and includes M memories which are individually accessible, wherein M is integer of at least 2 and N is an integer of at least 2. The memory controller controls access to the scratchpad memory such that pixel data of the N channels which are arranged at a same position in image data of the N channels are respectively stored in difference memories in the M memories. The MAC unit includes a plurality of calculators to calculate pixel data of the N channels read from the scratchpad memory by using the memory controller and a weight parameter.

IPC Classes  ?

  • G06F 12/1045 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
  • G06F 7/544 - Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state deviceMethods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using unspecified devices for evaluating functions by calculation
  • G06F 12/06 - Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication

74.

PACKAGE FOR POWER MODULE

      
Application Number US2024032715
Publication Number 2024/254248
Status In Force
Filing Date 2024-06-06
Publication Date 2024-12-12
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor
  • Liu, Zhizheng
  • Zhang, Haiyu
  • A Tharumalingam, Sri Ganesh
  • Kwoka, Mark Alan
  • Eom, Yonggoo

Abstract

An electronic system comprising a printed circuit board having a conductive trace that is coupled to a voltage output is provided. A voltage regulator is disposed on the printed circuit board that includes a voltage regulator phase output terminal. Additionally, the electronic system comprises an inductor module coupled with the voltage regulator. The inductor module includes an inductor core and an inductor segment having a first and a second end, where the inductor segment first end is connected to the voltage regulator phase output terminal and the inductor segment second end is connected to the printed circuit board conductive trace. The inductor segment is configured to pass through and wrap around at least a portion of the inductor core and the voltage regulator is configured to transfer heat through the voltage regulator phase output terminal to the inductor segment and the inductor module.

IPC Classes  ?

  • H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
  • H05K 1/02 - Printed circuits Details
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

75.

A/D CONVERTER CONTROL CIRCUIT

      
Application Number 18678795
Status Pending
Filing Date 2024-05-30
First Publication Date 2024-12-05
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Ono, Akihiro
  • Nimiya, Takanobu
  • Konno, Yoshihiro
  • Shindo, Yuji

Abstract

An A/D conversion control circuit includes a scan group control unit and a FIFO unit. The scan group control unit includes an input reception unit and an arbitration unit. The FIFO unit includes a plurality of pointer control units provided correspondingly to the plurality of FIFO memories, respectively. Each of the pointer control units clears or changes a position of a write pointer/read pointer of the corresponding FIFO memory at the timing of at least any of the start, interruption, and/or restart of the corresponding scan group according to the priority of the scan group.

IPC Classes  ?

  • G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal

76.

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE

      
Application Number 18678803
Status Pending
Filing Date 2024-05-30
First Publication Date 2024-12-05
Owner Renesas Electronics Corporation (Japan)
Inventor Kokubun, Hiroyuki

Abstract

To be able to detect abnormalities more appropriately. An information processing apparatus includes an acquisition circuit and an estimation circuit. It acquires information indicating a temperature transition and a current transition related to a semiconductor element of a power conversion device and an electric motor. And it estimates an anomaly of a specific type in a system based on the acquired information.

IPC Classes  ?

  • H02P 29/68 - Controlling or determining the temperature of the motor or of the drive based on the temperature of a drive component or a semiconductor component
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

77.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18630051
Status Pending
Filing Date 2024-04-09
First Publication Date 2024-11-28
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Nabuchi, Yuta
  • Shimomura, Akihiro

Abstract

A trench TR1 and a trench TR2 are formed in a semiconductor substrate SUB so as to reach a predetermined depth from the upper surface (TS) of the semiconductor substrate SUB. A field plate electrode FP is formed at a lower portion of the trench TR1, and a gate electrode GE1 is formed at an upper portion of the trench TR1. A gate electrode GE2 is formed inside the trench TR2. The depth of the trench TR1 is deeper than the depth of the trench TR2. The trench TR1 extends in the Y direction, and the trench TR2 extends in the X direction. The trench TR1 and the trench TR2 are in communication with each other. The gate electrode GE1 and the gate electrode GE2 are integrated with each other.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

78.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

      
Application Number 18795310
Status Pending
Filing Date 2024-08-06
First Publication Date 2024-11-28
Owner RENESAS ELECTRONICS CORPORATION (Japan)
Inventor
  • Tsunomura, Takaaki
  • Yamamoto, Yoshiki
  • Shinohara, Masaaki
  • Iwamatsu, Toshiaki
  • Oda, Hidekazu

Abstract

On a semiconductor substrate having an SOI region and a bulk silicon region formed on its upper surface, epitaxial layers are formed in source and drain regions of a MOSFET formed in the SOI region, and no epitaxial layer is formed in source and drain regions of a MOSFET formed in the bulk silicon region. By covering the end portions of the epitaxial layers with silicon nitride films, even when diffusion layers are formed by implanting ions from above the epitaxial layers, it is possible to prevent the impurity ions from being implanted down to a lower surface of a silicon layer.

IPC Classes  ?

  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 21/8234 - MIS technology
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 29/417 - Electrodes characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
  • H01L 29/66 - Types of semiconductor device
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

79.

RESONANT SWITCHED CAPACITOR CONVERTER

      
Application Number 18324396
Status Pending
Filing Date 2023-05-26
First Publication Date 2024-11-28
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Ji, Fei
  • Petricek, Shea Lynn

Abstract

A DC-DC power converter has a ground terminal, an input terminal for receiving an input voltage and an output terminal for providing an output voltage with a target conversion ratio. The power converter includes a coupled inductor having a first winding and a second winding coupled to the output terminal; a first flying capacitor coupled to a first inductor and to the second winding; a second flying capacitor coupled to a second inductor and to the first winding; an input capacitor coupling the input terminal to the ground terminal; an output capacitor coupling the output terminal to the ground terminal; a network of switches; and a driver adapted to drive the network of switches with a sequence of states during a drive period, wherein the sequence of states forms a switching cycle.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

80.

SEMICONDUCTOR DEVICE

      
Application Number 18613754
Status Pending
Filing Date 2024-03-22
First Publication Date 2024-11-21
Owner Renesas Electronics Corporation (Japan)
Inventor Ozawa, Kodai

Abstract

A semiconductor device capable of suppressing variation in breakdown voltage is provided. The semiconductor device includes a semiconductor substrate, an insulating film, a first electrode and a second electrode, and a semi-insulating film. The semiconductor substrate has a first surface. The semiconductor substrate has, in plan view, an element region and a termination region surrounding the element region. The semiconductor substrate has a first impurity region formed on a first surface in the termination region. The semi-insulating film is disposed so as to extend over the insulating film between the first electrode and the second electrode in plan view. The semi-insulating film includes silicon and nitrogen.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
  • H01L 29/861 - Diodes

81.

SEMICONDUCTOR DEVICE

      
Application Number 18616917
Status Pending
Filing Date 2024-03-26
First Publication Date 2024-11-21
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Eikyu, Katsumi
  • Sakai, Atsushi
  • Nishimura, Tomoya

Abstract

Performance of a semiconductor device is improved. In a semiconductor substrate (SUB), a trench TR1 and a trench TR2 are formed so as to reach a predetermined depth from an upper surface (TS) of the semiconductor substrate (SUB). A field-plate electrode (FP) is formed at a lower portion of the trench TR1, and a gate-electrode GE1 is formed at an upper portion of the trench TR1. A gate electrode GE2 is formed inside the trench TR2. The depth of the trench TR1 is deeper than the depth of the trench TR2. The trench TR1 is surrounded by the trench TR2 in plan view.

IPC Classes  ?

  • H01L 29/40 - Electrodes
  • H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

82.

CLOAKING AND POWER MANAGEMENT IN WIRELESS POWER TRANSFER

      
Application Number 18423496
Status Pending
Filing Date 2024-01-26
First Publication Date 2024-11-21
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Dzebic, Adnan
  • Mehas, Gustavo James
  • Agrawal, Pooja

Abstract

In an embodiment, an apparatus is disclosed. The apparatus includes a battery and a wireless power receiver. The wireless power receiver includes a controller and a memory subsystem. The controller is configured to perform a handshake with a wireless power transmitter. The handshake corresponds to a temporary suspension of a power transfer between the wireless power transmitter and the wireless power receiver. The controller is configured to transition the wireless power receiver from a power transfer mode, in which power is transferred wirelessly from the wireless transmitter to the wireless receiver, to a cloak mode, in which the power transfer is suspended, based on the handshake and obtain a supply of power from the battery based on the transition to the cloak mode, the power being configured for use by the controller to maintain power transfer state information about the temporarily suspended power transfer in the memory subsystem.

IPC Classes  ?

  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

83.

FLYING CAPACITOR BALANCING FOR MULTI-LEVEL VOLTAGE CONVERTER

      
Application Number 18320014
Status Pending
Filing Date 2023-05-18
First Publication Date 2024-11-21
Owner Renesas Electronics America Inc. (USA)
Inventor Concklin, Barry John

Abstract

Apparatuses, devices, and methods for operating a multi-level voltage converter are described. A circuit can, in response to a completion of a state of the multi-level voltage converter, output an indication that indicates whether a voltage of a flying capacitor in a multi-level voltage converter reaches a reference voltage or fails to reach the reference voltage. The completed state can be one of a charge state and a discharge state. A controller can, in response to the indication indicating the voltage of the flying capacitor fails to reach the reference voltage, repeat the completed state to operate the multi-level voltage converter.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

84.

SWITCHING CONVERTER

      
Application Number 18313785
Status Pending
Filing Date 2023-05-08
First Publication Date 2024-11-14
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Lalithambika, Vinod Aravindakshan
  • Miller, Christopher John
  • Warrington, Allan Richard
  • Labbe, Benoit

Abstract

A switching converter is presented. The switching converter has a high side power switch coupled to a low side power switch at a switching node, a driver and a timing circuit. The driver generates a drive signal having a on-time to drive the high side power switch. The timing circuit generates a control signal to adjust the on-time during a load transient period.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

85.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18311561
Status Pending
Filing Date 2023-05-03
First Publication Date 2024-11-07
Owner RENESAS ELECTRONICS CORPORATION (Japan)
Inventor
  • Nakashiba, Yasutaka
  • Hata, Toshiyuki

Abstract

A semiconductor device includes: a first semiconductor chip mounted on a chip mounting portion via a first bonding material; and a second semiconductor chip mounted on the first semiconductor chip via a second bonding material. The first semiconductor chip includes: a protective film; and a first pad electrode exposed from the protective film in a first opening portion of the protective film. The second semiconductor chip is mounted on the first pad electrode of the first semiconductor chip via the second bonding material. The second bonding material includes: a first member being in contact with the first pad electrode; and a second member interposed between the first member and the second semiconductor chip. The first member is a conductive bonding material of a film shape, and the second member is an insulating bonding material of a film shape.

IPC Classes  ?

  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
  • H01L 23/495 - Lead-frames

86.

PROCESSING DEVICE AND METHOD FOR PERFORMING TIME STAMPING

      
Application Number 18635469
Status Pending
Filing Date 2024-04-15
First Publication Date 2024-11-07
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Mardmöller, Christian
  • Soubhi, Mohamed
  • Geldreich, Stefan

Abstract

The present document relates to a processing device and a method for performing time stamping of data at a high level of integrity such as ASIL (Automotive Safety Integrity Level) D. The processing device processes a data frame comprising data. Furthermore, upon reception of a trigger which is indicative of the processing of the data frame, the processing device captures a time stamp using a primary timer. Next, the processing device generates validation data based on the data frame and the time stamp. In addition, the processing device stores the validation data in conjunction with the data frame and the time stamp in a memory module.

IPC Classes  ?

  • H04J 3/06 - Synchronising arrangements
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04L 67/12 - Protocols specially adapted for proprietary or special-purpose networking environments, e.g. medical networks, sensor networks, networks in vehicles or remote metering networks

87.

SEMICONDUCTOR DEVICE

      
Application Number 18758688
Status Pending
Filing Date 2024-06-28
First Publication Date 2024-10-31
Owner Renesas Electronics Corporation (Japan)
Inventor Ohara, Yoshihiro

Abstract

A part among a plurality of through vias formed in a non-transistor region is a floating via having a floating potential.

IPC Classes  ?

  • H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
  • H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
  • H01L 23/528 - Layout of the interconnection structure
  • H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

88.

SEMICONDUCTOR DEVICE AND CONTROL SYSTEM

      
Application Number 18307405
Status Pending
Filing Date 2023-04-26
First Publication Date 2024-10-31
Owner RENESAS ELECTRONICS CORPORATION (Japan)
Inventor
  • Uchinuma, Yoshimasa
  • Ueda, Takehiro

Abstract

A semiconductor device includes a first source electrode coupled to a first source terminal by a connection portion and having first and second slits on two opposite sides, a second source electrode coupled to a second source terminal, a Kelvin pad formed independently of the first source electrode, a power MOSFET coupled between the first source electrode and a drain terminal, a sense MOSFET coupled between the second source electrode and the drain terminal, a first wire coupled between a first source potential extraction port set at the first slit and the Kelvin pad, a second wire coupled between a second source potential extraction port set at the second slit and the Kelvin pad, wherein the connection portion has third and fourth slits corresponding to the first and second slits.

IPC Classes  ?

89.

SEMICONDUCTOR DEVICE INCLUDING FIELD EFFECT TRANSISTOR FORMED ON SOI SUBSTRATE

      
Application Number 18771200
Status Pending
Filing Date 2024-07-12
First Publication Date 2024-10-31
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Uejima, Kazuya
  • Kamohara, Shiro
  • Onda, Michio
  • Hase, Takashi
  • Nishino, Tatsuo

Abstract

In a semiconductor device according to an embodiment, a thickness of a semiconductor layer of an SOI substrate on which a field effect transistor constituting an analog circuit is formed is set to 2 nm or more and 24 nm or less.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
  • H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
  • H01L 29/45 - Ohmic electrodes
  • H01L 29/51 - Insulating materials associated therewith
  • H03F 3/45 - Differential amplifiers

90.

SEMICONDUCTOR DEVICE

      
Application Number 18603396
Status Pending
Filing Date 2024-03-13
First Publication Date 2024-10-31
Owner Renesas Electronics Corporation (Japan)
Inventor Yanagigawa, Hiroshi

Abstract

The semiconductor device includes a pair of gate-electrodes GE formed inside the pair of trenches TR via an gate insulating film (GI), respectively. The pair of column regions PC are spaced apart from each other in the Y-direction. The pair of trenches TR are provided apart from each other in the Y direction, are provided between the pair of column regions PC in the Y direction, and extend in the X direction. The ends of the pair of trenches TR in the X direction are connected to each other by a connecting portion TRa extending in the Y direction. The connection portion TRa is integrated with the pair of trenches TR. The pair of column regions PC extend in the X direction along the pair of trenches TR, and extend in the X direction toward the outer edge of the semiconductor substrate beyond the connection portion TRa.

IPC Classes  ?

  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

91.

DIP INJECTION FOR GATE DRIVERS

      
Application Number 18504701
Status Pending
Filing Date 2023-11-08
First Publication Date 2024-10-24
Owner Renesas Electronics Corporation (Japan)
Inventor Kobayashi, Daisuke

Abstract

Systems and methods for injecting a current into are described. A switch converter can include a high-side switch and a low-side switch. A driver circuit can be configured to drive the high-side switch and the low-side switch in the switch converter. A controller can be configured to provide control signals to control the driver circuit. The driver circuit can further include a circuit configured to inject a current dip into a gate current outputted by the driver circuit to drive at least one of the high-side switch and the low-side switch.

IPC Classes  ?

  • H03K 17/16 - Modifications for eliminating interference voltages or currents
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

92.

CURRENT MODE DEMODULATION FOR NEAR FIELD COMMUNICATION WIRELESS POWER TRANSFER

      
Application Number 18493013
Status Pending
Filing Date 2023-10-24
First Publication Date 2024-10-24
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Sautto, Marco
  • Di Fazio, Fabio

Abstract

Systems and methods for demodulation in wireless power transfer systems are described. A circuit a device of a wireless power transfer system can sense current from a switching converter, where the sensed current can be associated with an amplitude shift keying (ASK) signal. The circuit can generate a scaled down current of the sensed current. The circuit can generate a voltage signal using the scaled down current, where the voltage signal can be a scaled down voltage of the ASK signal. The circuit can send the voltage signal to a controller of the device. The controller can demodulate the ASK signal using the scaled down voltage.

IPC Classes  ?

  • H02J 50/80 - Circuit arrangements or systems for wireless supply or distribution of electric power involving the exchange of data, concerning supply or distribution of electric power, between transmitting devices and receiving devices
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
  • H04B 5/00 - Near-field transmission systems, e.g. inductive or capacitive transmission systems

93.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

      
Application Number 18595236
Status Pending
Filing Date 2024-03-04
First Publication Date 2024-10-17
Owner Renesas Electronics Corporation (Japan)
Inventor Yamaguchi, Tadashi

Abstract

A performance of a semiconductor device is improved. A gate insulating film is formed on a semiconductor substrate. A gate electrode is formed on the gate insulating film. A ferroelectric film and a metal film are formed between the gate insulating film and the gate electrode. A thickness of the metal film is smaller than a thickness of the ferroelectric film. The metal film is amorphous.

IPC Classes  ?

  • H10B 51/30 - Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors characterised by the memory core region
  • H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
  • H01L 29/51 - Insulating materials associated therewith

94.

SEMICONDUCTOR DEVICE AND IMAGE PROCESSING SYSTEM

      
Application Number 18623841
Status Pending
Filing Date 2024-04-01
First Publication Date 2024-10-17
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Nagayoshi, Isao
  • Terashima, Kazuaki

Abstract

A semiconductor device or image processing system includes n interface circuit and a channel composite circuit. The interface circuit outputs a first packet including the line data of the k-th line included in the image data of the first channel, and then outputs a second packet including the line data of the k-th line included in the image data of the second channel. The channel combination circuit writes, to the memory, the line data of the k-th line included in the image data of the first channel to the first address area, and then writes the line data of the k-th line included in the image data of the second channel to the second address area that is consecutive to the first address area.

IPC Classes  ?

  • H04N 23/80 - Camera processing pipelinesComponents thereof
  • H04N 23/84 - Camera processing pipelinesComponents thereof for processing colour signals

95.

BALUN CIRCUIT AND SEMICONDUCTOR DEVICE

      
Application Number 18588149
Status Pending
Filing Date 2024-02-27
First Publication Date 2024-10-10
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Shibata, Kenichi
  • Kusaka, Yuichi

Abstract

A balun circuit is disclosed. The balun circuit is provided between a transmitter and a common antenna terminal to which the transmitter and a receiver are coupled. The balun includes an inductor L1 coupled at one or both ends to the transmitter, an input node of the receiver, and an inductor L2 provided between ground or a first biasing power supply. The inductor L2 includes an inductor having a mutual inductance with the inductor L1. The inductor L2 is a variable inductor.

IPC Classes  ?

  • H03H 7/42 - Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
  • H03F 3/213 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only in integrated circuits
  • H03H 7/38 - Impedance-matching networks

96.

OVERVOLTAGE PROTECTION FOR WIRELESS POWER TRANSFER

      
Application Number 18297942
Status Pending
Filing Date 2023-04-10
First Publication Date 2024-10-10
Owner Renesas Electronics America Inc. (USA)
Inventor
  • Zeng, Hulong
  • Huang, Eric Tong Lin
  • Jeong, Chan Young

Abstract

Systems and methods for wireless power transfer systems are described. A controller of a device can detect an overvoltage condition associated with direct current (DC) power being outputted by a rectifier. The controller can, in response to detection of the overvoltage condition, the controller can control a phase of a current of alternating current (AC) power being received by the rectifier to cause the current and a voltage of the AC power to be out of phase.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling

97.

VIDEO DATA PROCESSING DEVICE AND VIDEO DATA PROCESSING METHOD

      
Application Number 18589997
Status Pending
Filing Date 2024-02-28
First Publication Date 2024-10-03
Owner Renesas Electronics Corporation (Japan)
Inventor
  • Ueda, Hiroshi
  • Hashimoto, Ryoji
  • Mori, Kaito

Abstract

The video data processing device includes at least one first functional module that performs first processing preset for each first processing unit data, at least one second functional module that performs second processing preset for each second processing unit data smaller than the first processing unit data, and a control unit that controls the execution order of pipeline processing for the first processing unit data by controlling the timing at which the first function module and the second function module operate. The control unit controls the subsequent stage so that the first function module and the second module are started in response to the completion of the respective processing in accordance with the end of the pre-stage.

IPC Classes  ?

  • G06T 1/20 - Processor architecturesProcessor configuration, e.g. pipelining

98.

SEMICONDUCTOR DEVICE, TIME MEASUREMENT METHOD AND TIME MEASUREMENT PROGRAM

      
Application Number 18594672
Status Pending
Filing Date 2024-03-04
First Publication Date 2024-10-03
Owner Renesas Electronics Corporation (Japan)
Inventor Gemma, Kazuaki

Abstract

According to one embodiment, a semiconductor device includes an arithmetic processing unit, a plurality of peripheral circuits which are controlled by the arithmetic processing unit, a timing management circuit which outputs a result of time measurement executed according to a request for the time measurement from each of the peripheral circuits to the peripheral circuit, and the timing management circuit executes the time measurement according to each request for the time measurement.

IPC Classes  ?

  • G06F 1/324 - Power saving characterised by the action undertaken by lowering clock frequency
  • G06F 1/08 - Clock generators with changeable or programmable clock frequency
  • G06F 1/12 - Synchronisation of different clock signals

99.

HYBRID COIL FOR WIRELESS POWER TRANSFER

      
Application Number CN2023084995
Publication Number 2024/197687
Status In Force
Filing Date 2023-03-30
Publication Date 2024-10-03
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor
  • Yuan, Sheng
  • Zhou, Weiwei
  • Huang, Jiangjian
  • Tang, Bo
  • Zeng, Hulong

Abstract

A wireless power apparatus may include a receiver coil with a first conductor assembly having a first conductor type, the receiver coil with a second conductor assembly having a second conductor type that may be different from the first conductor type, the first conductor assembly and the second conductor assembly may be connected in series to form a hybrid coil.

IPC Classes  ?

  • H01F 41/04 - Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformersApparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils or magnets for manufacturing coils
  • H02J 50/00 - Circuit arrangements or systems for wireless supply or distribution of electric power

100.

SPLIT PLANAR COIL FOR WIRELESS POWER TRANSFER

      
Application Number CN2023085002
Publication Number 2024/197688
Status In Force
Filing Date 2023-03-30
Publication Date 2024-10-03
Owner RENESAS ELECTRONICS AMERICA INC. (USA)
Inventor
  • Huang, Jiangjian
  • Tang, Bo
  • Zeng, Hulong

Abstract

A wireless power apparatus may include a first planar coil having a first coil winding orientation, the first planar coil may be disposed in a plane, a second planar coil may have a second coil winding orientation that is opposite the first coil winding orientation, the second planar coil may be disposed at a distance from the first planar coil in the plane, and a conductor configured to serially connect the first planar coil with the second planar coil to form a split planar coil.

IPC Classes  ?

  • H02J 50/10 - Circuit arrangements or systems for wireless supply or distribution of electric power using inductive coupling
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 38/14 - Inductive couplings
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