CUSIC Inc.

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IPC Class
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof 11
C30B 29/36 - Carbides 8
C23C 16/42 - Silicides 6
C30B 25/18 - Epitaxial-layer growth characterised by the substrate 6
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form 5
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Found results for  patents

1.

SiC multilayer body, production method therefor, and semiconductor device

      
Application Number 17921409
Grant Number 11862460
Status In Force
Filing Date 2021-04-27
First Publication Date 2023-09-21
Grant Date 2024-01-02
Owner CUSIC INC. (Japan)
Inventor Nagasawa, Hiroyuki

Abstract

According to one embodiment, a method of producing a SiC laminate having a hexagonal SiC layer and a 3C-SiC layer comprises: forming a seed plane parallel to a close-packed plane of the crystal lattice on the surface of the hexagonal SiC layer; providing an inclined plane, which is inclined with respect to the seed plane, to all faces adjacent to the seed plane; forming a two-dimensional nucleus of 3C-SiC on the seed plane; and epitaxially growing both the two-dimensional nucleus of 3C-SiC and the SiC layers exposed on the inclined plane simultaneously in a direction parallel to the close-packed plane of the crystal lattice.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
  • H01L 21/82 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/872 - Schottky diodes

2.

SiC MULTILAYER BODY, PRODUCTION METHOD THEREFOR, AND SEMICONDUCTOR DEVICE

      
Application Number JP2021016865
Publication Number 2021/230076
Status In Force
Filing Date 2021-04-27
Publication Date 2021-11-18
Owner CUSIC INC. (Japan)
Inventor Nagasawa Hiroyuki

Abstract

The present invention improves a characteristic of a semiconductor element by providing a structure for inhibiting carrier capture and scattering in a heterointerface in a semiconductor device using a multilayer structure of 3C-SiC and hexagonal SiC, and a production method therefor. A seed plane (1p) that is parallel to a close-packed plane (CPP) of a crystal lattice, and a slanted plane (1i) that is slanted with respect to the close-packed plane, are provided to a hexagonal SiC (1) surface, and at the same time as a 3C-SiC two-dimensional nucleus (2e) is generated on the seed plane, step-controlled epitaxy is carried out on the slanted plane, thus producing a SiC multilayer body obtained by layering a hexagonal SiC layer and a 3C-SiC layer. By making all the interfaces of the SiC multilayer body fitting heterointerfaces (3) and differentiating between the 3C-SiC surface and the hexagonal SiC surface, there is made to be freedom in the disposition of a semiconductor element, and a high-performance semiconductor device is obtained.

IPC Classes  ?

  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • C23C 16/42 - Silicides
  • C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
  • C30B 29/36 - Carbides
  • H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
  • H01L 21/336 - Field-effect transistors with an insulated gate
  • H01L 21/8234 - MIS technology
  • H01L 21/8238 - Complementary field-effect transistors, e.g. CMOS
  • H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
  • H01L 27/092 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
  • H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
  • H01L 29/872 - Schottky diodes

3.

SiC composite substrate and method for manufacturing same

      
Application Number 16743476
Grant Number 11208719
Status In Force
Filing Date 2020-01-15
First Publication Date 2020-05-14
Grant Date 2021-12-28
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Kubota, Yoshihiro
  • Akiyama, Shoji
  • Nagasawa, Hiroyuki

Abstract

p) of the crystals of the polycrystalline SiC in the polycrystalline SiC substrate 11 is randomly oriented with reference to the direction of a normal to the obverse surface of the monocrystalline SiC layer 12. The present invention improves the adhesion between the polycrystalline SiC substrate and the monocrystalline SiC layer.

IPC Classes  ?

  • C23C 16/32 - Carbides
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • C23C 16/42 - Silicides
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/762 - Dielectric regions
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/18 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • C23C 16/01 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. on substrates subsequently removed by etching
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 29/36 - Carbides
  • C30B 33/06 - Joining of crystals
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

4.

Compound semiconductor laminate substrate, method for manufacturing same, and semiconductor element

      
Application Number 16484285
Grant Number 11177123
Status In Force
Filing Date 2018-02-15
First Publication Date 2020-01-02
Grant Date 2021-11-16
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Nagasawa, Hiroyuki
  • Kubota, Yoshihiro
  • Akiyama, Shoji

Abstract

A compound semiconductor laminate substrate comprising two single-crystalline compound semiconductor substrates directly bonded together and laminated, the single-crystalline compound semiconductor substrates having the same composition including A and B as constituent elements and having the same atomic arrangement, characterized in that the front and back surfaces of the laminate substrate are polar faces comprising the same kind of atoms of A or B, and that a laminate interface comprises a bond of atoms of either B or A and is a unipolar anti-phase region boundary plane in which the crystal lattices of the atoms are matched. In this way, the polar faces of the front and rear surfaces of the compound semiconductor laminate substrate are made monopolar, thereby facilitating semiconductor element process designing, and making it possible to manufacture a low-cost, high-performance, and stable semiconductor element without implementing complex substrate processing.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

5.

Silicon carbide substrate production method and silicon carbide substrate

      
Application Number 16489814
Grant Number 11346018
Status In Force
Filing Date 2018-03-01
First Publication Date 2019-12-19
Grant Date 2022-05-31
Owner
  • Shin-Etsu Chemical Co., Ltd. (Japan)
  • CUSIC Inc. (Japan)
Inventor
  • Nagasawa, Hiroyuki
  • Kubota, Yoshihiro
  • Akiyama, Shoji

Abstract

b, from the support substrate 1. The silicon carbide substrate has a smooth surface and reduced internal stress.

IPC Classes  ?

  • C30B 29/36 - Carbides
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 33/10 - Etching in solutions or melts
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
  • C23C 16/32 - Carbides

6.

Method for producing SiC composite substrate

      
Application Number 15759578
Grant Number 10431460
Status In Force
Filing Date 2016-09-09
First Publication Date 2019-05-23
Grant Date 2019-10-01
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Akiyama, Shoji
  • Kubota, Yoshihiro
  • Nagasawa, Hiroyuki

Abstract

a on one area or all of the back surface of the holding substrate 21 in the single crystal SiC layer supporting body 14 is removed to impart warpage to the single crystal SiC layer supporting body 14′. Then, polycrystalline SiC is deposited on the single crystal SiC layer 12 by chemical vapor deposition to form the polycrystalline SiC substrate 11, and the holding substrate is physically and/or chemically removed.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer

7.

Method for manufacturing SiC composite substrate, and method for manufacturing semiconductor substrate

      
Application Number 15757879
Grant Number 10612157
Status In Force
Filing Date 2016-09-07
First Publication Date 2018-11-22
Grant Date 2020-04-07
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Kubota, Yoshihiro
  • Akiyama, Shoji
  • Nagasawa, Hiroyuki

Abstract

Provided is a method for manufacturing an SiC composite substrate 10 having a single-crystal SiC layer 12 on a polycrystalline SiC substrate 11, wherein: the single-crystal SiC layer 12 is provided on one surface of a holding substrate 21 comprising Si, and a single-crystal SiC-layer carrier 14 is prepared; polycrystalline SiC is then accumulated on the single-crystal SiC layer 12 by a physical or chemical means, and an SiC laminate 15 is prepared in which the single-crystal SiC layer 12 and the polycrystalline SiC substrate 11 are laminated on the holding substrate 21; and the holding substrate 21 is then physically and/or chemically removed. With the present invention, an SiC composite substrate having a single-crystal. SiC layer with good crystallinity is obtained with a simple manufacturing process.

IPC Classes  ?

  • C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
  • H01L 21/762 - Dielectric regions
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 29/36 - Carbides
  • C30B 29/68 - Crystals with laminate structure, e.g. "superlattices"
  • H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

8.

SILICON CARBIDE SUBSTRATE PRODUCTION METHOD AND SILICON CARBIDE SUBSTRATE

      
Application Number JP2018007755
Publication Number 2018/159754
Status In Force
Filing Date 2018-03-01
Publication Date 2018-09-07
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Nagasawa Hiroyuki
  • Kubota Yoshihiro
  • Akiyama Shoji

Abstract

This silicon carbide substrate production method comprises: the step of providing covering layers 1b, 1b, each containing silicon oxide, silicon nitride, silicon carbonitride, or silicide, respectively on both surfaces of a base material substrate 1a comprising carbon, silicon or silicon carbide, and turning the surface of each of the covering layers 1b, 1b into a smooth surface to prepare a support substrate 1; a step of forming a polycrystalline silicon carbide film 10 on both surfaces of the support substrate 1 by a gas phase growth method or a liquid phase growth method; and a step of separating the polycrystalline silicon carbide films from the support substrate while preserving, on the surface thereof, the smoothness of the covering layer surfaces 1b, 1b by chemically removing at least the covering layers 1b, 1b, from the support substrate 1 such that silicon carbide substrates 10a, 10b are obtained as polycrystalline silicon carbide films having a crystal particle size of between 10 nm and 10 μm, and an arithmetic mean roughness Ra of 0.3 nm or less for at least one of the main surfaces thereof. In this manner, a silicon carbide substrate is achieved having a flat and smooth surface and reduced internal stress.

IPC Classes  ?

  • C30B 29/36 - Carbides
  • H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition

9.

Manufacturing method of SiC composite substrate

      
Application Number 15759285
Grant Number 10829868
Status In Force
Filing Date 2016-09-09
First Publication Date 2018-09-06
Grant Date 2020-11-10
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Akiyama, Shoji
  • Kubota, Yoshihiro
  • Nagasawa, Hiroyuki

Abstract

A manufacturing method of an SiC composite substrate 10 that includes a single crystal SiC layer 12 on a polycrystalline SiC substrate 11. After manufacturing a single crystal SiC layer supporting body 14 by providing the single crystal SiC layer 12 on one surface of a holding substrate 21 including Si. A polycrystalline SiC is deposited on the single crystal SiC layer 12 through chemical vapor deposition to manufacture an SiC laminated body 15 laminated with the single crystal SiC layer 12 and the polycrystalline SiC layer 11 having a thickness t on the holding substrate 21′. At the same time, the single crystal SiC layer supporting body 14 is heated at a temperature less than 1,414 degrees Celsius, and a portion of the thickness t of the polycrystalline SiC is deposited. Then, the holding substrate 21′ is physically and/or chemically removed.

IPC Classes  ?

  • C30B 33/06 - Joining of crystals
  • C23C 16/01 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. on substrates subsequently removed by etching
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 29/36 - Carbides
  • C23C 16/42 - Silicides
  • C23C 16/32 - Carbides

10.

SiC composite substrate and method for manufacturing same

      
Application Number 15759376
Grant Number 10711373
Status In Force
Filing Date 2016-09-08
First Publication Date 2018-09-06
Grant Date 2020-07-14
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Kubota, Yoshihiro
  • Akiyama, Shoji
  • Nagasawa, Hiroyuki

Abstract

p) of the crystals of the polycrystalline SiC in the polycrystalline SiC substrate 11 is randomly oriented with reference to the direction of a normal to the obverse surface of the monocrystalline SiC layer 12. The present invention improves the adhesion between the polycrystalline SiC substrate and the monocrystalline SiC layer.

IPC Classes  ?

  • C23C 16/42 - Silicides
  • C30B 33/06 - Joining of crystals
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/762 - Dielectric regions
  • H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
  • H01L 21/18 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • C23C 16/01 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. on substrates subsequently removed by etching
  • C23C 16/32 - Carbides
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 29/36 - Carbides
  • H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
  • H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form

11.

COMPOUND SEMICONDUCTOR LAMINATE SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR ELEMENT

      
Application Number JP2018005169
Publication Number 2018/151189
Status In Force
Filing Date 2018-02-15
Publication Date 2018-08-23
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Nagasawa Hiroyuki
  • Kubota Yoshihiro
  • Akiyama Shoji

Abstract

A compound semiconductor laminate substrate comprising two single-crystalline compound semiconductor substrates directly bonded together and laminated, the single-crystalline compound semiconductor substrates having the same composition including A and B as constituent elements and having the same atomic arrangement, characterized in that the front and back surfaces of the laminate substrate are polar faces comprising the same kind of atoms of A or B, and that a laminate interface comprises a bond of atoms of either B or A and is a unipolar anti-phase region boundary plane in which the crystal lattices of the atoms are matched. In this way, the polar faces of the front and rear surfaces of the compound semiconductor laminate substrate are made monopolar, thereby facilitating semiconductor element process designing, and making it possible to manufacture a low-cost, high-performance, and stable semiconductor element without implementing complex substrate processing.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

12.

OBJECT-ENTIRE-PERIPHERY IMAGING DEVICE FOR GENERATING 3D SHAPE

      
Application Number JP2017030854
Publication Number 2018/070122
Status In Force
Filing Date 2017-08-29
Publication Date 2018-04-19
Owner CUBIC INC. (Japan)
Inventor Kato Nobuharu

Abstract

[Problem] The present invention addresses the problem of making it possible to stably photograph a plurality of images that are contiguous and that overlap with adjacent images by at least 70% in order to create a precise 3D shape in software that generates a 3D shape from a plurality of images. [Solution] An object-entire-periphery imaging device according to the present invention for photographing the entire periphery of an object includes: a rotary arm unit including a base plate and a rotary arm that is attached to the base plate and that is rotatable relative to the base plate; an object unit that is fixed at a central region of the base plate of the rotary arm unit and on which the object is mounted; an imaging unit that is attached at one end of the rotary arm and that includes an imaging means that is rotated together with the rotary arm; and a back screen that is attached at the other end of the rotary arm and that blocks the background of the object so that said background is not imaged by the imaging means.

IPC Classes  ?

  • G03B 17/56 - Accessories
  • G03B 35/02 - Stereoscopic photography by sequential recording
  • G06T 1/00 - General purpose image data processing
  • H04N 5/222 - Studio circuitryStudio devicesStudio equipment

13.

METHOD FOR PRODUCING SiC COMPOSITE SUBSTRATE

      
Application Number JP2016076537
Publication Number 2017/047508
Status In Force
Filing Date 2016-09-09
Publication Date 2017-03-23
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Akiyama Shoji
  • Kubota Yoshihiro
  • Nagasawa Hiroyuki

Abstract

Provided is a method for producing a SiC composite substrate 10 having a single crystal SiC layer 12 on a polycrystalline SiC substrate 11, wherein after the single crystal SiC layer 12 is provided on the front surface of a holding substrate 21 comprising Si and having a silicon oxide film 21a on the front and back surfaces thereof to produce a single crystal SiC layer supporting body 14, a part or all of the thickness of the silicon oxide film 21a on one area or all of the back surface of the holding substrate 21 in the single crystal SiC layer supporting body 14 is removed to impart warpage to the single crystal SiC layer supporting body 14', then polycrystalline SiC is deposited on the single crystal SiC layer 12 by chemical vapor deposition to form the polycrystalline SiC substrate 11, and thereafter the holding substrate is physically and/or chemically removed. By means of the present invention, it is possible to obtain a SiC composite substrate having a single crystal SiC layer with good crystallinity and little warpage with a simple production process.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth

14.

SiC COMPOSITE SUBSTRATE AND METHOD FOR MANUFACTURING SAME

      
Application Number JP2016076361
Publication Number 2017/047478
Status In Force
Filing Date 2016-09-08
Publication Date 2017-03-23
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Kubota Yoshihiro
  • Akiyama Shoji
  • Nagasawa Hiroyuki

Abstract

Provided is an SiC composite substrate 10 having a monocrystalline SiC layer 12 on a polycrystalline SiC substrate 11, wherein: some or all of the interface at which the polycrystalline SiC substrate 11 and the monocrystalline SiC layer 12 are in contact is an unmatched interface I12/11 that is not lattice-matched; the monocrystalline SiC layer 12 has a smooth obverse surface and has, on the side of the interface with the polycrystalline SiC substrate 11, a surface that has more pronounced depressions and projections than the obverse surface; and the close-packed plane (lattice plane 11p) of the crystals of the polycrystalline SiC in the polycrystalline SiC substrate 11 is randomly oriented with reference to the direction of a normal to the obverse surface of the monocrystalline SiC layer 12. The present invention improves the adhesion between the polycrystalline SiC substrate and the monocrystalline SiC layer without, inter alia, causing any crystal structure defects in the monocrystalline SiC layer, and without providing an interposing layer between the polycrystalline SiC substrate and the monocrystalline SiC layer.

IPC Classes  ?

  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
  • C23C 16/42 - Silicides
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation

15.

MANUFACTURING METHOD OF SiC COMPOSITE SUBSTRATE

      
Application Number JP2016076538
Publication Number 2017/047509
Status In Force
Filing Date 2016-09-09
Publication Date 2017-03-23
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Akiyama Shoji
  • Kubota Yoshihiro
  • Nagasawa Hiroyuki

Abstract

Provided is a manufacturing method of an SiC composite substrate 10 that comprises a single crystal SiC layer 12 on a polycrystalline SiC substrate 11, wherein, after manufacturing a single crystal SiC layer supporting body 14 by providing the single crystal SiC layer 12 on one surface of a holding substrate 21 comprising Si, a polycrystalline SiC is deposited on the single crystal SiC layer 12 through chemical vapor deposition to manufacture an SiC laminated body 15 laminated with the single crystal SiC layer 12 and the polycrystalline SiC layer 11 having a thickness t on the holding substrate 21', during which time, the single crystal SiC layer supporting body 14 is heated at a temperature less than 1414 degrees Celsius, and a portion of the thickness t of the polycrystalline SiC is deposited, and subsequently, while raising the temperature to 1414 degrees Celsius or higher to melt at least a portion of the holding substrate 21, the polycrystalline SiC is further deposited until the thickness t is reached and then cooled, and thereafter, the holding substrate 21 'is physically and/or chemically removed. According to the present invention, an SiC composite substrate having a single-crystalline SiC layer with good crystallinity and less warpage can be obtained by a simple manufacturing process.

IPC Classes  ?

  • C30B 29/36 - Carbides
  • C23C 16/01 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes on temporary substrates, e.g. on substrates subsequently removed by etching
  • C23C 16/42 - Silicides
  • C30B 25/18 - Epitaxial-layer growth characterised by the substrate
  • C30B 33/06 - Joining of crystals

16.

METHOD FOR MANUFACTURING SiC COMPOSITE SUBSTRATE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE

      
Application Number JP2016076297
Publication Number 2017/043528
Status In Force
Filing Date 2016-09-07
Publication Date 2017-03-16
Owner
  • SHIN-ETSU CHEMICAL CO., LTD. (Japan)
  • CUSIC INC. (Japan)
Inventor
  • Kubota Yoshihiro
  • Akiyama Shoji
  • Nagasawa Hiroyuki

Abstract

Provided is a method for manufacturing an SiC composite substrate 10 having a single-crystal SiC layer 12 on a polycrystalline SiC substrate 11, wherein: the single-crystal SiC layer 12 is provided on one surface of a holding substrate 21 comprising Si, and a single-crystal SiC-layer carrier 14 is prepared; polycrystalline SiC is then accumulated on the single-crystal SiC layer 12 by a physical or chemical means, and an SiC laminate 15 is prepared in which the single-crystal SiC layer 12 and the polycrystalline SiC substrate 11 are laminated on the holding substrate 21; and the holding substrate 21 is then physically and/or chemically removed. With the present invention, an SiC composite substrate having a single-crystal SiC layer with good crystallinity is obtained with a simple manufacturing process.

IPC Classes  ?

  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth