In one example, a semiconductor structure comprises a frontside substrate comprising a conductive structure, a backside substrate comprising a base substrate and a cavity substrate contacting the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate, and a first electronic component over the top side of the frontside substrate and in the cavity. The first electronic component is coupled with the conductive structure, and an encapsulant is in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect. Other examples and related methods are also disclosed herein.
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01L 21/52 - Mounting semiconductor bodies in containers
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
2.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device comprises a lower substrate, an upper substrate, internal interconnects, a bridge component, a lower encapsulant, and electronic components. The internal interconnects couple an upper side of the lower substrate to a lower side of the upper substrate. The bridge component comprises bridge first interconnects coupled to the upper substrate, second interconnects coupled to the lower substrate, and a bridge signal redistribution structure coupled to the bridge first interconnects and to the bridge second interconnects. The lower encapsulant encapsulates the internal components and the bridge component. The electronic components are coupled to the internal interconnects and the bridge redistribution structure via the upper side of the upper substrate. The bridge signal redistribution structure provides one or more signal paths between the first electronic component and the second electronic component. Other examples and related methods are also disclosed herein.
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
3.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
An electronic device includes a substrate comprising a contact including a contact first lateral side and a contact second lateral side. A contact first external terminal extends outward from the contact first lateral side. A contact second external terminal extends outward from the contact first lateral side and is separated from the contact first external terminal by gap. An electronic component is coupled to the contact. An encapsulant covers the substrate and the electronic component. The encapsulant comprises an encapsulant top side, an encapsulant bottom side opposite to the encapsulant top side, and an encapsulant lateral side. The contact first external terminal, the contact second external terminal, are exposed from the encapsulant. A lower side of contact is exposed from the encapsulant top side. The encapsulant covers a portion of the gap proximate to the contact first lateral side. Other examples and related methods are disclosed herein.
An electronic device includes an embedded module including a module component comprising a first terminal and a second terminal. A first module substrate is coupled to the first terminal with a first bonding layer and a second module substrate is coupled to the second component terminal with a second bonding layer. A module encapsulant covers the module component and the first and second module substrates. A first device substrate is coupled to the first module substrate and a second device substrate is coupled to the second module substrate. Device terminals are coupled to the module component and a device encapsulant covers the embedded module, the device terminals, and the first and second device substrates. The first bonding layer includes a first sintering material, the second bonding layer includes a second sintering material, and portions of the first device substrate and the device terminals are exposed from the device encapsulant.
In one example, an electronic device comprises a substrate including a cavity defined in an upper side of the substrate. An electronic component can be disposed over the substrate, and a lid can be disposed over the substrate and including a lid stopper in the cavity. A pedestal of the lid can be positioned over the electronic component. The lid can include a channel adjacent the pedestal. A lens can be disposed over the electronic component and on the pedestal. Other examples and related methods are also disclosed herein.
H10F 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group , e.g. radiation detectors comprising photodiode arrays
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H10F 39/95 - Assemblies of multiple devices comprising at least one integrated device covered by group , e.g. comprising integrated image sensors
6.
SEMICONDUCTOR DEVICE USING EMC WAFER SUPPORT SYSTEM AND FABRICATING METHOD THEREOF
Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
7.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device includes a substrate including a first side with a peripheral portion and a central portion, a second side, a lateral side, a dielectric structure, and a conductive structure. An electronic component includes a component first side coupled to the conductive structure in the central portion, a component second side, and a component lateral side. A stiffener is coupled to the first side in the peripheral portion and includes an inner wall, an outer wall opposite to the inner wall, and a top side. An encapsulant covers the inner wall, the outer wall, and the component lateral side, and a portion of the first side. The component second side can be exposed from the top side of the encapsulant. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
8.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device can include an active region, a buried oxide layer over the active region, and a stiffener disposed over first end of the buried oxide layer and a second end of the buried oxide layer opposite the first end. Inner sidewalls of the stiffener can define a cavity over the buried oxide layer. A passivation layer can be disposed on the inner sidewalls of the stiffener, in the cavity, and over the buried oxide layer. A body can be disposed over the passivation layer and in the cavity. Other examples and related methods are also disclosed herein.
An example method of manufacturing an electronic device can include providing a device wafer including an active region comprising a front-end-of-line (FEOL) region opposite a back-end-of-line (BEOL) region. The FEOL region can include buried power rails, and the BEOL region can include a dielectric structure having a side exposed from the BEOL region. A support substrate having a substrate dielectric can be coupled to the dielectric structure. A bond interface is disposed between the substrate dielectric and the dielectric structure. A passivation structure can be provided over the FEOL region. Conductive vias can be provided through the passivation structure. The conductive vias can include a conductor coupled to the buried power rails. A substrate can be coupled to the passivation structure. The substrate can include a power network electrically coupled to the conductive vias.
In one example, a semiconductor device comprises a spacer substrate, a first lens substrate over the first spacer substrate, and a lens protector over the first lens dielectric adjacent to the first lens. The spacer substrate comprises a spacer dielectric, a spacer top terminal, a spacer bottom terminal, and a spacer via. The first lens substrate comprises a first lens dielectric, a first lens, a first lens top terminal, a first lens bottom terminal, and a first lens via. A first interconnect is coupled with the spacer top terminal and the first lens bottom terminal. Other examples and related methods are also disclosed herein.
In one example, an electronic device comprises a substrate comprising a top side, a bottom side, a dielectric structure, and a conductive structure, a first electronic component over the top side of the substrate and coupled with the conductive structure, wherein the first electronic component comprises a first side facing the substrate and a second side facing away from the substrate, an encapsulant over the top side of the substrate and covering a lateral side of the first electronic component, a lid over the top side of the substrate and over the first electronic component, and an adhesive between the second side of the first electronic component and an inner side of the lid. Other examples and related methods are also disclosed herein.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
12.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device can include an active region comprising a channel region. A first isolation region may be disposed at a lateral side of the channel region. A source region may be located in a footprint of the channel region and disposed between the channel region and the first isolation region. A device passivation can cover a side of the channel region opposite the source region and disposed on a lateral side of the first isolation region. A substrate passivation can be coupled to the device passivation. A bond interface can be disposed between the device passivation and the substrate passivation. A substrate can be coupled to the substrate passivation. Other examples and related methods are also disclosed herein.
In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
In one example, an electronic device includes leads comprising a conductive material. A lead from the leads includes a base portion and a protrusion extending from a lower side of the base portion. A die paddle can be disposed between the leads and can include the conductive material. A lower mold can be disposed on a first lateral side of the protrusion and around lateral sides of the die paddle. A lower surface finish can be applied to a lower side of the protrusion. An electronic component can be coupled to the die paddle and in electronic communication with the lead. Other examples and related methods are also disclosed herein.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/552 - Protection against radiation, e.g. light
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
15.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device can comprise a substrate, a first passivation structure over the substrate and defining a first opening, and a first conductive pattern formed in the first opening. A second passivation structure can be disposed over the first conductive pattern and the first passivation structure. The second passivation structure can include a high-resolution material and a high-function material. The high-resolution material of the second passivation structure can define a second opening. A second conductive pattern can be disposed in the second opening of the second passivation structure. The high-function material can be disposed between the first conductive pattern and the second conductive pattern. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
16.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
An electronic device includes a substrate with a conductive structure and a substrate encapsulant. The conductive structure has a lead with a lead via and a lead protrusion. The lead via can include via lateral sides defined by first concave portions and the lead protrusion can include protrusion lateral sides defined by second concave portions. The substrate encapsulant covers the first concave portions at a first side of the substrate but not the second concave portions so that the lead protrusion protrudes from the substrate encapsulant at a second side of the substrate. An electronic component can be adjacent to the first side of the substrate and electrically coupled to the conductive structure. A body encapsulant encapsulates portions of the electronic component and the substrate. The lead can further include a lead trace at the second side of the substrate.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
17.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, a semiconductor device comprises a main substrate having a top side and a bottom side, a first electronic component on the top side of the main substrate, a second electronic component on the bottom side of the main substrate, a substrate structure on the bottom side of the main substrate adjacent to the second electronic component, and an encapsulant structure comprising an encapsulant top portion on the top side of the main substrate and contacting a side of the first electronic component, and an encapsulant bottom portion on the bottom side of the main substrate and contacting a side of the second electronic component and a side of the substrate structure. Other examples and related methods are also disclosed herein.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
18.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising one or more conductive shielding members and an EMI shielding layer, and a method of manufacturing thereof.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
19.
Semiconductor Package Using A Coreless Signal Distribution Structure
A semiconductor package using a coreless signal distribution structure (CSDS) is disclosed and may include a CSDS comprising at least one dielectric layer, at least one conductive layer, a first surface, and a second surface opposite to the first surface. The semiconductor package may also include a first semiconductor die having a first bond pad on a first die surface, where the first semiconductor die is bonded to the first surface of the CSDS via the first bond pad, and a second semiconductor die having a second bond pad on a second die surface, where the second semiconductor die is bonded to the second surface of the CSDS via the second bond pad. The semiconductor package may further include a metal post electrically coupled to the first surface of the CSDS, and a first encapsulant material encapsulating side surfaces and a surface opposite the first die surface of the first semiconductor die, the metal post, and a portion of the first surface of the CSDS.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
20.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
A method of manufacturing an electronic device includes providing vertical interconnects over a first carrier and bonding an inorganic layer of a routing component to an inorganic layer of the first carrier. The method also includes encapsulating the vertical interconnects and the routing component in a lower encapsulant and providing an upper substrate such that a conductive structure of the upper substrate is coupled to the vertical interconnects and to an upper side of the routing component. The method further includes coupling a first electronic component and a second electronic component to the upper substrate and providing a second carrier over the first electronic component and the second electronic component. The method may also include removing the first carrier and providing a lower substrate such that a conductive structure of the lower substrate is coupled to the vertical interconnects. Other methods and related electronic devices are also disclosed.
H01L 23/49 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements consisting of soldered or bonded constructions wire-like
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
21.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, a semiconductor device can include a first dielectric layer comprising an inner wall that defines a via. A seed layer can be disposed over the first dielectric layer and in the via. A first conductor can be disposed over the seed layer and in the via, and the first conductor can have a cylindrical geometry. A second conductor can be disposed over the first conductor and the first dielectric layer. The second conductor can extend into a gap defined between the inner wall of the first dielectric layer and a lateral side of the first conductor. Other examples and related methods are also disclosed herein.
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/528 - Layout of the interconnection structure
22.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device includes a lower redistribution structure, an upper redistribution structure, a first electronic component coupled to the upper redistribution structure, a second electronic component coupled to the upper redistribution structure, and a routing component. The routing component includes a routing redistribution structure, a component die, component through-interconnects, and a component encapsulant. The routing redistribution structure is on the component encapsulant and coupled to the upper redistribution structure. The component die includes a component die substrate and a die interface structure on the component die substrate. The die interface structure is coupled to the routing redistribution structure. The component through-interconnects extend through the component encapsulant and couple the routing redistribution structure to the lower redistribution structure. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
23.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide various methods of manufacturing electronic devices, and electronic devices manufactured thereby, that comprise utilizing an adhesive layer to attach an upper electronic package to a lower die and/or utilizing metal pillars for electrically connecting the upper electronic package to a lower substrate, wherein the metal pillars have a smaller height above the lower substrate than the lower die.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
24.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device comprises a substrate comprising a dielectric structure and a conductive structure, a first electronic component over a top side of the substrate and comprising a first transceiver, wherein the first electronic component is coupled to the conductive structure, a second electronic component coupled to the substrate and the conductive structure and comprising a second transceiver, an encapsulant over the top side of the substrate and defining a cavity, wherein the second transceiver is in the cavity and the first electronic component is covered by the encapsulant, and a lid over the top side of the substrate and covering the second electronic component. Other examples and related methods are also disclosed herein.
In one example, a semiconductor device comprises a substrate comprising a conductive structure, a first electronic component over the substrate, an encapsulant over the substrate and contacting a lateral side of the first electronic component, a shield over the encapsulant and contacting a lateral side of the encapsulant and a portion of a lateral side of the substrate, and a communication structure coupled with the substrate. The substrate comprises a vertical groove side and a horizontal groove side defining a groove in the substrate, wherein a portion of the groove is uncovered by the shield. Other examples and related methods are also disclosed herein.
H01L 23/552 - Protection against radiation, e.g. light
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01Q 1/22 - SupportsMounting means by structural association with other equipment or articles
26.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
27.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
An electronic device includes a substrate including a first side comprising a peripheral portion and a central portion surrounded by the peripheral portion, and a conductive structure. A first electronic component includes a component first side coupled to the substrate in the central portion and a component second side. A second electronic component is coupled to the substrate in the peripheral portion. An encapsulant covers the second electronic component and the peripheral portion of the first side. The second side of the first electronic component is exposed from the top side of the encapsulant. A thermal stress reducing structure comprising one or more of a stiffener coupled to the top side of the encapsulant in the peripheral portion and overlapping the second electronic component, or a heat sink coupled to the second side of the first electronic component. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/367 - Cooling facilitated by shape of device
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
28.
SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICEs
In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
30.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device can comprise an electronic component, a component passivation layer coupled to the electronic component, and a component interconnect extending from the electronic component through the component passivation layer. A substrate can be coupled to the component passivation layer and the component interconnect. The substrate can include a substrate passivation layer coupled to the component passivation layer along a bond boundary, and the substrate passivation layer can comprise an inorganic material. A substrate inward terminal extends through the substrate passivation layer and can be coupled to the component interconnect along the bond boundary. A seed is between the substrate passivation layer and the substrate inward terminal. A dielectric structure can be coupled to the substrate passivation layer. A conductive structure extends through the dielectric structure and is coupled to the substrate inward terminal. Other examples and related methods are also disclosed herein.
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
31.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
32.
METHOD OF FORMING A PACKAGED SEMICONDUCTOR DEVICE HAVING ENHANCED WETTABLE FLANK AND STRUCTURE
A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
An electronic device and a manufacturing method thereof. As non-limiting examples, various aspects of this disclosure provide an electronic device having a top side pin array, for example which may be utilized for three-dimensional stacking, and a method for manufacturing such an electronic device.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a stackable semiconductor device with small size and fine pitch and a method of manufacturing thereof.
A method for manufacturing a semiconductor package, for example a package-on-package type semiconductor device package. As non-limiting examples, various aspects of this disclosure provide high-yield methods for manufacturing a package-on-package type semiconductor package, or a portion thereof.
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
36.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
In one example, an electronic device includes a semiconductor sensor device having a cavity extending partially inward from one surface to provide a diaphragm adjacent to an opposite surface. A barrier is disposed adjacent to the one surface and extends across the cavity, the barrier has membrane with a barrier body and first barrier strands bounded by the barrier body to define first through-holes. The electronic device further comprises one or more of a protrusion pattern disposed adjacent to the barrier structure, which can include a plurality of protrusion portions separated by a plurality of recess portions; one or more conformal membrane layers disposed over the first barrier strands; or second barrier strands disposed on and at least partially overlapping the first barrier strands. The second barrier strands define second through-holes laterally offset from the first through-holes. Other examples and related methods are also disclosed herein.
In one example, a semiconductor device includes a first substrate with a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a first substrate conductive structure. An electronic component is coupled to the first substrate top side and coupled to the first substrate conductive structure. A support includes a support wall having a first ledge coupled to the first substrate top side, a first riser coupled to the first substrate lateral side, and a second ledge extending from the first riser away from the first substrate lateral side. Other examples and related methods are also disclosed herein.
H01L 23/055 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body the leads having a passage through the base
H01L 23/10 - ContainersSeals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
A semiconductor device with redistribution layers formed utilizing dummy substrates is disclosed and may include forming a first redistribution layer on a first dummy substrate, forming a second redistribution layer on a second dummy substrate, electrically connecting a semiconductor die to the first redistribution layer, electrically connecting the first redistribution layer to the second redistribution layer, and removing the dummy substrates. The first redistribution layer may be electrically connected to the second redistribution layer utilizing a conductive pillar. An encapsulant material may be formed between the first and second redistribution layers. Side portions of one of the first and second redistribution layers may be covered with encapsulant. A surface of the semiconductor die may be in contact with the second redistribution layer. The dummy substrates may be in panel form. One of the dummy substrates may be in panel form and the other in unit form.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
39.
ELECTRONIC DEVICE PACKAGE AND FABRICATING METHOD THEREOF
Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 μm or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
H10F 39/00 - Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group , e.g. radiation detectors comprising photodiode arrays
Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch can be a silicon-less-integrated module (SLIM) patch, comprising a BEOL portion, and can be TSV-less. Metal contacts may be formed on a second surface of the substrate. A second semiconductor die may be bonded to the substrate and to the high routing density patch. The high routing density patch may provide electrical interconnection between the semiconductor die. The substrate may be bonded to a silicon interposer. The high routing density patch may have a thickness of 10 microns or less. The substrate may have a thickness of 10 microns or less.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
41.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device comprises a substrate defining an opening between interior sidewalls. An electronic component is disposed in the opening. A lid is disposed beneath the substrate and a first side of the electronic component, and the lid is thermally coupled to the electronic component. Component interconnects can be coupled to a second side of the electronic component opposite the first side. An antenna structure is disposed over the electronic component and electronically coupled to electronic component through the component interconnects. Other examples and related methods are also disclosed herein.
In one example, an electronic device comprises a substrate comprising a dielectric structure and a conductive structure, a first electronic component over a top side of the substrate and coupled with the conductive structure, a lid over the first electronic component and coupled with a top side of the substrate, wherein the lid comprises a top plate having a plurality of holes, and a covering material covering a lateral side of the first electronic component and extending between the top side of the substrate and a bottom side of the top plate of the lid. Other examples and related methods are also disclosed herein.
In one example, an electronic device includes: an electronic component comprising a sensor and an electrical interconnect; a substrate comprising an electrically conductive material and a translucent mold compound, wherein the electrically conductive material is coupled to the translucent mold compound and wherein the electrical interconnect of the electronic component is coupled to the electrically conductive material of the substrate; and a translucent underfill contacting the electrical interconnect and between the translucent mold compound and the sensor. Other examples and related methods are also disclosed herein.
In one example, an electronic device includes a substrate including a substrate inner side, a substrate outer side opposite to the substrate inner side, substrate lateral sides connecting the substrate inner side to the substrate outer side, a dielectric structure, a conductive structure, and a substrate internal stiffener at the substrate inner side. An electronic component is coupled to the conductive structure and includes a lower side proximate to the substrate inner side, an upper side opposite to the lower side, and a lateral side connecting the lower side to the upper side. An underfill is between the lower side of the electronic component and the substrate inner side and covering the substrate internal stiffener. An encapsulant covers a portion of the substrate inner side, a portion of the underfill; and a portion of the first electronic component. Other examples and related methods are also disclosed herein.
H01L 23/24 - Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel, at the normal operating temperature of the device
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
45.
SEMICONDUCTOR PACKAGE USING CAVITY SUBSTRATE AND MANUFACTURING METHODS
A semiconductor package includes a cavity substrate, a semiconductor die, and an encapsulant. The cavity substrate includes a redistribution structure and a cavity layer on an upper surface of the redistribution structure. The redistribution structure includes pads on the upper surface, a lower surface, and sidewalls adjacent the upper surface and the lower surface. The cavity layer includes an upper surface, a lower surface, sidewalls adjacent the upper surface and the lower surface, and a cavity that exposes pads of the redistribution structure. The semiconductor die is positioned in the cavity. The semiconductor die includes a first surface, a second surface, sidewalls adjacent the first surface and the second surface, and attachment structures that are operatively coupled to the exposed pads. The encapsulant encapsulates the semiconductor die in the cavity and covers sidewalls of the redistribution structure.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
46.
SEMICONDUCTOR PACKAGE AND FABRICATING METHOD THEREOF
A semiconductor device structure and a method for making a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a thin fine-pitch redistribution structure.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
47.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device includes a substrate, an electronic component disposed over the substrate, and an encapsulant disposed over the substrate and the electronic component. A molded heat spreader can be disposed over the encapsulant and can comprise a heat spreader and a mold compound disposed around a lateral side of the heat spreader. A lateral side of the mold compound is coplanar with a lateral side of the encapsulant. Other examples and related methods are also disclosed herein.
H01L 23/367 - Cooling facilitated by shape of device
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
48.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device includes a substrate including a substrate first side, a substrate second side, and a conductive structure. An electronic component includes a component first side coupled to the conductive structure at the substrate first side, a component second side, and a component lateral side connecting the component first side to the component second side. A lid structure includes a first lid having a first lid side wall coupled to the substrate and a first lid top coupled to the first lid side wall and an opening over the component second side. The lid structure includes second lid with a second lid top coupled to the first lid top and a lid channel coupled to the opening. A thermal interface material is within the opening and covers at least a portion of the component second side. Other examples and related methods are also disclosed herein.
H01L 23/367 - Cooling facilitated by shape of device
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/00 - Details of semiconductor or other solid state devices
49.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device can comprise a substrate, a substrate sidewall over a side of the substrate. An electronic device can be disposed over the side of substrate and adjacent the substrate sidewall. An internal interconnect can be disposed between the electronic device and the substrate sidewall. An encapsulant can cover the internal interconnect between the electronic device and the substrate sidewall. A lid attach material can be disposed over the substrate sidewall and the encapsulant. A lid can be coupled to the encapsulant and the substrate sidewall by the lid attach material. A cavity can be defined between a bottom side of the lid and a top side of the electronic device. Other examples and related methods are also disclosed herein.
H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
H01L 21/52 - Mounting semiconductor bodies in containers
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
In one example, a redistribution structure is provided and comprises a substrate interconnect. A portion of a first capping layer is removed to expose a side of the substrate interconnect. The side of the substrate interconnect is recessed by a dishing height from a side of the first capping layer. An electronic component is provided over the first capping layer. The electronic component comprises a second capping layer and a component interconnect. The second capping layer is bonded with the first capping layer. Heat is applied to bond the substrate interconnect to the component interconnect. Other examples and related devices and methods are also disclosed herein.
In one example, a semiconductor device comprises a first dielectric comprising a first side and a second side, a first conductive tier in the first dielectric and comprising a first conductive path integral with a first conductive via, wherein the first conductive path and the first conductive via extend between the first side and the second side of the first dielectric, a second dielectric comprising a first side and a second side, and a first barrier covering the first conductive tier and covering the first dielectric, wherein the first barrier is between the second side of the first dielectric and the first side of the second dielectric. The first conductive tier comprises a trench barrier coupled with the first dielectric structure. Other examples and related methods are also disclosed herein.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
52.
SEMICONDUCTOR DEVICES METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device comprises a first and second substrates comprising first and second dielectric structures and first and second conductive structures, a first electronic component over the first substrate, the second substrate being over the first substrate and the first electronic component, a first interconnect structure between the first substrate and the second substrate and coupled with the first conductive structure and the second conductive structure, a first encapsulant between the first substrate and the second substrate and covering a lateral side of the first interconnect structure and a lateral side of the first electronic component, a second interconnect structure over the second substrate and coupled with the second conductive structure, a second encapsulant over the second substrate and covering a lateral side of the second interconnect structure, and a photonic integrated circuit over the second encapsulant and coupled with the second interconnect structure.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
53.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device includes a substrate, which has a dielectric structure includes a dielectric structure top side and a dielectric structure bottom side opposite to the dielectric structure top side, and a conductive structure comprising a protruded via that extends from the dielectric structure bottom side. An electronic component is coupled to the conductive structure at the dielectric structure top side, and a terminal is coupled to the protruded via such that the protruded via extends into the terminal. Other examples and related methods are also disclosed herein.
In one example, a semiconductor device comprises a base assembly comprising a first substrate, a first device on a top surface of the first substrate, and a first encapsulant on the top surface of the first substrate and bounding a side surface of the first device. The semiconductor device further comprises a conductive pillar on the first substrate and in the first molding compound, wherein the conductive pillar comprises a non-conductive pillar core and a conductive pillar shell on the pillar core.
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
55.
SEMICONDUCTOR DEVICE PACKAGE AND MANUFACTURING METHOD THEREOF
Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/544 - Marks applied to semiconductor devices, e.g. registration marks, test patterns
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
A method for providing an electronic package structure includes providing a substrate having a die pad having a die pad top surface and an opposing die pad bottom surface, leads laterally spaced apart from the die pad, and a substrate encapsulant interposed between the die pad and the leads and includes a substrate top surface and an opposing substrate bottom surface. The substrate encapsulant is provided such that the die pad and the leads protrude outward from the substrate bottom surface. The method includes providing an electronic device having opposing major surfaces and a pair of opposing outer edges. The method includes connecting the electronic device to the substrate such that one major surface of the electronic device is spaced apart from the die pad top surface and upper surfaces of the leads, and the outer edges overlap an opposing pair of the leads.
In one example, an electronic device can include a first redistribution structure. A first electronic component can be disposed on a first side of the first redistribution structure. A first passive component can be on a second side of the first redistribution structure with the first redistribution structure between the first passive component and the first electronic component. A first internal interconnect can be adjacent a lateral side of the first redistribution structure and coupled to the first redistribution structure. A second internal interconnect can be adjacent a lateral side of the first passive component and coupled to the first redistribution structure. An antenna substrate can be disposed over a first side of the first electronic component. A second redistribution structure can be disposed over a second side of the first electronic component. Other examples and related methods are also disclosed herein.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/00 - Details of semiconductor or other solid state devices
A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.
H01L 21/50 - Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups or
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
59.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, a semiconductor device comprises a substrate comprising a top side and a bottom side, a dielectric structure, and a conductive structure, wherein the conductive structure comprises a first terminal exposed from the dielectric structure, an electronic component over the top side of the substrate, and an encapsulant over the top side of the substrate and covering a lateral side of the electronic component. The dielectric structure comprises a first pattern base and first pattern wall that extends from the first pattern base and is adjacent to the first terminal, and the first terminal is bounded by the first pattern wall. Other examples and related methods are also disclosed herein.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
60.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device can comprise a first substrate, an electronic component disposed over a side of the first substrate, and a vertical interconnect coupled to the side of the first substrate. The vertical interconnect can comprise a first metallic core ball proximate the first substrate, a second metallic core ball disposed above the first metallic core ball and distal from the first substrate, and a fusible material coupling the first metallic core ball with the second metallic core ball. The fusible material can be coupled to the first substrate. A second substrate can be disposed over the electronic component and the vertical interconnect. The fusible material of the vertical interconnect can be coupled to the second substrate. Other examples and related methods are also disclosed herein.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
61.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
62.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device comprises a first substrate comprising a first dielectric structure and a first conductive structure, a first interconnect structure over an inward side of the first substrate and coupled with the first conductive structure, a first encapsulant over the inward side of the first substrate and contacting a lateral side of the first interconnect structure, a second substrate over the first encapsulant and comprising a second dielectric structure and a second conductive structure, wherein the second conductive structure is coupled with the first interconnect structure, and a first electronic component coupled with an outward side of the first substrate. The first electronic component is coupled with the second conductive structure via the first interconnect structure and the first conductive structure. Other examples and related methods are also disclosed herein.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/552 - Protection against radiation, e.g. light
63.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an electronic device includes a substrate including a substrate outer side, a substrate inner side, a dielectric structure, and a conductive structure. An electronic component includes an upper side, a lower side opposite to the upper side and coupled to the substrate inner side; a lateral side connecting the upper side to the lower side; and a conductor on the upper side. A cover structure includes sidewalls coupled to the substrate inner side and an upper wall coupled to the sidewalls and comprising an inner side spaced apart from the conductor. A thermal interface material (TIM) contacts and is interposed between the conductor and the inner side of the upper wall. The TIM covers the conductor and the lateral side of the electronic component. Other examples and related methods are also disclosed herein.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/29 - Encapsulation, e.g. encapsulating layers, coatings characterised by the material
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/552 - Protection against radiation, e.g. light
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
64.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, a semiconductor device comprises a first base substrate comprising a first base conductive structure, a first encapsulant contacting a lateral side of the first base substrate, a redistribution structure (RDS) substrate over the base substrate and comprising an RDS conductive structure coupled with the first base conductive structure, a first electronic component over the RDS substrate and over a first component terminal coupled with the RDS conductive structure, and a second encapsulant over the RDS substrate and contacting a lateral side of the first electronic component. Other examples and related methods are also disclosed herein.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
65.
SEMICONDUCTOR PACKAGE HAVING ROUTABLE ENCAPSULATED CONDUCTIVE SUBSTRATE AND METHOD
A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
66.
ELECTRONIC DEVICES AND METHODS OF MANUFACTURING ELECTRONIC DEVICES
In one example, an interposer base can be provided. An inner wall of the interposer base can define an aperture. A liner layer can be provided over the inner wall and the first side of the interposer base. An interposer interconnect can be provided in the aperture. An organic redistribution structure can be provided over the first side of the interposer base and the interposer interconnect. A portion of the interposer base can be removed from the second side to expose the liner layer. An interposer passivation layer can be coupled to the liner layer. A portion of the of the liner layer can be removed to expose the interposer interconnect. An electronic component can be provided over the interposer base to bond a component interconnect of the electronic component to the interposer interconnect. Other examples and related methods are also disclosed herein.
In one example, an electronic device can include a first electronic component and a second electronic component adjacent the first electronic component. A buffer block can be disposed between the first electronic component and the second electronic component. An encapsulant can be disposed on the first electronic component, the second electronic component, and the buffer block. A side of the buffer block can be substantially flat and coplanar with a side of the encapsulant. A redistribution structure can be disposed over the side of the encapsulant and the side of the buffer block. Other examples and related methods are also disclosed herein.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
68.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises shielding on multiple sides thereof.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/552 - Protection against radiation, e.g. light
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
69.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
70.
Carrier Assisted Substrate Method of Manufacturing an Electronic Device and Electronic Device Produced Thereby
An electronic device structure and a method for making an electronic device. As non-limiting examples, various aspects of this disclosure provide a method of manufacturing an electronic device that comprises the utilization of a carrier assisted substrate, and an electronic device manufactured thereby.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that that comprises a transparent, translucent, non-opaque, or otherwise optically-transmissive, external surface.
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
72.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
A packaged electronic device includes a molded substrate with a conductive structure having an edge lead with an edge lead outward side and an edge lead inward side; an inner lead having an inner lead outward side and an inner lead inward side; and a substrate encapsulant. An electronic component is connected to the edge lead and the inner lead. A body encapsulant covers the electronic component and portions of the conductive structure. An upper portion of the edge lead outward side is exposed from one side of the body encapsulant. A conductive cover is over a top side and sides of the body encapsulant and outer sides of the substrate encapsulant. The conductive cover contacts the upper portion of the edge lead outward side.
In one example, an electronic device, comprises a first component comprising a first component inner side and a first component backside, a first component inner terminal, a first component dielectric at the first component inner side, and a first component interconnect coupled with the first component inner terminal. The electronic device comprises a second component over the first component and comprising a second component inner side facing the first component inner side, and a second component backside, a second component inner terminal, a second component dielectric at the second component inner side, and a second component interconnect coupled with the second component inner terminal. The first component dielectric and the second component dielectric comprise an inorganic material, the first component dielectric is coupled with the second component dielectric, and the first component interconnect is coupled with the second component interconnect. Other examples and related methods are also disclosed herein.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
A thin semiconductor device with enhanced edge protection, and a method of manufacturing thereof. For example and without limitation, various aspects of this disclosure provide a thin semiconductor device comprising a substrate with an edge-protection region, and a method of manufacturing thereof.
A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on another so as to enable the exchange of electrical signals between the semiconductor chips, and where a conductive layer is included for inputting and outputting signals to and from individual chips. A stack chip package having a compact size may, for example, be manufactured by stacking, on a first semiconductor chip, a second semiconductor chip having a smaller surface area by means of interconnection structures so as to enable the exchange of electrical signals between the first and second semiconductor chips, and by using a conductive layer for inputting and outputting signals to and from individual semiconductor chips, in lieu of a thick substrate. Furthermore, heat dissipation effects can be enhanced by the addition of a heat dissipation unit.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
76.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
Various aspects of the present disclosure provide a device that comprises an electronic device comprising a first device side, a second device side, and a first lateral device side. The example device may, for example, also comprise a substrate comprising a first substrate side, a second substrate side, and a first lateral substrate side. The substrate may, for example, comprise a first conductive pattern, a first barrier structure, and a second conductive pattern. The first conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first barrier structure may, for example, be on the first lateral side of the first conductive pattern. The second conductive pattern may, for example, comprise a first side, a second side, and a first lateral side. The first lateral side of the second conductive pattern may, for example, be free of a metal barrier structure.
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
77.
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
In one example, an electronic assembly comprises a first semiconductor device and a second semiconductor device. Each of the first semiconductor device and the second semiconductor devices comprises a substrate comprising a top surface and a conductive structure, an electronic component over the top surface of the substrate, a dielectric material over the top surface of the substrate and contacting a side of the electronic component, a substrate tab at an end of substrate and not covered by the dielectric material, wherein the conductive structure of the substrate is exposed at the substrate tab, and an interconnect electrically coupled to the conductive structure at the substrate tab of the first semiconductor device and the conductive structure at the substrate tab of the second semiconductor device. Other examples and related methods are also disclosed herein.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/552 - Protection against radiation, e.g. light
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
78.
Semiconductor package and fabricating method thereof
A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
H01L 23/433 - Auxiliary members characterised by their shape, e.g. pistons
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
79.
Electronic device package and fabricating method thereof
Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 μm or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
In one example, a semiconductor device, comprises a substrate having a top side and a conductor on the top side of the substrate, an electronic device on the top side of the substrate connected to the conductor on the top side of the substrate via an internal interconnect, a lid covering a top side of the electronic device, and a thermal material between the top side of the electronic device and the lid, wherein the lid has a through-hole. Other examples and related methods are also disclosed herein.
H01L 23/367 - Cooling facilitated by shape of device
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/42 - Fillings or auxiliary members in containers selected or arranged to facilitate heating or cooling
H01L 23/46 - Arrangements for cooling, heating, ventilating or temperature compensation involving the transfer of heat by flowing fluids
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
81.
Semiconductor devices and methods of manufacturing semiconductor devices
A semiconductor device includes a substrate including a conductive transceiver pattern proximate to the substrate top side. An antenna structure includes an antenna dielectric structure coupled to the substrate top side, an antenna conductive structure having an antenna element, and a cavity below the antenna element. The antenna element overlies the conductive transceiver pattern. The cavity includes a cavity ceiling, a cavity base, and a cavity sidewall. Either a bottom surface of the antenna element defines the cavity ceiling and a perimeter portion of the antenna element is fixed to the antenna dielectric structure, or the antenna dielectric structure includes a body portion having a bottom surface that defines the cavity ceiling and the antenna element is vertically spaced apart from the bottom surface of the body portion. A semiconductor component is coupled to the substrate bottom side and the transceiver pattern.
In one example, an electronic device includes a substrate with a substrate first side; a substrate second side opposite to the substrate first side, a substrate lateral side connecting the substrate first side to the substrate second side, a dielectric structure, and a conductive structure. A substrate dock includes a substrate dock base at the substrate first side and a first substrate dock sidewall extending upward from the substrate dock base. The substrate dock base and the first substrate dock sidewall define a substrate dock cavity. A cover structure includes a cover sidewall with a cover sidewall lower side. An interface material couples the cover sidewall to the substrate dock. An electronic component is coupled to the conductive structure. Other examples and related methods are also disclosed herein.
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/552 - Protection against radiation, e.g. light
83.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
84.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/13 - Mountings, e.g. non-detachable insulating substrates characterised by the shape
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/50 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements for integrated circuit devices
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.
In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.
A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise forming a back end of line layer on a dummy substrate, completing at least a first portion of an assembly, and removing the dummy substrate.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
88.
Fingerprint sensor and manufacturing method thereof
A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.
In one example, an electronic device includes a substrate with a substrate front side, a substrate rear side opposite to the substrate front side, a substrate body, and conductive vias extending through the substrate body from the substrate front side to the substrate rear side. A first construct is over the substrate front side and includes a first dielectric structure and first conductors embedded in the first dielectric structure and coupled to the conductive vias. A second construct is over the substrate rear side and includes a second dielectric structure and second conductors embedded in the second dielectric structure and coupled to the conductive vias. One or more of the first conductors or the second conductors define one or more passive devices. Other examples and related methods are also disclosed herein.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/532 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
90.
Electronic devices and methods of manufacturing electronic devices
In one example, an electronic device comprises a substrate structure, comprising a base comprising a top side and a bottom side, a first lead, and a flag comprising a top side, a bottom side, and a flag lead. The electronic device also comprises an electronic component comprising a top side and a bottom side, a first electrode at the bottom side of the electronic component, and second electrode at the top side of the electronic component, an encapsulant contacting a lateral side of the electronic component and a lateral side of the base, and a first interconnect in the encapsulant, coupled between the first electrode and the first lead. The second electrode is coupled with the flag lead via the base. Other examples and related methods are also disclosed herein.
H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
H05K 3/40 - Forming printed elements for providing electric connections to or between printed circuits
91.
SEMICONDUCTOR DEVICE WITH INTEGRATED HEAT DISTRIBUTION AND MANUFACTURING METHOD THEREOF
A semiconductor package having an internal heat distribution layer and methods of forming the semiconductor package are provided. The semiconductor package can include a first semiconductor device, a second semiconductor device, and an external heat distribution layer. The first semiconductor device can comprise a first semiconductor die and an external surface comprising a top surface, a bottom surface, and a side surface joining the bottom surface to the tope surface. The second semiconductor device can comprise a second semiconductor die and can be stacked on the top surface of the first semiconductor device. The external heat distribution layer can cover an external surface of the second semiconductor device and the side surface of the first semiconductor device. The external heat distribution layer further contacts an internal heat distribution layer on a top surface of the first semiconductor die.
H01L 25/10 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices having separate containers
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 23/367 - Cooling facilitated by shape of device
H01L 23/373 - Cooling facilitated by selection of materials for the device
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 23/552 - Protection against radiation, e.g. light
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
92.
Semiconductor device including heat sink with exposed side from encapsulant and a method of manufacturing thereof
In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/36 - Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
93.
HYBRID PANEL METHOD OF MANUFACTURING ELECTRONIC DEVICES AND ELECTRONIC DEVICES MANUFACTURED THEREBY
A hybrid panel method of (and apparatus for) manufacturing electronic devices, and electronic devices manufactured thereby. As non-limiting examples, various aspects of this disclosure provide an apparatus for manufacturing an electronic device, where the apparatus is operable to, at least, receive a panel to which a subpanel is coupled, cut around a subpanel through a layer of material, and remove such subpanel from the panel. The apparatus may also, for example, be operable to couple to an upper side of the subpanel, and remove the subpanel from the panel by, at least in part, operating to rotate the subpanel relative to the panel.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
94.
Semiconductor package with EMI shield and fabricating method thereof
A semiconductor device with EMI shield and a fabricating method thereof are provided. In one embodiment, the semiconductor device includes EMI shield on all six surfaces of the semiconductor device without the use of a discrete EMI lid.
H01L 23/552 - Protection against radiation, e.g. light
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
95.
Semiconductor device and manufacturing method thereof
A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a method for manufacturing a semiconductor device that comprises ordering and performing processing steps in a manner that prevents warpage deformation from occurring to a wafer and/or die due to mismatching thermal coefficients.
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
96.
Semiconductor package with routing patch and method of fabricating the semiconductor package
Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch can be a silicon-less-integrated module (SLIM) patch, comprising a BEOL portion, and can be TSV-less. Metal contacts may be formed on a second surface of the substrate. A second semiconductor die may be bonded to the substrate and to the high routing density patch. The high routing density patch may provide electrical interconnection between the semiconductor die. The substrate may be bonded to a silicon interposer. The high routing density patch may have a thickness of 10 microns or less. The substrate may have a thickness of 10 microns or less.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices
In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 - Layout of the interconnection structure
98.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
100.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device structure (e.g., a sensor device structure), and method for manufacturing thereof, that comprises a three-dimensional package structure free of wire bonds, through silicon vias, and/or flip-chip bonding.
H01L 23/00 - Details of semiconductor or other solid state devices
H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
patents