Abstract

The present disclosure relates to the field of display, and provides an array substrate, a light-emitting substrate, and a display device. The array substrate includes: a base substrate; a first conductive layer and a second conductive layer, stacked on the base substrate and insulated from each other; a plurality of groups of light-emitting element terminals, arranged in an array on the second conductive layer for coupling with light-emitting elements; a plurality of groups of sensor terminals, arranged on the second conductive layer for coupling with sensors.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls
• H10H 29/14 - Integrated devices comprising at least one light-emitting semiconductor component covered by group comprising multiple light-emitting semiconductor components

Abstract

A display substrate, a driving method therefor and a display device are provided, the display substrate includes: a plurality of gate driving circuits, each of the gate driving circuits includes a plurality of shift registers that are cascaded with each other, each of the shift registers includes a first reset sub-circuit, the first reset sub-circuit is connected to an inter-frame reset control end, a reset signal end and a first to-be-reset node, respectively, and the first reset sub-circuit is configured to write a reset signal of the reset signal end into the first to-be-reset node according to an inter-frame reset control signal of the inter-frame reset control end; wherein the inter-frame reset control end is connected to an inter-frame reset control line, and inter-frame reset control ends of the plurality of gate driving circuits are connected to a same inter-frame reset control line.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes

Abstract

A driving backplane includes a first substrate, a thick copper layer, a second substrate, and a driving layer stacked in sequence. The thick copper layer is provided with a driving wire configured to load a driving signal. The driving layer is provided with a driving circuit. The driving circuit is electrically connected to the driving wire through a via.

IPC Classes  ?

• H10H 29/49 - Interconnections, e.g. wiring lines or terminals
• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• H10H 29/32 - Active-matrix LED displays characterised by the geometry or arrangement of elements within a subpixel, e.g. arrangement of the transistor within its RGB subpixel

Abstract

A display panel and a display device are provided. The display panel includes: a display region and a non-display region, the non-display region surrounds the display region, the display region includes a first display region and a second display region, the first display region surrounds the periphery of the second display region, a plurality of first pixels is arranged in the first display region, a plurality of second pixels is arranged in the second display region, the display region includes a first driving circuit configured to drive the first pixels and a second driving circuit configured to drive the second pixels; and one first driving circuit is configured to simultaneously drive at least two first pixels.

IPC Classes  ?

• H10H 29/30 - Active-matrix LED displays
• H10H 29/49 - Interconnections, e.g. wiring lines or terminals

Abstract

A display panel and a display device are provided. The display panel includes a substrate, a light-shielding layer, a touch signal line, and at least one light-shielding line; the light-shielding layer is in the non-display region and at least partially surrounds the display region; the touch signal line is in the non-display region and at least partially surrounds the display region; and the at least one light-shielding line is in the non-display region and at least partially surrounds the display region; the at least one light-shielding line is arranged along a direction from the display region to the non-display region, an orthographic projection of the at least one light-shielding line on the substrate is between an edge of the orthographic projection of the light-shielding layer on the substrate close to the display region and an edge of the touch signal line away from the display region.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
• H10K 59/40 - OLEDs integrated with touch screens

Abstract

The present disclosure provides a display driving circuit and a display device. The display driving circuit includes two gate driving circuits, the gate driving circuit includes a plurality of cascaded driving circuits; the driving circuit includes N clock signal terminals, N output sub-circuits and N driving signal output terminals; N is an integer greater than or equal to 2; the N output sub-circuits share a first pull-up node; an ith driving signal output terminal of one driving circuit is electrically connected to an (i+j)th driving signal output terminal of the other driving circuit, and both i and j are positive integers, i is a positive integer less than or equal to N, j is a positive integer less than or equal to N, and i+j is a positive integer less than or equal to N.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

A display substrate is provided. The display substrate includes a substrate and a plurality of sub-pixels arranged in an array on the substrate; The sub-pixel includes a data line pattern extending in a first direction; an initialization signal line pattern including a portion extending in a second direction, the second direction intersecting the first direction, the initialization signal line pattern configured to transmit an initialization signal having a fixed potential; a sub-pixel driving circuit including a driving transistor, a first transistor coupled to a gate of the driving transistor, and a first shielding member coupled to an initialization signal line pattern, an orthographic projection of the first shielding member on a substrate, between the orthographic projection of the first transistor on the substrate and the orthographic projection of the target data line pattern on the substrate; a target data line pattern is included in the next sub-pixel adjacent to the sub-pixel in the second direction.

IPC Classes  ?

• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

The present application relates to the technical field of display, and provides a circuit board, a display module, and a display device. The circuit board comprises a first area, a second area and a third area, and the second area is located between the first area and the third area; the first area and the second area each comprise at least two conductive layers, and the third area comprises at least three conductive layers; the first area is provided with a first hollow recess and signal lines, the first area overlaps a wiring area of a display panel, and a circuit in the wiring area is electrically connected to a driving chip by means of the first hollow recess; the second area is provided with a plurality of golden fingers; and the third area is provided with a plurality of functional devices.

IPC Classes  ?

• H05K 1/11 - Printed elements for providing electric connections to or between printed circuits

Abstract

A method for analyzing a disease, a method and apparatus for training a model, and a storage medium. The method for training the disease analysis model comprises: dividing a reference genome into a plurality of genomic intervals, and determining the genomic interval to which each sequencing read in free DNA sequencing data belongs; counting the number of short fragments and the number of long fragments in each genomic interval on the basis of the length of each sequencing read, and selecting at least a portion of the plurality of genomic intervals as differential genomic intervals, wherein the ratio of the number of short fragments to the number of long fragments in the differential genomic intervals is greater than the ratio of the number of short fragments to the number of long fragments in the non-differential genomic intervals; acquiring at least partial read alignments of each sequencing read within each differential genomic interval, and encoding the acquired read alignments to form a complete data set; and constructing a neural network model, and training and evaluating the neural network model by using the complete data set.

IPC Classes  ?

• G16B 40/20 - Supervised data analysis
• G16B 20/10 - Ploidy or copy number detection
• G16B 20/20 - Allele or variant detection, e.g. single nucleotide polymorphism [SNP] detection

Abstract

A display substrate and a display apparatus. The display substrate comprises: a base substrate, and sub-pixels and a first metal layer that are located on the base substrate. The sub-pixels include a first-color sub-pixel, and the first metal layer comprises data lines, the data lines being arranged in a first direction. A light-emitting region of the first-color sub-pixel comprises a first edge extending in the first direction and a second edge extending in a second direction, the length of the first edge being greater than the length of the second edge. The first metal layer further comprises a metal pad layer located between adjacent data lines, wherein in a direction perpendicular to the base substrate, the metal pad layer comprises a first overlapping portion which overlaps with a light-emitting region of a sub-pixel, the first overlapping portion is of a continuous structure, the first overlapping portion is symmetrically arranged with respect to a first center line of the light-emitting region of the sub-pixel which extends in the second direction, and the area of the first overlapping portion accounts for 60% or more of the area of the light-emitting region; and the metal pad layer is configured to transmit a power signal. The display substrate provided in the present disclosure can ameliorate color shift, thereby improving the display quality.

IPC Classes  ?

• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display panel includes a grating structure. The grating structure includes a plurality of first electrodes and a plurality of second electrodes configured to control liquid crystal molecules in a liquid crystal layer, the plurality of first electrodes and the plurality of second electrodes being at least partially in a display area; and a plurality of first signal transmission lines configured to provide a first voltage signal to the plurality of first electrodes, and a plurality of second signal transmission lines configured to provide a second voltage signal to the plurality of second electrodes, the plurality of first signal transmission lines and the plurality of second signal transmission lines being in a peripheral area. The plurality of first electrodes are at least partially in a second conductive layer. The plurality of second electrodes are at least partially in a third conductive layer.

IPC Classes  ?

• G02F 1/1343 - Electrodes

Abstract

A display substrate, comprising: a base substrate (10), a plurality of sub-pixels (PX) located in a display area (A1) and located on a side of the base substrate (10), a plurality of first-type data lines (DL1) located in an effective area (AA) and arranged around a hole area (A2), a plurality of first-type data fan-out lines (411, 412, 413) located in a fan-out area and electrically connected to the plurality of first-type data lines (DL1), and a first data signal capacitance compensation structure located in the fan-out area, at least one insulating layer being provided between the first data signal capacitance compensation structure and the plurality of first-type data fan-out lines (411, 412, 413), and the orthographic projection of the first data signal capacitance compensation structure on the base substrate (10) and the orthographic projection of at least one of the first-type data fan-out lines (411, 412, 413) on the base substrate (10) at least partially overlapping each other.

IPC Classes  ?

• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A heat dissipation structure, an electronic device, a heat dissipation system and a control method. The heat dissipation structure comprises a heat dissipation cavity (3), and a piezoelectric fan (4) and an air guide mechanism (5) which are located in the heat dissipation cavity (3), wherein the heat dissipation cavity (3) has an air inlet (10) and an air outlet (11); one end of the piezoelectric fan (4) is arranged on a cavity wall of the heat dissipation cavity (3) and is close to the air inlet (10), and the other end thereof extends to the air outlet (11); the air guide mechanism (5) is located between the piezoelectric fan (4) and the air outlet (11), and the air guide mechanism (5) is configured to guide an airflow to flow to the air outlet (11); and the piezoelectric fan (4) has a power-on state and a power-off state, and when in the power-on state, the end of the piezoelectric fan (4) close to the air outlet (11) swings, so as to generate an airflow flowing to the air guide mechanism (5). By means of the heat dissipation structure of the present example, local air can be rapidly compressed, such that a jet flow is formed; and a high-speed flow field can be achieved, thereby realizing efficient heat dissipation.

IPC Classes  ?

• H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
• F04D 33/00 - Non-positive-displacement pumps with other than pure rotation, e.g. of oscillating type

Abstract

Provided are a driving backplane (10), a light-emitting substrate (100) and a preparation method, a display device (1000), and a transfer substrate (700). The driving backplane (10) comprises a first base (11), a plurality of pad sets (12), and a plurality of first adhesive members (13). The plurality of pad sets (12) are arranged on one side of the first base (11) and are connected to the first base (11), one pad set (12) being configured to connect to one light-emitting device (20). The plurality of first adhesive members (13) are arranged on the side of the first base (11) that is close to the plurality of pad sets (12), and are connected to the first base (11); the distance between the first base (11) and the surface of each first adhesive member (13) that is away from the first base (11) is greater than that between the first base (11) and the surface of the pad set (12) that is away from the first base (11), and each first adhesive member (13) is configured, when a light-emitting device (20) abuts against the pad set (12), to adhere to the light-emitting device (20).

IPC Classes  ?

• G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission

Abstract

An array substrate, a display panel, a display device and a driving method. The array substrate comprises: a substrate (1); a plurality of gate lines (2); a plurality of data lines (3), wherein at least one data line (3) among the data lines (3) comprises first data portions (31) and second data portions (32) alternately distributed in a second direction, and extension lines of two first data portions (31) on two sides of each second data portion (32) do not coincide in the second direction; a plurality of pixel electrodes, wherein the maximum length of each pixel electrode (4) in a first direction is greater than the maximum length thereof in the second direction, and the orthographic projections of the plurality of pixel electrodes (4) on the substrate (1) at least partially overlap the orthographic projections of the gate lines (2) on the substrate (1); and a plurality of first common electrodes (65) extending in the second direction and disconnected at positions intersecting with the gate lines (2), wherein the orthographic projections of the first common electrodes (65) on the substrate (1) at least partially cover gaps between the data lines (3) and the pixel electrodes (4).

IPC Classes  ?

• G02F 1/1362 - Active matrix addressed cells

Abstract

A shift register unit and a driving method therefor, and a display substrate. The shift register unit comprises a node control sub-circuit, a pull-down sub-circuit and an output sub-circuit. The node control sub-circuit is electrically connected to a signal input end, a first clock signal end, a second clock signal end, a power supply signal end, a first reference signal end, a first node and a second node, and is configured to provide to the first node a signal from the signal input end under the control of a signal from the first clock signal end, provide to the second node a signal from the first reference signal end or the first clock signal end under the control of signals from the first node and the first clock signal end, and provide to the first node a signal from the power supply signal end under the control of the second node and the second clock signal end, wherein the level of the signal from the first reference signal end is lower than the level of a signal from a second reference signal end.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

Embodiments of the present disclosure provide an array substrate, a display panel, and a display device. The array substrate comprises: a substrate; a plurality of terminals located in a binding area on one side of the substrate; a first common wire located on one side of the substrate, the first common wire being arranged around a display area and at least comprising a first sub-part which is located in a binding opposite-side area and extends in a first direction; and a plurality of second common wires located on one side of the substrate, the plurality of second common wires extending in a second direction, extending from the display area to the binding opposite-side area and intersecting with the first sub-part, and the second direction intersecting with the first direction, wherein the first sub-part and the plurality of second common wires are located on a same layer and are directly electrically connected at intersections.

IPC Classes  ?

• H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body

Abstract

The present disclosure belongs to the technical field of the Internet of Things. Provided are an application control method and system, and a device and a medium, which aim to realize application control involving the collaboration between a device end and a cloud end, so as to reduce the computing power consumption of the device end. The method comprises: on the basis of a monitor file, monitoring a plurality of applications on a device end; uploading monitor results of the plurality of applications to a cloud end; and in response to the occurrence of a target event for a target application among the plurality of applications, on the basis of the target event, executing a first control on the target application, wherein the first control comprises at least one of starting an application, closing an application, uninstalling an application and upgrading an application, and the target event comprises receiving a control instruction which is sent by the cloud end on the basis of the monitor results, and/or the device end detecting that the monitor result of the target application meets a preset condition, which is recorded in the monitor file.

IPC Classes  ?

• G06F 11/30 - Monitoring

Abstract

A display module (100), comprising a display panel (10), a bending adhesive (110), and a blocking adhesive (120). The display panel (10) has a display side (10A) and a back side (10B) which are oppositely arranged. The display panel (10) comprises a main body part (101), a bending part (102), and a binding part (103) which are connected in sequence, and the bending part (102) is located between the main body part (101) and the binding part (103); the main body part (101) is provided with a display area (A); the bending part (102) is capable of being bent towards the back side (10B) of the main body part (101) along the bending axis extending in a first direction (X), so that after bending, the binding part (103) is located at the back side (10B) of the main body part (101). The bending part (102) comprises a first transition area (M1), a second transition area (M2), and a bending area (M3) located between the first transition area (M1) and the second transition area (M2), and the first transition area (M1) is adjacent to the main body part (101). The bending adhesive (110) is arranged on the display side (10A) of the display panel (10) and covers the bending area (M3). The blocking adhesive (120) is arranged on the display side (10A) of the display panel (10) and is connected to the bending adhesive (110). The blocking adhesive (120) comprises a first blocking adhesive (121), and the first blocking adhesive (121) is located between the bending adhesive (110) and the display area (A). Moreover, in a second direction (Y), the length of the first blocking adhesive (121) is less than or equal to 240 μm. The second direction (Y) is perpendicular to the first direction (X) and is parallel to the main body part (101).

IPC Classes  ?

• G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

Abstract

The present disclosure belongs to the technical field of display. Provided are a display panel and a preparation method therefor, and a display apparatus. The display panel of the present disclosure comprises a base substrate, and a light-emitting functional layer, a packaging layer and a peeping prevention structure which are sequentially arranged on the base substrate, wherein the light-emitting functional layer comprises a plurality of light-emitting devices. The peeping prevention structure comprises an electrochromic layer, a first electrode arranged on the side of the electrochromic layer that faces away from the base substrate, and a second electrode arranged on the side of the electrochromic layer that is close to the base substrate, wherein the electrochromic layer comprises a plurality of contact portions, and connecting portions which connect every two adjacent contact portions; both the first electrode and the second electrode are in contact with the contact portions, one of the first electrode and the second electrode is in contact with the connecting portions, and the other one of the first electrode and the second electrode is spaced apart from the connecting portions; and the connecting portions and the light-emitting devices are arranged in a manner of corresponding to each other on a one-to-one basis.

IPC Classes  ?

• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 59/80 - Constructional details

Abstract

A display panel and a manufacturing method therefor. The display panel comprises a substrate, a planarization layer located on one side of the substrate, and micro lens units each comprising a plurality of recesses, wherein the plurality of recesses are formed in the planarization layer, and openings of the plurality of recesses are located in the surface of the side of the planarization layer facing away from the substrate; the plurality of recesses are arranged in an array; the planarization layer uses a positive adhesive material containing transparent scattering particles, and in the direction moving away from the substrate, the concentration of the transparent scattering particles in the planarization layer gradually increases; or the planarization layer uses a negative adhesive material containing transparent scattering particles, and in the direction moving away from the substrate, the concentration of the transparent scattering particles in the planarization layer gradually decreases. The display panel solves the problem in the related art that the difficulty of the manufacturing process of micro lenses in a bottom-emitting OLED display screen is large and thus it is difficult to form micro lenses having good shape.

IPC Classes  ?

• H10K 59/80 - Constructional details

Abstract

A display panel, a display device, and a tiled display device. The display panel comprises a substrate and a plurality of connection leads. The substrate comprises a first surface and a second surface arranged opposite to each other, and at least one side surface connecting the first surface and the second surface, wherein the at least one side surface is a selected side surface. Each connection lead among the plurality of connection leads extends from the first surface, through the selected side surface, to the second surface. The plurality of connection leads comprises a first connection lead and a second connection lead, wherein the first connection lead and the second connection lead are adjacent in a direction perpendicular to the surface of the substrate and are arranged in different layers. The display panel is used for displaying an image.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H10K 59/18 - Tiled displays

Abstract

The embodiments of the present disclosure provide a light-emitting apparatus, a manufacturing method therefor, and a display device. The light-emitting apparatus comprises an anode, a hole transport layer, a quantum dot light-emitting layer, an electron transport layer and a cathode, which are arranged in a stacked manner, wherein the electron transport layer is made of inorganic metal oxide nanoparticles, and hydroxyls and soluble groups that modify the inorganic metal oxide nanoparticles, the number of hydroxyls being greater than that of soluble groups; and the infrared spectrum of the electron transport layer has no obvious C-H vibration peak within the range of 2750 cm-1to 3000 cm-1.

IPC Classes  ?

• H10K 50/16 - Electron transporting layers

Abstract

The present application relates to the technical field of streaming media, and discloses a signaling server, a streaming media system, and a media stream control method. The signaling server can determine, upon reception of a stream opening request from a playback terminal, whether a media stream corresponding to the stream opening request has been opened, acquire an identifier of the media stream when the media stream has been opened, and provide the identifier to the playback terminal, so that the playback terminal can acquire the media stream on the basis of the identifier. In this way, repeated stream opening can be avoided, thereby increasing the success rate of a signaling server opening a media stream.

IPC Classes  ?

• H04N 7/18 - Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast

Abstract

An antenna element, an antenna module, an antenna array and an electronic device. The antenna element (4) comprises electric dipoles (41), magnetic dipoles (42) and a feed unit (43). The current of the feed unit (43) is coupled to the magnetic dipoles (42), and is then directly transmitted to the electric dipoles (41) by the magnetic dipoles (42). Each pair of electric dipoles (41) comprises two first patches (411), each first patch (411) is of a closed loop structure, and the coupled current is transmitted along the contour of the first patch (411), thereby facilitating the lengthening of a transmission path of the coupled current. For the same transmission path length, the electric dipoles (41) of this structure have a smaller volume, which can reduce the volume of the antenna element (4). Each first patch (411) of the closed loop structure reduces the radiation area of an antenna to a certain extent, and reduces the coupling between antenna elements (4), so that the radiation gain of the antenna module (100) can be improved. Therefore, the antenna element (4) can improve the radiation gain of the antenna module (100) while making the antenna module (100) smaller. (FIG. 1)

IPC Classes  ?

• H01Q 9/16 - Resonant antennas with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole

Abstract

Embodiments of the present disclosure relate to the technical field of display, and provide a flexible printed circuit board. The flexible printed circuit board comprises a board body, a first shielding layer, a reinforcing sheet, and a connector; the board body has a first surface and a second surface which are opposite to each other; and the board body has a first end and a second end in the length direction of the board body. The connector is located on the first surface and at the first end, and the connector is connected to the board body. The reinforcing sheet is located on the second surface and at the first end, and the orthographic projection of the connector on the first surface at least partially overlaps the orthographic projection of the reinforcing sheet on the first surface. The first shielding layer is located on the second surface, and the first shielding layer is electrically connected to the reinforcing sheet. The embodiments of the present disclosure can ameliorate the problem of poor electrostatic and electromagnetic protection capabilities of the back surface of the connector in the flexible printed circuit board.

IPC Classes  ?

• H05K 1/02 - Printed circuits Details
• G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

Abstract

A display panel (PNL) and a display device. The display panel (PNL) comprises at least two sub-panels (SPNL) sequentially tiled in a column direction; any sub-panel (SPNL) comprises sub-pixels (PIX) distributed in an array and scan lines (GL) in one-to-one correspondence to sub-pixel rows; and the sub-panel (SPNL) is provided with a plurality of gate drive circuits (GOA) for driving the scan lines (GL), wherein among two adjacent sub-panels (SPNL), the timing of a start signal of the gate drive circuit (GOA) electrically connected to the last row of scan line (GL) of the preceding sub-panel (SPNL) is the same as the timing of a start signal of the gate drive circuit (GOA) electrically connected to the first row of scan line (GL) of the subsequent sub-panel (SPNL). The problem of screen tearing of the tiled display panels (PNL) can be solved.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Abstract

An array substrate (ARR), a liquid crystal display panel (PNL), and a liquid crystal display apparatus, relating to the technical field of display. The array substrate (ARR) comprises a first base substrate (SBTA), a source-drain metal layer (SD), and a common electrode layer (COML) that are stacked, and comprises a switching transistor (SW) and a pixel electrode (PIXP) that are arranged in an array; the source-drain metal layer (SD) has a first conductive structure (SDA) electrically connected to a second electrode of the switching transistor (SW) and the pixel electrode (PIXP); an area where the pixel electrode (PIXP) overlaps the first conductive structure (SDA) is covered by the common electrode layer (COML). The array substrate (ARR) can increase the contrast ratio of the liquid crystal display panel (PNL).

IPC Classes  ?

• G02F 1/1343 - Electrodes
• C09K 19/44 - Mixtures of liquid crystal compounds covered by two or more of the preceding groups containing compounds with benzene rings directly linked

Abstract

An antenna unit and an antenna device, relating to the technical field of antennas, aiming to reduce the size and cost of an indoor antenna base station. The antenna unit comprises a dielectric block, the dielectric block being of a polyhedral structure; a feeder line located on one outer surface of the dielectric block; and a radiation structure connected to the feeder line, wherein the radiation structure comprises a plurality of radiation branches having different lengths, the plurality of radiation branches are distributed on different outer surfaces of the dielectric block, and the radiation branches comprise at least one bending part.

IPC Classes  ?

• H01Q 1/38 - Structural form of radiating elements, e.g. cone, spiral, umbrella formed by a conductive layer on an insulating support

Abstract

The present disclosure provides a method, apparatus and server for establishing a connection, for avoiding leakage of user privacy when providing an information acquisition service for a small-scale public place. The method includes: receiving a first request message of a user apparatus, wherein the first request message includes access user information and target object information; when determining that the access user information and the target object information have a binding relationship, and media data of at least one target apparatus include the target object information, determining at least one target apparatus corresponding to the target object information; and establishing a communication connection between the user apparatus and the at least one target apparatus.

IPC Classes  ?

• H04W 12/08 - Access security
• H04W 12/48 - Security arrangements using identity modules using secure binding, e.g. securely binding identity modules to devices, services or applications
• H04W 76/10 - Connection setup

Abstract

A display panel has a first region including a first display region and a second display region, the first display region includes a first sub-region and a second sub-region. The display panel includes: a substrate; light-emitting devices including first light-emitting devices located in the first display region and second light-emitting devices located in the second display region; pixel circuits including first pixel circuits coupled to the first light-emitting devices and second pixel circuits coupled to the second light-emitting devices; and signal lines. The first pixel circuits are located outside the first display region, and the second pixel circuits are located in the second display region. Each of at least one signal line of the signal lines is coupled to at least one first pixel circuit, and an orthogonal projection of the at least one signal line on the substrate overlaps the second sub-region, and does not overlap the first sub-region.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 50/844 - Encapsulations
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/65 - OLEDs integrated with inorganic image sensors
• H10K 59/80 - Constructional details
• H10K 77/10 - Substrates, e.g. flexible substrates
• H10K 102/00 - Constructional details relating to the organic devices covered by this subclass

Abstract

The present disclosure provides a display panel and a method of manufacturing the same and a display device. In a sub-pixel driving circuit of the display panel, a gate electrode of a driving transistor is coupled to a second electrode of a second transistor through a fourth conductive connection portion, and a second electrode plate of a storage capacitor is coupled to a second electrode of a first transistor through a third conductive connection portion, a gate electrode of the first transistor and a gate electrode of the second transistor are respectively coupled to a gate line pattern in the corresponding sub-pixel area; orthographic projection of the gate line pattern on the substrate does not overlap orthographic projection of the third conductive connecting portion on the substrate, and/or does not overlap orthographic projection of the fourth conductive connection portion on the substrate.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs

Abstract

A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit includes a first input circuit and a first output circuit; the second sub-circuit includes a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

A pixel circuit, a display panel, a display apparatus and a driving method are provided. The pixel circuit includes: a light-emitting device; a driving transistor configured to generate a driving current for driving the light-emitting device to emit light according to a data voltage; a coupling control circuit configured to stabilize voltages at the first node, and the gate electrode and the second electrode of the driving transistor; a signal writing circuit configured to provide a signal from a data signal terminal to the first node in response to a signal from a scan signal terminal, and to provide a signal from a first power terminal to the first electrode of the driving transistor in response to a signal from a light-emitting control signal terminal; and a threshold compensation circuit configured to write a threshold voltage of the driving transistor to the gate electrode of the driving transistor.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

The present disclosure provides an antenna and electronic device, and belongs to the field of communication technology. The antenna includes a feed layer, a phase adjustment layer, and a radiation layer, wherein the feed layer is configured to transmit a microwave signal to the phase adjustment layer; the phase adjustment layer is configured to phase-shift the microwave signal by a preset phase shift amount; and the radiation layer is configured to radiate the microwave signal phase-shifted by the phase adjustment layer; the radiation layer includes at least one first radiation patch.

IPC Classes  ?

• H01Q 9/04 - Resonant antennas
• H01Q 1/02 - Arrangements for de-icingArrangements for drying-out
• H01Q 3/36 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the relative phase or relative amplitude of energisation between two or more active radiating elementsArrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system varying the distribution of energy across a radiating aperture varying the phase by electrical means with variable phase-shifters

Abstract

An array substrate and a display panel, the array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

IPC Classes  ?

• G02F 1/1368 - Active matrix addressed cells in which the switching element is a three-electrode device
• G02F 1/1362 - Active matrix addressed cells

Abstract

A display substrate includes a first display region and a second display region located at at least one side of the first display region, a light transmittance of the first display region is greater than that of the second display region. The first display region is provided with first light emitting devices, the second display region is provided with first pixel driving circuits, second pixel driving circuits, and second light emitting devices. The first pixel driving circuit drives the first light emitting device, and the second pixel driving circuit drives the second light emitting device. The second display region further includes initialization signal lines respectively connected with the first pixel driving circuits and the second pixel driving circuits and apply initialization signals thereto. The first pixel driving circuit and the second pixel driving circuit are respectively connected to different initialization signal lines.

IPC Classes  ?

• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

The present disclosure provides a driving circuitry, a driving method, a display substrate and a display device. The driving circuitry includes a driving output circuitry, a first resetting circuitry and a first isolation circuitry. The driving output circuitry is configured to control a driving signal output end to be electrically coupled to a first voltage line or a first clock signal line under the control of a potential at a first node. The first resetting circuitry is configured to control a first clock signal line to write a first clock signal into a first control node under the control of a first resetting signal. The first isolation circuitry is configured to control the first control node to be electrically coupled to the first node under the control of a second clock signal.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

A training method and apparatus for an image restoration model, and an electronic device, which are applied to the technical field of image processing. The method comprises: acquiring a raw image data set; performing a degradation operation on raw images in the raw image data set, so as to obtain different degraded images; inputting the degraded images into a generative network, so as to obtain first generated images, and on the basis of the first generated images and the raw images, performing a first model parameter update on the generative network; inputting the first generated images into the generative network that has been subjected to the model parameter update, so as to generate second generated images; on the basis of the first generated images and the second generated images, performing a second model parameter update on the generative network; and repeatedly executing the operation of performing a second model parameter update on the generative network until the generative network meets the requirements for an image restoration task. A visual operation interface corresponding to the training method is provided.

IPC Classes  ?

• G06T 5/77 - RetouchingInpaintingScratch removal

Abstract

Provided are a pixel circuit, a driving method, and a display apparatus. The pixel circuit comprises a light-emitting element (E1), a driving circuit (10), a first energy storage circuit (11), a second energy storage circuit (12), a third energy storage circuit (21), and a first reset control circuit (13). The first reset control circuit (13) writes a reference voltage (REF) into a first node (N1) under the control of a first reset control signal (R1); a first end of the first energy storage circuit (11) is electrically connected to the first node (N1), a second end of the first energy storage circuit (11) is electrically connected to a third node (N3), and the first energy storage circuit (11) is configured to store electric energy; the second energy storage circuit (12) is electrically connected to the third node (N3), and the second energy storage circuit (12) is configured to store electric energy; and the third energy storage circuit (21) is electrically connected to the first node (N1), and the third energy storage circuit (21) is configured to store electric energy. The pixel circuit performs threshold voltage compensation by means of the first reset control circuit (13), and enables threshold voltage compensation to be separated from data writing time, thereby improving the threshold voltage compensation effect.

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

Abstract

A pixel circuit, a driving method and a display apparatus. The pixel circuit comprises a driving circuit (10), a light-emitting element (E1), a first energy storage circuit (11), a second energy storage circuit (12), a first control circuit (13) and a second control circuit (14), wherein a first end of the first energy storage circuit (11) is electrically connected to a second node (N2), and a second end of the first energy storage circuit (11) is electrically connected to a third node (N3); a first end of the second energy storage circuit (12) is electrically connected to the third node (N3), and a second end of the second energy storage circuit (12) is electrically connected to a first node (N1); under the control of a first reset control signal, the first control circuit (13) provides to the third node (N3) a voltage signal provided by a reference voltage end (VB); and under the control of a first scanning signal, the second control circuit (14) controls the connection between the first node (N1) and the third node (N3). The pixel circuit can improve the threshold voltage compensation result, and can support the compensation for the threshold voltage of depletion-mode compensation transistors.

IPC Classes  ?

• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

A display method and a device, relating to the technical field of computers, and aiming to adaptively scale a model imported into a naked eye 3D editor, such that the model is located at an optimal visual angle. The method comprises: for imported first three-dimensional content, when a plurality of vertexes of the first three-dimensional content are projected to a display screen, determining two-dimensional coordinates of each of the plurality of vertexes on the display screen; scaling the first three-dimensional content on the basis of the plurality of two-dimensional coordinates and the boundary of a target display area in the display screen; and displaying scaled second three-dimensional content in the target display area, wherein the proportion of the second three-dimensional content occupying the target display area is within a preset proportion range.

IPC Classes  ?

• G06F 3/14 - Digital output to display device

Abstract

The present disclosure belongs to the technical field of communications. Provided are a radio frequency switch and an electronic device. The radio frequency switch of the present disclosure comprises a power divider, a plurality of phase adjustment components, and at least one coupler; the power divider comprises a plurality of branches, the first ends of the branches are directly connected, and the second ends of the branches are connected to the input ends of the corresponding phase adjustment components respectively; the coupler comprises a first input end, a second input end, a first output end and a second output end, and the first input end and the second input end of the coupler are respectively connected to the output ends of different phase adjustment components.

IPC Classes  ?

• H01P 1/15 - Auxiliary devices for switching or interrupting by semiconductor devices

Abstract

Provided are a display substrate (1100), a display panel, and a display apparatus (1000). The display substrate (1100) has a display area (AA) and a peripheral area (BB), the display area (AA) comprises N display sub-areas, wherein N≥2. The display substrate (1100) comprises: N groups of gate drive circuits (300); at least one start signal end (STV); at least one multiplexer circuit (500), the multiplexer circuit (500) comprising N selection control signal ends (MUX); and at least N start signal sub-lines, the N start signal sub-lines being electrically connected to the start signal end (STV) by means of the multiplexer circuit (500). The N start signal sub-lines are arranged in the peripheral area (BB), and the N start signal sub-lines extend in a second direction and are arranged at intervals in a first direction, wherein the second direction is a scanning direction of the display area (AA), and the first direction intersects the second direction. The display substrate (1100) further comprises: a signal stabilizing part (600) arranged in the peripheral area (BB), and the signal stabilizing part (600) comprises a combination of one or more of a parasitic capacitor, a redundant wire, or a series resistor.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

An electrical tilt feed network (1), comprising: a power division network (11), comprising a main path feeder (111) and branch feeders (112); and a variable delay module (12) connected in series on one branch feeder (112) and comprising a first electrical tilt switch (121), a second electrical tilt switch (122) and a plurality of delay lines (123), wherein the plurality of delay lines (123) have the same impedance and different lengths, and two ends of each delay line (123) are respectively electrically connected to the first electrical tilt switch (121) and the second electrical tilt switch (121). In the present disclosure, the conduction of any delay line (123) can be realized by means of excitation of an electrical signal, thereby simplifying the structure of the variable delay module (12), and reducing the size and weight of the electrical tilt feed network (1); in addition, controlling the electrical tilt switch on the basis of the electrical signal improves the response rate, thereby improving the phase switching efficiency.

IPC Classes  ?

• H01Q 1/50 - Structural association of antennas with earthing switches, lead-in devices or lightning protectors

Abstract

The present disclosure relates to the technical field of display, and provides a display panel and a display apparatus. The display panel of the present disclosure has a display area and a peripheral area surrounding the display area. The display panel comprises: a base substrate; a plurality of gate lines and a plurality of data lines arranged on the base substrate and extending from the display area to the peripheral area; a connection structure located in the peripheral area and used for electrically connecting the gate lines to a shift register and arranged on the side of the shift register close to the display area; and a first electrostatic protection structure located in the peripheral area, wherein the first electrostatic protection structure comprises first lead-out portions, second lead-out portions and first electrostatic lines; the first lead-out portions are connected to the side of the connection structure facing away from the display area, the second lead-out portions are arranged corresponding to the first lead-out portions, each second lead-out portion is located on the side of the corresponding first lead-out portion away from the display area, and the second lead-out portions are electrically connected to the first electrostatic lines.

IPC Classes  ?

• H01L 27/02 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier

Abstract

Disclosed are a gate driving circuit, a display substrate and a display device. The gate driving circuit comprises a plurality of transistors arranged on a base. The plurality of transistors at least include a fourth transistor (T4) serving as a first output transistor and a fifth transistor (T5) serving as a second output transistor. A first electrode of the fourth transistor (T4) is connected to a high-potential signal line (34), a first electrode of the fifth transistor (T5) is connected to a second clock signal line (32), a second electrode of the fourth transistor (T4) and a second electrode of the fifth transistor (T5) are connected to an output signal line (35), and the output signal line (35) is configured to output a gate driving signal to a display region. The fifth transistor (T5) is arranged on the side of the fourth transistor (T4) close to the display region, and at least one transistor is arranged between the fourth transistor (T4) and the fifth transistor (T5) in a direction approaching the display region.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

Disclosed in the present disclosure are a touch screen panel and a display apparatus, which are used for reducing signal attenuation. Provided in the embodiments of the present disclosure is a touch screen panel. The touch screen panel comprises: a display substrate; and a touch-control layer, which is located on a display side of the display substrate and comprises a plurality of touch-control conductive layers, wherein each touch-control conductive layer comprises a metal grid structure formed by interweaving a plurality of metal lines; and the line width h1 of each metal line and the size h2 of the touch screen panel meet: h1>2.5, and 1.5≤h2/h1≤3.6, the line width h1 of each metal line having a unit of micron, and the size h2 of the touch screen panel having a unit of inch.

IPC Classes  ?

• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Abstract

Disclosed in the present invention are a touch display panel and a display device, for use in improving the touch accuracy and linearity of an active stylus. The touch display panel provided by the present invention supports touch operation on the basis of the active stylus. The touch display panel comprises: a display substrate; multiple touch conductive layers located on a display side of the display substrate. The orthographic projections of the multiple touch conductive layers on the display substrate form multiple touch units arranged in an array in a first direction and a second direction; the touch units comprise multiple touch sub-units arranged in n rows × n columns, wherein n is an integer greater than or equal to 2; the first direction intersects with the second direction; the extension direction of each row of touch sub-units is the first direction, and the extension direction of each column of touch sub-units is the second direction; and the width h1 of the touch sub-units in the first direction, the width h2 of the touch sub-units in the second direction, and the diameter D of the tip of the active stylus satisfy: formulas (1) and (2).

IPC Classes  ?

• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Abstract

The present disclosure relates to the technical field of display, and provides a display panel and a display device. The display panel of the present disclosure comprises a display area, a first transition area, a second transition area and a hole area. The display panel comprises a base substrate, and a planarizing layer, a light-emitting layer and at least one isolation column that are arranged on the base substrate; the light-emitting layer extends from the display area to the second transition area, and is disconnected at each isolation column; the isolation column surrounding the hole area and closest to the display area is a first isolation column, and a first recess formed in the base substrate is defined between the first isolation column and the planarizing layer; the planarizing layer comprises a planarizing area and an inclined area, and the planarizing layer comprises a first surface facing away from the base substrate; and a dihedral angle formed between a tangent plane of any point on the first surface in the inclined area and the second surface of the base substrate close to the planarizing layer is α; and the width of the first recess meets the following formula: W=α*k, wherein W represents the width of the first recess, k represents a coefficient, and k belongs to [0.48, 0.65].

IPC Classes  ?

• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/80 - Constructional details
• H10K 50/84 - PassivationContainersEncapsulations

Abstract

A display panel, comprising: a peep-proof functional layer, the peep-proof functional layer comprising a first electrode layer, an electrochromic layer and a second electrode layer, which are arranged in sequence along a direction away from a base substrate. The display panel further comprises: a first overlapping wire and a second overlapping wire, which are located in a peripheral region and are arranged spaced apart from each other, the first overlapping wire being connected to the first electrode layer, and the second overlapping wire being connected to the second electrode layer. The display panel further comprises at least one of a first barrier dam, a second barrier dam and a third barrier dam, which are located in the peripheral region, a film layer at which the first barrier dam, the second barrier dam and the third barrier dam are located being disposed at a side of a film layer, facing away from the base substrate, where the first overlapping wire and the second overlapping wire are located.

IPC Classes  ?

• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A display substrate and a display apparatus. The display substrate comprises a base substrate (101) and a plurality of light-emitting units, wherein the plurality of light-emitting units include at least a first light-emitting unit (1) emitting light of a first color, a second light-emitting unit (2) emitting light of a second color, a third light-emitting unit (3) emitting light of a third color, and a fourth light-emitting unit (4) emitting light of a fourth color; the first light-emitting unit (1), the second light-emitting unit (2) and the third light-emitting unit (3) emit light in a normal display mode; the second light-emitting unit (2), the third light-emitting unit (3) and the fourth light-emitting unit (4) emit light in a night-vision display mode, the first light-emitting unit (1) does not emit light in the night-vision display mode, and the first color is red; and the first light-emitting unit (1) has a first light-emitting region, the fourth light-emitting unit (4) has a fourth light-emitting region, and the area of the fourth light-emitting region is less than the area of the first light-emitting region.

IPC Classes  ?

• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 59/38 - Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]

Abstract

A display panel and a manufacturing method therefor, and a display device. The display panel comprises: a backplane (1); a first light-emitting device (2), a second light-emitting device (3), and a third light-emitting device (4), which are arranged on a same side of the backplane (1), wherein the distance between the second light-emitting device (3) and the backplane (1) is greater than the distance between the first light-emitting device (2) and the backplane (1), the distance between the third light-emitting device (4) and the backplane (1) is greater than the distance between the second light-emitting device (3) and the backplane (1), the first light-emitting device (2) emits light of a first color, the second light-emitting device (3) emits light of a second color, and the third light-emitting device (4) emits light of a third color; a first light filtering layer (5), which is arranged on the side of the first light-emitting device (2) facing away from the backplane (1), wherein the first light filtering layer (5) can only transmit the light of the first color; and a second light filtering layer (6), which is arranged on the side of the second light-emitting device (3) facing away from the backplane (1), wherein the second light filtering layer (6) can only transmit the light of the second color, or the second light filtering layer (6) can only transmit the light of the first color and the second color. The color purity and the color gamut of the display panel are good.

IPC Classes  ?

• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 33/50 - Wavelength conversion elements

Abstract

The present disclosure relates to the technical field of antennas, and provides an antenna, an antenna array, and a base station. The antenna comprises a metasurface unit, a radiation unit, a feed balun, and a reflection plate. The radiation unit and the reflection plate are arranged opposite to and spaced from each other in a first direction; the feed balun is located between the radiation unit and the reflection plate; the metasurface unit is located on the side of the radiation unit away from the reflection plate, and a gap is formed between the metasurface unit and the radiation unit; and the metasurface unit comprises a first patch, a second patch, and an orthogonal wire, the first patch and the second patch are arranged opposite to each other in the first direction, the orthogonal wire is located between the first patch and the second patch, and a dielectric layer is provided both between the first patch and the orthogonal wire and between the second patch and the orthogonal wire. The cross-sectional dimension of the antenna is reduced while improving the performance of the antenna.

IPC Classes  ?

• H01Q 1/36 - Structural form of radiating elements, e.g. cone, spiral, umbrella

Abstract

A backlight source control method, a backlight source, and a display device. The control method comprises: looking up, from a data lookup table, a first duty cycle and a second duty cycle respectively corresponding to circadian blue light and low blue light corresponding to a time period within which the current time is, wherein a blue light peak value of the circadian blue light is a first peak value, a blue light peak value of the low blue light is a second peak value, the first peak value is greater than the second peak value, and the data lookup table is used for representing duty cycles corresponding to circadian blue light and low blue light corresponding to different time periods (701); and adjusting the proportion of the circadian blue light in a backlight source on the basis of the first duty cycle and the second duty cycle, so that a circadian stimulus value generated by the backlight source is within a standard circadian stimulus value range of a corresponding time period (702).

IPC Classes  ?

• G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source

Abstract

The present disclosure relates to the technical field of display. Provided are a display panel and a display apparatus, which aim to improve the light-output gain of a near-eye display apparatus. The display panel comprises a plurality of sub-pixels, wherein each sub-pixel comprises a liquid crystal, and a color film layer and a driving structure layer, which are respectively located on two opposite sides of the liquid crystal. Each sub-pixel further comprises: an optical structure, which is located on a light-output path from a backlight source of the display panel to a light-emergent face of the display panel, wherein the optical structure comprises at least one lens, the lens is at least used for converging light emitted from the backlight source, and the orthographic projection of the lens on a plane of the display panel overlaps an opening region of the sub-pixel; and a light-shielding structure, which comprises a part located on the driving structure layer and a part located on the color film layer, wherein the orthographic projection of the light-shielding structure on the plane of the display panel overlaps an edge of the opening region.

IPC Classes  ?

• H10K 59/10 - OLED displays

Abstract

A display substrate, a driving method thereof, a display panel and a display apparatus, relating to the technical field of display. The display substrate comprises: a base substrate, and a display region and a non-display region which are located on one side of the base substrate; the non-display region comprises a plurality of cascaded gate driving units; the display region comprises a plurality of gate lines, a plurality of bias signal lines and a plurality of data lines, the gate lines and the data lines intersecting with each other to form a plurality of sub-pixel regions; the sub-pixel regions comprise sub-pixels, each sub-pixel comprising a switching transistor and a pixel electrode; the switching transistor comprises a first gate, a first source, a first drain and a first bias electrode, the first gate being electrically connected to a gate line, the first source being electrically connected to a data line, the first drain being electrically connected to the pixel electrode, the first bias electrode being electrically connected to a bias signal line, and the first bias electrode and the first gate being arranged in a stacked manner on two sides of an active layer of the switching transistor. In a same row of sub-pixels, a bias signal line and a gate line are separately and directly connected to a same gate driving unit.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• G02F 1/133 - Constructional arrangementsOperation of liquid crystal cellsCircuit arrangements
• G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

Abstract

A display apparatus. The display apparatus comprises a first substrate (100) and a second substrate (200), which are arranged opposite each other, and a liquid crystal layer (300) arranged between the first substrate (100) and the second substrate (200), wherein the second substrate (200) comprises filter patterns (21) and a shield pattern (22) located between adjacent filter patterns (21), each filter pattern (21) comprising a middle region (211) and an edge region surrounding the middle region (211); and the second substrate (200) comprises a plurality of sub-pixels (500), each of which at least corresponds to an auxiliary structure (1), each auxiliary structure (1) comprising at least one lens, and at least part of the lens overlapping with the orthographic projection of the edge region on a base of the first substrate (100).

IPC Classes  ?

• G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors

Abstract

A display panel, a manufacturing method therefor and a tiled display apparatus. The display panel comprises: a substrate, a first electrode and a connecting lead. The substrate comprises a first surface and a second surface which are opposite to each other, a plurality of side surfaces between the first surface and the second surface, a first transition surface connecting the first surface and a side surface, and a second transition surface connecting the second surface and a side surface. At least one of the plurality of side surfaces is a selected side surface. The connecting lead extends from the first surface and successively passes through the first transition surface, the selected side surface and the second transition surface to reach the second surface. The connecting lead comprises a first lead section, a second lead section, a third lead section and a fourth lead section which are successively connected, the first lead section being located on the first surface, the second lead section being located on the first transition surface, the third lead section being located on the selected side surface, the fourth lead section being located on the second transition surface, and the width of at least one of the second lead section and the fourth lead section being greater than the average width of the third lead section.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals

Abstract

A light emitting substrate is provided. The light emitting substrate includes a base substrate; one or more pads on the base substrate; one or more insulating layers on a side of the one or more pads away from the base substrate, wherein, in a region having the one or more pads, the one or more insulating layers are absent, forming one or more vias through the one or more insulating layers; one or more solders on a side of the one or more pads away from the base substrate; and a light emitting element bonded to the one or more pads through at least the one or more solders at least partially in the one or more vias. A respective pad of the one or more pads includes a first main body and a respective first portion connected to the first main body.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages

Abstract

A display substrate and a manufacturing method therefor, and a display device. The display substrate sequentially comprises in a first direction: a substrate (11), a first conductive layer (5), a second conductive layer (8), and a first insulating layer (4) and a second insulating layer (14) which are located between the substrate (11) and the second conductive layer (8), wherein the first direction is perpendicular to the substrate (11). The first conductive layer (5) comprises at least one first wire (1), and the orthographic projection of the first wire (1) on the substrate (11) is configured to overlap the orthographic projection of the second conductive layer (8) on the substrate (11). The first insulating layer (4) is located on the side of the second insulating layer (14) close to the substrate (11), and at least one of the second insulating layer (14) and the first insulating layer (4) is configured to be located between the first wire (1) and the second conductive layer (8).

IPC Classes  ?

• G02F 1/136 - Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
• G02F 1/1362 - Active matrix addressed cells

Abstract

The present application relates to the technical field of display, and discloses a display module and a display apparatus. The display module comprises a display panel, a plurality of driving chips, and a plurality of first buffer portions. The driving chips and the first buffer portions are all connected to the side of a second panel portion facing away from a first panel portion, and in a direction perpendicular to a display surface, the thickness of the first buffer portions is greater than the thickness of the driving chips. Therefore, when a display apparatus in which the display module is mounted is pressed, the first buffer portions can withstand the pressing force. The first buffer portions have a good buffer effect, so that when the first buffer portions are pressed, under the buffer effect of the first buffer portions on the pressing force, the pressing force can be dissipated by the first buffer portions, so as to lower the probability of the driving chips being pressed, thereby avoiding the probability of damage to the driving chips due to pressing. In this way, the first buffer portions can protect the driving chips, improving the reliability of the display apparatus in which the display module is mounted.

IPC Classes  ?

• G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements

Abstract

An array substrate, a driving method therefor, a display panel and a display device. The array substrate comprises a display area (AA) and a non-display area (BB) on at least one side of the display area (AA); a plurality of gate lines (G1-G8), which extend in a row direction (X) and are arranged in a column direction (Y) in the display area (AA); a plurality of pixels (PX), which are arranged in an array in the display area (AA), wherein pixels (PX) in the same row are electrically connected to two gate lines, two gate lines are comprised between two adjacent rows of pixels (PX), at least one column of pixels (PX) is taken as a group, gate lines corresponding to odd-numbered groups of pixels (PX1) in the same row are different from gate lines corresponding to even-numbered groups of pixels (PX2) in the same row, and gate lines corresponding to odd-numbered groups of pixels (PX1) in each row are located on the same side of the row, and gate lines corresponding to even-numbered groups of pixels (PX2) in the row are located on the other side of the row; and a gate driving circuit, which is located in the non-display area (BB), the gate driving circuit comprising a plurality of shift registers (GOA1-GOA9) arranged in cascade, wherein a first-stage shift register (GOA1) is electrically connected to the first gate line (G1), a (2q+1)th-stage shift register is electrically connected to the 2qth gate line, and a 2qth-stage shift register is electrically connected to the (2q+1)th gate line, and q is a positive integer.

IPC Classes  ?

• G09G 3/36 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source using liquid crystals

Abstract

A display substrate and a display device The display substrate comprises a substrate, a light-emitting structure layer located on one side of the substrate, a touch-control layer located on the side of the light-emitting structure layer away from the substrate, at least two touch-control signal line groups, and a shielding line. The touch-control layer comprises a plurality of touch-control electrodes. Each touch-control signal line group comprises a plurality of touch-control signal lines connected to the touch-control electrodes; and at least some of the touch-control signal lines each comprise a first section and a second section which are connected, and the second sections of the touch-control signal lines in the same group are adjacent. The shielding line comprises a first shielding section and two second shielding sections, wherein the first shielding section is at least partially located between two adjacent first sections, and the second shielding sections are located between the second sections of two adjacent touch-control signal line groups; and among the two adjacent touch-control signal line groups, the second section of one touch-control signal line group adjacent to the other touch-control signal line group is adjacent to one second shielding section, and the second shielding section is electrically connected to the first shielding section.

IPC Classes  ?

• H10K 59/126 - Shielding, e.g. light-blocking means over the TFTs
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/40 - OLEDs integrated with touch screens
• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

Abstract

A display substrate and a preparation method therefor, and a display. The display substrate comprises a plurality of circuit units which form a plurality of unit rows and a plurality of unit columns, wherein at least one circuit unit comprises a pixel driving circuit and at least one initial signal line, the pixel driving circuit comprising at least one initialization transistor, and the initial signal line being connected to a first electrode of the initialization transistor; and in at least one circuit unit and a circuit unit adjacent thereto in a pixel column direction, pixel driving circuits in the two circuit units are in mirror symmetry relative to a row boundary line, first electrodes of initialization transistors in the two pixel driving circuits are connected to the same initial signal line, and the row boundary line is a straight line located between adjacent unit rows and extending in the direction of the unit rows. The present disclosure effectively reduces the number of traces and the number of via holes, thereby effectively improving the yield and an aperture ratio.

IPC Classes  ?

• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

A display panel and a display apparatus, relating to the technical field of display. A display substrate (PNL) of the display panel comprises a plurality of light-emitting devices (LD) located in a display area (AA) and blocking dams (DAM) located in a peripheral area (WA); the display substrate (PNL) is provided with a partition recess (SH) located in the peripheral area (WA); the part of the display substrate (PNL) located on the side of the partition recess (SH) away from the display area (AA) is an edge part (EP); the blocking dams (DAM) are arranged in the partition recess (SH), there being a gap (SHH) between the outermost blocking dam (DAM) and the edge part (EP). An encapsulation layer (TFE) comprises a first inorganic layer (CVD1), a second inorganic layer (CVD2) and an organic layer (IJP) provided between the first inorganic layer (CVD1) and the second inorganic layer (CVD2); the first inorganic layer (CVD1) and the second inorganic layer (CVD2) cover the blocking dams (DAM), and at least extend into the gap (SHH); the organic layer (IJP) is located on the sides of the blocking dams (DAM) close to the light-emitting devices (LD); signal lines (SL) of the display panel are arranged on the side of the encapsulation layer (TFE) away from the display substrate (PNL); at least partial regions of some of the signal lines (SL) are located in the gap (SHH); at least partial regions of at most some of the signal lines (SL) overlap the edge part (EP), the number of the signal lines (SL) overlapping the edge part (EP) being less than the number of the signal lines (SL) located in the gap (SHH).

IPC Classes  ?

• H10K 59/12 - Active-matrix OLED [AMOLED] displays

Abstract

A liquid crystal display apparatus, comprising a backlight source (10) and a liquid crystal display panel (20), wherein the liquid crystal display panel (20) is located on a light-emergent side of the backlight source (10). The liquid crystal display panel (20) comprises a first substrate (101), a second substrate (102) and a black matrix (200), which are arranged in a stacked manner, and a liquid crystal layer (300) located between the first substrate (101) and the second substrate (102). The first substrate (101) is located between the liquid crystal layer (300) and the backlight source (10), and the black matrix (200) is located between the liquid crystal layer (300) and the second substrate (102). The liquid crystal display apparatus further comprises a microlens array (400), which comprises a flat surface (420), wherein the microlens array (400) is located between the second substrate (102) and the black matrix (200), and the distance between the flat surface (420) and the black matrix (200) is a placement height (H), which ranges from 1.5 to 40 microns. In the liquid crystal display apparatus, the microlens array (400) is arranged inside the liquid crystal display panel (20), and the distance between the microlens array (400) and the black matrix (200) is also adjusted, thereby facilitating an improvement in the light effect.

IPC Classes  ?

• G02F 1/1335 - Structural association of cells with optical devices, e.g. polarisers or reflectors

Abstract

Provided are a display panel and a display device. The display panel comprises: a substrate (11); an active layer (C1), located on one side of the substrate (11) and comprising a plurality of active patterns (C11); a first insulating layer, located on the side of the active layer (C1) away from the substrate (11) and having a plurality of first via holes (K3); a first metal layer (M1), located on the side of the first insulating layer away from the active layer (C1) and comprising a plurality of first signal lines (M11) extending in a first direction (X), wherein at least one first signal line (M11) among the plurality of first signal lines (M11) is electrically connected to the corresponding active pattern (C11) by means of the corresponding first via hole (K3); and a plurality of first shielding parts (R1), located on the side of the first metal layer (M1) away from the first insulating layer, wherein the orthographic projection of at least one first shielding part (R1) among the plurality of first shielding parts (R1) on the substrate (11) covers the orthographic projection of the corresponding first via hole (K3) on the substrate (11).

IPC Classes  ?

• G02F 1/1343 - Electrodes
• G02F 1/1362 - Active matrix addressed cells

Abstract

The present disclosure provides a touch display panel and a manufacturing method therefor, and a display apparatus. The touch display panel comprises a plurality of shared sub-pixels and a plurality of anti-peeping sub-pixels, the anti-peeping sub-pixels comprising at least two anti-peeping pixel opening areas. The touch display panel further comprises: a first light-shielding layer, a touch layer, and a second light-shielding layer, wherein the first light-shielding layer defines a plurality of first opening areas; the orthographic projections of the first opening areas on a base substrate at least partially overlap with the orthographic projections of the corresponding anti-peeping pixel opening areas on the base substrate; and the touch layer also functions as the second light-shielding layer, the orthographic projection of the second light-shielding layer on the base substrate defines a plurality of second opening areas, and the orthographic projections of the second opening areas at least partially overlap with the orthographic projections of the corresponding anti-peeping pixel opening areas on the base substrate.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes

Abstract

The present disclosure relates to the technical field of display, and provides a display substrate and a display panel, capable of solving the problem in existing display products of light interference during touch sensing. The display substrate of the present disclosure comprises: a light-emitting device layer configured to emit first-color light; a quantum dot layer at least comprising a first quantum dot unit and a second quantum dot unit, the first quantum dot unit being configured to emit second-color light under the excitation of the first-color light, and the second quantum dot unit being configured to emit third-color light under the excitation of the first-color light; a touch sensing layer configured to determine touch information on the basis of an optical signal received by the touch sensing layer; and an auxiliary functional layer arranged between the quantum dot layer and the light-emitting device layer, wherein the auxiliary functional layer is configured to transmit the first-color light and reflect the second-color light and the third-color light, thereby reducing the interference of the second-color light and the third-color light with the touch sensing layer, and improving the accuracy and sensitivity of the touch sensing layer.

IPC Classes  ?

• H10K 59/50 - OLEDs integrated with light modulating elements, e.g. with electrochromic elements, photochromic elements or liquid crystal elements
• H10K 59/122 - Pixel-defining structures or layers, e.g. banks
• H10K 50/86 - Arrangements for improving contrast, e.g. preventing reflection of ambient light
• G02F 1/1333 - Constructional arrangements

Abstract

Display substrates (10, 20), a display panel (11) and a display screen assembly (1). One of the display substrates (10, 20) has several pixel anodes (1011, 2011) and a power supply wire (1012, 2012) distributed thereon, wherein the power supply wire (1012, 2012) is provided with first openings (10121); the pixel anodes (1011, 2011) are disposed on the first openings (10121) in the length direction of the power supply wire (1012, 2012); the diameters of the first openings (10121) in the width direction of the pixel anodes (1011, 2011) are less than the widths of the pixel anodes (1011, 2011) such that the pixel anodes (1011, 2011) cross the first openings (10121) to connect to the power supply wire (1012, 2012); and the first openings (10121) can transmit light. The other of the display substrates (10, 20) has several pixel anodes (1011, 2011) and a power supply wire (1012, 2012) distributed thereon, wherein the power supply wire (1012, 2012) is provided with U-shaped grooves; the pixel anodes (1011, 2011) are disposed on the U-shaped grooves and are in contact with the power supply wire (1012, 2012) in the U-shaped grooves; the pixel anodes (1011, 2011) are located in the middles of the U-shaped grooves; and the U-shaped grooves can transmit light. By means of optimizing the stress on the pixel anodes (1011, 2011), the flatness of the pixel anodes (1011, 2011) is improved, thereby reducing the degree of color cast at a large angle of view.

IPC Classes  ?

• G09F 9/30 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
• G06V 40/13 - Sensors therefor

Abstract

The present application relates to the technical field of display. Disclosed are a light-emitting assembly and a preparation method therefor, and a light-emitting chip structure and a display substrate. The light-emitting assembly comprises a light-emitting chip structure, a drive unit, a first substrate located at the side of the drive unit away from the light-emitting chip structure, a plurality of connection structures located in a plurality of through holes in the first substrate, and a plurality of pins electrically connected to the plurality of connection structures in a corresponding manner. The surface of each connection structure away from a pin and the surface of the first substrate away from the pins are located on the same plane, such that the surface flatness of the drive unit when the drive unit is prepared on the first substrate can be ensured, thereby improving the performance of the drive unit. Moreover, the first substrate provides a relatively good support force for both the drive unit and the light-emitting chip structure. Thus, even if a protective film is required to be peeled off prior to the formation of pins, the drive unit or the light-emitting chip structure cannot be overstretched and curled, thereby avoiding fractures, and thus ensuring the product yield.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission

Abstract

A light modulation module and a driving method therefor, a display device, and a light-emitting device, relating to the technical fields of display and light emitting, used for changing the angle of emergent light. The light modulation module comprises at least one light modulation unit (10). The light modulation unit (10) comprises a first substrate (11), a second substrate (12), a liquid crystal layer (13), a common electrode layer (14), and a control electrode sub-module (15). The liquid crystal layer (13) comprises first liquid crystal molecules (13M). The control electrode sub-module (15) comprises at least two control electrode layers (151) and a dielectric layer (152). Each control electrode layer (151) comprises a plurality of control electrodes (151A). The orthographic projections of the plurality of control electrodes (151A) comprised in any two control electrode layers (151) on the second substrate (12) are arranged in a staggered manner in a first direction (X). Adjacent orthographic projections among the orthographic projections of the plurality of control electrodes (151A) comprised in the at least two control electrode layers (151) on the second substrate (12) are fitted.

IPC Classes  ?

• G02F 1/13357 - Illuminating devices

Abstract

A phase shifting unit, a phase shifter array and a phased array antenna, which belong to the technical field of antennas. The phase shifting unit comprises: a first substrate; a second substrate, which is arranged opposite the first substrate; a liquid crystal layer, which is arranged between the first substrate and the second substrate; and a signal transmission structure, which is arranged on the side(s) of the first substrate and/or the second substrate close to the liquid crystal layer, and comprises at least one signal line and a cantilevered stub, which is connected to the side of the signal line close to the liquid crystal layer, wherein the orthographic projection of the signal line on the first substrate overlaps the orthographic projection of the liquid crystal layer on the first substrate, the size of the cantilevered stub is on a micrometer or nanometer scale, and the cantilevered stub is configured to be driven by an electrical signal to vibrate in the thickness direction of the liquid crystal layer.

IPC Classes  ?

• H01P 1/18 - Phase-shifters

Abstract

A shift register and a driving method, and a gate drive circuit and a display apparatus. The shift register may comprise: an input sub-circuit and an output sub-circuit. The input sub-circuit is electrically connected to each of a first node, a clock signal end and an input signal group, and is configured to provide a signal to the first node under the control of signals from the clock signal end and the input signal group; and the output sub-circuit is electrically connected to each of the first node, a power supply signal group and an output signal group, and is configured to provide a signal to the output signal group under the control of signals from the first node and the power supply signal group, wherein the input signal group comprises at least one input signal end, the power supply signal group comprises at least one power supply signal end, and the output signal group comprises at least one output signal end.

IPC Classes  ?

• G09G 3/3266 - Details of drivers for scan electrodes
• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G11C 19/28 - Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements

Abstract

A display panel and a display apparatus are provided. The display panel includes a supporting layer. The supporting layer includes first spacers and second spacers, which are located on different columns; an anode of at least one of sub pixels corresponding to first spacers extends in a first direction, the first and second spacers extend in a second direction; the first spacers and sub pixels are arranged alternately in the column direction and correspond one-to-one; an orthographic projection of first spacers does not overlap with that of anodes in all sub pixels in the column direction; a first ratio is formed between areas of the first spacers and openings of corresponding sub pixels, a second ratio is formed between an area of the second spacers and an area sum of the openings between two adjacent second spacers in the column direction, the first ratio is different from the second ratio.

IPC Classes  ?

• G09G 3/32 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• H10K 59/122 - Pixel-defining structures or layers, e.g. banks
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

Abstract

A display substrate is provided, the display substrate has a display region and includes a base substrate, sub-pixels, data lines, and first signal lines; each of at least part of the sub-pixels includes a pixel driving circuit and a light-emitting device; the data lines are in a first metal layer, the first signal lines are in a second metal layer; in a first display region, a plurality of first signal lines extend in a first direction, the first display region includes first compensation patterns, the first electrode is on a side of the first signal lines and the first compensation patterns away from the base substrate, an orthographic projection of at least one first compensation pattern on the base substrate at least partially overlaps with an orthographic projection of the first electrode of a light-emitting device of at least one sub-pixel on the base substrate.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels

Abstract

A display panel, a method of manufacturing the same, and a display device are provided. The display panel includes: a base substrate; a plurality of first electrode patterns, second electrode patterns and light emitting layer patterns arranged in display region of the base substrate; a pixel defining layer including a plurality of pixel openings at least partially exposing the plurality of first electrode patterns respectively; the plurality of light emitting layer patterns are at least partially located in the pixel openings respectively; orthographic projections of at least some of the second electrode patterns on base substrate are spaced apart from each other in first direction and second direction; and a plurality of electrode wires located in at least one conductive layer between the base substrate and a layer where the second electrode patterns are located, at least one electrode wire is electrically connected to second electrode pattern.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10K 59/12 - Active-matrix OLED [AMOLED] displays
• H10K 71/60 - Forming conductive regions or layers, e.g. electrodes

Abstract

A display substrate includes a plurality of rows of pixel circuits; the pixel circuit includes at least one of a first light emitting control circuit, a second light emitting control circuit, and a first reset circuit; the pixel circuit also includes a light emitting element, a driving circuit, a first energy storage circuit, and a second energy storage circuit; the first light emitting control circuit controls the connection between the first node and the fourth node under the control of a first light emitting control signal; the second light emitting control circuit controls the connection the power supply voltage terminal and the first terminal of the driving circuit under the control of a second light emitting control signal; the first reset circuit controls a potential of the third node under the control of a first reset signal.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Abstract

A stacked light-emitting device includes a first electrode, a second electrode, at least two light-emitting units, and at least one stacked connection layer. A stacked connection layer is between every two adjacent light-emitting units and includes an N-type charge generation layer and a P-type charge generation layer. The N-type charge generation layer is of a doped binary structure including a first host material and a first guest material; and the P-type charge generation layer is of a doped binary structure including a second host material and a second guest material. An absolute value of difference between HOMO energy level of the second host material and HOMO energy level of the first host material is greater than 0.3 electron volts; and an absolute value of difference between LUMO energy level of the second host material and LUMO energy level of the first host material is greater than 0.1 electron volts.

IPC Classes  ?

• H10K 50/12 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers comprising dopants
• H10K 50/19 - Tandem OLEDs
• H10K 59/80 - Constructional details
• H10K 85/60 - Organic compounds having low molecular weight
• H10K 101/00 - Properties of the organic materials covered by group
• H10K 101/30 - Highest occupied molecular orbital [HOMO], lowest unoccupied molecular orbital [LUMO] or Fermi energy values

Abstract

A display substrate, a driving method thereof, and a display device. The display substrate includes: a first display sub-region including a plurality of first repeating regions each including a first pixel unit and a second pixel unit disposed adjacently, the first pixel unit including a first sub-pixel and a second sub-pixel, and the second pixel unit including a second sub-pixel and a third sub-pixel; and a second display sub-region including a plurality of second repeating regions each including a third pixel unit and a first transparent pixel, the third pixel unit including a first sub-pixel, a second sub-pixel and a third sub-pixel; the first transparent pixel is configured such that a pixel density of the second display sub-region is less than a pixel density of the first display sub-region, and a light transmittance of the second display sub-region is greater than a light transmittance of the first display sub-region.

IPC Classes  ?

• G09G 3/3233 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• G09G 3/3258 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
• H10K 59/35 - Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
• H10K 59/65 - OLEDs integrated with inorganic image sensors

Abstract

The present disclosure relates to a method for preparing an organic light emitting device, a preparation system, a storage medium and a computer equipment. The method includes: forming a hole injection layer, a hole transport layer, an electron blocking layer, an organic light emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer, which are sequentially arranged in a stack on an anode of the organic light emitting device, wherein the hole injection layer comprises a first host material and a first doping material doped in the first host material, a doping concentration of the first doping material gradually decreases in a direction away from the anode, and a doping ratio of the first doping material in the hole injection layer is less than or equal to 6%.

IPC Classes  ?

• C23C 14/12 - Organic material
• H10K 50/15 - Hole transporting layers
• H10K 50/17 - Carrier injection layers
• H10K 71/00 - Manufacture or treatment specially adapted for the organic devices covered by this subclass
• H10K 71/30 - Doping active layers, e.g. electron transporting layers
• H10K 101/00 - Properties of the organic materials covered by group

Abstract

Provided are a system and method for intelligently interpreting an exhibition scene. The system is configured for automatically following an interpretation user or a visitor by means of an intelligent following apparatus, so as to improve visiting experience of the visitor. The system includes a positioning apparatus and the intelligent following apparatus, the positioning apparatus is configured for determining positioning information of target users, and the intelligent following apparatus is configured for following the target users to move according to the positioning information of the target users.

IPC Classes  ?

• G05D 1/686 - Maintaining a relative position with respect to moving targets, e.g. following animals or humans
• G05D 1/243 - Means capturing signals occurring naturally from the environment, e.g. ambient optical, acoustic, gravitational or magnetic signals
• G05D 105/70 - Specific applications of the controlled vehicles for displaying or announcing information
• G05D 111/10 - Optical signals
• G06T 7/62 - Analysis of geometric attributes of area, perimeter, diameter or volume
• G06T 7/70 - Determining position or orientation of objects or cameras
• G06V 20/52 - Surveillance or monitoring of activities, e.g. for recognising suspicious objects
• G16Y 20/10 - Information sensed or collected by the things relating to the environment, e.g. temperatureInformation sensed or collected by the things relating to location
• G16Y 40/35 - Management of things, i.e. controlling in accordance with a policy or in order to achieve specified objectives
• G16Y 40/60 - PositioningNavigation

Abstract

An anti-corrosion circuit, an array substrate and an electronic device are provided. The array substrate includes: source signal lines, provided in the display area, extending along a first direction and arranged sequentially along a second direction; a first power bus line, provided in the peripheral area and including a main body portion extending along the second direction; an electrostatic discharge protection circuit, provided on a side of the main body portion away from the display area and electrically connected to the source signal lines, and including first sub-signal lines and second sub-signal lines. The first sub-signal lines and the second sub-signal lines extend along the second direction and are alternately arranged along the first direction, and the main body portion is adjacent to one first sub-signal line, and electrical property of the first power bus line is the same as electrical property of the one first sub-signal line.

IPC Classes  ?

• H10K 59/131 - Interconnections, e.g. wiring lines or terminals
• H10D 89/60 - Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
• H10K 59/121 - Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Abstract

The disclosure provides a touch module, a touch display panel and a display device. Each touch electrode includes a plurality of electrode blocks arranged along an extending direction, and electrode blocks belonging to other touch electrodes are distributed in an area where at least part of all the electrode blocks are located, which makes full use of an interior area of a traditional touch pattern and increases a coupling area between the touch electrodes. When touch occurs, an amount of change in a mutual capacitance value between the touch electrodes will be significantly increased, thereby increasing touch sensitivity.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• G06F 3/044 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Abstract

A display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate and a plurality of subpixels arranged in an array form on the base substrate. Each subpixel includes a voltage stabilizing electrode, and a subpixel driving circuitry including a driving transistor, and a first transistor, a first electrode of which is coupled to a second electrode of the driving transistor, and a second electrode of which is coupled to a gate electrode of the driving transistor. An active layer of the first transistor includes a first semiconductor portion and a second semiconductor portion spaced apart from each other, and a conductor portion coupled to thereto. An orthogonal projection of the conductor portion onto the base substrate overlaps an orthogonal projection of voltage stabilizing electrode of a previous subpixel in the first direction onto the base substrate.

IPC Classes  ?

• H10D 86/60 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• H10D 86/01 - Manufacture or treatment
• H10D 86/40 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
• H10K 59/122 - Pixel-defining structures or layers, e.g. banks

Abstract

An array substrate (10) comprising pixel circuits (30), first data lines (61), first connection lines (40) and second connection lines (50). The pixel circuits (30) each comprise a capacitor (C), a first reset transistor (T1) and a compensation transistor (T2), a second electrode plate (C2) of the capacitor (C) being connected to a first node (N1), a second electrode (313) of the first reset transistor (T1) being connected to a second node (N2), and a first electrode (312) and a second electrode (313) of the compensation transistor (T2) being respectively connected to the second node (N2) and the first node (N1). One end of each first connection line (40) is connected to a second electrode plate (C2) of a capacitor (C), while the other end thereof is connected to a second electrode (313) of a compensation transistor (T2). Each first connection line (40) is located between two adjacent first data lines (61), and is closer to one of the two first data lines (61). One end of each second connection line (50) is connected to a second electrode (313) of a first reset transistor (T1), while the other end thereof is connected to a first electrode (312) of a compensation transistor (T2). In a second direction, each second connection line (50) is located on the side of a first connection line (40) away from the closer first data line (61). The maximum distance between an adjacent first connection line (40) and second connection line (50) is less than or equal to 2.4 μm.

IPC Classes  ?

• G09G 3/3208 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Abstract

The present disclosure relates to the technical field of display, and relates to a touch display panel and a manufacturing method therefor, and a touch display apparatus. The touch display panel comprises a display area and a fan-out area, wherein the fan-out area is located on one side of the display area. The touch display panel comprises: a base substrate; a planarization layer, formed on one side of the base substrate; a first transparent electrode, formed on the side of the planarization layer away from the base substrate, wherein the first transparent electrode comprises a first portion located in the display area and a second portion located in the fan-out area; and a touch metal wire, formed on the side of the first transparent electrode away from the base substrate and located in the fan-out area, wherein the orthographic projection of the touch metal wire on the base substrate is located within the orthographic projection of the second portion of the first transparent electrode on the base substrate. It is not needed to additionally provide an IC in the touch display panel, so that the production cost of the touch display panel can be effectively controlled; in addition, the display effect and the yield rate can be improved.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

Abstract

Provided are an electronic device (100), a grayscale compensation method, an apparatus, and a storage medium, which are used for compensating for a grayscale value of an image. The electronic device (100) comprises: a display screen (101) and a processor (102), wherein the display screen (101) is used for displaying an image, and the display screen (101) correspondingly has a plurality of backlight partitions, with one backlight partition corresponding to one region of the image; the processor (102) is configured to determine a weight value of each of the plurality of backlight partitions (S1201); the weight value of each backlight partition is used for representing the degree of influence a light source in the backlight partition has on the brightness of the image displayed on the display screen; and the processor (102) is configured to determine a grayscale value of the image on the basis of backlight values and the weight values of the plurality of backlight partitions (S1202).

IPC Classes  ?

• G09G 3/34 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix by control of light from an independent source

Abstract

A display substrate and a display device. The display substrate comprises a color film substrate (001), which comprises a first common electrode (104); and an array substrate (002), which is arranged opposite the color filter substrate (001) and comprises a base substrate (201), a second common electrode (202) located on the side of the base substrate (201) facing the color filter substrate (001), and a pixel electrode (203) located on the side of the layer, where the second common electrode (202) is located, away from the base substrate (201), wherein the pixel electrode (203) comprises a plurality of domain regions, the pixel electrode (203) is provided with a first slit within each domain region, and the orthographic projection of the first slit on the base substrate (201) overlaps the orthographic projection of the second common electrode (202) on the base substrate (201).

IPC Classes  ?

• G02F 1/1343 - Electrodes

Abstract

A display module (200), a tiled screen (300), and a display device (40). The display module (200) comprises: a display component (201), a middle frame (202) and an outer frame (203); the display component (201) comprises a display area (201a) and a peripheral area (201b); the middle frame (202) is configured to support the display component (201) in the peripheral area (201b); the outer frame (203) is arranged on the sides of the display component (201) and the middle frame (202) distant from the display area (201a); a diffusion plate (204) is arranged between the display component (201) and the middle frame (202); a buffer structure (205) is arranged between the diffusion plate (204) and the outer frame (203); by means of the buffer structure (205), when the diffusion plate (204) moves under the action of an external force, damage to the diffusion plate (204) caused by direct contact between the diffusion plate (204) and the outer frame (203) can be prevented, thereby ensuring the display effect during the display of the display module (200).

IPC Classes  ?

• G02F 1/1333 - Constructional arrangements

Abstract

A display substrate, comprising: a substrate (10); a plurality of sub-pixels (Px), a plurality of gate lines (GL) and a plurality of data lines (DL) located in a display area (AA); and a plurality of multiplexing circuits (36), a plurality of gate driving circuits (31a, 31b, 32, 33, 34, 35) and a plurality of driving signal lines (41) located in a bezel area, wherein the plurality of multiplexing circuits (36) are connected to the plurality of data lines (DL), and each multiplexing circuit (36) comprises a plurality of multiplexing control transistors (M1, M2). The plurality of driving signal lines (41) are connected to the plurality of gate driving circuits (31a, 31b, 32, 33, 34, 35). The distance between the orthographic projection of the plurality of driving signal lines (41) on the substrate (10) and the orthographic projection of active layers (M10, M20) of the multiplexing control transistors (M1, M2) of the plurality of multiplexing circuits (36) on the substrate (10) is greater than 0.

IPC Classes  ?

• G09G 3/3225 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
• G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes

Abstract

A distributed control method, system and apparatus for a liquid crystal phased array antenna radio-frequency module. The system comprises an antenna array control module, a receiving/transmitting radio-frequency module, a sub-array beam control module and a liquid crystal phased array; the liquid crystal phased array comprises a plurality of periodically arranged liquid crystal phased array units; the antenna array control module receives external control information or an external control instruction, sends first internal control information or a first internal control instruction to the receiving/transmitting radio-frequency module on the basis of the external control information or the external control instruction, and sends second internal control information or a second internal control instruction to the sub-array beam control module on the basis of the external control information or the external control instruction; the receiving/transmitting radio-frequency module transmits and/or receives a carrier on the basis of the first internal control information or the first internal control instruction; the sub-array beam control module concurrently sends configuration information or a configuration instruction to the plurality of liquid crystal phased array units on the basis of the second internal control information or the second internal control instruction; and the liquid crystal phased array realizes antenna beamforming on the basis of the configuration information or the configuration instruction.

IPC Classes  ?

• H01Q 3/00 - Arrangements for changing or varying the orientation or the shape of the directional pattern of the waves radiated from an antenna or antenna system
• H01Q 21/00 - Antenna arrays or systems

Abstract

A liquid crystal display panel. The liquid crystal display panel comprises a first sub-display area and a second sub-display area adjacent to each other. The display panel comprises an array substrate and a counter substrate arranged opposite each other. The array substrate comprises a plurality of pixel units, wherein the plurality of pixel units comprise a first pixel unit located in the first sub-display area and a second pixel unit located in the second sub-display area. A first signal line comprises a first line segment and a second line segment, wherein the first line segment is electrically connected to the first pixel unit, and the second line segment is electrically connected to the second pixel unit. A common electrode layer comprises a first common electrode located in the first sub-display area and a second common electrode located in the second sub-display area, and a first slit extending in a second direction is provided between the first common electrode and the second common electrode. The counter substrate comprises a light-shielding layer, wherein the light-shielding layer comprises a first light-shielding portion, and the orthographic projection of the first light-shielding portion on a first base at least partially overlaps the orthographic projection of the first slit on the first base.

IPC Classes  ?

• G02F 1/1343 - Electrodes

Abstract

A driving mother board, having a plurality of light-emitting areas, every two adjacent light-emitting areas having a spacing area therebetween. The driving mother board comprises a substrate mother board, a plurality of bonding pads and at least one support member. The plurality of bonding pads are arranged on the substrate mother board and in the light-emitting areas, and are configured to be connected to light-emitting devices. The at least one support member is arranged on the side of the substrate mother board close to the plurality of bonding pads, the support member being arranged in a spacing area. In a first direction, there is at least one support member of which the size is greater than or equal to the sum of the size of a bonding pad and the size of the light-emitting device connected to the bonding pad, the first direction being perpendicular to the substrate mother board.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

Abstract

An irregularly-shaped display panel (100). A display area (AA) of the irregularly-shaped display panel (100) comprises a first sub-boundary (S11), and the first sub-boundary (S11) extends along a non-straight line, or the first sub-boundary (S11) is not perpendicular to a boundary of the display area (AA) adjacent to the first sub-boundary. At a position corresponding to the first sub-boundary (S11) of the display area (AA), extension directions of a plurality of clock signal lines (31) are consistent with the extension direction of the first sub-boundary (S11); and each clock signal line (31) is connected to a shift register (20) by means of a corresponding adapter line (40). In the extension direction of the adapter line (40), the adapter line (40) comprises a first line segment (41) and a second line segment (42); the first line segment (41) and the second line segment (42) are connected to form a corner; the first line segment (41) is connected to a shift register (20), and the second line segment (42) is connected to a clock signal line (31); the orthographic projection of the second line segment (42) on a substrate overlaps the orthographic projection of a first part (311) of the clock signal line (31), which is connected to the second line segment (42), on the substrate; and the extension direction of the second line segment (42) is parallel to the line-width extension direction of the first part (311) of the clock signal line (31).

IPC Classes  ?

• G02F 1/1362 - Active matrix addressed cells
• G09G 3/20 - Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix

Abstract

Provided is a light-emitting substrate, comprising a light-emitting region and a second peripheral region located on at least one side of the light-emitting region. The light-emitting substrate comprises: a substrate base; a plurality of pads which are arranged on the substrate base and located in the light-emitting region; a plurality of light-emitting devices which are arranged on the side of the plurality of pads away from the substrate base, and are arranged in the light-emitting region, wherein the light-emitting devices are connected to the pads on a one-to-one basis; and at least one support structure which is arranged on the substrate base and located in the second peripheral region, wherein the support structure and the light-emitting devices are located on the same side of the substrate base. In a first direction, there is at least one support structure having a dimension greater than or equal to the sum of the dimension of at least one pad and the dimension of the corresponding light-emitting device connected to the pad, the first direction being perpendicular to the substrate base.

IPC Classes  ?

• H10H 20/857 - Interconnections, e.g. lead-frames, bond wires or solder balls

Abstract

A detection panel and a flat panel detector. The detection panel comprises: a substrate (100); a thin-film transistor (200), located on the substrate (100), the thin-film transistor (200) comprising a gate layer (01), an active layer (03) and a source/drain layer (110); a photosensitive portion (400), located on the side of the thin-film transistor (200) facing away from the substrate (100), the photosensitive portion (400) comprising a bottom electrode (11), a PIN layer (12) and a top electrode (14) which are sequentially arranged facing away from the substrate (100), and the bottom electrode (11) being electrically connected to the thin-film transistor (200) by means of the source/drain layer (110); and at least one electrode layer (300), located between the bottom electrode (11) and the substrate (100), each electrode layer among the at least one electrode layer (300) and one of conductive layers within the thin-film transistor (200) being arranged on a same layer, the orthographic projections of the electrode layers on the substrate (100) entirely falling within the area range of the orthographic projection of the bottom electrode (11) on the substrate (100), at least one storage capacitor comprising a first storage capacitor being formed between the at least one electrode layer (300) and the bottom electrode (11), and a second storage capacitor being formed between the bottom electrode (11) and the top electrode (14).

IPC Classes  ?

• H10F 39/12 - Image sensors
• H10F 77/20 - Electrodes
• H10F 30/292 - Bulk-effect radiation detectors, e.g. Ge-Li compensated PIN gamma-ray detectors

Abstract

The present application belongs to the technical field of display. Disclosed are a WOLED device and a display apparatus. The WOLED device comprises, successively stacked, an anode, a hole transport unit, an organic light-emitting unit, an electron transport unit and a cathode. The organic light-emitting unit comprises, successively stacked, a blue light-emitting layer, an interlayer, a green light-emitting layer and a red light-emitting layer, the interlayer having an electron transport feature, and the |HOMO| of the interlayer being greater than or equal to a first set threshold value; or the organic light-emitting unit comprises, successively stacked, a red light-emitting layer, an interlayer, a blue light-emitting layer and a green light-emitting layer, the interlayer having a hole transport feature, and the |LUMO| of the interlayer being less than or equal to a second set threshold value. The WOLED device can give consideration to both the balanced light emission of its three RGB light-emitting layers and the service life of the device.

IPC Classes  ?

• H10K 50/13 - OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit

Abstract

Disclosed are a touch-control and display driving chip, a noise compensation method, and a touch-control display apparatus. The touch-control and display driving chip comprises: a noise comparison circuit (101) and a touch controller (102), wherein the noise comparison circuit (101) is electrically connected to the touch controller (102). The noise comparison circuit (101) is configured to: compare information of the current image frame with image information of a next image frame, so as to obtain a noise comparison result, and send an instruction signal to the touch controller (102) on the basis of the noise comparison result. The touch controller (102) is configured to: perform, in response to the instruction signal, touch-control noise preprocessing on the next image frame before the next image frame is displayed.

IPC Classes  ?

• G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means