Hewlett Packard Enterprise Development LP

United States of America

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H04L 29/06 - Communication control; Communication processing characterised by a protocol 640
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1.

Comparison of a fingerprint generated for a realigned data page that begins at a non-zero value portion to a plurality of fingerprints of a deduplication storage system

      
Application Number 18751612
Grant Number 12461675
Status In Force
Filing Date 2024-06-24
First Publication Date 2025-11-04
Grant Date 2025-11-04
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Sutton, Christopher Robert
  • Agten, Susan

Abstract

Example implementations relate to deduplication operations in a storage system. An example implementation includes receiving a data page to be stored in a persistent storage of a deduplication storage system, and, in response to a determination that the data page includes the leading zero pad, performing a circular shift of the plurality of data blocks to generate a realigned data page that begins at a non-zero value portion. The example implementation further includes generating a fingerprint for the realigned data page, and comparing the generated fingerprint to a plurality of fingerprints included in metadata of the deduplication storage system. The example implementation further includes, in response to a determination that no matches are found between the generated fingerprint and the plurality of fingerprints included in the metadata, storing the realigned data page and the generated fingerprint in the persistent storage.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

2.

Analog content addressable memory for general computing

      
Application Number 18651218
Grant Number 12462872
Status In Force
Filing Date 2024-04-30
First Publication Date 2025-10-30
Grant Date 2025-11-04
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Zhao, Lei
  • Buonanno, Luca
  • Pedretti, Giacomo

Abstract

In an implementation, a device includes: a first inverter; a first sense amplifier connected to the first inverter; a first match line connected to the first sense amplifier; a first analog content addressable memory cell including: a first pull-down transistor; a second pull-down transistor, the first pull-down transistor and the second pull-down transistor being connected in series between the first match line and a reference node; a first memory circuit configured to store a first upper bound of a first range and to activate the first pull-down transistor when an analog input value is less than the first upper bound of the first range; and a second memory circuit configured to store a first lower bound of the first range and to activate the second pull-down transistor when the analog input value is greater than the first lower bound of the first range.

IPC Classes  ?

  • G11C 15/04 - Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements

3.

ADJUSTING LINK PRIORITY FOR MULTI-LINK DEVICES

      
Application Number 18646355
Status Pending
Filing Date 2024-04-25
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Han, Jianpo
  • Beaudin, Andre
  • El Ferkouss, Omar

Abstract

Examples of the presently disclosed technology provide systems and methods for adjusting link priority for multi-link devices. An example method may comprise: (1) mapping a traffic identifier (TID) to a first access category queue of a primary link; (2) mapping the TID to a second access category queue of a secondary link, wherein a contention window-related parameter for the first access category queue defines a shorter time interval than a contention window-related parameter for the second access category queue; and (3) transmitting frames according to the mappings for the TID.

IPC Classes  ?

4.

EDGE TO CLOUD QUALITY OF EXPERIENCE OPTIMIZER

      
Application Number 18646547
Status Pending
Filing Date 2024-04-25
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Murthy, Karthik Srinivasa
  • Ganu, Sachin
  • Bhattacharyya, Rajarshi
  • Dedhia, Parag

Abstract

Systems and methods are provided for traffic flow scheduling optimization through prioritizing traffic flows according to a Quality of Experience (QoE) score. Examples receive data packets of a plurality of traffic flows by an access point of a network, map the data packets of the plurality of traffic flows to a plurality of queues based on traffic identifiers of each data packet, and determine a QoE score for each traffic flow of the plurality of traffic flows. Examples can then prioritize the data packets based on the QoE scores determined for the plurality of traffic flows and schedule the data packets for transmission or reception based on the prioritization.

IPC Classes  ?

  • H04L 47/2425 - Traffic characterised by specific attributes, e.g. priority or QoS for supporting services specification, e.g. SLA
  • H04L 43/091 - Measuring contribution of individual network components to actual service level
  • H04L 47/62 - Queue scheduling characterised by scheduling criteria

5.

HALF-WIDTH RACK DEVICE LATCHING MECHANISM

      
Application Number 18648832
Status Pending
Filing Date 2024-04-29
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Chow, Tatt Hoong
  • Wong, Foo Luen

Abstract

A half-width rack-mountable information processing device comprises a chassis, information processing components, and a latching mechanism to secure the chassis in a half-width compartment of a mounting tray, which is attachable to a rack. The latching mechanism comprises a fixed portion comprising a first grasping surface, and a movable portion pivotably coupled to the fixed portion and comprising a latch and a second grasping surface. The second grasping surface is movable between a first extreme and a second extreme. In the first extreme, the first and second grasping surfaces are farthest apart and the latch is in a latching position. In the second extreme, the first and second grasping surfaces are closet together and the latch is in an unlatched position, The first and second grasping surfaces have, while in the second extreme, a positive non-zero angle therebetween.

IPC Classes  ?

  • H05K 5/02 - Casings, cabinets or drawers for electric apparatus Details
  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack

6.

O-RING GLAND FITTINGS FOR LIQUID COOLING WITH O-RING COMPRESSION SEAL HAVING REDUNDANT NON-RADIAL SEAL PAIRS

      
Application Number 18649392
Status Pending
Filing Date 2024-04-29
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor Dean, Steven J.

Abstract

An O-ring gland fitting for a liquid cooling loop of an information processing device comprises a plug, a socket, and an O-ring. The plug comprises a mating protrusion and a plug gland surface. The socket comprises a socket gland surface and a mating recess configured to receive the mating protrusion in a mated state of the plug and socket. The plug gland surface and socket gland surface are configured to, in the mated state, form a gland which contains the O-ring. The plug gland surface comprises sealing surface features and the socket gland surface comprises complementary sealing surface features configured to, in the mated state, compress the O-ring therebetween and form multiple non-radial seal pairs. Each of the non-radial seal pairs comprises two contact-stress surface-seals formed by one of the sealing surface features and one of the complementary sealing surface features on opposite non-radial sides of the O-ring.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • F16J 15/10 - Sealings between relatively-stationary surfaces with solid packing compressed between sealing surfaces with non-metallic packing
  • G06F 1/20 - Cooling means

7.

AUTOMATIC RESOURCE ALLOCATION AND PARTITIONING OF HPC WORKFLOWS

      
Application Number 18649709
Status Pending
Filing Date 2024-04-29
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Bruel, Pedro Henrique Rocha
  • Weaver, Alex
  • Chalamalasetti, Sai Rahul
  • Dhakal, Aditya
  • Rattihalli, Gourav
  • Hong Enriquez, Rolando Pablo
  • Mishra, Alok
  • Milojicic, Dejan S.

Abstract

A method includes receiving a user-submitted workflow comprising a plurality of kernels. The method further includes padding at least one kernel of the user-submitted workflow with at least one profiling tag and executing the user-submitted workflow on a compute node. The method further includes receiving at least one metric from the workflow during execution of the workflow according to the at least one profiling tag and training a reinforcement learning agent according to the at least one metric, wherein the reinforcement learning agent determines a suggested action for a particular type of kernel according to the at least one metric. The method further includes utilizing the suggested actions in making a scheduling decision for performing a task associated with an unexecuted kernel within the plurality of kernels while the user-submitted workflow continues executing, wherein the scheduling decision comprises a computing resource allocation for executing the task.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]

8.

POWER SAVING FOR ACCESS POINT

      
Application Number 18650985
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Wang, Bo
  • Sun, Yue

Abstract

In implementations of the present disclosure, there is provided an approach for saving power for an AP. A method comprises obtaining, by an access point (AP), an environment temperature for the AP. Then, a target working voltage for a front end module (FEM) in the AP is determined based on the environment temperature. Next, the AP determines whether the target working voltage for the FEM is different from an actual working voltage for the FEM output by a voltage regulator in the AP. If the target working voltage is different from the actual working voltage, the voltage regulator is controlled to output the target working voltage. Thus, the AP may control the target working voltage from the voltage regulator to the FEM. Implementations of the present disclosure can reduce the power consumption of the AP when the working voltage for the FEM is adjusted according to the environment temperature.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G06F 1/3296 - Power saving characterised by the action undertaken by lowering the supply or operating voltage

9.

MULTICAST FOR MULTIFABRIC VIRTUALIZED NETWORKS

      
Application Number 18754568
Status Pending
Filing Date 2024-06-26
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Nandy, Tathagata
  • Samuel, Thomas

Abstract

In certain implementations, a border VTEP device sends, to a second border VTEP devices, a first PIM-SM hello message indicating the border VTEP device is a local RP in a first fabric of a VxLAN. The border VTEP device receives a second PIM-SM hello message indicating that the second border VTEP devices is a local RP in a second fabric. A first PIM-SM control message is sent to the second border VTEP device, indicating PIM-SM sources in the first fabric, including a first PIM-SM source. A second PIM-SM control message is received from the second border VTEP device indicating PIM-SM sources in the second fabric. A PIM-SM join message specifying the first PIM-SM source is received from a receiver DR for a PIM-SM receiver. A PIM-SM data stream is forwarded from a source DR to the receiver DR.

IPC Classes  ?

  • H04L 12/18 - Arrangements for providing special services to substations for broadcast or conference
  • H04L 12/46 - Interconnection of networks

10.

INTERMITTENT ENCRYPTION ATTACK DETECTION BASED ON ACCUMULATION OF MODIFIED DATA FRAGMENTS

      
Application Number 18784694
Status Pending
Filing Date 2024-07-25
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Janakiraman, Viswesvaran
  • Raveendran, Anoop Kumar
  • Gupta, Rachit
  • Sivashanmugam, Jothivelavan

Abstract

In some examples, a system identifies data fragments of a data object that are modified relative to a different version of the data object. The system accumulates the data fragments into a buffer, and computes a measure based on data in the buffer, the data comprising the data fragments. The system determines, based on the measure, whether the data object is a subject of an intermittent encryption attack.

IPC Classes  ?

  • G06F 21/56 - Computer malware detection or handling, e.g. anti-virus arrangements
  • G06F 3/06 - Digital input from, or digital output to, record carriers

11.

EXPANSION CARD AUXILIARY POWER CABLE ASSEMBLY WITH INTEGRATED E-FUSES

      
Application Number 18647539
Status Pending
Filing Date 2024-04-26
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Chen, Kuan-Wei
  • Chiang, Chih-Wei
  • Chang, Chao-Ming

Abstract

An auxiliary power cable assembly comprises a paddle board, a power connector mounted to the paddle board, a riser output connector, a riser cable extending from paddle board to the riser output connector, an auxiliary output connector, and an auxiliary cable extending from the paddle board to the auxiliary output connector. The power connector is to connect to a power output connector of a primary system board of a computing system, the riser output connector is to connect to a riser card, and the auxiliary output connector is to connect to an expansion card. The paddle board comprises e-fuses configured to control electrical power supplied from the power connector to the riser output connector and from the power connector to the auxiliary output connector.

IPC Classes  ?

  • G06F 1/18 - Packaging or power distribution
  • H01R 12/71 - Coupling devices for rigid printing circuits or like structures
  • H01R 12/72 - Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
  • H01R 13/514 - BasesCases formed as a modular block or assembly, i.e. composed of co-operating parts provided with contact members or holding contact members between them

12.

RESILIENT OPTIMIZER STATES FOR FULLY SHARDED DATA PARALLEL

      
Application Number 18648217
Status Pending
Filing Date 2024-04-26
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Cao, Lianjie
  • Rashidi, Saeed
  • Goon, Garrett
  • Faraboschi, Paolo
  • Sharma, Puneet

Abstract

Systems and methods are provided for failure resiliency in distributed training of machine learning (ML) models. Examples include a plurality of compute nodes storing optimizer shards of a plurality of optimizer shards and a first compute node storing a first optimizer shard of optimizer states. The first compute node can store optimizer shard portions, each of which can be received from a respective compute node of the plurality of compute nodes and can be a replica of a portion of a respective optimizer shard of the plurality of optimizer shards, stored at the respective compute node. Responsive to a failure of a compute node of the plurality of compute nodes, the first compute node can update the first optimizer shard with an optimizer shard portion corresponding to the failed compute node and the ML model can be trained based on the updated first optimizer shard.

IPC Classes  ?

  • G06N 3/098 - Distributed learning, e.g. federated learning
  • G06N 3/0455 - Auto-encoder networksEncoder-decoder networks

13.

CABLED OCP CONNECTOR

      
Application Number 18648587
Status Pending
Filing Date 2024-04-29
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Lin, Yu Han
  • Chiang, Chih-Wei
  • Hsiao, Chao Lin
  • Tu, Wei-Chen

Abstract

A device, a system and a method. The device comprising an OCP connector including an OCP receptacle, a cable connector, first attachment features, and second attachment features. The OCP receptacle may be configured to accept an OCP edge connector of an OCP module. The cable connector may be configured to accept one end of a cable wherein the other end of the cable may be coupled with a primary system board. The first attachment features may be configured to attach the OCP connector to a horizontal support. The second attachment features may be configured to attach the OCP connector to a vertical support. Either support may be used to couple the OCP connector with a computer system without modification to the OCP connector.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • G06F 1/18 - Packaging or power distribution
  • H01R 13/74 - Means for mounting coupling parts to apparatus or structures, e.g. to a wall for mounting coupling parts in openings of a panel

14.

OPTIMIZATION OF RESOURCE UNIT ALLOCATION

      
Application Number 18650358
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Jia, Xuguang
  • Fu, Xiaoyang
  • Zhou, Qiang

Abstract

Implementations of the present disclosure relate to the optimization of RU allocation. The method comprises determining a number of a plurality of clients and respective RU requirements. The method further comprises determining an allocation strategy index based on the number of the plurality of clients and a number of available RUs. If the allocation strategy index is greater than an allocation strategy threshold, the method further comprises selecting a global allocation strategy as a target allocation strategy. Otherwise, the method further comprises selecting an individual allocation strategy as the target allocation strategy. The method further comprises determining RUs to be allocated to the plurality of clients by performing the target allocation strategy. In this way, by the dynamic selection of the allocation strategy, the resources can be allocated according to the actual communication status, thereby increasing the utility of the resources.

IPC Classes  ?

  • H04W 72/121 - Wireless traffic scheduling for groups of terminals or users
  • H04W 72/0457 - Variable allocation of band or rate
  • H04W 74/0816 - Non-scheduled access, e.g. ALOHA using carrier sensing, e.g. carrier sense multiple access [CSMA] with collision avoidance

15.

ELECTRONIC MODULE RETENTION ASSEMBLY TO RELEASABLY SECURE AN ELECTRONIC MODULE TO AN INFORMATION PROCESSING DEVICE

      
Application Number 18650472
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Tu, Wei-Chen
  • Chianghsieh, Peng
  • Yang, Chi-Ting

Abstract

An electronic module retention assembly including an actuator tab and a retention arm, to releasably secure an electronic module to an information processing device is disclosed. The retention arm includes linear gear teeth, configured to be movably coupled to a vertical support panel of the device and configured to slide along the vertical support panel. The retention arm extends from first to second end portions. The first end portion includes circular gear teeth, and the second end portion includes an attachment element configured to releasably couple to the electronic module. The retention arm being pivotably coupled to the vertical support panel and mounted on a face of the actuator tab such that the circular and linear gear teeth are engaged with each other, and a sliding movement of the actuator tab causes rotation of the retention arm between deployed and stowed positions to secure and release the electronic module, respectively.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • G06F 1/18 - Packaging or power distribution

16.

DYNAMIC RESOURCE ALLOCATION IN NETWORK DEVICE

      
Application Number 18651116
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Rojas, Alonso Jose Carvajal
  • Camacho, Rodolfo Piedra
  • Cortes Campos, Fernando
  • Badilla Ramirez, Eduardo

Abstract

A method of operating a network device includes: monitoring, by a controller of the network device, utilization of memory resources of the network device; sending, by the controller, information regarding the utilization of the memory resources to a remote server, where the remote server is connected to the network device through a network connection; receiving, by the controller, a first request from the remote server to change memory allocation for a first memory region of the memory resources, where the first memory region is used by a software feature of the network device; and in response to the first request, adjusting, by the controller, a size of the first memory region without restarting the network device.

IPC Classes  ?

  • H04L 47/78 - Architectures of resource allocation
  • H04L 47/70 - Admission controlResource allocation
  • H04L 47/74 - Admission controlResource allocation measures in reaction to resource unavailability

17.

ELASTIC COUPLING BETWEEN DIGITAL TWIN AND PHYSICAL ARTIFACT

      
Application Number 18651229
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Milojicic, Dejan S.
  • Haus, Utz-Uwe
  • Bash, Cullen E.

Abstract

A method includes collecting data of states from a physical artifact at a first frequency using one or more data collection devices, wherein the states describe performance of the physical artifact in real-time, instantiating a first digital representation comprising a digital twin of the physical artifact, wherein the first digital representation mimics the physical artifact and a first state of the states, conducting an analysis to determine whether a first granularity of the collected data is sufficient based upon whether the first state falls within boundaries of operation that are expected for the digital twin, and adjusting a resolution at which the digital twin represents the physical artifact based upon the analysis to determine whether the first granularity of the collected data is sufficient.

IPC Classes  ?

  • G06F 30/27 - Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model

18.

ANALOG COMPUTATION OF SHIFT AND ADD FOR DOT PRODUCT ENGINES

      
Application Number 18651338
Status Pending
Filing Date 2024-04-30
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Buonanno, Luca
  • Zhao, Lei
  • Pedretti, Giacomo

Abstract

In an example implementation, a circuit includes a dot product engine and a buffer circuit comprising a plurality of current buffers. Each current buffer has an input coupled to an associated output of the dot product engine. An integrator circuit is coupled to receive outputs of the current buffers. The buffer circuit can be configured to combine multiple currents for weight slicing.

IPC Classes  ?

  • G06F 7/506 - AddingSubtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
  • G11C 13/00 - Digital stores characterised by the use of storage elements not covered by groups , , or
  • G11C 15/04 - Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
  • G11C 27/00 - Electric analogue stores, e.g. for storing instantaneous values

19.

METHOD FOR DATABASE MIGRATION

      
Application Number 18757686
Status Pending
Filing Date 2024-06-28
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Choudhury, Soumya Ranjan
  • Madhavarao, Suresh

Abstract

In certain implementations, an export plan is received, from a first database, that comprises instructions executable to create catalog objects of the first database having a relational structure. The export plan may be translated into an import plan for a second database, the import plan comprising multiple import operations and being based on a second syntax that is different from a first syntax of the export plan. The multiple input operations of the import plan may be executed in parallel to generate first import results. The first import results may be filtered and aggregated to generate second import results. The second import results may be merge sorted to generate third import results. The third import results may be imported into the second database, the third import results being consistent with the catalog objects of the first database.

IPC Classes  ?

  • G06F 16/21 - Design, administration or maintenance of databases
  • G06F 7/16 - Combined merging and sorting

20.

EFFICIENT BURST SORT BASED ON NETWORK-ATTACHED MEMORY

      
Application Number 18760105
Status Pending
Filing Date 2024-07-01
First Publication Date 2025-10-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Menhusen, Ryan D.
  • Crasta, Clarete Riana
  • Barmawer, Syed Ismail Faizan
  • Emmot, Darel Neal
  • Emberson, David R.
  • Singhal, Sharad
  • K V, Sajeesh Kumar
  • Chaurasiya, Ramesh Chandra
  • Sharma, Adya

Abstract

A system, by a processing entity (PE), determines records stored in a memory shared by other processing entities. A respective record comprises a key and a corresponding index indicating a physical location in the shared memory. The PE stores, in a DRAM partition, burst tree data obtained by performing a burst sort on a portion of the records. The PE moves data stored in the DRAM partition to a partition of the shared memory in response to a size of the stored data exceeding a predetermined threshold. The PE obtains sorted keys and corresponding indices for the records by sorting the burst tree data stored in shared memory partitions. The PE facilitates a sorted retrieval of the records in the shared memory while leaving the records in the respective physical location in the shared memory by writing the sorted keys and indices to the shared memory.

IPC Classes  ?

21.

Flow-to-queue telemetry augmentation

      
Application Number 18647152
Grant Number 12457158
Status In Force
Filing Date 2024-04-26
First Publication Date 2025-10-28
Grant Date 2025-10-28
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Mcmenomey, Jeffrey
  • Mohan, Saurabh
  • Prince, Joshua
  • Aggarwal, Nittin

Abstract

In certain implementations, a method includes receiving, at an ingress interface, a network traffic flow comprising a plurality of network data units; providing the plurality of network data units to a switching component; transmitting the plurality of network data units from the switching component to a hardware offload component prior to determining an egress interface for the plurality of network data units; processing, by the hardware offload component, the plurality of network data units to generate a flow report corresponding to the network traffic flow; transmitting the flow report from the hardware offload component to a control plane; processing, in the control plane, the flow report to determine an egress interface associated with the network traffic flow; updating the flow report to include the egress interface to obtain an updated flow report; and transmitting the updated flow report to a remote collector.

IPC Classes  ?

  • H04L 43/062 - Generation of reports related to network traffic
  • H04L 9/40 - Network security protocols
  • H04L 47/2483 - Traffic characterised by specific attributes, e.g. priority or QoS involving identification of individual flows
  • H04L 47/30 - Flow controlCongestion control in combination with information about buffer occupancy at either end or at transit nodes
  • H04L 47/625 - Queue scheduling characterised by scheduling criteria for service slots or service orders

22.

Enhanced multicast tracing with latency detection

      
Application Number 18754543
Grant Number 12457125
Status In Force
Filing Date 2024-06-26
First Publication Date 2025-10-28
Grant Date 2025-10-28
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Nandy, Tathagata
  • Radhakrishnabhat, Chethan Chavadibagilu

Abstract

A multicast tracing system for a network is provided. During operation, the system can identify, at a network device in the network, a join request and a data packet of a multicast group received at the network device. The system can determine respective timestamps indicating the arrival and departure of the join request and the data packet. The system can then determine, based on the timestamps, at least a local latency incurred by the data packet at the network device and a network latency incurred by the data packet in the network. Subsequently, the system can receive a multicast trace (mtrace) request for the multicast group. The system can incorporate the local latency and the network latency into the mtrace request. Upon identifying an upstream network device in a multicast path associated with the multicast group, the system can forward the mtrace request to the upstream network device.

IPC Classes  ?

  • H04L 12/18 - Arrangements for providing special services to substations for broadcast or conference
  • H04L 43/0864 - Round trip delays
  • H04L 43/106 - Active monitoring, e.g. heartbeat, ping or trace-route using time related information in packets, e.g. by adding timestamps

23.

Network address translation

      
Application Number 18647337
Grant Number 12457189
Status In Force
Filing Date 2024-04-26
First Publication Date 2025-10-28
Grant Date 2025-10-28
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Roweth, Duncan
  • Underwood, Keith D.

Abstract

In certain implementations, a method includes receiving, by a network interface controller (NIC), a request for inter-process communication associated with a sending process of a distributed application. The request includes a logical network address for a destination process of the distributed application. The method includes executing, by the NIC, a network address translation process to translate the logical network address for the destination process to a translated network address for the destination process. The network address translation process includes executing, using a first portion of the logical network address, a lookup of a network address translation table to determine a first address; determining a translation modifier by executing a translation algorithm using a second portion of the logical network address; and determining the translated network address using the first address and the translation modifier. The method includes processing, by the NIC, a first message using the translated network address.

IPC Classes  ?

24.

UNIVERSAL CEILING MOUNT

      
Application Number 18639056
Status Pending
Filing Date 2024-04-18
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Guo, Yuhai
  • Chen, Yuying
  • Liu, Aijun

Abstract

A ceiling mount comprises a mounting plate assembly that is configured to be coupled to the electronic device. The ceiling mount further includes two clips configured to engage with opposite sides of a ceiling rail to mount the ceiling mount to the ceiling rail, and two linkages configured to be extendible and collapsible. Further, each of the clips includes an engagement member configured to engage the ceiling rail, and a supporting arm coupled to the engagement member. The mounting plate assembly is positioned between the clips and the linkages. Moreover, each of the two linkages is connected to each of the two clips so that moving the two clips relative to the mounting plate assembly moves, in turn, the two linkages relative to the mounting plate assembly. The movement of the two linkages relative to the mounting plate assembly maintains the two clips parallel to each other.

IPC Classes  ?

  • F16M 13/02 - Other supports for positioning apparatus or articlesMeans for steadying hand-held apparatus or articles for supporting on, or attaching to, an object, e.g. tree, gate, window-frame, cycle

25.

COMPUTING SYSTEM WITH ENERGY AWARENESS

      
Application Number 18639342
Status Pending
Filing Date 2024-04-18
First Publication Date 2025-10-23
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Chalamalasetti, Sai Rahul
  • Dhakal, Aditya
  • Mishra, Alok
  • Rattihalli, Gourav
  • Milojicic, Dejan S.

Abstract

In an example implementation, a computer-implemented method includes determining resources available to execute a job and determining a location of each resource and a connected topology of the resources. For each of a combination of the available resources, bandwidth information related to channels to move data to the resources to execute the job is determined. The bandwidth information considers the location of data to be used to execute the job and the channels between the resources. The job is assigned to a resource or a combination of resources using a scheduling algorithm that takes into account the bandwidth information and power considerations.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 8/41 - Compilation

26.

NEGOTIATING MULTI-LINK HIGH RELIABILITY CONNECTION

      
Application Number 18639369
Status Pending
Filing Date 2024-04-18
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Gagnon, Jean-Francois
  • Jolicoeur, Martin

Abstract

Systems and methods are provided for implementing a duplication mode of operation that allows for the deliberate duplication of data to be sent between peer multi-link devices (MLDs), thereby overriding a conventional multi-link operation feature. Management frames can be exchanged between the peer MLDs that include information elements comprising one or more bits that can be set to indicate enablement of the duplication mode of operation, as well as conditions under which enablement of the duplication mode of operation occurs.

IPC Classes  ?

  • H04L 45/243 - Multipath using M+N parallel active paths
  • H04L 43/0864 - Round trip delays
  • H04L 45/302 - Route determination based on requested QoS
  • H04W 28/02 - Traffic management, e.g. flow control or congestion control
  • H04W 28/16 - Central resource managementNegotiation of resources or communication parameters, e.g. negotiating bandwidth or QoS [Quality of Service]
  • H04W 76/15 - Setup of multiple wireless link connections

27.

RISER CARD FOR A VERTICAL MOUNTING OF AN EXPANSION CARD

      
Application Number 18641562
Status Pending
Filing Date 2024-04-22
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Chen, Kuan-Wei
  • Chiang, Chih-Wei
  • Chang, Chao-Ming

Abstract

A riser card includes a circuit board and first, second, and third connectors. The first and second connectors are positioned at bottom and top edges of the circuit board, respectively. The third connector is mounted to a face of the circuit board. Such riser card may be mounted on a primary system board such that the first connector is detachably connected to a first complementary connector of the primary system board with the circuit board perpendicular to the primary system board, and the first connector receives power, data, and sideband signals from the first complementary connector. The second and third connectors may mate with second and third complementary connectors of an expansion card oriented parallel to the circuit board and a stackable secondary riser card oriented perpendicular to the circuit board, respectively. The riser card communicates power and sideband signals to the stackable secondary riser card via the third connector.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • G06F 1/18 - Packaging or power distribution

28.

MANAGING ROAMING OF CLIENT DEVICES IN A WIRELESS NETWORK

      
Application Number 18643776
Status Pending
Filing Date 2024-04-23
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Siraj, Mohd Shahnawaz
  • Beaudin, Andre
  • El Ferkouss, Omar
  • Ganu, Sachin

Abstract

An example method and a network device are presented that identifies the right set of roaming targets including one or more non-radiofrequency (RF) neighbor access points (APs) to which roaming provisioning credentials may be provided in advance of the client devices roaming in their network coverage areas. In some examples, the network device may use a machine learning model to identify a first set of roaming targets comprising one or more non-RF neighbor APs corresponding to a source AP of a client device in the network infrastructure. Then the network device may determine first roaming provisioning credentials for the first set of roaming targets, and transmit the first roaming provisioning credentials to the first set of roaming targets in advance of the client device roaming to any of the first set of roaming targets.

IPC Classes  ?

29.

BENCHMARK PROGRAM OPTIMIZATION

      
Application Number 18665446
Status Pending
Filing Date 2024-05-15
First Publication Date 2025-10-23
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Frachtenberg, Eitan
  • Bruel, Pedro Henrique Rocha
  • Mittal, Viyom
  • Pereira De Souza Filho, Paulo Roberto

Abstract

According to an implementation, a computer-implemented method to determine an optimal configuration of a benchmark program is proposed. The method includes iteratively selecting a unique parameter set from a parameter space, each parameter set corresponding to a unique configuration of the benchmark program; running the benchmark program as configured for each parameter set at least once; determining an evaluation score for each parameter set from one or more runs using an evaluation heuristic; recording an optimal parameter set having a best evaluation score; and configuring the benchmark program based on the optimal parameter set.

IPC Classes  ?

30.

PREDICTIVE DIAGNOSTICS IN HIGH-PERFORMANCE COMPUTING

      
Application Number 18751429
Status Pending
Filing Date 2024-06-24
First Publication Date 2025-10-23
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Metimath, Shivaprasad Ashok
  • Gowda, Priyanka Shankare
  • Joshi, Subrahmanya Vinayak

Abstract

A development system for predictive diagnostics is provided. During operation, the system can perform a first diagnostic test on a distributed computing system based on a first restriction level indicating resource consumption of a first set of hardware units. The distributed computing system can include a plurality of computing devices with processing and memory resources. The system can generate a first log comprising a first set of parameter values indicating an output of the first diagnostic test at the first restriction level of the distributed computing system. The system can configure a first diagnostic tool with the first set of parameter values to emulate the first diagnostic test. The system can then apply the first diagnostic tool to obtain a second set of parameter values indicating an output of the first diagnostic test at a second restriction level, which can be higher than the first restriction level.

IPC Classes  ?

  • G06F 11/30 - Monitoring
  • G06F 11/32 - Monitoring with visual indication of the functioning of the machine
  • G06F 11/34 - Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation

31.

HONEYPOT-BASED ATTACK DETECTION

      
Application Number 18638800
Status Pending
Filing Date 2024-04-18
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Mittelman Elberg, Dana
  • Leshem, Maya
  • Kogan, Miri

Abstract

In some examples, a system monitors input/output (I/O) operations to identify data matching a honeypot pattern. The system determines storage location information associated with the data identified as matching the honeypot pattern, and detects an access of the data at a storage location indicated by the storage location information. The system indicates a potential attack based on detecting the access of the data at the storage location indicated by the storage location information.

IPC Classes  ?

32.

CONTROLLER SUB-CLUSTER SELECTION BY A NETWORK DEVICE AFTER A CLUSTER SPLIT

      
Application Number 18765901
Status Pending
Filing Date 2024-07-08
First Publication Date 2025-10-23
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Ren, Jinzhao
  • Wang, Chunfeng
  • Prabhakar, Raghunandan
  • Ren, Zhijun

Abstract

In some examples, a network device determines that a cluster split has occurred in which a controller cluster of controllers is split into a plurality of sub-clusters. The network device receives, from the plurality of sub-clusters, information associated with controllers of the plurality of sub-clusters. The network device selects, from among the plurality of sub-clusters, a sub-cluster to which the network device is to connect using a specified criterion.

IPC Classes  ?

  • H04W 40/24 - Connectivity information management, e.g. connectivity discovery or connectivity update
  • H04W 28/08 - Load balancing or load distribution

33.

RESILIENT FULLY SHARDED DATA PARALLEL

      
Application Number 18634065
Status Pending
Filing Date 2024-04-12
First Publication Date 2025-10-16
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Cao, Lianjie
  • Rashidi, Saeed
  • Sharma, Puneet
  • Goon, Garrett
  • Faraboschi, Paolo

Abstract

Systems and methods are provided for failure resiliency in distributed training of machine learning (ML) models. Examples include a plurality of compute nodes storing shards of a plurality of shards of model states of an ML model, and a first compute node storing a first shard of model states of the ML model. The first compute node can store a plurality of shard portions. Each shard portion can be received from a respective compute node of the plurality of compute nodes and can be a replica of a portion of a respective shard, of the plurality of shards, stored at the respective compute node. Responsive to a failure of a compute node of the plurality of compute nodes, the first compute node can update the first shard with a shard portion corresponding to the failed compute node and the ML model can be trained based on the updated first shard.

IPC Classes  ?

  • G06F 11/20 - Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements

34.

MANAGEMENT CONTROLLER RESOURCE USAGE BY A SECURITY PROCESSOR

      
Application Number 18635433
Status Pending
Filing Date 2024-04-15
First Publication Date 2025-10-16
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Davenport, Chris
  • Newman, George Edward
  • Wright, Joseph

Abstract

In some examples, an electronic device includes a host processor, a security processor separate from the host processor, and a management controller separate from the host processor. The security processor loads agent instructions associated with the security processor to the management controller, and sends, from the security processor to the agent instructions executing on the management controller, an indication to execute identified machine-readable instructions. The agent instructions when executed on the management controller cause the management controller to, based on the indication, execute the identified machine-readable instructions that employ a resource of the management controller, and provide, from the management controller to the security processor, a result of a process that employs the resource of the management controller.

IPC Classes  ?

  • G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities

35.

EFFICIENT KEY-VALUE CACHE MANAGEMENT FOR LARGE LANGUAGE MODELS

      
Application Number 19248613
Status Pending
Filing Date 2025-06-25
First Publication Date 2025-10-16
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Dhakal, Aditya
  • Bruel, Pedro H.R.
  • Rattihalli, Gourav
  • Chalamalasetti, Sai Rahul
  • Milojicic, Dejan S.

Abstract

A first NIC monitors a key-value cache associated with an LLM executed by a compute node that includes the first NIC and an accelerator. The key-value cache is stored in a memory associated with the accelerator. Responsive to detecting that the key-value cache is updated by the accelerator, the first NIC transfers a copy of the key-value cache update to a remote storage node. The key-value cache is deleted from the memory after the query is inferred. Responsive to receiving a follow-up user query, the first NIC determines a storage location on the remote storage node that stores the key-value cache corresponding to the user query and sends a KV-cache-transfer request to a second NIC on the remote storage node, the KV-cache-transfer request specifying the storage location, thereby facilitating the second NIC to transfer the key-value cache corresponding to the user query from the specified storage location to the memory.

IPC Classes  ?

  • G06F 12/0802 - Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

36.

Quick release latch handle

      
Application Number 29918898
Grant Number D1097780
Status In Force
Filing Date 2023-11-30
First Publication Date 2025-10-14
Grant Date 2025-10-14
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Du, Yinggang
  • Moore, Earl W.

37.

POWER EFFICIENCY FOR ACCESS POINT

      
Application Number 18628252
Status Pending
Filing Date 2024-04-05
First Publication Date 2025-10-09
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Han, Jianpo
  • Dunsbergen, Berend
  • Li, Jiaqi
  • Jun, Yu
  • Xu, Liao

Abstract

In implementations of the present disclosure, there is provided an approach for saving power for an AP. A method comprises receiving a first signal from a station in connection with the AP. Then, a signal strength of the received first signal is detected. The detected signal strength is used to determine a signal strength range from a plurality of signal strength ranges, including the signal strength. Next, a transmit power corresponding to the selected signal strength range is determined according to a mapping between the plurality of signal strength ranges and a plurality of transmit powers and. Then, the determined transmit power is used to transmit a second signal to the station. Implementations of the present disclosure can reduce the transmit power of the AP when the signal strength of a signal from the station is greater, thereby saving power.

IPC Classes  ?

  • H04W 52/02 - Power saving arrangements
  • H04W 52/24 - TPC being performed according to specific parameters using SIR [Signal to Interference Ratio] or other wireless path parameters

38.

TUNNEL FAILOVER IN A NETWORK SYSTEM

      
Application Number 18626975
Status Pending
Filing Date 2024-04-04
First Publication Date 2025-10-09
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Jin, Pengfei
  • Shang, Xiaoding
  • Ren, Zhijun
  • Lu, Hao

Abstract

Example implementations relate to recovery from a failed tunnel in a network system. An example includes a medium storing instructions to: establish a first secure tunnel between a first node device to a branch device, where the branch device is connected to a second node device via a second secure tunnel; after a failure of the second secure tunnel, receive a data packet at the first node device from the branch device via the first secure tunnel; and, in response to a determination that the data packet is associated with an existing session established via the second secure tunnel, send the data packet from the first node device to the second node device via a third secure tunnel, where the second node device is to modify the data packet and send the modified data packet to a remote service provider.

IPC Classes  ?

  • H04L 41/0654 - Management of faults, events, alarms or notifications using network fault recovery

39.

SILICON-ON-INSULATOR PHOTONIC INTEGRATED CIRCUITS WITH INTEGRATED SILICON PHOTONIC COMPONENT AND SILICON/NITROGEN PHOTONIC COMPONENT

      
Application Number 18627078
Status Pending
Filing Date 2024-04-04
First Publication Date 2025-10-09
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor Mathai, Sagi Varghese

Abstract

A photonic integrated circuit may comprise a silicon substrate, a buried oxide (BOX) layer disposed on the silicon substrate, a silicon device layer disposed on the BOX layer, a first silicon waveguide in the silicon device layer, and a silicon/nitrogen waveguide optical amplifier disposed on the BOX layer. The first silicon waveguide comprises a first silicon waveguide core formed in the silicon device layer. The silicon/nitrogen waveguide optical amplifier comprises a first silicon/nitrogen waveguide core portion disposed on the BOX layer and optically coupled with the first silicon waveguide core. The first silicon/nitrogen waveguide core portion comprises a compound of silicon and nitrogen.

IPC Classes  ?

  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/134 - Integrated optical circuits characterised by the manufacturing method by substitution by dopant atoms

40.

ADAPTER FOR OCP MODULE

      
Application Number 18628888
Status Pending
Filing Date 2024-04-08
First Publication Date 2025-10-09
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Chianghsieh, Peng
  • Lin, Yu Han
  • Chen, Jui Lin

Abstract

An adapter, a system and a method. The adapter comprising a frame that comprises an inner engagement features configured to engage with an OCP module received in the interior volume and to attach the OCP adapter to the OCP module and an outer engagement features configured to engage with engagement features of a bay of the EDSFF drive cage as the OCP adapter is inserted into the bay, and a latching mechanism connected to the frame and configured to latch into a latching feature of the EDSFF cage in an installed state of the OCP adapter in the bay.

IPC Classes  ?

  • H01R 31/06 - Intermediate parts for linking two coupling parts, e.g. adapter
  • H01R 12/72 - Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
  • H01R 13/627 - Snap-action fastening
  • H01R 13/6581 - Shield structure

41.

Synchronization of network orchestration with core service registration procedures

      
Application Number 18629534
Grant Number 12438782
Status In Force
Filing Date 2024-04-08
First Publication Date 2025-10-07
Grant Date 2025-10-07
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Fernandez Galmes, Juan Manuel
  • Perez, Ignacio Aldama
  • Munoz, Jaime Garcia

Abstract

A telecommunications network includes a core network. The core network includes: a first plurality of Network Functions (NFs); and a Network Registration Function (NRF) configured to communicate with the first plurality of NFs, where the first plurality of NFs are registered with the NRF, and the NRF is configured to: receive, from an NF service consumer located outside of the core network, a request for discovery of a topology of the core network; determine, based on an authorization procedure of the core network, whether the NF service consumer is authorized to discover the topology of the core network; and send, in response to determining that the NF service consumer is authorized to discover the topology of the core network, a response to the NF service consumer, where the response comprises information regarding each of the first plurality of NFs and interconnections between the first plurality of NFs.

IPC Classes  ?

  • H04L 41/12 - Discovery or management of network topologies
  • H04L 61/4511 - Network directoriesName-to-address mapping using standardised directoriesNetwork directoriesName-to-address mapping using standardised directory access protocols using domain name system [DNS]

42.

MULTI-LINK OPERATION FORWARDING AGGREGATION

      
Application Number 18619511
Status Pending
Filing Date 2024-03-28
First Publication Date 2025-10-02
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Jia, Xuguang
  • Zhang, Xueliang
  • Guo, Yongchang

Abstract

A method for multi-link operation forwarding aggregation is provided. The method comprises obtaining, by an access point (AP), a first Media Access Control Service Data Unit (MSDU) with first payload information via a first link of the AP and a second MSDU with second payload information via a second link of the AP. The method further comprises determining that a destination of the first MSDU is same as a destination of the second MSDU. The method further comprises generating an aggregation frame based on the first MSDU and the second MSDU, the aggregation frame comprising the first payload information of the first MSDU and the second payload information of the second MSDU. In addition, the method further comprises transmitting the aggregation frame to the destination via a wired network. In this way, the forwarding efficiency can be improved.

IPC Classes  ?

  • H04L 47/36 - Flow controlCongestion control by determining packet size, e.g. maximum transfer unit [MTU]
  • H04L 47/2408 - Traffic characterised by specific attributes, e.g. priority or QoS for supporting different services, e.g. a differentiated services [DiffServ] type of service

43.

DETECTION MECHANISM FOR MAGNETIC DISTORTION

      
Application Number 18619592
Status Pending
Filing Date 2024-03-28
First Publication Date 2025-10-02
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Zhang, Hongli
  • Bai, Hailong
  • Li, Kuanyue

Abstract

In implementations of the present disclosure, a detection mechanism for magnetic distortion is provided. An access point (AP) obtains a reference inclination value and a reference intensity value of a magnetic field intensity based on a location of the AP, and obtains an inclination value and an intensity value of the magnetic field intensity. The AP determines a first difference between the reference inclination value and the inclination value, and a second difference between the reference intensity value and the intensity value, and determines that the first difference exceeds a first threshold or the second difference exceeds a second threshold. The AP detects, based on the first difference exceeding the first threshold or the second difference exceeding the second threshold, a distortion for at least one of the inclination value and the intensity value. Implementations of the present disclosure can improve the accuracy of the detection of the magnetic distortion.

IPC Classes  ?

  • H04W 64/00 - Locating users or terminals for network management purposes, e.g. mobility management
  • H04W 4/02 - Services making use of location information
  • H04W 4/029 - Location-based management or tracking services

44.

3-WAY QUICK-DISCONNECT FLUID COUPLINGS WITH AUTOMATIC BYPASS SWITCHING

      
Application Number 18621996
Status Pending
Filing Date 2024-03-29
First Publication Date 2025-10-02
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Scott, Michael Dustin
  • Knudsen, Corey Paul
  • Lunsman, Harvey John

Abstract

A 3-way fluid coupling for an information processing device having a primary liquid cooling loop and an expansion space. When no expansion device is present, the coupling directs liquid down a bypass path of the primarily loop. When an expansion device is present in the expansion space, the coupling directs liquid to flow through an expansion liquid cooling loop of the expansion device while substantially blocking liquid from flowing through the bypass path. The 3-way fluid coupling has a body and a poppet in the body. The poppet moves between a first position, in which first and second ports of the body are open while a third port is closed, thus directing liquid along the bypass path, and a second position in which the first and third ports are open and the second port is blocked, thus directing liquid to the expansion loop and substantially blocking the bypass path.

IPC Classes  ?

  • G06F 1/20 - Cooling means
  • F16K 11/07 - Multiple-way valves, e.g. mixing valvesPipe fittings incorporating such valvesArrangement of valves and flow lines specially adapted for mixing fluid with all movable sealing faces moving as one unit comprising only sliding valves with linearly sliding closure members with cylindrical slides
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

45.

PROGRAM VERSION ENFORCEMENT USING A CERTIFICATE

      
Application Number 18623623
Status Pending
Filing Date 2024-04-01
First Publication Date 2025-10-02
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Preimesberger, Lee A.
  • Kasheshian, Vartan Yosef
  • Mooty, Jonathan Rene
  • O'Connor, Grant Tavis

Abstract

An electronic device stores a target program representation containing information of a program for an electronic part of the electronic device. A controller obtains a certificate issued by a certificate authority, the certificate including a program version enforcement information element to indicate whether program version enforcement is to be applied using the target program representation. The controller checks the program version enforcement information element in the certificate to determine whether the program version enforcement is to be applied, and based on determining from the certificate that the program version enforcement is to be applied, the controller enforces application of a version of the program indicated by the target program representation to the electronic part.

IPC Classes  ?

  • G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
  • G06F 8/65 - Updates
  • H04L 9/00 - Arrangements for secret or secure communicationsNetwork security protocols
  • H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system

46.

DISTRIBUTED SENSOR TRACKING ACCELERATION FOR DATA CENTER MANAGEMENT

      
Application Number 18623970
Status Pending
Filing Date 2024-04-01
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Chalamalasetti, Sai Rahul
  • Raith, Philipp
  • Rattihalli, Gourav
  • Milojicic, Dejan S.
  • Robertson, Naysen J.

Abstract

In one example implementation, a computer-implemented method includes sending instructions from a scheduler directly to a plurality of compute resources to obtain sensor data from the plurality of compute resources. The sensor data is received directly from the compute resources. The scheduler develops a workload distribution plan based on information related to applications waiting to be executed and the sensor data received from the compute resources. The applications are assigned to the compute resources according to the workload distribution plan.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 9/48 - Program initiatingProgram switching, e.g. by interrupt

47.

WORKLOAD DEPLOYMENTS USING INFRASTRUCTURE GROUPS

      
Application Number 18746223
Status Pending
Filing Date 2024-06-18
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Manoharan, Divya
  • Kattangere, Rafiq Ahamed

Abstract

In certain implementations, a method includes receiving a template request for a workload environment; obtaining an infrastructure group template corresponding to the workload environment specified in the template request; and providing, to a user device, the infrastructure group template. The user device may update the infrastructure group template to obtain an updated infrastructure group template. The method further includes receiving an infrastructure group configuration request including the updated infrastructure group template; and providing, to an infrastructure agent, an instruction to deploy an infrastructure group corresponding to the updated infrastructure group template. The infrastructure agent may initiate a deployment of the infrastructure group based on the infrastructure group template. The method further includes providing, to the user device, a status response corresponding to the deployment of the infrastructure group. The status response may indicate whether the deployment was a success or a failure.

IPC Classes  ?

  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 9/455 - EmulationInterpretationSoftware simulation, e.g. virtualisation or emulation of application or operating system execution engines

48.

FAULT DETECTION BASED ON DEVICE COMPONENT IDENTIFIERS

      
Application Number 18748211
Status Pending
Filing Date 2024-06-20
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Chen, Chao Hsu
  • Srivastava, Apoorva
  • Hsu, Hong-Jen
  • Wang, Ying-Jie

Abstract

A system retrieves, from a management controller of an electronic device, identifiers of device components in the electronic device, where the retrieved identifiers of the device components are assigned in management operations according to a management protocol. The system accesses resource metadata representing resources of the electronic device, the resource metadata stored at the management controller. The system checks the retrieved identifiers assigned in the management operations according to the management protocol based on information of the resources represented by the resource metadata. Based on the check, the system determines whether a fault is present in the electronic device.

IPC Classes  ?

  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance

49.

SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK WITH INGRESS PORT INJECTION LIMITS

      
Application Number 19232521
Status Pending
Filing Date 2025-06-09
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Hewson, David Charles
  • Bataineh, Abdulla
  • Court, Thomas
  • Beecroft, Jonathan P.

Abstract

Data-driven intelligent networking systems and methods are provided. The system can accommodate dynamic traffic while applying injection limits to different traffic classes at an ingress edge port. The system can maintain state information of individual packet flows, which can be set up or released dynamically based on injected data. Each flow can be provided with a flow-specific input queue upon arriving at a switch. Packets of a respective flow can be acknowledged after reaching the egress point of the network, and the acknowledgement packets can be sent back to the ingress point of the flow along the same data path. Furthermore, an edge switch can dynamically allocate the ingress port bandwidth among the traffic classes that are active at a given moment.

IPC Classes  ?

  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]
  • G06F 9/54 - Interprogram communication
  • G06F 12/0862 - Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
  • G06F 12/1036 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
  • G06F 12/1045 - Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
  • G06F 13/14 - Handling requests for interconnection or transfer
  • G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal
  • G06F 13/38 - Information transfer, e.g. on bus
  • G06F 13/40 - Bus structure
  • G06F 13/42 - Bus transfer protocol, e.g. handshakeSynchronisation
  • G06F 15/173 - Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star or snowflake
  • H04L 1/00 - Arrangements for detecting or preventing errors in the information received
  • H04L 43/0876 - Network utilisation, e.g. volume of load or congestion level
  • H04L 43/10 - Active monitoring, e.g. heartbeat, ping or trace-route
  • H04L 45/00 - Routing or path finding of packets in data switching networks
  • H04L 45/02 - Topology update or discovery
  • H04L 45/021 - Ensuring consistency of routing table updates, e.g. by using epoch numbers
  • H04L 45/028 - Dynamic adaptation of the update intervals, e.g. event-triggered updates
  • H04L 45/12 - Shortest path evaluation
  • H04L 45/122 - Shortest path evaluation by minimising distances, e.g. by selecting a route with minimum of number of hops
  • H04L 45/125 - Shortest path evaluation based on throughput or bandwidth
  • H04L 45/16 - Multipoint routing
  • H04L 45/24 - Multipath
  • H04L 45/28 - Routing or path finding of packets in data switching networks using route fault recovery
  • H04L 45/42 - Centralised routing
  • H04L 45/745 - Address table lookupAddress filtering
  • H04L 45/7453 - Address table lookupAddress filtering using hashing
  • H04L 47/10 - Flow controlCongestion control
  • H04L 47/11 - Identifying congestion
  • H04L 47/12 - Avoiding congestionRecovering from congestion
  • H04L 47/122 - Avoiding congestionRecovering from congestion by diverting traffic away from congested entities
  • H04L 47/20 - Traffic policing
  • H04L 47/22 - Traffic shaping
  • H04L 47/24 - Traffic characterised by specific attributes, e.g. priority or QoS
  • H04L 47/2441 - Traffic characterised by specific attributes, e.g. priority or QoS relying on flow classification, e.g. using integrated services [IntServ]
  • H04L 47/2466 - Traffic characterised by specific attributes, e.g. priority or QoS using signalling traffic
  • H04L 47/2483 - Traffic characterised by specific attributes, e.g. priority or QoS involving identification of individual flows
  • H04L 47/30 - Flow controlCongestion control in combination with information about buffer occupancy at either end or at transit nodes
  • H04L 47/32 - Flow controlCongestion control by discarding or delaying data units, e.g. packets or frames
  • H04L 47/34 - Flow controlCongestion control ensuring sequence integrity, e.g. using sequence numbers
  • H04L 47/52 - Queue scheduling by attributing bandwidth to queues
  • H04L 47/62 - Queue scheduling characterised by scheduling criteria
  • H04L 47/625 - Queue scheduling characterised by scheduling criteria for service slots or service orders
  • H04L 47/6275 - Queue scheduling characterised by scheduling criteria for service slots or service orders based on priority
  • H04L 47/629 - Ensuring fair share of resources, e.g. weighted fair queuing [WFQ]
  • H04L 47/76 - Admission controlResource allocation using dynamic resource allocation, e.g. in-call renegotiation requested by the user or requested by the network in response to changing network conditions
  • H04L 47/762 - Admission controlResource allocation using dynamic resource allocation, e.g. in-call renegotiation requested by the user or requested by the network in response to changing network conditions triggered by the network
  • H04L 47/78 - Architectures of resource allocation
  • H04L 47/80 - Actions related to the user profile or the type of traffic
  • H04L 49/00 - Packet switching elements
  • H04L 49/101 - Packet switching elements characterised by the switching fabric construction using crossbar or matrix
  • H04L 49/15 - Interconnection of switching modules
  • H04L 49/90 - Buffering arrangements
  • H04L 49/9005 - Buffering arrangements using dynamic buffer space allocation
  • H04L 49/9047 - Buffering arrangements including multiple buffers, e.g. buffer pools
  • H04L 67/1097 - Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
  • H04L 69/22 - Parsing or analysis of headers
  • H04L 69/28 - Timers or timing mechanisms used in protocols
  • H04L 69/40 - Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection

50.

LIQUID COOLING SYSTEM WITH FLOW CONTROL BASED ON PER-NODE VALVES

      
Application Number 18624225
Status Pending
Filing Date 2024-04-02
First Publication Date 2025-10-02
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Kufahl, Benjamin John
  • Lunsman, Harvey John
  • Collins, David Robert

Abstract

A system, a method and device. The system comprising trays each comprising processors, a liquid cooling loop configured to supply liquid coolant to the trays, individually electronically controllable valves disposed in the liquid cooling loop, wherein each valve of comprises a movable element which is movable in response to an electronic signal to control the flow of the liquid coolant to a corresponding tray of the plurality of trays, pumps configured to cause the liquid coolant to flow through the liquid cooling loop, a control system comprising one or more controllers, wherein the controllers are configured to: individually control each valve of the plurality of individually electronically controllable valves as a function of a state of the corresponding tray, and control the pumping speed of the one or more pumps as a function of the states of the movable elements of the individually electronically controllable valves.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • G05D 7/06 - Control of flow characterised by the use of electric means

51.

DETECTING UNEXPECTED CHANGES TO MANAGED NODES BASED ON REMOTELY-GENERATED VERIFICATION VALUES DERIVED FROM NODE-PROVIDED INTEGRITY MEASUREMENTS

      
Application Number 18765439
Status Pending
Filing Date 2024-07-08
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Murthy, Pavan Sridhar
  • Panambur, Deepak
  • Simha, Adithya Kp
  • Jogalekar, Mahendra

Abstract

A process includes accessing from a managed node a plurality of integrity measurements that are generated by the managed node responsive to the managed node changing power states. The process includes determining whether the managed node has unexpectedly changed. Determining whether the managed node has unexpectedly changed includes identifying an algorithm that corresponds to the managed node. Determining whether the managed node has unexpectedly changed further includes applying the algorithm to the integrity measurements to generate an observed verification value for the managed node. Determining whether the managed node has unexpectedly changed further includes comparing the observed verification value with an expected verification value for the managed node. The process includes initiating a responsive action in response to determining that the managed node has unexpectedly changed.

IPC Classes  ?

  • G06F 21/60 - Protecting data
  • G06F 8/65 - Updates
  • G06F 21/57 - Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities

52.

KERNEL MEMORY MONITOR FOR USER-SPACE MAPPING CHANGE NOTIFICATIONS

      
Application Number 19232467
Status Pending
Filing Date 2025-06-09
First Publication Date 2025-10-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor Uttormark, Michael J.

Abstract

A system performs a registration process for monitoring a respective address range, by: receiving, from an application, a first command to monitor a first address range in a kernel; registering, in the kernel, the first address range; creating a monitoring state window in the kernel, the monitoring state window indicating that the first address range is valid; and providing, to the application, read-only access to the monitoring state window. The system detects, in the kernel based on a previous state of a mapping of virtual addresses to physical addresses, a change associated with a memory mapping of a second address range. The system updates the monitoring state window by invalidating address ranges overlapping with the second address range. Responsive to the first address range being valid, the system bypasses the registration process for the first address range.

IPC Classes  ?

53.

Cloud connection state monitoring utilizing unstable connection state analysis

      
Application Number 18624003
Grant Number 12445363
Status In Force
Filing Date 2024-04-01
First Publication Date 2025-10-02
Grant Date 2025-10-14
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Kasperson, David
  • Schunicht, Geoffery

Abstract

In an example implementation consistent with the features disclosed herein, a computer-implemented method includes receiving a connection request from a client, connecting the client to a server in response to the connection request, identifying a disconnection from the client, and disconnecting the client from the server in response to the disconnection request. The method includes determining a time between the connection request and the disconnection. When the connection request and the disconnection is less than a threshold time, the method includes transmitting messaging and withholding the messaging until the connection request and the disconnection is greater than a threshold time.

IPC Classes  ?

  • H04L 43/0811 - Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability by checking connectivity
  • H04L 43/106 - Active monitoring, e.g. heartbeat, ping or trace-route using time related information in packets, e.g. by adding timestamps

54.

Rack server bezel

      
Application Number 29830328
Grant Number D1095432
Status In Force
Filing Date 2022-03-11
First Publication Date 2025-09-30
Grant Date 2025-09-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Du, Yinggang
  • Kuehn, Keith
  • Huang, Jo Han
  • Lench, Kasey

55.

Rack server bezel

      
Application Number 29830335
Grant Number D1095433
Status In Force
Filing Date 2022-03-11
First Publication Date 2025-09-30
Grant Date 2025-09-30
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Lench, Kasey
  • Du, Yinggang
  • Kuehn, Keith
  • Huang, Jo Han

56.

DETECTION OF LAG MISCONFIGURATION

      
Application Number 18612204
Status Pending
Filing Date 2024-03-21
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor Suresh, Kumar

Abstract

Systems and methods are provided for detecting link aggregation group (LAG) misconfigurations. Conventional operation of LACP is modified so that a network entity, such as a fabric manager may broadcast LAG configuration information to switches or devices of a fabric or network along with partner LAG configuration information. In this way, practical implementational challenges associated with the use of LACP instances in individual switches or devices and with the use of a fabric manager, can be avoided, where a switch or device in receipt of such partner LAG configuration information can compare that information with the switch's/device's current LAG configuration. Switches or devices need not exchange LACP messages directly, but can still be aware of fabric-wide LAG configurations that may impact their operation.

IPC Classes  ?

57.

CASCADED PRIVACY COLLABORATIVE LEARNING WITH ENHANCED PERFORMANCE

      
Application Number 18664911
Status Pending
Filing Date 2024-05-15
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Jella, Radhakrishna
  • Soundararajan, Suresh
  • Desai, Milind B.

Abstract

Systems and methods are provided for cascaded privacy decentralized learning. Examples herein provide network nodes that train local instance of a machine learning (ML) algorithm with local data over a plurality of training stages. Each network node determines local parameters at one or more iterations of training during each training stage and applies, during each training stage, an amount of differential privacy to respective local parameters. The amount of differential privacy applied during one training stage is less than an amount differential privacy applied during a preceding training stage. A leader node merges the local parameters from the network nodes and shares the merged parameters with the network nodes to provide common ML model.

IPC Classes  ?

  • G06N 3/098 - Distributed learning, e.g. federated learning

58.

METHODS AND SYSTEMS FOR ACCELERATING MULTI-STAGED MACHINE LEARNING PIPELINES WITHOUT DATA CONVERTER

      
Application Number 18790748
Status Pending
Filing Date 2024-07-31
First Publication Date 2025-09-25
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Buonanno, Luca
  • Pedretti, Giacomo
  • Ignowski, James
  • Richmond, Todd
  • Natarajan, Aishwarya

Abstract

A device that includes a first circuit, an analog content addressable memory (ACAM), and a result analyzer is disclosed. The first circuit can be programmed with a matrix. The first circuit can be configured to receive an input vector comprising a first set of values; perform a matrix multiplication by multiplying the input vector by the matrix to obtain a matrix multiplication result; and output the matrix multiplication result, where the matrix multiplication result corresponds to a feature vector. The ACAM can be configured to receive the feature vector and perform an operation using the feature vector to obtain a set of output match results. The result analyzer can be configured to output a machine learning algorithm result based on the set of output match results. In some implementations, the matrix multiplication can be performed using a dot product engine of the first circuit.

IPC Classes  ?

59.

UPDATING ACCESS POINTS OF A COMMUNICATION NETWORK

      
Application Number 18739481
Status Pending
Filing Date 2024-06-11
First Publication Date 2025-09-25
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Narayanan, Santhana Krishnan
  • Prabhakar, Raghunandan
  • Kumar, Abhishek

Abstract

In certain implementations, a method includes obtaining network information for a plurality of access points (APs) that are configured to provide user devices with access to a communication network, and determining, according to the network information, partitions in which to divide the APs for deploying a software update to the APs. The method includes dividing, according to a vertex coloring algorithm, the APs into the partitions. The APs correspond to vertices of the vertex coloring algorithm, and neighbor relationships of the APs correspond to edges of the vertex coloring algorithm. The method includes transmitting software update instructions to the APs to cause APs of a first partition to execute a reboot for installing the software update on the APs of the first partition at a different time than APs of a second partition execute a reboot for installing the software update on the APs of the second partition.

IPC Classes  ?

  • H04L 41/082 - Configuration setting characterised by the conditions triggering a change of settings the condition being updates or upgrades of network functionality
  • H04L 41/0893 - Assignment of logical groups to network elements

60.

MODULAR RISER CARD FOR AN ELECTRONIC DEVICE

      
Application Number 19228170
Status Pending
Filing Date 2025-06-04
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Chen, Kuan-Wei
  • Nguyen, Vincent
  • Nien, Ku-Hsu
  • Chen, Jui Lin
  • Chao, Hsueh Yu

Abstract

A modular riser card, an electronic device having a modular riser card, and a method of determining a type of modular riser card pin connection are disclosed. The modular riser card includes a circuit board and a removable connector assembly. The circuit board includes a first receptacle having a plurality of first pins. The removable connector assembly includes a connector body defining a second receptacle having a plurality of second pins, and an opening formed in the connector body adjacent to the second receptacle. The connector body is mounted on the circuit board such that the first receptacle protrudes through the opening and is aligned with the second receptacle. The first and second receptacles form a riser card connector that is configured to removably receive an expansion card of an electronic device.

IPC Classes  ?

  • H01R 12/72 - Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures
  • H01R 12/70 - Coupling devices
  • H01R 12/71 - Coupling devices for rigid printing circuits or like structures

61.

OPTICAL DEVICES AND SYSTEMS FOR OPTICAL SOURCE REDUNDANCY

      
Application Number 19230779
Status Pending
Filing Date 2025-06-06
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Cheung, Stanley
  • Kurczveil, Geza
  • Peng, Yiwei
  • Yuan, Yuan
  • Beausoleil, Raymond G.

Abstract

Systems, devices, and methods are provided for built-in redundancy in optical devices that output an optical signal, for example, to photonic integrated circuits. The device and systems disclosed herein include a plurality of optical sources coupled to a plurality of waveguides. Each adjacent pair of the plurality of waveguides are coupled to an optical switching devices that comprises an interferometer having a first branch comprising a phase-shift mechanism coupled to one waveguide of the pair of waveguides. A voltage bias can be applied to the phase-shift mechanisms to tune a respective phase difference and direct an optical signal from any of the plurality of optical sources to the output end of the optical device. According to various examples disclosed herein, the phase-shift mechanisms comprises metal oxide semiconductor (MOS) capacitors.

IPC Classes  ?

  • H04B 10/564 - Power control
  • G02F 1/313 - Digital deflection devices in an optical waveguide structure
  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal

62.

MULTI-LINK OPERATION LINK TRANSITION PROTECTION

      
Application Number 18609930
Status Pending
Filing Date 2024-03-19
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Beaudin, Andre
  • El Ferkouss, Omar
  • Han, Jianpo

Abstract

Systems and methods are provided for protecting link transitions from anomalous behaviors on links formed between multi-link devices (MLDs) in multi-link operation (MLO). Examples detect, by a first MLD, an anomaly related to a second MLD based on receiving a plurality of link transition trigger signals from the second MLD. The second MLD having been authenticated for MLO with the first MLD. In response to detecting the anomaly the second MLD is de-authenticated for MLO with the first MLD. In some examples, while de-authenticated for MLO, the second MLD can then be authenticated for single-link operation (SLO).

IPC Classes  ?

63.

CIRCUITRY ON ANTENNA MODULE, ANTENNA MODULE, AND SYSTEM COMPRISING THE SAME

      
Application Number 18612568
Status Pending
Filing Date 2024-03-21
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Zheng, Jiguang
  • Bai, Hailong
  • Zhang, Hongli
  • Sun, Yue

Abstract

Implementations of the present disclosure relate to a circuitry system for a wireless system. The circuitry system includes a first circuit located at the outdoor antenna module, and a second circuit and a third circuit located at the wireless access point. When any component on the outdoor antenna module triggers the clock stretch, the state of demodulated clock signal will change, and the first circuit can change the power consumption level of the outdoor antenna module according to the state change. The second circuit can sense changes in the power consumption level and can output a control signal corresponding to the power consumption level. The control signal can control the third circuit. The third circuit can associate the state of the initial clock signal with the clock stretch state of the plurality of components according to the control signal, thereby realizing bidirectional transmission of the clock signal.

IPC Classes  ?

  • H04B 1/16 - Circuits
  • H04B 1/40 - Circuits
  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop

64.

DATA RESTORE OPERATION USING PARALLEL READS AND WRITES AND INCREMENTAL COMPRESSION

      
Application Number 18614811
Status Pending
Filing Date 2024-03-25
First Publication Date 2025-09-25
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Shanbhag, Pavan Subbayya
  • Kannantha, Sumantha
  • Sarawate, Bhagyashree Charudatta
  • Nilangekar, Swapnil Sunil

Abstract

As part of a data restore operation from a backup data store, a system reads data objects of the backup data store in parallel into a buffer, which includes reading chunks of a first data object into the buffer. The data objects are provided from the buffer to a data compressor that incrementally compresses the data objects as the data objects are received at the data compressor to produce compressed data objects. The compressed data objects are transferred in parallel to a target data store as part of the data restore operation.

IPC Classes  ?

  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result

65.

Remote data merge system and method

      
Application Number 18670983
Grant Number 12423191
Status In Force
Filing Date 2024-05-22
First Publication Date 2025-09-23
Grant Date 2025-09-23
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor Fullington, Robert Carter

Abstract

A computer-implemented method is disclosed in which a number of remote database backups are received from remote locations. Containers are created where each container hosts remote data from a respective one of the remote database backups. The remote data from each container is merged with a target database. The method can be implemented, for example, in a cloud service.

IPC Classes  ?

  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result
  • G06F 16/23 - Updating

66.

WORKLOAD DEPLOYMENT IN A PRIVATE CLOUD

      
Application Number 18655393
Status Pending
Filing Date 2024-05-06
First Publication Date 2025-09-18
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Sakthivel, Thavamaniraja
  • Lenihan, John
  • Hingu, Jigarkumar Narendrabhai

Abstract

Examples described herein relate to a workload scheduler for deploying a workload in a private cloud. The workload scheduler receives a request to deploy a workload specifying a workflow to be executed. The workload scheduler then identifies a set of pre-deployed configurations based on one or more pre-deployed workloads and an identity of the workflow. Then, the workload scheduler recommends a target configuration from the set of pre-deployed configurations, and deploys the workload with the target configuration in the private cloud.

IPC Classes  ?

  • G06F 9/48 - Program initiatingProgram switching, e.g. by interrupt

67.

DISTRIBUTION OF SECURITY KEYS IN A STORAGE NETWORK

      
Application Number 18677668
Status Pending
Filing Date 2024-05-29
First Publication Date 2025-09-18
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Malkin, Kirill
  • Puttagunta, Krishna Babu
  • Sarnad, Prateek

Abstract

Example implementations relate to storage networks. In some examples, a controller identifies a set of devices associated with a zone configuration of a storage network, and identifies a set of policies associated with the zone configuration. The controller generates a set of security keys based on the set of devices and the set of policies. The controller distributes the set of security keys to the set of devices via a set of secure messages, where the set of devices receive different subsets of the set of security keys to establish encrypted communications among the set of devices.

IPC Classes  ?

  • H04L 9/08 - Key distribution
  • H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system
  • H04L 9/40 - Network security protocols

68.

AUTO-SCALING, RESILIENT, AND LOAD BALANCING FRAMEWORK FOR WORKLOAD DEPLOYMENT IN CLOUD AND HIGH PERFORMANCE COMPUTING ENVIRONMENTS

      
Application Number 18735809
Status Pending
Filing Date 2024-06-06
First Publication Date 2025-09-18
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Crasta, Clarete Riana
  • Chaurasiya, Ramesh Chandra
  • Shastry, Krishnaprasad Lingadahalli
  • Singhal, Sharad
  • Emberson, David R.

Abstract

In certain embodiments, a method includes receiving, at a framework daemon, an indication to begin execution of a workload divided into execution units; accessing, by the framework daemon and in response to the indication, an execution context that includes the execution units; associating, by the framework daemon, an identifier of a node with an execution unit of the execution units to claim the execution unit for execution by the node; executing, by the node, the execution unit; accessing, by the framework daemon and after the node completes execution of the execution unit, the execution context to determine whether the execution context includes an unclaimed execution unit; associating, by the framework daemon and when the execution context includes an unclaimed execution unit, the identifier of the node with the unclaimed execution unit to claim the unclaimed execution unit for execution by the node; and executing, by the node, the execution unit.

IPC Classes  ?

  • G06F 11/07 - Responding to the occurrence of a fault, e.g. fault tolerance
  • G06F 9/50 - Allocation of resources, e.g. of the central processing unit [CPU]

69.

DATA CORRECTNESS AND VALIDATION USING VALIDATION DEFINITION LANGUAGE

      
Application Number 19226886
Status Pending
Filing Date 2025-06-03
First Publication Date 2025-09-18
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Kannan, Kalapriya
  • Talreja, Chirag
  • Chaturvedi, Chinmay
  • Nyamagouda, Sagar Venkappa
  • Nallasamy, Jayasankar
  • Pimplaskar, Prasad

Abstract

Systems and methods are provided for generating extract-transform-load (“ETL”) machine learning (“ML”) pipeline validation rules based on user-input, wherein the ETL ML pipeline validation rules may be applicable to validate an ETL ML pipeline against multiple test datasets. The ETL ML pipeline validation rules may comprise compute-type validation rules for computing expected values of data structures within a dataset output by the ETL ML pipeline. The ETL ML pipeline validation rules may comprise check-type validation rules for checking whether data structures within a dataset output by the ETL ML pipeline have intended characteristics.

IPC Classes  ?

  • G06F 16/25 - Integrating or interfacing systems involving database management systems
  • G06F 16/215 - Improving data qualityData cleansing, e.g. de-duplication, removing invalid entries or correcting typographical errors
  • G06N 20/00 - Machine learning

70.

CHASSIS OF AN INFORMATION PROCESSING DEVICE HAVING MODULAR PANEL SECTION

      
Application Number 18602206
Status Pending
Filing Date 2024-03-12
First Publication Date 2025-09-18
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Nguyen, Minh H.
  • Nguyen, Vincent

Abstract

A chassis includes a base and a modular panel section having vertical support members, a horizontal support structure, partition brackets, and bracket mounting locations. The vertical support members are coupled to the base to define an opening therebetween. The horizontal support structure extends between and coupled to the vertical support members to divide the opening into a first region and a second region. The bracket mounting locations are defined in the first and/or second regions, and each bracket mounting location includes mounting elements configured to connect one of the partition brackets to the base and/or the horizontal support structure. The partition brackets are disposed at respective bracket mounting locations and removably coupled to the base and/or to the horizontal support structure and divide the first and/or second regions into bays. Each bay is configured to receive and allow an electronic module to be electrically connected to an information processing device.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack

71.

HIERARCHICAL, TEMPORAL, AND POSITIONAL DATA STRUCTURE FOR GENERATIVE ARTIFICIAL INTELLIGENCE (AI)

      
Application Number 18605223
Status Pending
Filing Date 2024-03-14
First Publication Date 2025-09-18
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor Vinodkumar, Ashish

Abstract

Systems and methods are provided for generating metadata for an improved data structure that enables improvements to generative AI and LLM processing and use of the data. A system may receive a log file generated by an entity associated with a device and generate metadata of the log file that comprises origination data associated with the entity and location of the device. The system may store the metadata and content of the log file as a document object. A data structure may be generated using various data objects. For example, the system can generate a vector embedding object enriched with a temporal embedding, a positional embedding, or a hierarchy of the metadata. The system may initiate an action based on the vector embedding object.

IPC Classes  ?

  • G06F 16/17 - Details of further file system functions
  • G06F 16/13 - File access structures, e.g. distributed indices
  • G06F 16/185 - Hierarchical storage management [HSM] systems, e.g. file migration or policies thereof

72.

OPTIMIZED INNOVATIVE ALGORITHM FOR BLUETOOTH LOW ENERGY (BLE) HIGH ACCURACY DISTANCE MEASUREMENT (HADM) FOR INDOOR APPLICATIONS

      
Application Number 18605560
Status Pending
Filing Date 2024-03-14
First Publication Date 2025-09-18
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Yacoub, Ahmad
  • Moy, Todd
  • Hasnain, Farhan

Abstract

Systems and methods for locating a client device in a network using Bluetooth® Low Energy (BLE) is described herein. Upon determining an access point (AP) connected to the client device, an antenna of a network device may be selected based on an antenna polarization of the client device. A first and second channel frequencies for the client device may be selected. A first and second phase measurements may be determined based on the first and second channel frequencies. A distance of the client device from the AP may be determined according to a frequency difference between the first and second channel frequencies and a phase difference between the first and second phase measurements. An angle of direction of the client device to the AP may be determined. A location of the client device may be determined according to the distance and the angle of direction.

IPC Classes  ?

  • H04W 28/20 - Negotiating bandwidth
  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04W 72/0453 - Resources in frequency domain, e.g. a carrier in FDMA

73.

ROAMING DATA COLLECTION AMONG ACCESS POINTS

      
Application Number 18596930
Status Pending
Filing Date 2024-03-06
First Publication Date 2025-09-11
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Sun, Zhongguo
  • Shang, Xiaoding
  • Jin, Pengfei
  • Zhang, Haifeng

Abstract

In some examples, a first access point (AP) generates first potential target AP information identifying one or more APs to which an electronic device is able to roam from the first AP. The first AP sends the first potential target AP information to an aggregator AP that is associated with the first AP. The first AP receives, from the aggregator AP, a roaming monitoring instruction sent by the aggregator AP to one or more APs identified by second potential target AP information generated at a second AP, the roaming monitoring instruction specifying collection of roaming data for a given electronic device that has associated with the second AP.

IPC Classes  ?

74.

DISTRIBUTED GRAPH SAMPLING

      
Application Number 18601531
Status Pending
Filing Date 2024-03-11
First Publication Date 2025-09-11
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Dhakal, Aditya
  • Chalamalasetti, Sai Rahul
  • Gerstman, Liad
  • Milojicic, Dejan

Abstract

A distributed graph sampling system includes storage nodes that store a graph, a network switch that orchestrates accelerated sampling of the graph, and a compute node that processes a sample of the graph with a GNN. The graph sampling operations are distributed across the storage nodes. Each storage node may store a subgraph (e.g., a portion of the graph) and generate a sample of the subgraph.

IPC Classes  ?

  • G06N 3/10 - Interfaces, programming languages or software development kits, e.g. for simulating neural networks
  • H04L 12/64 - Hybrid switching systems

75.

LEARNING TO SIMULATE QUANTUM SYSTEMS: DYNAMICAL CIRCUIT CUTTING

      
Application Number 18787587
Status Pending
Filing Date 2024-07-29
First Publication Date 2025-09-11
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Johnson, Katherine Grace
  • Mohseni, Masoud
  • Zhan, Xin

Abstract

A method of simulating a quantum system that efficiently partitions quantum circuits to enable high-performance quantum computing utilizing multiple QPUs in parallel. The method comprises using a tensor network ansatz to represent the quantum system, partitioning and optimizing quantum circuits based on the TN ansatz, then using machine learning to optimize the TN parameters to minimize entanglement between partitions. The method operates in a hybrid quantum-classical environment, where information is shared between QPUs with existing HPC infrastructures.

IPC Classes  ?

  • G06N 10/60 - Quantum algorithms, e.g. based on quantum optimisation, or quantum Fourier or Hadamard transforms
  • G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
  • G06N 20/00 - Machine learning

76.

AGGREGATING SMALL REMOTE MEMORY ACCESS REQUESTS

      
Application Number 19218852
Status Pending
Filing Date 2025-05-27
First Publication Date 2025-09-11
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Roweth, Duncan
  • Alverson, Robert L.
  • Wichmann, Nathan L.
  • Lundberg, Eric P.

Abstract

A network interface card (NIC) receives a stream of commands, a respective command comprising memory-operation requests, each request associated with a destination NIC. The NIC buffers asynchronously the requests into queues based on the destination NIC, each queue specific to a corresponding destination NIC. When first queue requests reach a threshold, the NIC aggregates the first queue requests into a first packet and sends the first packet to the destination NIC. The NIC receives a plurality of packets, a second packet comprising memory-operation requests, each request associated with a same destination NIC and a destination core. The NIC buffers asynchronously the requests of the second packet into queues based on the destination core, each queue specific to a corresponding destination core. When second queue requests reach the threshold, the NIC aggregates the second queue requests into a third packet and sends the third packet to the destination core.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

77.

ACCESS CONTROL OF ELECTRONIC DEVICE FEATURE USING A CERTIFICATE

      
Application Number 18596925
Status Pending
Filing Date 2024-03-06
First Publication Date 2025-09-11
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Preimesberger, Lee A.
  • Kasheshian, Vartan Yosef
  • O'Connor, Grant Tavis

Abstract

In some examples, a controller of an electronic device receives a certificate sent from an access device that is connected to the electronic device, the certificate including a feature control information element that provides access control of an electronic device feature of the electronic device, the certificate issued by a certificate authority, where the electronic device feature of the electronic device is initially blocked from access. The controller validates the certificate using the representation of the security key hierarchy in the memory. Responsive to the validation of the certificate, the controller enables access to the electronic device feature by the access device based on the feature control information element in the certificate.

IPC Classes  ?

  • H04L 9/32 - Arrangements for secret or secure communicationsNetwork security protocols including means for verifying the identity or authority of a user of the system
  • G06F 21/62 - Protecting access to data via a platform, e.g. using keys or access control rules

78.

DYNAMIC ANALOG CONTENT ADDRESSABLE MEMORY

      
Application Number 18598873
Status Pending
Filing Date 2024-03-07
First Publication Date 2025-09-11
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Pedretti, Giacomo
  • Buonanno, Luca
  • Ignowski, James

Abstract

A dynamic analog content addressable memory (CAM) cell uses volatile memory to store a range. The dynamic analog CAM cell includes an upper bound circuit and a lower bound circuit. The upper bound circuit includes a first pull-down transistor and a first controlled current generator. The first controlled current generator is configured to store an upper bound of the range in a first dynamic memory circuit, and to activate the first pull-down transistor when an analog input value is greater than the upper bound of the range. The lower bound circuit includes a second pull-down transistor and a second controlled current generator. The second controlled current generator is configured to store a lower bound of the range in a second dynamic memory circuit, and to activate the second pull-down transistor when the analog input value is less than the lower bound of the range.

IPC Classes  ?

  • G11C 15/04 - Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
  • G11C 11/408 - Address circuits
  • G11C 11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches

79.

TRAFFIC BURST CAPACITY ALLOCATION

      
Application Number 18657504
Status Pending
Filing Date 2024-05-07
First Publication Date 2025-09-11
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Govindarao, Ravikumar
  • Sahu, Rupak Kumar
  • Damarla, Kranthi Kumar
  • Srinivas, Sriharsha
  • Badiger, Vishwanath

Abstract

In some examples, a protection system determines, based on monitoring a traffic volume in a computing environment, a baseline traffic threshold for the computing environment. The protection system allocates, based on a capacity of the protection system and the baseline traffic threshold, a burst threshold to the computing environment for adding a traffic burst capacity. The protection system determines a traffic integrity of data traffic in the computing environment based on a property of the data traffic. Based on the determined traffic integrity in the computing environment, the protection system allows additional traffic in the computing environment beyond the baseline traffic threshold up to the burst threshold.

IPC Classes  ?

  • H04L 47/80 - Actions related to the user profile or the type of traffic
  • H04L 43/067 - Generation of reports using time frame reporting
  • H04L 47/762 - Admission controlResource allocation using dynamic resource allocation, e.g. in-call renegotiation requested by the user or requested by the network in response to changing network conditions triggered by the network

80.

NETWORK FAULT DETECTION USING A MACHINE LEARNING MODEL

      
Application Number 18661928
Status Pending
Filing Date 2024-05-13
First Publication Date 2025-09-11
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Gupta, Gopal
  • Theogaraj, Isaac

Abstract

In some examples, a system receives a first representation of attributes associated with a network stack connected to an underlay network that couples a first system to a computing environment, where the network stack comprises a plurality of layers. The system receives a second representation of attributes associated with an overlay network provided over the underlay network. The system provides the first representation and the second representation to a machine learning model trained to detect a fault associated with communications between the first system and the computing environment. The machine learning model generates an output comprising a value representing a likelihood of a presence of the fault associated with the overlay layer or the underlay layer. Based on the output, the system initiates a remediation action to address the fault.

IPC Classes  ?

  • H04L 41/0604 - Management of faults, events, alarms or notifications using filtering, e.g. reduction of information by using priority, element types, position or time
  • H04L 41/0631 - Management of faults, events, alarms or notifications using root cause analysisManagement of faults, events, alarms or notifications using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
  • H04L 41/16 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using machine learning or artificial intelligence

81.

COMPENSATING SET SCREW FOR TERMINAL BLOCKS TO COMPENSATE FOR SETTLING OF MULTI-STRAND WIRE

      
Application Number 18591230
Status Pending
Filing Date 2024-02-29
First Publication Date 2025-09-04
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Scott, Michael Dustin
  • Rongstad, Robbie J.
  • Mascia, Robert Eugene

Abstract

A computing system includes one or more terminal blocks for terminating power wires, which may be used for delivering power to or distributing power within the computing system. A set screw is provided for each terminal block, with the set screw configured to hold a wire in the terminal block. At least one of the set screws is a compensating set screw. The compensating set screw has a set screw head, a set screw stem, a plunger movable along the stem, a spring mechanism between the head and the plunger, and a retainer to retain the plunger on the stem. The spring mechanism may push the plunger toward the wire, causing the plunger to follow the wire and maintaining pressure between the plunger and the power wire even as the power wire settles over time.

IPC Classes  ?

  • H01R 9/24 - Terminal blocks
  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack

82.

OPTICAL QUATERNARY CONTENT-ADDRESSABLE MEMORY AND ITS OPTICAL COMPUTING APPLICATIONS

      
Application Number 18915800
Status Pending
Filing Date 2024-10-15
First Publication Date 2025-09-04
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • London, Yanir
  • Buonanno, Luca
  • Pedretti, Giacomo
  • Van Vaerenbergh, Thomas

Abstract

Systems and methods are provided for devices and methods for implementing fully optical quaternary content addressable memory (O-QCAM). In examples, the O-QCAM includes a search input configured to convert a multi-wavelength input signal encoded with a search word into a plurality of search optical signals; a plurality of QCAM word entries, each QCAM word entry comprising a plurality of O-QCAM cells; and a plurality of photodetectors, each photodetector optically coupled to a results end of a respective output match waveguide of an QCAM word entry. Each O-QCAM cell can be configured to store a reject value and one or more of a logic ‘0’, a logic ‘1’, and a wildcard value.

IPC Classes  ?

  • G11C 15/00 - Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores

83.

COOLING INTERFACE FOR A PLUGGABLE MODULE

      
Application Number 18591149
Status Pending
Filing Date 2024-02-29
First Publication Date 2025-09-04
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Lunsman, Harvey John
  • Scott, Michael Dustin
  • Ferrer, Ernesto J.

Abstract

A cage for receiving a pluggable module comprises a plurality of plates including a lower plate, an upper plate, a left side plate disposed between the lower plate and the upper plate, and a right side plate disposed between the lower plate and the upper plate opposite the left side plate. A bay is defined by the plurality of plate and is sized to receive a pluggable module. The cage further includes one or more cooling interface modules. Each cooling interface module of the one or more cooling interface modules comprises a gap pad and a protective cover and is disposed such that the gap pad is adjacent to a given plate of the plurality of plates and the protective cover is adjacent to the bay.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

84.

HARDWARE-AGNOSTIC REST ENDPOINTS FOR ASYNCHRONOUS OPERATIONS

      
Application Number 18591924
Status Pending
Filing Date 2024-02-29
First Publication Date 2025-09-04
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor Fults, Derek Lee

Abstract

A system receives a request, via a representational state transfer (REST) application programming interface (API). The request includes: a search term for hostnames; a starting universal resource identifier (URI) associated with the hostnames; and a flag indicating use of members corresponding to the hostnames. The system obtains the hostnames by searching a database based on the search term. The system generates Hypertext Transfer Protocol (HTTP) requests based on the starting URI, the obtained hostnames, and members corresponding to a respective obtained hostname. The system transmits the generated HTTP requests asynchronously to endpoints based on the REST API and receives data from the endpoints in response to the first request indicating a GET command.

IPC Classes  ?

  • G06F 9/54 - Interprogram communication
  • G06F 16/955 - Retrieval from the web using information identifiers, e.g. uniform resource locators [URL]
  • H04L 67/02 - Protocols based on web technology, e.g. hypertext transfer protocol [HTTP]

85.

EXAMINING CPU INTERCONNECT BUSES IN A MULTIPROCESSOR SYSTEM

      
Application Number 18593199
Status Pending
Filing Date 2024-03-01
First Publication Date 2025-09-04
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Hsu, Hong-Jen
  • Lin, Chih-Kang
  • Chu, Chia-Wei

Abstract

A DMA controller of a peripheral switch is programmed to transfer memory contents to a switch memory including an instruction for a second processor. The instruction is sent from a second port of the switch coupled to a second peripheral lane of the second processor. Then, the contents are transferred to the switch memory using a first port of the switch coupled to a first peripheral lane of the first processor. The memory contents include first data transferred by the second processor to the first processor using a central processing unit (CPU) bus connection in response to the instruction.

IPC Classes  ?

  • G06F 13/28 - Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access, cycle steal

86.

MULTICAST DATA STREAM WITH IMPROVED USER EXPERIENCE

      
Application Number 18656305
Status Pending
Filing Date 2024-05-06
First Publication Date 2025-09-04
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Nandy, Tathagata
  • Radhakrishnabhat, Chethan Chavadibagilu
  • Muthukumar, Subramanian
  • Pearson, Mark A.

Abstract

A network device receives multicast data originating from a source device, wherein the network device is in communication with at least one client device. The system identifies traffic patterns associated with the multicast data and classifies the multicast data into categories based on the traffic patterns. The network device stores an ordered list of multicast groups previously joined by the client device. Responsive to determining that the client device requests to join a first multicast group, the network device sends a first join request for the client device to join a highest-ranking multicast group in the ordered list. Responsive to determining that the client device requests to leave a current multicast group and to join a new multicast group, the network device selects a second multicast group from the ordered list and sends a second join request for the client device to join the second multicast group.

IPC Classes  ?

  • H04L 12/18 - Arrangements for providing special services to substations for broadcast or conference
  • H04L 47/10 - Flow controlCongestion control

87.

NEAR LINEAR AUTOENCODERS FOR CLASS LOCALIZATION AND ANOMALY DETECTION

      
Application Number 18656924
Status Pending
Filing Date 2024-05-07
First Publication Date 2025-09-04
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Mopur, Satish Kumar
  • Perumal Vijayan, Gunalan
  • Bandopadhyay, Shounak

Abstract

Examples of the presently disclosed technology provide a “near linear” activation function for an autoencoder (AE). The “near linear” activation function may comprise a piecewise function comprising: (1) a linearly-sloped middle segment spanning a majority of a domain of the piece-wise near linear activation function; (2) a first end segment with a different slope than the linearly-sloped middle segment, wherein the first end segment commences at a lower boundary of the domain of the piece-wise near linear activation function and terminates at a first end of the linearly-sloped middle segment; and (3) a second end segment with a different slope than the linearly-sloped middle segment, wherein the second end segment commences at a second end of the linearly-sloped middle segment and terminates at an upper boundary of the domain of the piece-wise near linear activation function.

IPC Classes  ?

  • G06V 10/774 - Generating sets of training patternsBootstrap methods, e.g. bagging or boosting
  • G06N 3/0455 - Auto-encoder networksEncoder-decoder networks
  • G06T 7/00 - Image analysis
  • G06V 10/762 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using clustering, e.g. of similar faces in social networks
  • G06V 10/764 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using classification, e.g. of video objects
  • G06V 10/772 - Determining representative reference patterns, e.g. averaging or distorting patternsGenerating dictionaries
  • G06V 10/776 - ValidationPerformance evaluation
  • G06V 10/82 - Arrangements for image or video recognition or understanding using pattern recognition or machine learning using neural networks

88.

Drive carrier

      
Application Number 29868490
Grant Number D1091531
Status In Force
Filing Date 2022-12-05
First Publication Date 2025-09-02
Grant Date 2025-09-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Du, Yinggang
  • Kuehn, Keith J.

89.

Drive carrier

      
Application Number 29868489
Grant Number D1091540
Status In Force
Filing Date 2022-12-05
First Publication Date 2025-09-02
Grant Date 2025-09-02
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Du, Yinggang
  • Kuehn, Keith J.

90.

LOCAL DEVICE IDENTIFIERS IN A STORAGE NETWORK

      
Application Number 18663162
Status Pending
Filing Date 2024-05-14
First Publication Date 2025-08-28
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Puttagunta, Krishna Babu
  • Manchanapura, Chandrashekar Chikkalingaiah
  • Malkin, Kirill

Abstract

Example implementations relate to storage networks. In some examples, a controller receives a packet sent from a source device to a destination device. The controller reads a local identifier of the source device at a first offset in the packet, where a global identifier of the source device is located at a second offset that is larger than the first offset. The controller also reads a local identifier of the destination device at a third offset in the packet, where a global identifier of the destination device is located at a fourth offset that is larger than the third offset. In response to a determination that the combination of the local identifiers of the source and destination devices matches a predefined zone rule, the controller causes a delivery of the packet to the destination device.

IPC Classes  ?

  • H04L 67/1097 - Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
  • H04L 45/00 - Routing or path finding of packets in data switching networks
  • H04L 67/141 - Setup of application sessions

91.

NETWORK ADDRESS ASSIGNMENT FAILOVER

      
Application Number 18754591
Status Pending
Filing Date 2024-06-26
First Publication Date 2025-08-28
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Hegde, Sanjay Kaniyoor Surendra
  • Theogaraj, Isaac
  • Nasikkar, Ashutosh

Abstract

In some examples, a first controller of a cluster of controllers provides a first controller network address assignment service for a first collection of client devices. The first controller detects a communication interruption with a second controller of the cluster of controllers, and determines whether a second controller network address assignment service of the second controller is unavailable, based on a determination of whether a network address assignment was performed within a specified recent time interval at the second controller. Based on determining that the second controller network address assignment service of the second controller is unavailable, the first controller transitions to a partner down state as part of a network address assignment failover in which the first controller provides the first controller network address assignment service for the first collection of client devices and for a second collection of client devices associated with the second controller.

IPC Classes  ?

  • H04L 41/0663 - Performing the actions predefined by failover planning, e.g. switching to standby network elements
  • H04L 61/4552 - Lookup mechanisms between a plurality of directoriesSynchronisation of directories, e.g. metadirectories
  • H04L 61/5053 - Lease timeRenewal aspects

92.

PHOTONIC DEVICES HAVING A FIELD-EFFECT TRANSISTOR (FET)

      
Application Number 18586023
Status Pending
Filing Date 2024-02-23
First Publication Date 2025-08-28
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Tossoun, Bassem
  • Kurczveil, Geza
  • Liang, Di
  • Cheung, Stanley

Abstract

Systems and methods are provided for optical devices having a field-effect transistor (FET) for optical tuning. Examples include a device layer formed on a substrate and comprising a first material, and a FET formed on the substrate. The MOSFET comprises a drain formed in the device layer comprising a first doped region, a source formed in the device layer comprising a second doped region, a gate comprising a second material formed on the device layer, and a conductive channel formed in the device layer based on a voltage bias applied to the gate. An optical waveguide is formed between the gate and the conductive channel.

IPC Classes  ?

  • G02F 1/225 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour by interference in an optical waveguide structure
  • G02F 1/21 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour by interference

93.

VARIABLE FLOW LIQUID-COOLED COOLING MODULE

      
Application Number 19209390
Status Pending
Filing Date 2025-05-15
First Publication Date 2025-08-28
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Lunsman, Harvey J.
  • Cader, Tahir

Abstract

Example implementations relate to a cooling module, and a method of cooling an electronic circuit module. The cooling module includes first and second cooling components fluidically connected to each other. The first cooling component includes a first fluid channel having supply, return, and body sections, and a second fluid channel. The second cooling component includes an intermediate fluid channel. The body section is bifurcated into first and second body sections, and the first and second body sections are further merged into a third body section. The supply section is connected to the first and second body sections. The return section is connected to the third body section and the intermediate fluid channel via an inlet fluid-flow path established between the first and second cooling components. The second fluid channel is connected to the intermediate fluid channel via an outlet fluid-flow path established between the first and second cooling components.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

94.

Efficient event-driven memory snapshots in embedded systems

      
Application Number 18590142
Grant Number 12399784
Status In Force
Filing Date 2024-02-28
First Publication Date 2025-08-26
Grant Date 2025-08-26
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Mansfield, Ryan M.
  • Cuadra Chamorro, Pedro Joaquin

Abstract

An embedded system in a host computer is provided. During operation, the embedded system can detect an event in the embedded system. Here, the event can trigger the generation of a memory snapshot of the embedded system. The embedded system can then determine a set of memory segments of a memory in the embedded system for inclusion in the memory snapshot. Subsequently, the embedded system can insert a set of descriptors corresponding to the set of memory segments into the memory. Here, a respective descriptor indicates a memory segment associated with a core dump from the embedded system. The embedded system can send a notification to the host computer to generate the memory snapshot comprising the set of memory segments based on the set of descriptors.

IPC Classes  ?

  • G06F 11/14 - Error detection or correction of the data by redundancy in operation, e.g. by using different operation sequences leading to the same result

95.

POWER MANAGEMENT OF ACCESS POINTS IN A NETWORK

      
Application Number 18442260
Status Pending
Filing Date 2024-02-15
First Publication Date 2025-08-21
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Neacsu, Laura Silvia
  • Wadleigh, Jason
  • Hose, Christopher

Abstract

An example method and a network management system for reducing power consumption by access points (APs) deployed in a network are presented. The network management system identifies a candidate AP for power saving from the plurality of APs based on telemetry data and using a machine learning model. The telemetry data includes information about client associations and network activity of the plurality of APs. Further, the network management system infers a power-saving transition for the candidate AP based on the telemetry data using the machine learning model. Then, as per the power-saving transition, the network management system operates the candidate AP in a power-saving mode.

IPC Classes  ?

96.

Removable OCP module with PCIe slots

      
Application Number 18442583
Grant Number 12457700
Status In Force
Filing Date 2024-02-15
First Publication Date 2025-08-21
Grant Date 2025-10-28
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Chiu, Chui Ching
  • Chiang, Chih-Wei
  • Chao, Hsueh-Yu

Abstract

A removable module, a system and a method. The removable module comprising a PCB having an OCP NIC form factor, an OCP edge connector comprising a plurality of pins on an edge of the PCB, wherein the OCP edge connector is configured to mate with an OCP board connector of a primary system board of the computing system in an installed state of the removable module in the computing system, a NIC chip mounted to the PCB and communicably connected to the OCP edge connector, at least one communication port mounted to the PCB and communicably connected to the NIC chip and a first PCIe slot mounted on the PCB and communicably connected to the OCP edge connector, wherein the NIC chip and the first PCIe slot are configured to be communicably connected to the primary system board via the OCP edge connector.

IPC Classes  ?

  • G06F 1/16 - Constructional details or arrangements
  • G06F 1/18 - Packaging or power distribution
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 5/00 - Casings, cabinets or drawers for electric apparatus
  • H05K 7/00 - Constructional details common to different types of electric apparatus
  • H05K 7/10 - Plug-in assemblages of components

97.

GRAPH BASED REPRESENTATION OF DATA CENTERS TO PREDICT ENERGY CONSUMPTION AND CARBON EMISSION OF THE DATA CENTERS DURING OPERATION

      
Application Number 18582192
Status Pending
Filing Date 2024-02-20
First Publication Date 2025-08-21
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Rattihalli, Gourav
  • Raith, Philipp
  • Milojicic, Dejan S.

Abstract

A method includes generating a first data center graph including a plurality of host graphs, the host graphs representing resources of hosts of a data center, combining the first data center graph with an application signature graph to produce a second data center graph, the second data center graph representing the resource utilization of an application when running on the data center, predicting an energy consumption of the application when running on the data center by processing the second data center graph using a graph neural network (GNN), and scheduling the application on the hosts of the data center based on the predicted energy consumption of the application.

IPC Classes  ?

  • G06Q 10/0637 - Strategic management or analysis, e.g. setting a goal or target of an organisationPlanning actions based on goalsAnalysis or evaluation of effectiveness of goals
  • G06Q 10/067 - Enterprise or organisation modelling

98.

Data migration using a consistency group

      
Application Number 18751594
Grant Number 12393606
Status In Force
Filing Date 2024-06-24
First Publication Date 2025-08-19
Grant Date 2025-08-19
Owner Hewlett Packard Enterprise Development LP (USA)
Inventor
  • Vaddagiri, Murali
  • Kumar, Krishna Karoor
  • Loos, Joseph Raymond

Abstract

Example implementations relate to computer data storage. In some examples, a controller establishes a migration link between a first storage device and a second storage device, and create a consistency group including replicating volumes and a control volume stored on the first storage device. The controller initiates, based on the consistency group, a data copy from the replicating volumes to proxy volumes on the second storage device. In response to a completion of the data copy from the replicating volumes to the proxy volumes, the controller initiates a replication of the proxy volumes to a second replication device. Further, in response to a completion of the replication of the proxy volumes, the controller transfers a copy of the control volume to the second storage device, where the transfer of the copy of the control volume completes the migration of the consistency group.

IPC Classes  ?

  • G06F 16/27 - Replication, distribution or synchronisation of data between databases or within a distributed database systemDistributed database system architectures therefor
  • G06F 16/21 - Design, administration or maintenance of databases
  • G06F 16/23 - Updating

99.

MEDIA ACCESS CONTROL (MAC) RANDOMIZED BONJOUR SERVERS IDENTIFICATION AND POLICY APPLICATION

      
Application Number 18616401
Status Pending
Filing Date 2024-03-26
First Publication Date 2025-08-14
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Pandey, Anjanish
  • Vaidya, Suresh
  • Gopi, Vinay
  • Nair, Arun Prabhakaran
  • Bangalore, Vikas
  • Kunda, Thirumala Baladas

Abstract

A device may obtain a username upon authentication of the device. The username of the device may be associated with the device's MAC address, and used with any other identifier of the device, including a service identifier provided to the device by a service system (e.g., AirGroup), to generate a unique identifier of the device. The unique identifier of the device may maintain the device's properties and various identifications (e.g., MAC address, username, service identification, etc.). The unique identifier of the device may be used to properly identify the device by utilizing the device's properties and various identifications, and used to establish connections with other devices. In this way, a device supporting MAC randomization may be properly identified by verifying the device's properties and other identifications with a list of stored unique identifiers of devices, allowing the device to maintain established connections with other devices without the performance of reauthentication.

IPC Classes  ?

  • H04L 9/40 - Network security protocols
  • H04L 61/4511 - Network directoriesName-to-address mapping using standardised directoriesNetwork directoriesName-to-address mapping using standardised directory access protocols using domain name system [DNS]
  • H04L 101/622 - Layer-2 addresses, e.g. medium access control [MAC] addresses

100.

CREATING AND MANAGING VIRTUAL ACCESS POINTS FOR A PLURALITY OF MULTIPLE BASIC SERVICE SET IDENTIFIER GROUPS

      
Application Number 18438622
Status Pending
Filing Date 2024-02-12
First Publication Date 2025-08-14
Owner HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (USA)
Inventor
  • Ren, Jinzhao
  • Jia, Xuguang
  • Fu, Xiaoyang
  • Wang, Chunfeng

Abstract

Examples described herein relate to a method for creating and managing a plurality of Multiple Basic Service Set Identifier (MBSSID) groups. The method may include configuring the MBSSID groups by setting a Maximum BSSID indicator to a value such that each of the plurality of MBSSID groups is allowed to utilize VAP slots up to a VAP capacity of the AP so long as the VAP capacity of the AP is not fully exhausted. Accordingly, when a request to create a VAP in a given MBSSID group is received, and the VAP capacity of the AP is not fully exhausted, the AP may create the VAP at any available VAP slot. The VAP is created such that a BSSID of the VAP is determined based on the Maximum BSSID indicator and a BSSID index relative to a transmit VAP of the given MBSSID group.

IPC Classes  ?

  • H04W 28/18 - Negotiating wireless communication parameters
  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04W 28/06 - Optimising, e.g. header compression, information sizing
  • H04W 72/0446 - Resources in time domain, e.g. slots or frames
  • H04W 72/121 - Wireless traffic scheduling for groups of terminals or users
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