Cirrus Logic, Inc.

United States of America

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[Owner] Cirrus Logic, Inc. 1,803
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2026 (YTD) 3
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H04R 3/00 - Circuits for transducers 305
H04R 29/00 - Monitoring arrangementsTesting arrangements 170
G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase 165
H03F 3/217 - Class D power amplifiersSwitching amplifiers 161
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1.

Output voltage overshoot-based operating parameter adjustment in a switched-power converter circuit

      
Application Number 18215919
Grant Number 12633827
Status In Force
Filing Date 2023-06-29
First Publication Date 2026-05-19
Grant Date 2026-05-19
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Maru, Siddharth
  • Gallina, Pietro
  • Mccoy, Bryan W.

Abstract

A method implemented by a control circuit adaptively controls operating parameters of a switched-mode power supply to compensate for variation in circuit parameters of the switched-mode power supply, such as variation of: an inductance of an inductor, a capacitance of an output capacitor, and variation of a load capacitance coupled to an output of the switched-mode power supply. The control circuit includes a comparison circuit that determines whether or not an output voltage of the switched-mode power supply has exceeded an overshoot threshold, and a switching control circuit that has an input coupled to an output of the comparison circuit. The switching control circuit adaptively adjusts a control variable that controls one or more operational parameters of the switched-mode power supply in conformity with a relationship between a value of the output voltage and a value of the overshoot threshold in response to the output of the comparison circuit.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/088 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices

2.

Measurement system with correction for temperature-based converter feedback error

      
Application Number 18796615
Grant Number 12647124
Status In Force
Filing Date 2024-08-07
First Publication Date 2026-02-12
Grant Date 2026-06-02
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Roy, Tonmoy
  • Klarenbeek, Johnny
  • Vijayan, Ashwin
  • King, Eric J.
  • Melanson, John L.
  • Ahuja, Rishi
  • Mehta, Jaiminkumar

Abstract

Integrating ADC based sensing systems that convert the output of a measurement sensor to a digital value avoid conversion errors caused by sensor temperature variation during the conversion cycle. The systems may either include a primary integrating ADC and a residue ADC, and adjust rate of operation of the ADCs independently according to a sensed temperature of the measurement sensor, or the systems may differentiate an output of the residue ADC, and apply a temperature correction in accordance with the sensed temperature of the sensor to an output of the differentiator, integrate the temperature-corrected output of the differentiator and then combine the result with the output of the primary integrating ADC.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise
  • H03M 3/00 - Conversion of analogue values to or from differential modulation

3.

Modulator circuits

      
Application Number 18766958
Grant Number 12671372
Status In Force
Filing Date 2024-07-09
First Publication Date 2026-01-15
Grant Date 2026-06-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Melanson, John L.

Abstract

This application relates to modulator circuits for driving switching output stages in a class-D amplifier system or the like. The switching output stage has an output node and high-side and low-side switches for selectively connecting the output node to respective high-side and low-side voltages and is configured to be operable in a continuous conduction mode of operation, in which there is always an output current flowing throughout a switching cycle and also in a discontinuous conduction mode of operation where there is a period in each switching cycle where there is no output current. The modulator circuit comprises a compensator operable to apply compensation, in the discontinuous conduction mode of operation, to at least partly compensate for a non-linearity when operating in the discontinuous conduction mode.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H04R 3/00 - Circuits for transducers

4.

Methods and circuitry for calibration

      
Application Number 18783725
Grant Number 12500593
Status In Force
Filing Date 2024-07-25
First Publication Date 2025-12-16
Grant Date 2025-12-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Maniyar, Aadilhussain
  • Tonge, Peter J.
  • Tomar, Rohit
  • Hatfield, Robert J.

Abstract

Circuitry for processing an input signal from a sensor, the circuitry comprising: an input configured to receive the input signal; bias circuitry configured to apply a bias to the input signal to obtain a biased input signal; a gain stage configured to apply a gain to the biased input signal to obtain an amplified input signal; an analog-to-digital converter (ADC) configured to convert the amplified input signal to a digital output signal; wherein, during a calibration phase, the control circuitry is configured to: control the bias circuitry to apply a macro offset to the input signal, the macro offset to bring the amplified input signal within a dynamic range of the ADC; and determine a micro offset to be applied during a measurement phase of the sensor based on the macro offset and the digital output signal; and wherein during the measurement phase, the control circuitry is configured to control the bias circuitry to disable application of the macro offset and apply the micro offset to the input signal, the macro offset having a greater magnitude than the micro offset.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H04N 17/00 - Diagnosis, testing or measuring for television systems or their details
  • H04N 25/78 - Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

5.

Parametric-insensitive edge rate control in switched-power circuits with tailored power supply voltage sensitivity

      
Application Number 17982826
Grant Number 12483201
Status In Force
Filing Date 2022-11-08
First Publication Date 2025-11-25
Grant Date 2025-11-25
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Jain, Nishant
  • Parupalli, Vamsikrishna

Abstract

Techniques for reducing electromagnetic interference (EMI) in a switching amplifier circuit, control edge-rate with reduced sensitivity to process and temperature variations and that is reduced with increasing power supply voltage. The techniques control current levels in a pre-driver stage that drives an output driver of a switching amplifier circuit, according to a bias control. A first slope of a variation of the bias control with respect to a power supply voltage of the switching amplifier circuit over a first portion of a range of variation of the power supply voltage has a direction opposite a second slope of the variation of the reference output current with respect to the power supply voltage over a second portion of the range of variation of the power supply voltage. The resulting operation reduces electromagnetic interference generated by the driver over the second portion of the range of variation of the power supply voltage.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 1/30 - Modifications of amplifiers to reduce influence of variations of temperature or supply voltage
  • H03F 3/24 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages

6.

Modulator circuits

      
Application Number 18654041
Grant Number 12640968
Status In Force
Filing Date 2024-05-03
First Publication Date 2025-11-06
Grant Date 2026-05-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Robinson, Michael

Abstract

This application relates to methods and apparatus for outputting a modulated signal for driving a switching output stage. A modulator circuit includes a digital modulator that receives an input signal modified by a correction signal and outputs the modulated signal. A feedback node receives a feedback signal of the output of the switching output stage and a first filter receives and filters an inverted version of the modulated signal to generate a reference signal, such that the reference signal has gain and phase matching to the feedback signal. The reference signal and the feedback signal are both applied to a summation node to generate an analog correction signal which is input to an ADC. An error loop filter is configured to filter the ADC output to generate the digital correction signal.

IPC Classes  ?

  • H04L 25/49 - Transmitting circuitsReceiving circuits using code conversion at the transmitterTransmitting circuitsReceiving circuits using predistortionTransmitting circuitsReceiving circuits using insertion of idle bits for obtaining a desired frequency spectrumTransmitting circuitsReceiving circuits using three or more amplitude levels

7.

Sigma-delta modulator with residue converter for low-offset measurement system

      
Application Number 18637821
Grant Number 12627314
Status In Force
Filing Date 2024-04-17
First Publication Date 2025-10-23
Grant Date 2026-05-12
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • Thomsen, Axel
  • Kozak, Mucahit
  • Wilson, Paul
  • King, Eric J.

Abstract

A signal processing system may include a sensor readout channel configured to convert an electronic signal into a digital quantity. The sensor readout channel may include a sigma-delta modulator having a modulator input and a modulator output, first system-level chopping switches located at the modulator input, an auxiliary path comprising an analog-to-digital converter (ADC) having an auxiliary path input and an auxiliary path output, the auxiliary path input configured to receive as its input signal a signal output by a memory element of the sigma-delta modulator, second system-level chopping switches located downstream of the sigma-delta modulator and the auxiliary path, and a signal combiner configured to combine a modulator output signal generated by the sigma-delta modulator with an auxiliary path output signal generated by the auxiliary path to generate a combined output signal.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • G01R 19/22 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using conversion of AC into DC

8.

Delay locked loops

      
Application Number 18627928
Grant Number 12438690
Status In Force
Filing Date 2024-04-05
First Publication Date 2025-10-07
Grant Date 2025-10-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Perry, Ivan
  • Mortimore, Christopher P.
  • Prior, Morgan T.
  • Samanta, Ishita

Abstract

This application relates to methods and apparatus for delay locked loops (DLLs). A DLL circuit includes a variable delay line, a phase detector and a delay controller. The DLL circuit is operable in a DLL mode in which a reference clock signal is input to the variable delay line and the delay controller controls a delay setting to achieve phase lock between the reference signal and an output signal. The DLL circuit is also operable in a frequency-locked-loop (FLL) mode, in which part of variable delay line is configured as a controlled oscillator to provide an oscillator signal, a frequency monitor determines a frequency relationship between the reference clock signal and the oscillator signal and the delay controller controls the delay setting to achieve frequency lock. The DLL circuit may configured to operate in the frequency-locked-loop mode on start-up and then transition to the DLL mode.

IPC Classes  ?

  • H04L 7/00 - Arrangements for synchronising receiver with transmitter

9.

Power converter having non-linear compensation for variable source impedance

      
Application Number 18667387
Grant Number 12633825
Status In Force
Filing Date 2024-05-17
First Publication Date 2025-09-25
Grant Date 2026-05-19
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Lawrence, Jason W.
  • Mackay, Graeme G.
  • Akram, Hasnain

Abstract

A power converter circuit provides stable operation over wide ranges of power source impedance supplying energy to the power converter circuit. The power converter circuit includes an input terminal for receiving energy from an external power source, and a switching converter circuit that receives an input current from the input terminal at an input terminal voltage level and produces an output current or voltage. The switching converter circuit receives a control variable that sets a level of the input current drawn from the input terminal. The power converter circuit also includes a control circuit that determines an indication of an impedance or a change in impedance between the external power source and the input terminal, and generates the control variable in conformity therewith, so that a voltage drop between the external power source and the input terminal is limited by adjustment of the control variable.

IPC Classes  ?

  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • G05F 1/575 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection

10.

Switching converter system

      
Application Number 18597295
Grant Number 12683501
Status In Force
Filing Date 2024-03-06
First Publication Date 2025-09-11
Grant Date 2026-07-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Shukla, Hemant
  • Morgan, Ross C.
  • Blyth, Malcolm
  • Kubiak, Beata K
  • Soell, Sven
  • Black, Angus
  • Melanson, John L.

Abstract

A switching converter system comprising a first converter phase and a second converter phase, the switching converter system being operable in: a power conversion mode in which the first and second converter phases are operative to generate a multi-phase output voltage at an output of the switching converter circuit; and a calibration mode in which the first converter phase is operative as a reference supply for the second converter phase to cause a flow of current between the first and second converter phases to enable detection of a characteristic of each of the first and second converter phases.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion

11.

Binary inverter circuits with configurable threshold voltages

      
Application Number 18440796
Grant Number 12647115
Status In Force
Filing Date 2024-02-13
First Publication Date 2025-08-14
Grant Date 2026-06-02
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Abusleme Hoffman, Angel C.
  • Campeny, Agustin R.
  • Melanson, John L.

Abstract

Reduced delay and improved threshold tracking over PVT in a comparator input circuit and comparator are provided by circuits that include an inverter stage having a first complementary pair of transistors connected in a push-pull configuration. An input of the inverter stage is coupled to the gates of the first complementary pair of transistors, and an output of the inverter is coupled to the drains of the first complementary pair of transistors. The circuits also include one or more first degeneration transistors coupled between a source of one of the first complementary pair of transistors and a power supply rail of the circuit, and a reference circuit with an output coupled to one or more gates of the first degeneration transistors. The reference circuit controls the one or more first degeneration transistors to cause the inverter stage to have a threshold voltage equal to a threshold control voltage.

IPC Classes  ?

  • H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
  • H03K 19/00 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits
  • H03K 19/003 - Modifications for increasing the reliability
  • H03K 19/017 - Modifications for accelerating switching in field-effect transistor circuits
  • H03K 19/0948 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET using CMOS

12.

Average inductor charging current measurement in a switched-mode power supply using switched-capacitor charge sharing

      
Application Number 18204595
Grant Number 12381468
Status In Force
Filing Date 2023-06-01
First Publication Date 2025-08-05
Grant Date 2025-08-05
Owner CIRUS LOGIC, INC. (USA)
Inventor
  • Alevoor, Shashank
  • Gallina, Pietro
  • Ray, Abhishek
  • Parasuram, Vivek
  • Gupta, Chanchal
  • Pagano, Rosario

Abstract

Techniques for measuring average inductor charging current in a switched-power circuit avoid incurring measurement delay or a requirement of a complex filter. An inductor charging current measurement circuit coupled to a power output stage of the switched-power circuit measures an average charging current in an inductor of the switched-power circuit using pair of capacitors to sample an output voltage of the power output stage at different cycle times of an inductor current waveform. The measurement circuit includes a switch that connects the pair of capacitors together to provide a measurement indicative of the average inductor charging current by sharing charge between the first capacitor and the second capacitor to provide the measurement voltage. The provided measurement voltage is indicative of an average of an estimated peak and an estimated valley of the inductor current waveform, which may be used to make determinations regarding a magnitude of the load current.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion

13.

Systems and methods for precharging driver circuitry for an analog-to-digital converter

      
Application Number 18420033
Grant Number 12470230
Status In Force
Filing Date 2024-01-23
First Publication Date 2025-07-24
Grant Date 2025-11-11
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Thomsen, Axel
  • Melanson, John L.

Abstract

An ADC may include an analog front end (AFE) configured to receive an analog input signal and sample the input signal to generate an analog sampled signal comprising a plurality of analog samples and conversion circuitry configured to convert each analog sample to a respective digital sample during a conversion phase. The AFE may include an amplifier configured to receive and buffer the input signal to generate an analog output signal and sampling circuitry configured to sample each of the plurality of analog output samples onto a sampling capacitor during a sampling phase. The AFE may also include precharging circuitry configured to, during the conversion phase, track the analog input signal and store a charge on a precharging capacitor, the charge based on the analog input signal, and during a precharging transfer phase, transfer at least a portion of the charge stored on the precharging capacitor to the sampling capacitor.

IPC Classes  ?

14.

Driver stage short circuit detection

      
Application Number 17496220
Grant Number 12360175
Status In Force
Filing Date 2021-10-07
First Publication Date 2025-07-15
Grant Date 2025-07-15
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zanbaghi, Ramin
  • Huynh, Kim

Abstract

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a plurality of sensors, each sensor configured to sense a current associated with a respective one of the first high-side switch, second high-side switch, first low-side switch, and second low-side switch. The system may also include short-circuit detection circuitry configured to determine a presence and a location of a short circuit in the Class-D stage based on the sensed currents.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • G01R 19/155 - Indicating the presence of voltage
  • G01R 31/52 - Testing for short-circuits, leakage current or ground faults

15.

Circuitry for measurement of electrochemical cells

      
Application Number 18390269
Grant Number 12592710
Status In Force
Filing Date 2023-12-20
First Publication Date 2025-06-26
Grant Date 2026-03-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Deas, James T.

Abstract

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: a converter, comprising: a first converter input configured to receive the analyte signal; a second converter input; and a converter output configured to output a converted analyte signal, the converter configured to generate the converted analyte signal in dependence on the analyte signal; a loop filter configured to filter a signal derived from the converted analyte signal to obtain a filtered analyte signal at a filter output; and a feedback path between the filter output and the second converter input.

IPC Classes  ?

  • H03M 1/12 - Analogue/digital converters
  • H03M 1/66 - Digital/analogue converters
  • H03M 3/00 - Conversion of analogue values to or from differential modulation

16.

Circuitry for measurement of electrochemical cells

      
Application Number 18538535
Grant Number 12663483
Status In Force
Filing Date 2023-12-13
First Publication Date 2025-06-19
Grant Date 2026-06-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Motion, Claire

Abstract

Circuitry for monitoring a characteristic of a battery cell integrated into a wearable device, the circuitry configured to: upon installation of the battery cell into the wearable device: obtaining a first signal from the battery cell; and upon activation of the wearable device after installation of the battery cell: obtain a second signal from the battery cell; and determine a characteristic of the battery cell based on the first signal and the second signal.

IPC Classes  ?

  • G01R 31/392 - Determining battery ageing or deterioration, e.g. state of health
  • G01K 3/00 - Thermometers giving results other than momentary value of temperature
  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01R 31/396 - Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery

17.

Frequency band avoidance in an on-demand switched-power converter circuit

      
Application Number 18325036
Grant Number 12316217
Status In Force
Filing Date 2023-05-29
First Publication Date 2025-05-27
Grant Date 2025-05-27
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Mccoy, Bryan W.
  • Maru, Siddharth
  • Shemsedini, Alban

Abstract

A method implemented by a control circuit reduces electromagnetic interference (EMI) generation in a switched-mode power supply. The power supply adjusts operating frequency in response to a change in operating condition, and the method avoids certain bands of frequencies, for which switching should be avoided to avoid generating EMI in the band(s). The method includes determining a disallowed cycle time period range corresponding to the band(s) of frequencies by detecting that a switching event for the adjusted operating frequency would cause a switching cycle period to be within the disallowed time period range, and in response, preventing switching of the switched-mode power supply that would cause an end of a switching cycle to occur within the disallowed cycle time period range, and permitting switching of the switched-mode power supply that would cause the end of the switching cycle to occur outside of the disallowed cycle time period range.

IPC Classes  ?

  • H02M 1/44 - Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

18.

Audio artifact reduction in universal audio jack (UAJ) interface circuits

      
Application Number 18500224
Grant Number 12585423
Status In Force
Filing Date 2023-11-02
First Publication Date 2025-05-08
Grant Date 2026-03-24
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Fan, Gaofeng
  • Cai, Qi
  • Bowlerwell, John B.
  • Turkson, Richard
  • Bhattacharya, Anindya
  • Kumar, Bhoodev

Abstract

Circuit techniques reduce or prevent audible artifacts in a Universal Audio Jack (UAJ) interface circuit, improving handling of mis-configuration/mis-attachment of devices. The interface includes at least one terminal for accepting an audio input signal or providing an audio line output signal coupled to an input or output of a first audio circuit. The first audio circuit operates from a low voltage domain and receives the audio input signal or provides the audio line output signal. A second circuit operates from a higher voltage domain and a switching circuit couples the at least one terminal to the second circuit. The output is slew-rate controlled to control a transition time of the output, so that audible artifacts in the audio input signal or the audio line output signal that could be generated by the switching circuit connecting the second circuit to the at least one terminal are avoided.

IPC Classes  ?

19.

Far field interference cancellation for resistive-inductive-capacitive sensors

      
Application Number 16299648
Grant Number 12295102
Status In Force
Filing Date 2019-03-12
First Publication Date 2025-05-06
Grant Date 2025-05-06
Owner Cirrus Logic Inc. (USA)
Inventor
  • You, Zhong
  • Marchais, Emmanuel
  • Kratsas, Robert G.
  • Doy, Anthony S.

Abstract

A method may include forming an inductor comprising a plurality of inductor coils comprising a plurality of first inductor coils and a plurality of second inductor coils, each inductor coil comprising a spiraling wire of electrically-conductive material wherein the wire of electrically-conductive material is arranged substantially in a plane, wherein the plurality of first inductor coils and the plurality of second inductor coils are electrically coupled to one another and arranged with respect to one another such that within the plane, electrical current flowing through the inductor flows clockwise in the first inductor coils, within the plane, electrical current flowing through the inductor flows counterclockwise in the second inductor coils, each first inductor coil is adjacent to at least one second inductor coil, and each second inductor coil is adjacent to at least one first inductor coil.

IPC Classes  ?

  • H05K 1/16 - Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
  • G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
  • H01F 5/00 - Coils
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

20.

Circuitry for measurement of electrochemical cells

      
Application Number 18481481
Grant Number 12442846
Status In Force
Filing Date 2023-10-05
First Publication Date 2025-04-10
Grant Date 2025-10-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Caporale, Salvatore

Abstract

Circuitry for determining one or more characteristics of an electrochemical cell comprising a first working electrode, a second working electrode and a counter electrode, the circuitry comprising: drive circuitry configured to: apply a first stimulus to the first working electrode; apply a compensation stimulus to one or more of the first working electrode, the second working electrode and the counter electrode; measurement circuitry configured to: measure a first signal at the first working electrode; and measure a second signal at the second working electrode; and processing circuitry configured to: determine the one or more characteristics of the electrochemical cell based on the first signal or the second signal, wherein the compensation stimulus is applied to compensate for cross talk between the first working electrode and the second working electrode.

IPC Classes  ?

  • G01N 33/543 - ImmunoassayBiospecific binding assayMaterials therefor with an insoluble carrier for immobilising immunochemicals
  • G01N 27/327 - Biochemical electrodes
  • G01R 27/16 - Measuring impedance of element or network through which a current is passing from another source, e.g. cable, power line

21.

Power management system with distributed error feedback

      
Application Number 18730943
Grant Number 12587101
Status In Force
Filing Date 2023-02-03
First Publication Date 2025-03-27
Grant Date 2026-03-24
Owner Cirrus Logic Inc. (USA)
Inventor You, Zhong

Abstract

A power management integrated circuit (PMIC) may have a loop controller configured to receive a first error signal from a first driver IC having a first driver powered from a supply voltage and configured to drive a first output signal responsive to a first input signal and a first error detector configured to generate the first error signal based between the supply voltage as detected locally to the first driver IC and a first reference voltage associated with the first driver, receive a second error signal from a second driver IC analogous to the first driver IC, and regulate the supply voltage based on the first and second error signals.

IPC Classes  ?

  • H02M 3/16 - Conversion of DC power input into DC power output without intermediate conversion into AC by dynamic converters

22.

Systems and methods for computing accurate load impedance in the presence of measurement accuracy-reducing events

      
Application Number 18469101
Grant Number 12608061
Status In Force
Filing Date 2023-09-18
First Publication Date 2025-03-20
Grant Date 2026-04-21
Owner Cirrus Logic Inc. (USA)
Inventor
  • Deo, Sachin
  • Hemkumar, Nariankadu
  • May, Mark
  • Persha, Akhilesh
  • Smith, Eric B.
  • Shannon, Donelson A.

Abstract

A system may include a first controller and a second controller communicatively coupled to the first controller via a bidirectional communication channel and configured to drive a load in accordance with a target current signal, sample a load voltage of the load at a sample rate substantially slower than a time duration of electrical transients of the load, calculate a resistance of the load based on a current signal and the load voltage and communicate information indicative of the resistance to the first controller at a time interval substantially slower than the time duration of electrical transients of the load, detect when one or more accuracy-reducing events associated with the system occur, wherein an accuracy-reducing event is one which negatively affects accuracy of calculation of the resistance, and modify the information provided to the first controller when one or more accuracy-reducing events occur.

IPC Classes  ?

  • G06F 1/26 - Power supply means, e.g. regulation thereof
  • G01R 27/08 - Measuring resistance by measuring both voltage and current

23.

Voltage monitoring of switching drivers

      
Application Number 18455313
Grant Number 12500601
Status In Force
Filing Date 2023-08-24
First Publication Date 2025-02-27
Grant Date 2025-12-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Robinson, Michael

Abstract

This application relates to methods and apparatus for voltage monitoring of switching drivers. A modulator is configured to receive a modulator input signal and to controlling switching of an output stage of the switching driver to generate a first drive signal. A voltage monitor is configured to receive a first digital signal tapped from the modulator and to generate an indication of output voltage of the first drive signal from the first digital signal by controllably applying an adjustment from the first digital signal to compensate for inaccuracy between the first digital signal and the output voltage. The adjustment is based on monitored operation of the modulator. In some cases the monitored operation may be clipping of the switching driver. In some cases the monitored operation may be a signal generated by the modulator that include a contribution from a feedback signal of output voltage.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 3/04 - Differential modulation with several bits
  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit

24.

Thermal protection for system with driver driving multiple transducers

      
Application Number 18442902
Grant Number 12627926
Status In Force
Filing Date 2024-02-15
First Publication Date 2025-02-27
Grant Date 2026-05-12
Owner Cirrus Logic Inc. (USA)
Inventor
  • Napoli, Roberto
  • Clarkin, Philip B.J.
  • Xu, Zhengyi
  • Rattray, Chris
  • Craney, Edward

Abstract

An audio system may include a plurality of transducers, a temperature estimator, and a thermal control subsystem. The temperature estimator may be configured to monitor physical quantities associated with a plurality of transducers and based on the physical quantities, determine an estimated temperature associated with a first transducer of the plurality of transducers. The thermal control subsystem may be configured to generate an output signal based on an input signal, the output signal for driving the plurality of transducers and control the output signal based on the estimated temperature.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

25.

Dynamic operating mode and dataset-based register access locking

      
Application Number 18454307
Grant Number 12566896
Status In Force
Filing Date 2023-08-23
First Publication Date 2025-02-27
Grant Date 2026-03-03
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Ramani, Arun R.
  • Vellanki, Amar
  • Wilson, Brent W.
  • Buchanan, Nathan D. P.

Abstract

An integrated circuit (IC), including multiple registers and functional units for performing operations of the integrated circuit, provides security of register accesses. A bus interface controller coupled to the registers provides read/write access from bus interface. The IC includes a state controller for managing multiple operational modes, and an access control manager coupled to the state controller and the bus interface controller that asserts a dynamic lock over the accesses to the registers according to a selected operating mode and one or more protected addresses of the addressable register space corresponding to the current operating mode. A data screener compares data associated with the read or write accesses to sets of valid or invalid data values for the current operating mode and the protected addresses, and the access control manager permits or denies the read or write accesses in conformity with a result of the comparison.

IPC Classes  ?

  • G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
  • G06F 21/60 - Protecting data
  • G06F 13/40 - Bus structure
  • G06F 21/74 - Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
  • H04N 23/55 - Optical parts specially adapted for electronic image sensorsMounting thereof
  • H04N 23/663 - Remote control of cameras or camera parts, e.g. by remote control devices for controlling interchangeable camera parts based on electronic image sensor signals

26.

Pulse frequency modulation regulation and exit scheme using single comparator for power converter

      
Application Number 18450552
Grant Number 12381469
Status In Force
Filing Date 2023-08-16
First Publication Date 2025-02-20
Grant Date 2025-08-05
Owner Cirrus Logic Inc. (USA)
Inventor
  • Alevoor, Shashank
  • Maru, Siddharth
  • Gallina, Pietro
  • Gupta, Chanchal
  • Parasuram, Vivek

Abstract

A method may include, when in a low-power mode of a power converter, monitoring an output voltage of the power converter; comparing, with a single comparator, the output voltage to a first threshold voltage and cause the power converter to enter a magnetization phase of the low-power mode responsive to the output voltage falling below the first threshold voltage; and during the magnetization phase and a demagnetization phase of the low-power mode, comparing, with the single comparator, the output voltage to a second threshold voltage lower than the first threshold voltage and cause the power converter to enter the high-power mode responsive to the output voltage falling below the second threshold voltage.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

27.

Systems, methods, and converters for distributing power

      
Application Number 18767027
Grant Number 12676497
Status In Force
Filing Date 2024-07-09
First Publication Date 2025-02-13
Grant Date 2026-07-07
Owner Cirrus Logic Inc. (USA)
Inventor Mattingly, Douglas

Abstract

A system for distributing power between an external power supply, a battery, and a host device, the system comprising: an input terminal for coupling to the external power supply; a battery terminal for coupling to the battery; a first converter selectively coupled between the input terminal, the battery terminal, and a supply rail of the host device; and a second converter selectively coupled between the input terminal, the battery terminal, and the supply rail, the second converter being bidirectional; and control circuitry for controlling power distribution between the external power supply, the battery, and the supply rail via the first and second converters.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
  • H02J 7/70 -
  • H02J 9/06 - Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 3/335 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

28.

Switching drivers with capacitive voltage generation operable in different capacitor biasing regimes

      
Application Number 18448527
Grant Number 12647027
Status In Force
Filing Date 2023-08-11
First Publication Date 2025-02-13
Grant Date 2026-06-02
Owner Cirrus Logic Inc. (USA)
Inventor Morgan, Ross C.

Abstract

This application relates to switching drivers which receive a supply voltage that can vary in use. An output stage switches a driver output node between switching voltages with a controlled duty-cycle and is operable in different driver modes in which the switching voltages are different in the different driver modes. A capacitive voltage generator is operable to generate a switching voltage used in one of the driver modes. The switching driver is operable a first regime, in which a capacitor of the voltage generator is biased to a capacitor voltage with a magnitude greater than the input supply voltage, or a second regime, where the biasing of the capacitor is different, such that the capacitor voltage magnitude has a ratio to the input supply voltage with a lower value than in the first regime. The regime is controlled based on the magnitude of the supply voltage and/or the capacitor voltage.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers

29.

Current monitoring in switched mode drivers

      
Application Number 18364027
Grant Number 12549173
Status In Force
Filing Date 2023-08-02
First Publication Date 2025-02-06
Grant Date 2026-02-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Blyth, Malcolm
  • Morgan, Ross C.
  • Robinson, Michael

Abstract

This application relates to methods and apparatus for current monitoring in switched mode drivers. A switching driver has an output stage with a network of switches for switching an output node between different switching voltages and a modulator for controlling a duty-cycle of the switching output stage based on the input signal, where the modulator generates a modulator signal based on the input signal. A current monitor is configured to receive a first current signal indicative of a sensed first driver current and to determine and/or limit a second driver current using the first current signal and the modulator signal. One of the first driver current and the second driver current is an output current to the load and the other of the first driver current and the second driver current is an input current from a power supply.

IPC Classes  ?

  • H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

30.

Power conversion by a phase-controlled cascade of an inductor-based power supply and a charge pump

      
Application Number 18358263
Grant Number 12362645
Status In Force
Filing Date 2023-07-25
First Publication Date 2025-01-30
Grant Date 2025-07-15
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Melanson, John L
  • King, Eric J.

Abstract

A cascaded switched power converter provides a wide voltage conversion ratio and improved efficiency ins systems such as power supplies and amplifiers. A switched-capacitor charge pump circuit is operated by one or more first clock signals and is coupled in cascade with an inductor-based power supply circuit according to one or more second clock signals. A control circuit that generates clock signals so that the one or more second clock signals have a phase offset with respect to the one or more first clock signals that is set to adjust a conversion ratio of the cascaded combination of the switched-capacitor charge pump circuit and the inductor-based power supply circuit. The inductor of the inductor-based power supply circuit may be an inductive load, such as a speaker, and the phase offset may be modulated according to an audio signal to provide audio amplification.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H03F 3/21 - Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
  • H04R 3/00 - Circuits for transducers

31.

Switching drivers with voltage monitoring

      
Application Number 18224770
Grant Number 12633885
Status In Force
Filing Date 2023-07-21
First Publication Date 2025-01-23
Grant Date 2026-05-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Macfarlane, Douglas J.W.
  • Melanson, John L.

Abstract

This application relates to methods and apparatus for switching drivers. The switching driver has first and second switches for selectively connecting an output node to first and second switching voltages respectively to generate a first output voltage. A compensator is configured to receive a first monitor signal indicative of a sum of the first and second switching voltages and a second monitor signal indicative of a difference between the first and second switching voltages and to apply compensation to the input signal based on the first and second monitor signals so as to compensate for variations in the first and second switching voltages from defined nominal values of the first and second switching voltages. A modulator controls a duty cycle of the first and second switches based on the input signal after said compensation has been applied.

IPC Classes  ?

32.

Clock signal transitioning for multi-mode audio processing systems

      
Application Number 18353094
Grant Number 12261611
Status In Force
Filing Date 2023-07-16
First Publication Date 2025-01-16
Grant Date 2025-03-25
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Chen, Jianqi
  • Mehta, Jaiminkumar
  • Kumar, Bhoodev
  • Melanson, John L.

Abstract

Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.

IPC Classes  ?

  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03L 7/093 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop

33.

Electrochemical cell characterisation

      
Application Number 18221653
Grant Number 12613206
Status In Force
Filing Date 2023-07-13
First Publication Date 2025-01-16
Grant Date 2026-04-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Perry, Ivan

Abstract

Circuitry for determining one or more characteristics of an electrochemical cell comprising a first working electrode and a counter electrode, the circuitry comprising: drive circuitry configured to apply a first stimulus to the first working electrode; measurement circuitry configured to measure a first response at the first working electrode; and processing circuitry configured to: applying compensation to the first response to obtain a first corrected response of the electrochemical cell to the first stimulus; and determine a first characteristic of the one or more characteristics of the electrochemical cell based on the first corrected response, the first characteristic associated with the first working electrode.

IPC Classes  ?

  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
  • H01M 10/42 - Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
  • H01M 10/48 - Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte

34.

Impedance tracking for connector between source and load

      
Application Number 18353092
Grant Number 12445771
Status In Force
Filing Date 2023-07-16
First Publication Date 2025-01-16
Grant Date 2025-10-14
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Marchais, Emmanuel A.
  • Zou, Ziyan
  • Yong, Chin Huang

Abstract

The impedance of a connector, such as a flex cable, between a source and load affects the temperature and power consumption within an electronic system, such as a mobile device. According to embodiments described in this disclosure, the impedance of the flex cable may be separately tracked from the impedance of the source, which provides for improved power management within the electronic system. The impedance of the flex cable may be factored into determining a maximum available power to the load. The impedance of the flex cable may also be mapped to a temperature and used to manage power to maintain operation within temperature limits. Additional aspects of power management and impedance tracking for a connector are described herein.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

35.

Generating audio and haptics output from a common actuator

      
Application Number 18390219
Grant Number 12652491
Status In Force
Filing Date 2023-12-20
First Publication Date 2025-01-02
Grant Date 2026-06-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Smith, James R.
  • Skinner, Nicholas J.
  • Smyth, Iii, Charles D.
  • Curtis, Graham C.

Abstract

A haptic driver for driving a haptic actuator, the haptic driver configured to: provide a haptic drive signal and an audio drive signal, the haptic drive signal for causing the haptic actuator to generate a haptic vibration output and the audio drive signal for causing the haptic actuator to generate an audio output; and drive the haptic actuator with the haptic drive signal and the audio drive signal so that the haptic actuator generates the haptic vibration output and the audio output.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • G06F 3/16 - Sound inputSound output

36.

Current estimation in a power converter

      
Application Number 18698674
Grant Number 12199514
Status In Force
Filing Date 2022-11-29
First Publication Date 2024-12-26
Grant Date 2025-01-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Blyth, Malcolm
  • Bowlerwell, John B.
  • Boomer, Alastair M.
  • Haiplik, Holger

Abstract

Current detection circuitry for generating an average inductor current signal indicative of an average inductor current during an operational cycle of power converter circuitry, the current detection circuitry comprising: circuitry for generating a peak inductor current signal indicative of a peak inductor current during the operational cycle; and circuitry for applying a ripple current estimate signal, indicative of an estimate of half of a ripple current in the power converter circuitry, to the peak inductor current signal to generate the average inductor current signal, wherein the ripple current is equal to a difference between the average inductor current and the peak inductor current.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 27/26 - Measuring inductance or capacitanceMeasuring quality factor, e.g. by using the resonance methodMeasuring loss factorMeasuring dielectric constants
  • H02M 1/00 - Details of apparatus for conversion

37.

Dynamic control for selective acoustic optimization of thermally or power limited speaker systems

      
Application Number 18334795
Grant Number 12507015
Status In Force
Filing Date 2023-06-14
First Publication Date 2024-12-19
Grant Date 2025-12-23
Owner Cirrus Logic Inc. (USA)
Inventor Xu, Zhengyi

Abstract

An audio system may include an audio transducer, a thermal protection subsystem configured to protect the audio transducer from overheating, and a control subsystem communicatively coupled to the thermal protection subsystem and configured to receive an audio signal for playback at the audio transducer, determine an audio heating metric indicative of a predicted effect of the audio signal on the audio transducer, and control operation of the thermal protection subsystem based on the audio heating metric.

IPC Classes  ?

  • H04R 9/02 - Transducers of moving-coil, moving-strip, or moving-wire type Details
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

38.

Multichannel driver circuitry and operation

      
Application Number 18810168
Grant Number 12587191
Status In Force
Filing Date 2024-08-20
First Publication Date 2024-12-12
Grant Date 2026-03-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Walker, Joe
  • Cheng, Yongjie
  • Zhang, Lingli

Abstract

This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.

IPC Classes  ?

  • H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
  • H03K 3/017 - Adjustment of width or dutycycle of pulses
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

39.

Power management in audio systems

      
Application Number 18320415
Grant Number 12292778
Status In Force
Filing Date 2023-05-19
First Publication Date 2024-11-21
Grant Date 2025-05-06
Owner Cirrus Logic Inc. (USA)
Inventor
  • Rattray, Chris
  • Xu, Zhengyi
  • Roberto, Miles K.

Abstract

A power management system for managing power consumption of a digital signal processor (DSP) that implements a protection system, the power management system comprising: a power management block configured to: detect a parameter indicative of a power of an input signal to the DSP; compare the detected parameter to a threshold; and responsive to a determination that the detected parameter is less than the threshold, cause one or more processing blocks of the DSP to enter a low power mode of operation.

IPC Classes  ?

  • G06F 1/32 - Means for saving power
  • G06F 1/3206 - Monitoring of events, devices or parameters that trigger a change in power modality
  • G06F 1/3234 - Power saving characterised by the action undertaken
  • H04R 3/00 - Circuits for transducers

40.

Pre-conditioning a node of a circuit

      
Application Number 18428442
Grant Number 12341504
Status In Force
Filing Date 2024-01-31
First Publication Date 2024-11-14
Grant Date 2025-06-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sadati, Hamed
  • Breslin, John A.
  • Hegde, Sushanth
  • Melanson, John L.

Abstract

Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.

IPC Classes  ?

  • H03K 17/30 - Modifications for providing a predetermined threshold before switching
  • H03K 17/042 - Modifications for accelerating switching by feedback from the output circuit to the control circuit
  • H03K 17/06 - Modifications for ensuring a fully conducting state

41.

Power converter system

      
Application Number 18308370
Grant Number 12451804
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-10-31
Grant Date 2025-10-21
Owner Cirrus Logic Inc. (USA)
Inventor Jung, Byeongok

Abstract

A power converter system comprising: a switched capacitor power converter; an always-on power converter; and a controller, wherein the power converter system is operable in a first mode of operation in which only the always-on power converter supplies output power and a second mode of operation in which the switched capacitor power converter supplies output power, and wherein the controller is configured to transition the power converter system from the first mode to the second mode based on a parameter of a current and/or a voltage of output power supplied by the power converter system.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/157 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

42.

Switching transducer driver

      
Application Number 18308395
Grant Number 12184272
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-10-31
Grant Date 2024-12-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Macfarlane, Douglas J. W.

Abstract

A switching transducer driver operable in: a first mode in which first and second output stage switches are controlled to generate a two-level output signal, wherein an impedance of the first output stage switch is substantially the same as an impedance of the second output stage switch; and a second mode in which the first and second output stage switches and a third switch are controlled to generate a three-level output signal, wherein an impedance of the third switch is substantially greater than the impedance of the first output stage switch and the second output stage switch.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 19/00 - Logic circuits, i.e. having at least two inputs acting on one outputInverting circuits
  • H03K 19/0185 - Coupling arrangementsInterface arrangements using field-effect transistors only

43.

Segmented-width thin-film sense resistors with width-distributed terminal land connections

      
Application Number 18140456
Grant Number 12379400
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-10-31
Grant Date 2025-08-05
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Khenkin, Aleksey
  • Murphy, Michael J.

Abstract

A thin-film resistor circuit for an integrated circuit provides low resistance by segmenting a thin-film resistor to provide a wider effective thin-film resistor in a smaller die. The die includes a substrate, multiple electronic devices integrated on the substrate and interconnected to form at least a portion of an electronic circuit, a plurality of interconnect lands arranged in a grid that interconnect the devices with external terminals, and a thin-film resistor implemented by two or more thin-film resistor segments that operate in parallel in the circuit. The segments are disposed between different pairs of adjacent columns of the grid interconnect lands, with one of the thin-film resistor segments electrically connected along its width to lands of a first column of the grid of interconnect lands, and another one of the thin-film resistor segments is electrically connected along its width to lands of a second column of the grid interconnect lands.

IPC Classes  ?

  • G01R 1/20 - Modifications of basic electric elements for use in electric measuring instrumentsStructural combinations of such elements with such instruments
  • G01R 19/00 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof

44.

Switch bootstrapping for multi-level inductive power converter

      
Application Number 18628007
Grant Number 12603573
Status In Force
Filing Date 2024-04-05
First Publication Date 2024-10-24
Grant Date 2026-04-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Mackay, Graeme G.
  • Su, Jin-Jyh
  • Akram, Hasnain
  • Lim, Changjong
  • Marshnil, Dave

Abstract

A multi-level power converter configured to receive a power supply and generate an inductor current may include a first switch coupled to a first capacitor, a second switch coupled to a second capacitor, a third switch coupled to a third capacitor, a fourth switch, an inductor coupled to a switch node between the second switch and the third switch, and a flying capacitor having a first terminal coupled to a first node between the first and second switch and a second terminal coupled to a second node between the third and fourth switch, wherein the second capacitor is configured to share charge with at least one of the first capacitor and the third capacitor to enable non-gate terminals of at least one of the first switch, the second switch, and the third switch to replenish with charge at or approximate to a duty cycle extreme of the multi-level power converter.

IPC Classes  ?

  • H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

45.

Pin-constrained devices

      
Application Number 18305679
Grant Number 12530306
Status In Force
Filing Date 2023-04-24
First Publication Date 2024-10-24
Grant Date 2026-01-20
Owner Cirrus Logic Inc. (USA)
Inventor Fuller, Jack

Abstract

In an example there is provided a configurable integrated circuit. The configurable integrated circuit comprises a configuration pin, configuration circuitry, and a controller. The configuration pin is for coupling with an external memory device. The configuration circuitry is to determine a resistance value between the configuration pin and a reference voltage. The controller configured to select a configuration mode for the integrated circuit based on the resistance value determined by the configuration circuitry. The configuration mode is one of an internal configuration mode in which the integrated circuit is configured based on data stored in the integrated circuit, and an external configuration mode in which the integrated circuit is configured based on data read from an external memory device coupled to the configuration pin.

IPC Classes  ?

  • G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
  • G06F 21/85 - Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices

46.

DC-DC converter with parallel and series capacitor configurations

      
Application Number 18755237
Grant Number 12456921
Status In Force
Filing Date 2024-06-26
First Publication Date 2024-10-17
Grant Date 2025-10-28
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

A DC-DC converter for converting an input voltage at an input node, the converter comprising: first and second inductor nodes for connection of an inductor therebetween; first and second flying capacitor nodes for connection of a flying capacitor therebetween; a first switching network for selectively connecting the first flying capacitor node to each of the input node and the first inductor node; a second switching network for selectively connecting the second flying capacitor node to each of the input node and a reference voltage node; and reservoir circuitry, comprising: first and second reservoir capacitor nodes for connection of a reservoir capacitor therebetween; a third switching network for selectively connecting the first reservoir capacitor node to each of the first and second flying capacitor nodes; a fourth switching network for selectively connecting the second reservoir capacitor node to each of the second flying capacitor node and the reference voltage node.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

47.

Dynamically configurable firmware register map interface for an embedded software system

      
Application Number 18295698
Grant Number 12411690
Status In Force
Filing Date 2023-04-04
First Publication Date 2024-10-10
Grant Date 2025-09-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Livingston, Jeffrey B.
  • Hemkumar, Nariankadu D.

Abstract

A method for dynamic configuration of a register map in an embedded software system may include, in response to receipt of configuration parameters for the register map, generating at least one table of metadata descriptors associated with objects of the register map based on the configuration parameters and embodied in random access memory of the embedded software system, the metadata descriptors defining composition and order of registers of the register map and configured to interface with a register map interpreter in firmware stored in read-only memory of the embedded software system.

IPC Classes  ?

  • G06F 8/654 - Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
  • G06F 8/65 - Updates
  • G06F 9/30 - Arrangements for executing machine instructions, e.g. instruction decode

48.

Switching control

      
Application Number 18519665
Grant Number 12689369
Status In Force
Filing Date 2023-11-27
First Publication Date 2024-10-10
Grant Date 2026-07-21
Owner Cirrus Logic Inc. (USA)
Inventor
  • Haiplik, Holger
  • Tonge, Peter

Abstract

This application relates to methods and apparatus for switching control of semiconductor switches. In a switching circuit, a semiconductor switch is implemented as a composite switch having a plurality of switch elements, each having a respective gate electrode. A switch driver is configured to drive the gate electrodes of the switch elements to a first gate voltage over a duration of a first switch transition and is configured to enable drive of at least some of the gate electrodes of the plurality of semiconductor switch elements at different times in a temporal sequence during the first switch transition. The temporal sequence is configured to provide an average resistance of the composite switch over the duration of the first switch transition which is closer to a final composite switch resistance, compared to driving the gate electrodes of the switch elements at the same time as one another.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

49.

Smooth transition between power modes in a power converter

      
Application Number 18697813
Grant Number 12113429
Status In Force
Filing Date 2023-03-10
First Publication Date 2024-10-03
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Maru, Siddharth
  • Mccoy, Bryan
  • Gupta, Chanchal
  • Pagano, Rosario

Abstract

The controller for a system including a power converter may be configured to cause the system to operate in one of a low-power mode and the high-power mode based on power demand from a load at the output of the power converter and when in the low-power mode, monitor the output of the power converter to detect an occurrence of a load transient from the load and in response to detecting the occurrence of the load transient, transition from the low-power mode to the high-power mode via a transition mode to minimize undershoot and overshoot of the output voltage.

IPC Classes  ?

  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/156 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

50.

Circuitry for measurement of electrochemical cells

      
Application Number 18454435
Grant Number 12451896
Status In Force
Filing Date 2023-08-23
First Publication Date 2024-09-26
Grant Date 2025-10-21
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Perry, Ivan
  • Caporale, Salvatore
  • Midha, Gagan
  • Wells, James

Abstract

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: measurement circuitry having a first measurement input coupled to a first electrode of the electrochemical cell, the measurement circuitry configured to convert the analyte signal at the first measurement input to a first analog output signal; an analog-to-digital converter (ADC) having an first ADC input for receiving the first analog output signal, the ADC configured to convert the first analog output signal to a first digital output signal at an ADC output; compensation circuitry configured in a measurement mode to: apply a first compensation to the first digital output signal to obtain a first compensated digital output signal, the first compensation to compensate for non-linearity in the ADC; and apply a second compensation to the first compensated digital output signal to obtain a second compensated digital output signal, the second compensation to compensate for non-linearity in the measurement circuitry; control circuitry configured in a calibration mode to: apply a first calibration signal at the first ADC input and adapt the first compensation based on the first calibration signal and the first compensated digital output signal; and apply a second calibration signal at the first electrode and adapt the second compensation based on the second calibration signal and the second compensated digital output signal.

IPC Classes  ?

  • H03M 1/10 - Calibration or testing
  • H01M 6/02 - Details
  • H01M 6/50 - Methods or arrangements for servicing or maintenance, e.g. for maintaining operating temperature
  • G01N 27/26 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variablesInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by using electrolysis or electrophoresis

51.

Clipping prevention in switched mode drivers

      
Application Number 18188073
Grant Number 12640694
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-26
Grant Date 2026-05-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Demirci, Kemal S.
  • Hoff, Thomas H.

Abstract

This application relates to methods and apparatus for clipping prevention. A driver apparatus for driving a load with an output signal has a switching driver with a switch network and a modulator configured to control the switch network to switch output nodes between different switching voltages with a controlled duty-cycle. A quantizer controller receives a quantizer input signal based on an input signal and a feedback signal and controls the duty-cycle of the switch network. A clipping prevention controller is configured to control a gain applied to the input signal so as to provide limiting of the input signal to avoid clipping, wherein the clipping prevention controller is configured to dynamically control at least one limiting threshold used to determine when to apply limiting of the input signal based on an indication of said quantizer input signal.

IPC Classes  ?

  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 3/38 - DC amplifiers with modulator at input and demodulator at outputModulators or demodulators specially adapted for use in such amplifiers

52.

Clipping prevention in switched mode drivers

      
Application Number 18188085
Grant Number 12356158
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-26
Grant Date 2025-07-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Napoli, Roberto
  • Demirci, Kemal S.
  • Hoff, Thomas H.

Abstract

This application relates to methods and apparatus for clipping prevention. A driver apparatus for driving a transducer has a switching driver configured to switch at least one output node between different switching voltages with a controlled duty-cycle to drive an output signal across the transducer. A clipping prevention controller is configured to control a gain applied to the input signal so as to provide limiting of the input signal to avoid clipping of the output signal. The clipping prevention controller is configured to dynamically control at least one limiting threshold used to determine when to apply limiting of the input signal based on an indication of load resistance of the transducer and the input voltage to the switching driver.

IPC Classes  ?

  • G05F 1/625 - Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is AC or DC
  • H04R 3/00 - Circuits for transducers
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

53.

Driver circuitry and operation

      
Application Number 18188053
Grant Number 12155380
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-26
Grant Date 2024-11-26
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Cheng, Yongjie
  • Zhang, Lingli

Abstract

This application relates to methods and apparatus for driving a transducer connected between two output nodes in a bridge-tied-load configuration. A driver receives first and second supply voltages and has charge pumps that generate respective first and second boosted voltages. The driver is operable in a first driver mode in which each output node is modulated between the first and second supply voltage; a second driver mode in which one output nodes is modulated between the first and second supply voltages and the other output node is modulated between either the first boosted voltage and the first supply voltage or between the second supply voltage and the second boosted voltage; and a third driver mode in which one of the output nodes is modulated between the first supply voltage and the first boosted voltage and the other output node is modulated between the second supply voltage and the second boosted voltage.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
  • H03K 17/06 - Modifications for ensuring a fully conducting state

54.

Multichannel driver circuitry and operation

      
Application Number 18188067
Grant Number 12101085
Status In Force
Filing Date 2023-03-22
First Publication Date 2024-09-24
Grant Date 2024-09-24
Owner Cirrus Logic Inc. (USA)
Inventor
  • Morgan, Ross C.
  • Walker, Joe
  • Cheng, Yongjie
  • Zhang, Lingli

Abstract

This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.

IPC Classes  ?

  • H03K 17/693 - Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
  • H03K 3/017 - Adjustment of width or dutycycle of pulses
  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

55.

Power converter integrated circuit

      
Application Number 18184733
Grant Number 12658797
Status In Force
Filing Date 2023-03-16
First Publication Date 2024-09-19
Grant Date 2026-06-16
Owner Cirrus Logic Inc. (USA)
Inventor
  • Yang, Seunguk
  • Yoon, Sangkoo
  • Choi, Sungdae
  • Jeon, Sehyung

Abstract

A power converter integrated circuit comprising a switch network having coupling nodes for coupling the switch network to a single flying capacitor, an output capacitor, and an inductor; wherein the power converter integrated circuit is operable in a first forward mode as switched capacitor power converter circuitry and in a second forward mode as inductive converter circuitry, wherein in the first forward mode, the switch network is operative to couple the single flying capacitor and the output capacitor in series in a first phase of operation, and couple the single flying capacitor and the output capacitor in parallel in a second phase of operation; and in the second forward mode, the switch network is operative to couple the single flying capacitor, the inductor and the output capacitor in series in a phase of operation, and couple a series combination of the single flying capacitor and the inductor in parallel with the output capacitor in a subsequent phase of operation.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

56.

Circuitry for measurement of electrochemical cells

      
Application Number 18192257
Grant Number 12308852
Status In Force
Filing Date 2023-03-29
First Publication Date 2024-09-12
Grant Date 2025-05-20
Owner Cirrus Logic Inc. (USA)
Inventor
  • Wilson, Paul
  • Perry, Ivan
  • Priestley, John
  • Wells, James

Abstract

Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry including: a first signal path between a first electrode of the electrochemical cell and a first input of an analog-to-digital converter (ADC) circuit, the first signal path comprising a first gain stage configured to convert the analyte signal to a first analog signal; a second signal path between the first electrode and a second input of the ADC circuit, the second signal path comprising a second gain stage configured to convert the analyte signal to a second analog signal; and switching circuitry configured to selectively couple the first electrode to the first input of the ADC circuit.

IPC Classes  ?

57.

Electrochemical cell characterisation

      
Application Number 18594434
Grant Number 12596096
Status In Force
Filing Date 2024-03-04
First Publication Date 2024-09-12
Grant Date 2026-04-07
Owner Cirrus Logic Inc. (USA)
Inventor
  • Wells, James
  • Midha, Gagan
  • Bates, Gordon J.
  • Saunders, Sunil

Abstract

Circuitry for processing a response from an electrochemical cell to a stimulus, the circuitry comprising: sense circuitry configured to measure the response of the electrochemical cell to the stimulus; and processing circuitry configured to: sample the measured response to obtain a plurality of samples; and output the plurality of samples, wherein the processing circuitry is operable in: a continuous sampling mode in which the processing circuitry is configured to periodically sample the measured response at a fixed sampling rate; a discontinuous sampling mode in which the processing circuitry is configured to periodically sample the measured response during macro periods separated by macro intervals during which sampling of the measured response is disabled.

IPC Classes  ?

58.

Dynamic state management of a phase-lock loop (PLL)

      
Application Number 17972739
Grant Number 12088308
Status In Force
Filing Date 2022-10-25
First Publication Date 2024-09-10
Grant Date 2024-09-10
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Kenly, Stewart G.
  • Vellanki, Amar
  • Melanson, John L.

Abstract

A phase-lock loop (PLL) circuit provides continuous closed-loop operation when switching between operating modes, which may be selection between multiple oscillators, multiple power modes or frequency divider/multipliers of an local clock generator having one or more oscillator circuits, or other changes that may disrupt operation of the PLL. The PLL includes a loop filter having an input coupled to an output of a phase-frequency comparator that compares the output of the oscillator circuit to a reference and a control circuit for storing and restoring the complete state of the loop filter from the storage in response to a change of operating mode, so that a lock time of the phase-lock loop circuit is reduced when selection of one of the at least two selectable different output frequency ranges of the local clock generator is changed.

IPC Classes  ?

  • H03L 7/087 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
  • H03L 7/097 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a comparator for comparing the voltages obtained from two frequency to voltage converters
  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop

59.

System for estimating power dissipation and/or efficiency

      
Application Number 18533477
Grant Number 12590998
Status In Force
Filing Date 2023-12-08
First Publication Date 2024-08-29
Grant Date 2026-03-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Boomer, Alastair M.
  • Bowlerwell, John B.
  • Blyth, Malcolm
  • King, Eric J.

Abstract

A system for estimating power dissipation in an integrated circuit comprising a power converter and an amplifier, the system comprising processing circuitry configured to: receive a signal indicative of an output voltage to a load which, in use of the integrated circuit, is driven by the amplifier; receive a signal indicative of an output current to the load; determine an output power value based on the received signal indicative of the output voltage to the load and the received signal indicative of the output current to the load; receive a signal indicative of an input voltage to the power converter; receive a signal indicative of an average current input to the power converter; determine an input power value based on the received signal indicative of the input voltage to the power converter and the received signal indicative of the average current input to the power converter; and determine a power dissipation value based on the determined output power value and the determined input power value.

IPC Classes  ?

  • H02H 7/00 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
  • G01R 21/06 - Arrangements for measuring electric power or power factor by measuring current and voltage
  • G01R 31/28 - Testing of electronic circuits, e.g. by signal tracer
  • H02H 7/20 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment

60.

Finite impulse response input digital-to-analog converter

      
Application Number 18654911
Grant Number 12574045
Status In Force
Filing Date 2024-05-03
First Publication Date 2024-08-29
Grant Date 2026-03-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Melanson, John L.
  • Zhang, Lingli
  • Astrachan, Paul M.
  • Kelton, James

Abstract

A digital-to-analog converter (DAC) may include an integrator, an input network, and control circuitry. The input network may include a plurality of parallel taps, each having a signal delay such that at least two of the signal delays of the members of the plurality of parallel taps are different, and wherein each member is coupled between an input of the digital-to-analog converter and an input of the integrator. The control circuitry may be configured to selectively enable and disable particular members of the plurality of parallel taps in order to program an effective input resistance of the input network to control an analog gain of the DAC, such that the control circuitry enables, substantially contemporaneously, an even number of members at a time in order to increase the analog gain, with half of such enabled members in a first group and half of such enabled members in a second group.

IPC Classes  ?

  • H03M 1/82 - Digital/analogue converters with intermediate conversion to time interval
  • H03M 1/18 - Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/10 - Calibration or testing

61.

Driver circuitry for piezoelectric transducers

      
Application Number 18644538
Grant Number 12521758
Status In Force
Filing Date 2024-04-24
First Publication Date 2024-08-15
Grant Date 2026-01-13
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Ido, Toru

Abstract

The present disclosure relates to driver circuitry for driving a piezoelectric transducer. The circuitry comprises: a power supply; a reservoir capacitance; switch network circuitry; and control circuitry. The control circuitry is configured to control operation of the switch network circuitry so as to charge the reservoir capacitance from the power supply and to transfer charge between the reservoir capacitance and the piezoelectric transducer.

IPC Classes  ?

  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy

62.

Power converter integrated circuit

      
Application Number 18165571
Grant Number 12614979
Status In Force
Filing Date 2023-02-07
First Publication Date 2024-08-08
Grant Date 2026-04-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Yang, Seunguk
  • Jeon, Sehyung
  • Lee, Sangjun
  • An, Cheolhwan

Abstract

A power converter integrated circuit includes a switch network, coupling nodes for first and second flying capacitors, an output capacitor, and an inductor. The circuit operates in two forward modes: a switched capacitor converter mode and an inductive converter mode. In the switched capacitor mode, the switch network couples the first flying capacitor in series with the output capacitor in a first phase, and in parallel in a second phase. In the inductive converter mode, the switch network couples the first flying capacitor in series with the inductor and output capacitor in one phase, and then couples the first flying capacitor in parallel with the output capacitor via the inductor in a subsequent phase. This dual-mode operation allows for versatile power conversion.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02J 7/90 -
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

63.

Circuitry for analyte measurement

      
Application Number 18685979
Grant Number 12253487
Status In Force
Filing Date 2022-08-25
First Publication Date 2024-08-08
Grant Date 2025-03-18
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John Paul
  • Ido, Toru

Abstract

Circuitry for and methods of analyte measurement Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a hysteretic comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

  • G01N 27/327 - Biochemical electrodes
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

64.

Amplifier circuit for buffering high slew rate signal

      
Application Number 18098264
Grant Number 12556143
Status In Force
Filing Date 2023-01-18
First Publication Date 2024-07-18
Grant Date 2026-02-17
Owner Cirrus Logic Inc. (USA)
Inventor
  • Pramanik, Neel
  • Drakshapalli, Prashanth

Abstract

An amplifier circuit may include a first gain stage configured to receive an input signal at the first gain stage input and apply a first gain to the input signal to generate a first gain stage output signal at the first gain stage output, a second gain stage configured to receive the first gain stage output signal at the second gain stage input and apply a second gain to the first gain stage output signal to generate a second gain stage output signal at the second gain stage output, a feedforward gain stage configured to receive the input signal at the feedforward gain stage input and apply a feedforward gain to the input signal to generate a feedforward gain stage output signal at the feedforward gain stage output, and a compensation network coupled between the first gain stage output and the feedforward gain stage output.

IPC Classes  ?

  • H03F 1/36 - Negative-feedback-circuit arrangements with or without positive feedback in discharge-tube amplifiers
  • H03F 1/12 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of attenuating means

65.

Driver circuitry and operation

      
Application Number 18615241
Grant Number 12257601
Status In Force
Filing Date 2024-03-25
First Publication Date 2024-07-11
Grant Date 2025-03-25
Owner Cirrus Logic Inc. (USA)
Inventor
  • Thomsen, Axel
  • King, Eric J.
  • Doy, Anthony S.
  • Hoff, Thomas H
  • Melanson, John L.

Abstract

This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.

IPC Classes  ?

  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • B06B 1/06 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy operating with piezoelectric effect or with electrostriction
  • G06F 3/01 - Input arrangements or combined input and output arrangements for interaction between user and computer
  • H10N 30/80 - Constructional details

66.

Force sensing system and method

      
Application Number 18601585
Grant Number 12314558
Status In Force
Filing Date 2024-03-11
First Publication Date 2024-07-11
Grant Date 2025-05-27
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sepehr, Hamid
  • Peso Parada, Pablo
  • Zwart, Willem
  • Birchall, Tom
  • Kost, Michael Allen
  • Das, Tejasvi
  • Maru, Siddharth
  • Beardsworth, Matthew
  • Duewer, Bruce E.

Abstract

A force sensing system for determining if a user input has occurred, the system comprising: an input channel, to receive an input from at least one force sensor; an activity detection stage, to monitor an activity level of the input from the at least one force sensor and, responsive to an activity level which may be indicative of a user input being reached, to generate an indication that an activity has occurred at the force sensor; and an event detection stage to receive said indication, and to determine if a user input has occurred based on the received input from the at least one force sensor.

IPC Classes  ?

  • G06F 3/0488 - Interaction techniques based on graphical user interfaces [GUI] using specific features provided by the input device, e.g. functions controlled by the rotation of a mouse with dual sensing arrangements, or of the nature of the input device, e.g. tap gestures based on pressure sensed by a digitiser using a touch-screen or digitiser, e.g. input of commands through traced gestures
  • G01L 5/162 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in ohmic resistance of piezoresistors
  • G01L 5/164 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in inductance
  • G01L 5/165 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using variations in capacitance
  • G01L 5/167 - Apparatus for, or methods of, measuring force, work, mechanical power, or torque, specially adapted for specific purposes for measuring several components of force using piezoelectric means
  • G06F 3/041 - Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means

67.

Switched capacitor power converter circuitry operable in first and second modes

      
Application Number 18094126
Grant Number 12549098
Status In Force
Filing Date 2023-01-06
First Publication Date 2024-07-11
Grant Date 2026-02-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Yang, Seunguk
  • Kim, Juyeong
  • Baek, Inkuk
  • Jeon, Sehyung

Abstract

Switched capacitor power converter circuitry configured to receive an input voltage and to output an output voltage, the switched capacitor power converter circuitry comprising: a switch network; a flying capacitor coupled to the switch network; and an output capacitor coupled to an output node of the switch network, wherein the switched capacitor power converter circuitry is operable in: a first mode in which the switch network operates at a fixed duty cycle; and a second mode in which the switch network operates at a variable duty cycle based on a predetermined flying capacitor charging threshold and a predetermined flying capacitor discharging threshold.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/32 - Means for protecting converters other than by automatic disconnection
  • H02M 1/00 - Details of apparatus for conversion
  • H02M 1/15 - Arrangements for reducing ripples from DC input or output using active elements

68.

Cough detection

      
Application Number 18406665
Grant Number 12144606
Status In Force
Filing Date 2024-01-08
First Publication Date 2024-07-04
Grant Date 2024-11-19
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Suryono, Yanto
  • Ido, Toru

Abstract

A method of cough detection in a headset, the method comprising: receiving a first signal from an external transducer of the headset; receiving a second signal from an in-ear transducer of the headset; and detecting a cough of a user of the headset based on the first and second signals.

IPC Classes  ?

  • A61B 5/08 - Measuring devices for evaluating the respiratory organs
  • A61B 5/00 - Measuring for diagnostic purposes Identification of persons

69.

Methods and systems for equalisation

      
Application Number 18416352
Grant Number 12665561
Status In Force
Filing Date 2024-01-18
First Publication Date 2024-06-20
Grant Date 2026-06-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Anderson, Craig A.

Abstract

A method of equalising a signal derived from an input device, the method comprising: receiving the signal; applying an order-statistic filter to the signal in the frequency domain to generate a statistically filtered signal; equalising the received signal based on the statistically filtered signal to generate an equalised signal.

IPC Classes  ?

  • H03G 5/16 - Automatic control
  • H04R 3/04 - Circuits for transducers for correcting frequency response

70.

Reduction of artefacts in multi-channel systems

      
Application Number 18476962
Grant Number 12671369
Status In Force
Filing Date 2023-09-28
First Publication Date 2024-06-20
Grant Date 2026-06-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Khare, Rupesh
  • Mistry, Mehul
  • Sathyanarayanan, Gautham

Abstract

Circuitry for driving first and second loads, the circuitry comprising: a first output signal path for supplying a first driving signal to the first load; a second output signal path for supplying a second driving signal to the second load; sequencer circuitry configured to initiate a first state change in the first output signal path and a second state change in the second output signal path, wherein the sequencer circuitry is configured to control the initiation of the first and second state changes such that the second state change is not synchronised with the first state change.

IPC Classes  ?

  • H03F 1/52 - Circuit arrangements for protecting such amplifiers
  • H03F 3/45 - Differential amplifiers

71.

Dynamic wind detection for adaptive noise cancellation (ANC)

      
Application Number 18067545
Grant Number 12549895
Status In Force
Filing Date 2022-12-16
First Publication Date 2024-06-20
Grant Date 2026-02-10
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Lawrence, Wilbur
  • Bryan-Merrett, John

Abstract

Noise cancellation operations consume battery power, and thus techniques for reducing power consumption by performing power management in active noise cancellation in consumer devices are beneficial for the user. One example power management technique described according to embodiments of this disclosure allow wind noise detection to switch between a high-power higher-accuracy operation and a low-power lower-accuracy operation. For example, multiple microphones may be available on the personal device for detecting wind noise, in which using multiple microphones increases accuracy but also increases battery consumption. A personal device may switch between using a single microphone and multiple microphones based on environmental conditions to provide improved performance in certain environmental conditions and reduced power consumption in other environmental conditions.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • G10K 11/178 - Methods or devices for protecting against, or for damping, noise or other acoustic waves in general using interference effectsMasking sound by electro-acoustically regenerating the original acoustic waves in anti-phase
  • G10L 21/0216 - Noise filtering characterised by the method used for estimating noise

72.

Hybrid power converter with two-phase control of flying capacitor balancing

      
Application Number 18588723
Grant Number 12155299
Status In Force
Filing Date 2024-02-27
First Publication Date 2024-06-20
Grant Date 2024-11-26
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a first power converter branch comprising a first capacitor, a first switch network, and a first inductor, the first switch network arranged to selectably couple the first capacitor between an input voltage, a first reference voltage, and a first terminal of the first inductor, wherein a second terminal of the first inductor is coupled to an output node; a second power converter branch comprising a second capacitor, a second switch network, and a second inductor, the second switch network arranged to selectably couple the second capacitor between the input voltage, a second reference voltage, and a first terminal of the second inductor, wherein a second terminal of the second inductor is coupled to the output node; and a third switch network between the first power converter branch and the second power converter branch, wherein the third switch network is arranged to selectably couple the first and second capacitors in series or in parallel, to allow enable charge balancing between the first capacitor and second capacitor.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

73.

Protection voltage generating circuit with monotonic and stable power supply voltage behavior

      
Application Number 18077402
Grant Number 12216487
Status In Force
Filing Date 2022-12-08
First Publication Date 2024-06-13
Grant Date 2025-02-04
Owner CIRRUS LOGIC, INC. (USA)
Inventor
  • Abusleme Hoffman, Angel C.
  • Thomsen, Axel

Abstract

A circuit and method for generating a protection voltage includes a pair of voltage-generating circuits that generate voltages from the power supply voltage. The voltages have a differing dependence on the power supply voltage so that a difference between the first voltage and the second voltage changes sign for a particular value of the power supply voltage. The voltages are supplied to a protection voltage generating circuit that includes a pair of amplifiers having inputs that receive a respective one of the voltages and each of the amplifiers provides negative feedback to the other. An output circuit generates the protection voltage according to a maximum or a minimum value among the amplifier outputs, so that the protection voltage is monotonic with respect to variation of the power supply voltage.

IPC Classes  ?

  • G05F 1/571 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for protection with overvoltage detector
  • G05F 1/46 - Regulating voltage or current wherein the variable actually regulated by the final control device is DC

74.

Multi-chip synchronization in sensor applications

      
Application Number 18471856
Grant Number 12425178
Status In Force
Filing Date 2023-09-21
First Publication Date 2024-06-06
Grant Date 2025-09-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Skarzynski, Jeffrey
  • Shum, Wai-Shun
  • Vellanki, Amar
  • Choukinishi, Venugopal
  • Zhao, Xin
  • Melanson, John L.

Abstract

A system may include a plurality of devices coupled to one another via a shared digital wired communication link, the plurality of devices comprising a first device configured to periodically transmit a synchronization packet onto the shared digital wired communication link to synchronize other of the plurality of devices to a reference clock of the first device, a second device configured to receive the synchronization packet and transmit one or more first data packets onto the shared digital wired communication link in response to the synchronization packet, and a third device configured to receive the synchronization packet and transmit one or more second data packets onto the shared digital wired communication link in response to the synchronization packet and the one or more second data packets.

IPC Classes  ?

  • H04L 7/033 - Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal- generating means, e.g. using a phase-locked loop
  • H04J 3/06 - Synchronising arrangements

75.

Output common-mode control loop for fast and smooth transition in multi-mode amplifiers

      
Application Number 18475480
Grant Number 12512790
Status In Force
Filing Date 2023-09-27
First Publication Date 2024-06-06
Grant Date 2025-12-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Jain, Nishant
  • Parupalli, Vamsikrishna
  • Agarwal, Gaurav

Abstract

A system may include a pulse-width modulation mode path configured to drive a load at an output of the system in a first mode of operation, a linear mode path configured to drive the load in a second mode of operation, a common mode control feedback loop configured to set a value of a common mode output signal at the output in the second mode of operation, and an auxiliary circuit coupled to the common mode feedback control loop and configured to maintain a state of the common mode feedback control loop during the first mode of operation as the state was or will be during the second mode of operation.

IPC Classes  ?

  • H03F 1/02 - Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers
  • H03F 3/45 - Differential amplifiers

76.

Successive approximation register analog-to-digital converter with multiple sample capacitors

      
Application Number 18098544
Grant Number 12160248
Status In Force
Filing Date 2023-01-18
First Publication Date 2024-06-06
Grant Date 2024-12-03
Owner Cirrus Logic Inc. (USA)
Inventor
  • Parupalli, Vamsikrishna
  • Ash, Mikel
  • Wen, Jianping
  • Hagge, Melvin L.

Abstract

A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of a plurality of capacitor networks has a plurality of sampling capacitors for sampling over a plurality of sampling sub-phases an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC comprising a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks.

IPC Classes  ?

  • H03M 1/46 - Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
  • H03M 1/80 - Simultaneous conversion using weighted impedances

77.

Natural speech detection

      
Application Number 17989266
Grant Number 12431132
Status In Force
Filing Date 2022-11-17
First Publication Date 2024-05-23
Grant Date 2025-09-30
Owner Cirrus Logic Inc. (USA)
Inventor Sherwood, William E.

Abstract

A system, comprising: a plurality of distributed smart devices comprising: a first smart device having a first microphone; a second smart device having a second microphone; and processing circuitry, configured to: receive, from the first microphone, a first microphone signal comprising speech of a user; receive, from the second microphone, a second microphone signal comprising the speech of the user; determine an orientation of the user's head relative to the first smart device and the second smart device based on the first microphone signal and the second microphone signal, wherein determining the orientation of the user's head comprises comparing first power levels in a plurality of frequency bands of the first microphone signal; and controlling one or more of the plurality of distributed smart devices based on the determined orientation.

IPC Classes  ?

  • G10L 15/22 - Procedures used during a speech recognition process, e.g. man-machine dialog
  • G10L 15/28 - Constructional details of speech recognition systems
  • G10L 25/18 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the type of extracted parameters the extracted parameters being spectral information of each sub-band
  • G10L 25/21 - Speech or voice analysis techniques not restricted to a single one of groups characterised by the type of extracted parameters the extracted parameters being power information
  • H04R 1/40 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
  • H04R 3/00 - Circuits for transducers

78.

Force sensing systems

      
Application Number 18418957
Grant Number 12166502
Status In Force
Filing Date 2024-01-22
First Publication Date 2024-05-16
Grant Date 2024-12-10
Owner Cirrus Logic Inc. (USA)
Inventor Mcveigh, Gavin

Abstract

The present disclosure relates to a compensation circuit for compensating for an offset voltage that is present in an output signal output by a force sensor. The compensation circuit comprises: voltage divider circuitry, the voltage divider circuitry configured to receive a bias voltage that is also supplied to the force sensor and to output a control voltage derived from the bias voltage, wherein a component mismatch ratio of the voltage divider circuitry is adjustable to correspond to a component mismatch ratio of the force sensor; current generator circuitry configured to receive the control voltage and to generate a compensating current based on the received control voltage; and amplifier circuitry configured to receive the differential signal output by the force sensor and the compensating current and to output a compensated differential output signal in which the offset voltage is at least partially cancelled.

IPC Classes  ?

  • H03M 1/78 - Simultaneous conversion using ladder network
  • G01L 1/22 - Measuring force or stress, in general by measuring variations in ohmic resistance of solid materials or of electrically-conductive fluidsMeasuring force or stress, in general by making use of electrokinetic cells, i.e. liquid-containing cells wherein an electrical potential is produced or varied upon the application of stress using resistance strain gauges
  • H03F 3/45 - Differential amplifiers
  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03M 1/16 - Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
  • H03M 1/66 - Digital/analogue converters
  • H03M 1/80 - Simultaneous conversion using weighted impedances

79.

Systems and methods for determining battery state of charge

      
Application Number 17982694
Grant Number 12613282
Status In Force
Filing Date 2022-11-08
First Publication Date 2024-05-09
Grant Date 2026-04-28
Owner Cirrus Logic Inc. (USA)
Inventor
  • Zhang, Yandong
  • Melanson, John L.

Abstract

A method for estimating a battery state of charge may include determining a first estimated state of charge and a first estimated accuracy of the state of charge using a first estimation approach, determining a second estimated state of charge and a second estimated accuracy of the state of charge using a second estimation approach, and estimating the battery state of charge based on the first estimated state of charge, the first estimated accuracy of the state of charge, the second estimated state of charge, and the second estimated accuracy of the state of charge.

IPC Classes  ?

  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/3828 - Arrangements for monitoring battery or accumulator variables, e.g. SoC using current integration
  • G01R 31/3832 - Arrangements for monitoring battery or accumulator variables, e.g. SoC using current integration without measurement of battery voltage

80.

Driver circuitry

      
Application Number 18410837
Grant Number 12167696
Status In Force
Filing Date 2024-01-11
First Publication Date 2024-05-09
Grant Date 2024-12-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Doy, Anthony S.

Abstract

The present disclosure relates to circuitry for driving a piezoelectric transducer to generate an audio output. The circuitry comprises pre-processor circuitry configured to process an input audio signal to generate a processed signal; driver circuitry coupled to the pre-processor circuitry and configured to generate a drive signal, based on the processed signal, for driving the piezoelectric transducer; and processor circuitry configured to determine a resonant frequency of the piezoelectric transducer. The pre-processor circuitry is configured to process the input audio signal based on the determined resonant frequency so as to generate the processed signal.

IPC Classes  ?

  • H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
  • B06B 1/02 - Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency making use of electrical energy
  • H10N 30/80 - Constructional details

81.

Voltage supply

      
Application Number 18483727
Grant Number 12549178
Status In Force
Filing Date 2023-10-10
First Publication Date 2024-05-09
Grant Date 2026-02-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Sharma, Kapil
  • Howlett, Andrew J.
  • Petherbridge, Matthew
  • Bowlerwell, John B.
  • Angus, Graeme S.
  • Russell, Gordon

Abstract

b) for receiving the first voltage, and the first and second circuit branches are connected to the first and second IC die contacts respectively. Ancillary circuitry (105) is configured to receive a supply voltage from a voltage supply node voltage which is connected to the first and second IC die contacts via respective first and second respectively matched resistances.

IPC Classes  ?

  • H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

82.

Online characterization of battery model parameters with augmented dynamic stimulus

      
Application Number 18308420
Grant Number 12547130
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-04-25
Grant Date 2026-02-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Ebenezer, Samuel P.
  • King, Eric J.
  • Marchais, Emmanuel A.
  • Hendrix, Jon D.
  • Sabet, Mohamed

Abstract

A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining a sink current for augmenting the current drawn by the load, and generating the sink current based on a determined need to update the parameters.

IPC Classes  ?

  • G05B 13/04 - Adaptive control systems, i.e. systems automatically adjusting themselves to have a performance which is optimum according to some preassigned criterion electric involving the use of models or simulators
  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables

83.

Estimation of battery equivalent circuit model parameters by decomposition of sense current and terminal voltage into subbands

      
Application Number 18308449
Grant Number 12601787
Status In Force
Filing Date 2023-04-27
First Publication Date 2024-04-25
Grant Date 2026-04-14
Owner Cirrus Logic Inc. (USA)
Inventor
  • Ebenezer, Samuel P.
  • Marchais, Emmanuel A.
  • King, Eric J.

Abstract

A method for estimating equivalent circuit model parameters of a battery may include measuring a battery voltage across terminals of the battery and a battery current drawn from the battery, decomposing the battery voltage and the battery current into a plurality of sub-bands, each sub-band of the plurality of sub-bands based on a time constant that characterizes a temporal behavior of the battery, for each sub-band of the plurality of sub-bands, estimating an equivalent resistance for such sub-band based on a spectral content of the battery voltage and battery current for such sub-band, and estimating an open circuit voltage of the battery based at least on the spectral content of the battery voltage and battery current present in one of the plurality of sub-bands and the equivalent resistances of the plurality of sub-bands.

IPC Classes  ?

  • G01R 31/367 - Software therefor, e.g. for battery testing using modelling or look-up tables
  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements
  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables

84.

Online characterization of battery model parameters with augmented dynamic stimulus

      
Application Number 18455253
Grant Number 12506411
Status In Force
Filing Date 2023-08-24
First Publication Date 2024-04-25
Grant Date 2025-12-23
Owner Cirrus Logic Inc. (USA)
Inventor
  • Ebenezer, Samuel P.
  • Marchais, Emmanuel A.
  • King, Eric J.
  • Melanson, John L.

Abstract

A method for intelligently generating a stimulus for use in characterization of parameters of a model of a battery may include dynamically analyzing a current drawn from the battery by a load, based on analysis of the current, determining an augmented current for augmenting the current drawn by the load, and generating the augmented current based on a determined need to update the parameters.

IPC Classes  ?

  • H02M 3/158 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • G01R 31/374 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC] with means for correcting the measurement for temperature or ageing
  • G01R 31/3842 - Arrangements for monitoring battery or accumulator variables, e.g. SoC combining voltage and current measurements

85.

Method for constructing a solenoid inductor

      
Application Number 18383816
Grant Number 12217898
Status In Force
Filing Date 2023-10-25
First Publication Date 2024-04-25
Grant Date 2025-02-04
Owner Cirrus Logic, Inc. (USA)
Inventor
  • Khenkin, Aleksey
  • Patten, David
  • Yan, Jun

Abstract

A method for constructing a solenoid inductor of an IC package with active/passive devices includes positioning an inner winding substantially around a magnetic core, positioning an outer winding substantially around the inner winding, and using a layered process to perform positioning the inner and outer windings. The layered process includes processing a first conducting layer as a bottom layer of the outer winding, above processing a first dielectric layer, above processing a second conducting layer as a bottom layer of the inner winding, above processing a second dielectric layer, above processing a magnetic core layer, above processing a third dielectric layer, above processing a third conducting layer as a top layer of the inner winding, above processing a fourth dielectric layer, above processing a fourth conducting layer as a top layer of the outer winding, above processing a fifth dielectric layer, and the inner and outer windings are electrically connected.

IPC Classes  ?

  • H01F 7/06 - ElectromagnetsActuators including electromagnets
  • H01F 17/00 - Fixed inductances of the signal type
  • H01F 27/24 - Magnetic cores
  • H01F 27/28 - CoilsWindingsConductive connections
  • H01F 41/08 - Winding conductors onto closed formers or cores, e.g. threading conductors through toroidal cores

86.

Electrochemical cell characterisation

      
Application Number 18453660
Grant Number 12669549
Status In Force
Filing Date 2023-08-22
First Publication Date 2024-04-18
Grant Date 2026-06-30
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Ido, Toru
  • Suryono, Yanto

Abstract

Circuitry for determining an impedance of an electrochemical cell comprising at least one first electrode and a second electrode, the circuitry comprising: drive circuitry configured to apply a stimulus to the electrochemical cell, the stimulus having a stimulation frequency and a stimulation amplitude; and measurement circuitry configured to: sample an output of the electrochemical cell at a sampling frequency to generate an output signal; determine an output amplitude of output signal at one or more alias frequencies, the one or more alias frequency based on the stimulation frequency and the sampling frequency; and determine the impedance of the cell at the stimulation frequency based on the output amplitude at the one or more alias frequencies and the stimulation amplitude; and control circuitry configured to: control the sampling frequency and the stimulation frequency such that a Nyquist rate of the sampling frequency is greater than stimulation frequency.

IPC Classes  ?

  • G01R 31/389 - Measuring internal impedance, internal conductance or related variables
  • G01R 31/36 - Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
  • G01R 31/3835 - Arrangements for monitoring battery or accumulator variables, e.g. SoC involving only voltage measurements

87.

Vibrational transducer control

      
Application Number 18073853
Grant Number 12284493
Status In Force
Filing Date 2022-12-02
First Publication Date 2024-04-04
Grant Date 2025-04-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Li, Ning
  • Sepehr, Hamid
  • Leslie, Ben
  • Khenkin, Aleksey
  • Kurek, Michael
  • Janko, Marco A.
  • Konradi, Vadim
  • Foskey, Peter
  • Treptow, Aaron

Abstract

A method of controlling a vibrational transducer, the method comprising: tracking a temperature metric of the vibrational transducer; and controlling a drive signal for the vibrational transducer, where the drive signal is limited to a value to protect the vibrational transducer from over excursion, and where said value is a function of the tracked temperature metric.

IPC Classes  ?

  • H04R 3/00 - Circuits for transducers
  • H04R 9/02 - Transducers of moving-coil, moving-strip, or moving-wire type Details
  • H04R 29/00 - Monitoring arrangementsTesting arrangements

88.

Filters and filter chains

      
Application Number 18524887
Grant Number 12114137
Status In Force
Filing Date 2023-11-30
First Publication Date 2024-03-28
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

An apparatus, comprising: an audio input for receiving an input audio signal; an tuning input for receiving a tuning signal; a filter chain comprising a plurality of filters for filtering the audio signal to produce a filtered input audio signal, the filter chain comprising: a first filter module operating at a first sampling rate; and a second filter module operating at a second sampling rate greater than the first sampling rate, wherein a phase response of the first filter module is dependent on the tuning input and wherein a magnitude response of the first filter module is substantially independent of the tuning input.

IPC Classes  ?

  • H04R 3/04 - Circuits for transducers for correcting frequency response
  • H04R 1/32 - Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only

89.

Data-dependent glitch and inter-symbol interference minimization in switched-capacitor circuits

      
Application Number 17952863
Grant Number 12132493
Status In Force
Filing Date 2022-09-26
First Publication Date 2024-03-28
Grant Date 2024-10-29
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Zanbaghi, Ramin
  • Hodapp, Stephen T.
  • Amadi, Christophe J.
  • Kummaraguntla, Ravi K.
  • Dutta, Dhrubajyoti

Abstract

A system may include a sampling capacitor and a switch network. The switch network may include one or more first sampling switches electrically coupled to the sampling capacitor and configured to be activated during a first phase of a sampling cycle of the system and one or more second sampling switches electrically coupled to the sampling capacitor and configured to be activated during a second phase of the sampling cycle, wherein the switch network is configured to reset the sampling capacitor to a data-independent and/or signal-independent charge during a reset phase of the sampling cycle.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters

90.

Audio amplifier circuitry

      
Application Number 18521667
Grant Number 12283929
Status In Force
Filing Date 2023-11-28
First Publication Date 2024-03-21
Grant Date 2025-04-22
Owner Cirrus Logic Inc. (USA)
Inventor
  • Singleton, David P.
  • Howlett, Andrew J.
  • Bowlerwell, John B.

Abstract

The present disclosure relates to circuitry comprising audio amplifier circuitry for receiving an audio signal to be amplified; and first and second output nodes for outputting first and second differential output signals. The circuitry further comprises common mode buffer circuitry configured to receive a common mode voltage and to selectively output the common mode voltage to the first and second output nodes.

IPC Classes  ?

91.

Configurable ground switch to support power delivery between two supply domains

      
Application Number 17948442
Grant Number 12034442
Status In Force
Filing Date 2022-09-20
First Publication Date 2024-03-21
Grant Date 2024-07-09
Owner Cirrus Logic Inc. (USA)
Inventor
  • Shannon, Donelson A.
  • Wen, Jianping

Abstract

A system may include a first power domain defined by a first supply rail and a first ground rail, a second power domain defined by a second supply rail and a second ground rail, and a configurable switch coupled between the first ground rail and the second ground rail such that when the configurable switch is enabled, the first ground rail and the second ground rail are electrically shorted to one another and when the configurable switch is disabled, the first ground rail and the second ground rail are electrically isolated from one another.

IPC Classes  ?

  • G11C 5/14 - Power supply arrangements
  • G11C 17/00 - Read-only memories programmable only onceSemi-permanent stores, e.g. manually-replaceable information cards
  • H03K 19/0185 - Coupling arrangementsInterface arrangements using field-effect transistors only

92.

Circuitry for analyte measurement

      
Application Number 17940225
Grant Number 12405243
Status In Force
Filing Date 2022-09-08
First Publication Date 2024-03-14
Grant Date 2025-09-02
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

Circuitry for measuring a characteristic of an electrochemical cell, the electrochemical cell comprising at least one working electrode and a counter electrode, the circuitry comprising: driver circuitry configured to apply a working bias voltage to the at least one working electrode and a counter bias voltage at the counter electrode to produce a first voltage bias between the at least one working electrode and the counter electrode; control circuitry configured to adjust the first voltage bias over a first bias range by varying the working bias voltage and the counter bias voltage.

IPC Classes  ?

  • G01N 27/416 - Systems
  • G01N 27/00 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
  • G01N 27/30 - Electrodes, e.g. test electrodesHalf-cells

93.

Compensation of environmental drift by tracking switched capacitor impedance versus resistor impedance

      
Application Number 17939166
Grant Number 12132494
Status In Force
Filing Date 2022-09-07
First Publication Date 2024-03-07
Grant Date 2024-10-29
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.

IPC Classes  ?

  • H03M 1/06 - Continuously compensating for, or preventing, undesired influence of physical parameters
  • H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
  • H03M 1/10 - Calibration or testing
  • H03H 11/04 - Frequency selective two-port networks

94.

Hybrid power converter

      
Application Number 18505849
Grant Number 12191766
Status In Force
Filing Date 2023-11-09
First Publication Date 2024-03-07
Grant Date 2025-01-07
Owner Cirrus Logic Inc. (USA)
Inventor Lim, Changjong

Abstract

A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capacitor terminal.

IPC Classes  ?

  • H02M 3/07 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode
  • H02M 1/00 - Details of apparatus for conversion

95.

Driver circuitry comprising active inductor circuitry for piezoelectric transducers

      
Application Number 18486609
Grant Number 12396367
Status In Force
Filing Date 2023-10-13
First Publication Date 2024-02-29
Grant Date 2025-08-19
Owner Cirrus Logic Inc. (USA)
Inventor Lesso, John P.

Abstract

The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry may be implemented as an integrated circuit and comprises driver circuitry configured to supply a drive signal to cause the transducer to generate an output signal and active inductor circuitry configured to be coupled with the piezoelectric transducer. The active inductor circuitry may be tuneable to adjust a frequency characteristic of the output signal.

IPC Classes  ?

  • H01L 41/04 - SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR - Details thereof - Details of piezo-electric or electrostrictive elements
  • H01L 41/107 - Piezo-electric or electrostrictive elements with electrical input and electrical output
  • H10N 30/40 - Piezoelectric or electrostrictive devices with electrical input and electrical output, e.g. functioning as transformers
  • H10N 30/80 - Constructional details

96.

Power supply architecture with bidirectional battery idealization

      
Application Number 18503830
Grant Number 12184110
Status In Force
Filing Date 2023-11-07
First Publication Date 2024-02-29
Grant Date 2024-12-31
Owner Cirrus Logic Inc. (USA)
Inventor
  • Perry, Ivan
  • Akram, Hasnain
  • King, Eric J.

Abstract

A power management system for use in a device comprising a battery and one or more components configured to draw electrical energy from the battery may include a first power converter configured to electrically couple between charging circuitry configured to provide electrical energy for charging the battery and the one or more downstream components and a bidirectional power converter configured to electrically couple between the charging circuitry and the battery, wherein the bidirectional power converter is configured to transfer charge from the battery or transfer charge from the battery based on a power requirement of the one or more components and a power available from the first power converter.

IPC Classes  ?

  • H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

97.

Differential driver having input signal-controlled common-mode reference

      
Application Number 17894294
Grant Number 12431850
Status In Force
Filing Date 2022-08-24
First Publication Date 2024-02-29
Grant Date 2025-09-30
Owner CIRRUS LOGIC, INC. (USA)
Inventor Parupalli, Vamsikrishna

Abstract

A differential amplifier provides improved signal swing and reduced common-mode output noise. The differential amplifier circuit includes a driver circuit with a first output for driving a first output of the differential amplifier and with a second output for driving a second output of the differential amplifier. The driver circuit has inputs for receiving a differential (complementary) pair of input signals at least one common-mode reference input for receiving a common-mode reference signal. The differential amplifier also includes a signal maxima detector having inputs for receiving the differential input signals that detects a maximum value between the individual signals, including any input common-mode voltage. The differential amplifier also includes a common-mode reference circuit that provides the common-mode reference signal and an input coupled to an output of the signal maxima detector, so that a common-mode voltage of the outputs is independent of power supply voltages provided to the driver circuit.

IPC Classes  ?

98.

Calibration of anti-aliasing filter mismatch

      
Application Number 17895897
Grant Number 12113551
Status In Force
Filing Date 2022-08-25
First Publication Date 2024-02-29
Grant Date 2024-10-08
Owner Cirrus Logic Inc. (USA)
Inventor
  • Norouzpourshirazi, Arashk
  • Melanson, John L.
  • Thomsen, Axel

Abstract

In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.

IPC Classes  ?

  • H03M 3/00 - Conversion of analogue values to or from differential modulation
  • H03F 3/217 - Class D power amplifiersSwitching amplifiers

99.

Circuitry for analyte measurement

      
Application Number 18498918
Grant Number 12535449
Status In Force
Filing Date 2023-10-31
First Publication Date 2024-02-29
Grant Date 2026-01-27
Owner Cirrus Logic Inc. (USA)
Inventor
  • Lesso, John P.
  • Ido, Toru

Abstract

Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.

IPC Classes  ?

  • G01R 19/257 - Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method
  • G01N 27/327 - Biochemical electrodes
  • G01R 19/165 - Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

100.

Gain and mismatch calibration for a phase detector used in an inductive sensor

      
Application Number 18470066
Grant Number 12085525
Status In Force
Filing Date 2023-09-19
First Publication Date 2024-02-22
Grant Date 2024-09-10
Owner Cirrus Logic Inc. (USA)
Inventor
  • Das, Tejasvi
  • Maru, Siddharth
  • Melanson, John L.

Abstract

A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.

IPC Classes  ?

  • G01N 27/02 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance
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