Abstract

It was found that certain VCO devices used in microwave frequency synthesizers exhibit prolonged ringing oscillation during extreme voltage jumps above a critical limit, but that this effect could be significantly reduced by splitting the voltage adjustment over multiple steps. This finding was used to improve the switching speed of such devices (e.g. wideband VCO with a computer processor, base frequency generator VCO and a frequency divider). Here, before implementing a command to switch frequencies (by changing the base frequency oscillator and frequency divider settings), the processor first determines if this change will require an extreme voltage jump likely to cause such oscillations. If so, the processor implements this voltage jump as a multiple step process, resulting in a significant reduction in the maximum time required to switch frequencies.

IPC Classes  ?

• H03L 7/10 - Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
• H03L 7/089 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
• H04B 7/185 - Space-based or airborne stations
• H03L 7/00 - Automatic control of frequency or phaseSynchronisation

Abstract

An apparatus and method for building and operating of a YIG-based filter-attenuator module with closed-loop control. The module combines both signal filtering and amplitude control functions by utilizing an yttrium-iron-garnet (YIG) resonator. A technique for a closed-loop calibration and control also disclosed. This apparatus and method provides a cost effective harmonic rejection/amplitude control solution for microwave test-and-measurement instruments such as signal generators and spectrum analyzers.

IPC Classes  ?

• H03B 5/30 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element being electromechanical resonator
• H01P 7/00 - Resonators of the waveguide type
• H03B 5/10 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being vacuum tube
• H03B 5/18 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance

Abstract

A dual-resonator YIG oscillator with a main YIG resonator and a stabilizing YIG resonator both suspended in a common magnetic field. The main YIG resonator takes on the high-Q factor aspects of the oscillator, while the stabilizing YIG resonator helps stabilize the operation of the main YIG resonator, and also allows the main YIG resonator operate at higher magnetic field strengths, achieving higher frequency operation. The stabilizing YIG resonator also enables the oscillator's active device to operate in a more linear, lower phase noise, regime. As compared to conventional YIG oscillators, the disclosed dual resonator YIG oscillator provides significant performance improvements, such as higher frequency operation, lower power consumption, higher tuning speed, and lower phase noise.

IPC Classes  ?

• H03K 3/03 - Astable circuits
• H03B 5/18 - Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising distributed inductance and capacitance
• H01P 1/218 - Frequency-selective devices, e.g. filters using ferromagnetic material the ferromagnetic material acting as a frequency selective coupling element, e.g. YIG-filters
• H01P 1/20 - Frequency-selective devices, e.g. filters
• H01P 7/00 - Resonators of the waveguide type

Abstract

An improved noise-corrected phase-locked loop frequency synthesizer configured to reduce noise, such as phase noise and spurious signals, without the use of switching circuits. The synthesizer uses a phase shifter device configured to accept a noise containing frequency signal from a voltage controlled oscillator (VCO) circuit, such as an integer-N single loop PLL synthesizer, as well as noise reducing control signals from a noise detecting sensor or circuit, and output a noise reduced VCO frequency signal. In some embodiments, the noise reducing sensor may be formed from a second, lower noise, phase locked loop circuit. The frequency synthesizer circuit, noise detecting sensor, and the phase shifter device are configured to all run continuously, with the noise reducing sensor and frequency shifter continually acting to reduce noise, produced by higher noise integer-N PLL frequency synthesizer.

IPC Classes  ?

• H03L 7/06 - Automatic control of frequency or phaseSynchronisation using a reference signal applied to a frequency- or phase-locked loop
• H03L 7/087 - Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
• H03L 7/099 - Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
• H03K 5/1252 - Suppression or limitation of noise or interference

Abstract

System and method of using a processor driven master Quad-SPI (QSPI) bus or interface to simultaneously and time-synchronously transmit different streams of data from a FIFO buffer to a plurality of different slave SPI interface peripherals. Here the QSPI interface data ports are configured to simultaneously transmit multiple 1 bit wide streams of different binary data and different chip select commands on an SPI clock cycle synchronized basis. Additional SPI slave peripherals may be controlled by use of additional non-SPI clock synchronized GPIO chip select commands and suitable logic gates. These methods are useful for creating a variety of embedded systems with faster response speeds, such as improved microwave frequency synthesizers with faster frequency changing times.

IPC Classes  ?

• G06F 3/00 - Input arrangements for transferring data to be processed into a form capable of being handled by the computerOutput arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• G06F 13/16 - Handling requests for interconnection or transfer for access to memory bus
• G06F 13/10 - Program control for peripheral devices