Ciena Corporation

United States of America

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2026 July 16
2026 June 11
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IPC Class
H04J 14/02 - Wavelength-division multiplex systems 247
H04Q 11/00 - Selecting arrangements for multiplex systems 195
H04L 12/24 - Arrangements for maintenance or administration 175
H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal 170
H04L 12/26 - Monitoring arrangements; Testing arrangements 121
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09 - Scientific and electric apparatus and instruments 29
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1.

Optical Hybrid with a Folded, Tilted MMI

      
Application Number 19572849
Status Pending
Filing Date 2026-03-19
First Publication Date 2026-07-30
Owner Ciena Corporation (USA)
Inventor Painchaud, Yves

Abstract

An optical hybrid device is disclosed for use in photonic integrated circuits, including coherent optical receivers. The device includes a first multi-mode interferometer (MMI) configured as a 2×4 splitter and a second MMI configured as a 2×2 coupler directly connected to two outputs of the 2×4 MMI. The 2×2 MMI is folded about a midpoint to form first and second serial sections having respective tilt angles. A first phase shift is introduced at an interface tilt and a second phase shift is introduced at the fold, such that the combined phase condition maintains quadrature relationships among four output signals. The folded configuration reduces the required tilt magnitude relative to an unfolded 2×2 MMI, enables a substantially horizontal output section, simplifies routing to output waveguides, and improves manufacturability, yield, and wavelength performance. The folded topology further provides an improved starting geometry for iterative optimization of MMI boundaries.

IPC Classes  ?

  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means

2.

METHOD AND APPARATUS FOR DETECTING AND/OR IDENTIFYING OBJECTS

      
Application Number 19574798
Status Pending
Filing Date 2026-03-23
First Publication Date 2026-07-30
Owner CIENA CORPORATION (USA)
Inventor
  • Buscaino, Brandon Taylor
  • Pasandi, Mohammad Ebrahim Mousa
  • Roberts, Kim Byron

Abstract

Aspects of the subject disclosure may include, for example, creating a first sequence of optical signals based on a first sequence of electrical signals, the first sequence of electrical signals associated with a plurality of matched filters, directing the first sequence of optical signals to a plurality of objects, receiving a second sequence of optical signals based on a reflection of the first sequence of optical signals on the plurality of objects, converting the second sequence optical signals into a second sequence of electrical signals, processing the second sequence of electrical signals according to the plurality of matched filters to extract information associated with the plurality of objects, adjusting the first sequence of electrical signals to a third sequence of electrical signals, adjusting the plurality of matched filters according to the third sequence of electrical signals, generating from the third sequence of the electrical signals an adjusted sequence of optical signals, and directing the adjusted sequence of optical signals to further refine the extract information associated with the plurality of objects. Other embodiments are disclosed.

IPC Classes  ?

3.

SMALL FORM FACTOR LATCH DETECTOR SWITCH ASSEMBLY FOR PLUGGABLE CIRCUIT PACKS IN SCALABLE NETWORK EQUIPMENT

      
Application Number 19078371
Status Pending
Filing Date 2025-03-13
First Publication Date 2026-07-30
Owner Ciena Corporation (USA)
Inventor
  • Gupta, Chander Prakash
  • Singla, Sachin
  • Agrawal, Suyash
  • Heda, Sardeep
  • Mays, Russell

Abstract

A latch detector switch assembly including a plunger rod having a protruding and terminating ends, a spring cage securing the plunger rod to a printed circuit board of a circuit pack, where the protruding end of the plunger rod protrudes through a port in a faceplate of the circuit pack and be contacted by a latch of the circuit pack when actuated to close/lock the circuit pack in a chassis, thereby translating the plunger rod into the circuit pack and through the spring cage, and a switch coupled to the printed circuit board of the circuit pack and receive the terminating end of the plunger rod when the plunger rod is translated into the circuit pack and through the spring cage, thereby actuating the switch and generating an electric signal indicating that the latch is actuated to close/lock the circuit pack in the chassis.

IPC Classes  ?

  • H01H 3/46 - Driving mechanisms, i.e. for transmitting driving force to the contacts using rod or lever linkage, e.g. toggle
  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components

4.

FLEXIBLE DIAPHRAGM VAPOUR CHAMBER HEAT SINK ASSEMBLY

      
Application Number 19038941
Status Pending
Filing Date 2025-01-28
First Publication Date 2026-07-30
Owner Ciena Corporation (USA)
Inventor
  • Ajersch, Peter
  • Meunier, Trevor

Abstract

A flexible diaphragm vapour chamber heat sink assembly including a vapour chamber heat sink including a rigid outer surface and a flexible device surface coupled together and separated to form a vapour chamber space there between, where the flexible device surface is adapted to be disposed adjacent to and in thermal contact with a device and/or die disposed on a printed circuit board. In some embodiments, the flexible diaphragm vapour chamber heat sink assembly further includes a plurality of partial pillars and/or spring members disposed between and coupled to one of the flexible device surface and the rigid outer surface, where the plurality of partial pillars and/or spring members are disposed within the vapour chamber space proximate the device and/or die and adapted to limit and/or control compression of the vapour chamber space when the device and/or die deflect the flexible device surface.

IPC Classes  ?

5.

Optimization of spectrum sharing in optical line systems

      
Application Number 19135505
Status Pending
Filing Date 2024-01-25
First Publication Date 2026-07-23
Owner Ciena Corporation (USA)
Inventor
  • Mehta, Priyanth
  • Evans, Darwin
  • Hubbard, Michael
  • Keys, Robert W.

Abstract

Systems and methods for optimization of spectrum sharing in optical line systems include, for at least one fiber having optical spectrum being shared by at least two users in an optical line system (100), assigning (302) value to the optical spectrum; determining (304) using a policy and the assigned value of the optical spectrum how to partition the optical spectrum between the at least two users; and causing (306) implementation of the partition of the optical spectrum. The assigned value of the optical spectrum can be based on information carrying capacity in bandwidth per second. The assigned value of the optical spectrum accounts for performance versus frequency, such that, e.g., two or more of the at least two users have different amounts of the optical spectrum from one another.

IPC Classes  ?

  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H04J 14/02 - Wavelength-division multiplex systems
  • H04Q 11/00 - Selecting arrangements for multiplex systems

6.

Optical Amplifier Failure Prediction Using Machine Learning

      
Application Number 19569111
Status Pending
Filing Date 2026-03-17
First Publication Date 2026-07-23
Owner Ciena Corporation (USA)
Inventor
  • Demars, Carter
  • Pei, Yinqing
  • Boertjes, David W.

Abstract

An optical network monitoring technique predicts degradation or failure of optical amplifiers using machine learning. Operational data associated with an optical amplifier, such as optical power measurements, pump parameters, spectral loading characteristics, and configuration parameters, is collected during in-service operation of the amplifier in an optical network. The operational data is analyzed using a trained machine learning model configured to learn relationships between operating conditions and normal amplifier behavior. Based on the analysis, the model generates prediction data indicative of a likelihood of degradation or impending failure of the optical amplifier. The prediction may include an anomaly score, classification, or other indicator of amplifier health. Responsive to the prediction, network management actions may be initiated, including generating alerts for proactive maintenance or reconfiguring traffic paths to avoid a degrading amplifier. The approach enables early identification of failing optical amplifiers using commonly available operational data without requiring specialized monitoring hardware.

IPC Classes  ?

  • H01S 3/00 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
  • H01S 3/067 - Fibre lasers
  • H01S 3/0941 - Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light of a semiconductor laser, e.g. of a laser diode
  • H01S 3/10 - Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating
  • H04B 10/073 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an out-of-service signal

7.

Selecting a Best Available Precision Time Protocol (PTP) Backup when a Global Navigation Satellite System (GNSS) Clock Source is Unavailable

      
Application Number 19063979
Status Pending
Filing Date 2025-02-26
First Publication Date 2026-07-16
Owner Ciena Corporation (USA)
Inventor
  • Srivastava, Sharad Kumar
  • Saxena, Ankur

Abstract

Systems and methods for selecting a backup clock source are provided. In one implementation, a method includes a step of obtaining multiple data sets representing multiple backup clocks in a communications network. The method further includes a step of analyzing offset characteristics of the multiple backup clocks in order to select a substitute clock source from the multiple backup clocks to operate as a temporary substitute when a primary source of synchronization for the communications network is unavailable. For each backup clock, the offset characteristics are related to a synchronization offset of the associated backup clock with respect to the primary source.

IPC Classes  ?

8.

SYSTEMS AND METHODS FOR TIME DOMAIN EQUALIZATION ENHANCED PHASE NOISE (EEPN) TRACKING AND COMPENSATION

      
Application Number 19179118
Status Pending
Filing Date 2025-04-15
First Publication Date 2026-07-16
Owner CIENA CORPORATION (USA)
Inventor
  • Gharan, Shahab Oveis
  • Harley, James S.
  • Roberts, Kim Byron

Abstract

Aspects of the subject disclosure may include, for example, generating, by a processing system including a processor, an error estimate based on information from a carrier phase recovery system that digitally recovers a carrier phase associated with a signal, deriving, by the processing system, filter coefficients based on the error estimate, and using, by the processing system, the filter coefficients to perform EEPN compensation relating to the signal, wherein a correlation time of at least one of the filter coefficients is substantially equal to a relative delay associated with digital compensation of chromatic dispersion relating to the signal. Other embodiments are disclosed.

IPC Classes  ?

9.

METHOD AND SYSTEM FOR IMPROVED TOLERANCE TO LINEAR AND NONLINEAR IMPAIRMENTS

      
Application Number 19277767
Status Pending
Filing Date 2025-07-23
First Publication Date 2026-07-16
Owner CIENA CORPORATION (USA)
Inventor
  • Reimer, Michael Andrew
  • Bergen, Mark Henry
  • Gharan, Shahab Oveis
  • Harley, James S.
  • Roberts, Kim Byron

Abstract

Aspects of the subject disclosure may include, for example, generating an error estimate based on information from a carrier phase recovery system that digitally recovers a carrier phase associated with a signal of a first polarization, deriving a first filter coefficient based on the error estimate and estimated symbols of the signal, wherein the first filter coefficient is a complex value, deriving a second filter coefficient based on the error estimate and estimated symbols of another signal of a second polarization orthogonal to the first polarization, wherein the second filter coefficient is a complex value, and using the first filter coefficient and the second filter coefficient to at least partially compensate for impairments relating to the signal. Other embodiments are disclosed.

IPC Classes  ?

10.

Dynamic Spectral Equalization in Ladder Protected Optical Networks

      
Application Number 19015931
Status Pending
Filing Date 2025-01-10
First Publication Date 2026-07-16
Owner Ciena Corporation (USA)
Inventor
  • Jones, Kevan Peter
  • Talon, Veronique
  • Hinds, Mark R.

Abstract

A dynamic equalization method is implemented in a downstream intermediate line amplifier (ILA) node that include an ILA and a trunk protection switch (TPS) connected to a plurality of paths, each forming a rung in a ladder protection scheme. The dynamic equalization method includes steps of detecting a switch between a first path and a second path of the plurality of paths; compensating for any loss difference between the first path and the second path; and equalizing any optical spectrum differences between the first path and the second path.

IPC Classes  ?

  • H04B 10/67 - Optical arrangements in the receiver
  • H04B 10/2507 - Arrangements specific to fibre transmission for the reduction or elimination of distortion or dispersion

11.

Raman Gain Measurements in Dynamically Controlled Optical Line Systems

      
Application Number 19018076
Status Pending
Filing Date 2025-01-13
First Publication Date 2026-07-16
Owner Ciena Corporation (USA)
Inventor Al Sayeed, Choudhury A.

Abstract

Systems and methods for measuring Raman gain in an optical span include, subsequent to determining a baseline measurement of a first total-power output at an upstream node and a first total-power input at a downstream node, causing a measurement a second total-power output at the upstream node and a second total-power input at the downstream node with one or more Raman pump lasers on; and determining a Raman gain for the optical span by comparing (a) a difference between the first total-power output and the first total-power input to (b) a difference between the second total-power output and the second total-power input. The baseline measurement was determined when one or more Raman pump lasers associated with the optical span were turned off. The Raman gain reflects an effective gain achieved over all of the optical span rather than only at a local amplifier input.

IPC Classes  ?

  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H01S 3/00 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
  • H01S 3/067 - Fibre lasers
  • H01S 3/094 - Processes or apparatus for excitation, e.g. pumping using optical pumping by coherent light
  • H01S 3/30 - Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range using scattering effects, e.g. stimulated Brillouin or Raman effects

12.

OUT-OF-ORDER READ-RETURN EQUALIZATION

      
Application Number 19020163
Status Pending
Filing Date 2025-01-14
First Publication Date 2026-07-16
Owner CIENA CORPORATION (USA)
Inventor
  • Faltas, Marianne Michel
  • Meyer, Peter Andreas
  • Wight, Mark Stephen

Abstract

Aspects of the subject disclosure may include, for example, generating a group of ordered identification tags that are appended to a group of pending read-request operations generated by a leader process and requesting a return of read data from a group of follower processes. A group of read-return operations including the group of ordered identification tags is intercepted and includes, in no particular order, read data obtained from the group of follower processes responsive to the group of pending read-request operations. The group of read-return operations is arranged according to the group of ordered identification tags to obtain a group of ordered, read-return operations including ordered read data obtained from the group of follower processes and provided to the leader process. Other embodiments are disclosed.

IPC Classes  ?

  • G06F 3/06 - Digital input from, or digital output to, record carriers

13.

SYSTEMS AND METHODS FOR EQUALIZATION ENHANCED PHASE NOISE (EEPN) TRACKING AND COMPENSATION

      
Application Number 19014723
Status Pending
Filing Date 2025-01-09
First Publication Date 2026-07-09
Owner CIENA CORPORATION (USA)
Inventor
  • Gharan, Shahab Oveis
  • Harley, James S.
  • Reimer, Michael
  • Roberts, Kim Byron

Abstract

Aspects of the subject disclosure may include, for example, calculating, by an EEPN compensation system of a coherent optical receiver, at least one metric, wherein the coherent optical receiver includes a chromatic dispersion compensation system configured to digitally compensate for chromatic dispersion relating to a signal, and a carrier phase recovery system configured to digitally recover a carrier phase associated with the signal, and wherein the calculating is based on information that is downstream of the chromatic dispersion compensation system, and utilizing, by the EEPN compensation system, the at least one metric to perform EEPN compensation relating to the signal upstream of the carrier phase recovery system. Other embodiments are disclosed.

IPC Classes  ?

14.

System and Method to Enhance Network Simulation Accuracy Through Calibration and Model Optimization

      
Application Number 19007773
Status Pending
Filing Date 2025-01-02
First Publication Date 2026-07-02
Owner Ciena Corporation (USA)
Inventor
  • Barber, Christopher
  • Davoudzade, Maede
  • Esfandiari, Babak
  • Kunz, Thomas

Abstract

A network simulation system and method including a network simulation including instructions stored in a memory and executed by a processor to simulate the operation of a network, and a processing delay model including instructions stored in a memory and executed by a processor to enable the network simulation to simulate the operation of the network incorporating processing delay, where the processing delay model includes an objective calibration function, where the network is operated responsive to the simulated operation of the network incorporating the processing delay. The processing delay model enables the network simulation to simulate the operation of the network incorporating processing delay via the objective calibration function using estimated calibration values.

IPC Classes  ?

15.

Intertwined TROSA Heatsink Fin Adapter for High Power TROSA Heatsink for Bidirectional Coherent Optics for Outdoor Conduction Cooled System

      
Application Number 19047707
Status Pending
Filing Date 2025-02-07
First Publication Date 2026-07-02
Owner Ciena Corporation (USA)
Inventor
  • Mahawar, Rampratap
  • Kumar, Shubham
  • Gupta, Chander Prakash
  • Singh, Prem

Abstract

A transmit-receive optical sub-assembly (TROSA) fin adapter assembly that effectively thermally couples the heatsink fins and plug body of a plug with a cold plate or chassis heatsink. The TROSA fin adapter assembly includes an adapter body that is disposed above and around the heatsink fins of the plug and a plurality of adapter fins that are disposed between and intertwined with the heatsink fins of the plug. Optionally, the TROSA fin adapter assembly includes adapter sides that are also disposed adjacent to the sides of the plug body. Thus, the TROSA fin adapter provides a conformal thermal interface between the heatsink fins and plug body of the plug and the cold plate or chassis heatsink. The result is the TROSA of the high power optics of the BiDi coherent plug of an air cooled conduction system, such as an outdoor system, being adequately cooled under most ambient conditions.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

16.

Improving Holdover of a PTP Network in BTCA using Frequency Support

      
Application Number 19048078
Status Pending
Filing Date 2025-02-07
First Publication Date 2026-07-02
Owner Ciena Corporation (USA)
Inventor
  • Saleem A, Arshad
  • Saxena, Ankur
  • Srivastava, Sharad

Abstract

Systems and methods for enhancing time holdover in a Precision Time Protocol (PTP) network involve leveraging the best available frequency support while disqualifying time input from a degraded PTP clock. A method includes steps of entering holdover in Precision Time Protocol (PTP) indicating a degraded time synchronization state; determining parameters for a Best Time Clock Algorithm (BTCA), the parameters including a Frequency Traceable flag; providing the parameters to other nodes in the network; and implementing the BTCA including consideration of the Frequency Traceable flag, to select a Best Time Transmitter (BTT) while in the holdover.

IPC Classes  ?

17.

Dynamic Programming Using a Shortest-Path Solution on a Directed Acyclic Graph for Channel Planning with Select Transmission Modes in an Optical Link

      
Application Number 18989175
Status Pending
Filing Date 2024-12-20
First Publication Date 2026-06-25
Owner Ciena Corporation (USA)
Inventor Dosseva, Maria Ilkova

Abstract

Systems and methods for dynamic programming using a longest-path solution for channel planning with select baud rates in an optical link include determining a max bit rate table for an optical link based on a provided effective signal-to-noise ratio (ESNR) curve and a Required Effective Signal-to-Noise Ratio (ReSNR) lookup table for that given optical link; constructing a solution graph that encodes possible channel plans for the transmitters and receivers over the optical span, wherein the solution graph includes vertices that represent a possible state and each edge represents a viable transition between states, weighted by a negative capacity gained for the selection of that transition, for dynamic programming; and traversing the solution graph to find a solution for a channel plan on the optical link.

IPC Classes  ?

  • H04Q 11/00 - Selecting arrangements for multiplex systems
  • H04J 14/02 - Wavelength-division multiplex systems

18.

Hardened optical platform including high-power electro-optics and heat dissipating circuitry and associated thermal solution

      
Application Number 19032251
Status Pending
Filing Date 2025-01-20
First Publication Date 2026-06-25
Owner Ciena Corporation (USA)
Inventor
  • Gupta, Chander Prakash
  • Singla, Sachin
  • Chaurasiya, Ranjeet
  • Mahawar, Rampratap
  • Kumar, Shubham

Abstract

A thermal solution using a heat exchanger mounted inside an outdoor telecom unit. More specifically, a hardened optical platform includes a base chassis and a lid configured to seal an interior of the base chassis, wherein each of the base chassis and the lid include a plurality of fins. The hardened optical platform also including a vapor chamber in the interior including a heat exchanger. The heat exchanger including a second plurality of fins that are intertwined with a third plurality of fins on the base chassis in the interior.

IPC Classes  ?

19.

CURRENT-SOURCING TEMPERATURE COMPENSATED LOGARITHMIC TRANSIMPEDANCE AMPLIFIER USING NPN MATCHED TRANSISTORS WITH OUTPUT ADJUSTABLE VOLTAGE

      
Application Number 18985821
Status Pending
Filing Date 2024-12-18
First Publication Date 2026-06-18
Owner CIENA CORPORATION (USA)
Inventor
  • Pourzadi, Aref
  • Aguirre, Jorge
  • Xu, Zhan

Abstract

Aspects of the subject disclosure may include, for example, first and second operational amplifiers; and a differential pair of NPN transistors in a feedback path of the TLA configured to convert an input current signal into an output voltage signal, where a first emitter of a first NPN transistor of the pair of NPN transistors is connected to an inverting input of the first operational amplifier, and where a second emitter of a second NPN transistor of the pair of NPN transistors is connected to a non-inverting input of the second operational amplifier. Other embodiments are disclosed.

IPC Classes  ?

  • G06G 7/24 - Arrangements for performing computing operations, e.g. amplifiers specially adapted therefor for evaluating logarithmic or exponential functions, e.g. hyperbolic functions
  • H03F 1/08 - Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
  • H03F 3/08 - Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
  • H03F 3/45 - Differential amplifiers
  • H03G 7/06 - Volume compression or expansion in amplifiers having semiconductor devices
  • H03M 1/08 - Continuously compensating for, or preventing, undesired influence of physical parameters of noise

20.

Method for Application of GNN-Based Network Digital Twin to BGP Route Selection, Fault Localization, Topology Planning, and Failure Analysis

      
Application Number 19056919
Status Pending
Filing Date 2025-02-19
First Publication Date 2026-06-18
Owner Ciena Corporation (USA)
Inventor
  • Barber, Christopher
  • Zalat, Mohamed
  • Esfandiari, Babak
  • Kunz, Thomas

Abstract

Systems and methods for network management are disclosed herein, including collecting network information including at least a topology of the network, traffic flow characteristics, and network performance data; constructing a digital twin of the network based on the collected information, wherein the digital twin includes nodes, links, and associated traffic flows; applying a machine learning model to the digital twin to predict QoS metrics for each traffic flow; and outputting the predicted QoS metrics for further analysis or network actions. The digital twin can be used for various use cases, including, e.g., localizing faults, optimizing QoS metrics over potential BGP routes, network planning to optimize network topologies, what-if failure scenarios, and the like.

IPC Classes  ?

21.

COMMUNICATION SYSTEMS HAVING PLUGGABLE MODULES

      
Application Number 19355501
Status Pending
Filing Date 2025-10-10
First Publication Date 2026-06-18
Owner
  • CIENA CORPORATION (USA)
  • CIENA CORPORATION (USA)
Inventor
  • Winzer, Peter Johannes
  • Pupalaikis, Peter James
  • Sawyer, Brett Michael Dunn

Abstract

A system includes a substrate on which a data processor and a connector block are mounted. The connector block has a first array of electrical connectors on a first surface, and a second array of electrical conducts on a second surface that is oriented at an angle between 45° to 135° relative to a main surface of the substrate. At least a portion of the first array of electrical connectors are electrically coupled to the data processor, and the second array of electrical contacts are electrically connected to the electrical contacts of a pluggable module. The pluggable module includes an optical module, at least one first optical connector, a first fiber optic cable optically coupled between the optical module and the first optical connector, and a fiber guide positioned between the optical module and the first optical connector and provides mechanical support for the optical module and the first optical connector.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02B 6/38 - Mechanical coupling means having fibre to fibre mating means

22.

METHOD FOR APPLICATION OF GNN-BASED NETWORK DIGITAL TWIN TO BGP ROUTE SELECTION, FAULT LOCALIZATION, TOPOLOGY PLANNING, AND FAILURE ANALYSIS

      
Application Number US2025058641
Publication Number 2026/128392
Status In Force
Filing Date 2025-12-08
Publication Date 2026-06-18
Owner CIENA CORPORATION (USA)
Inventor
  • Barber, Christopher
  • Zalat, Mohamed
  • Esfandiari, Babak
  • Kunz, Thomas

Abstract

Systems and methods for network management are disclosed herein, including collecting network information (2002) including at least a topology of the network (10), traffic flow characteristics, and network performance data; constructing a digital twin (410) of the network (10) based on the collected information, wherein the digital twin (410) includes nodes (12), links (14), and associated traffic flows; applying a machine learning model (416) to the digital twin (410) to predict QoS metrics for each traffic flow; and outputting the predicted QoS metrics for further analysis or network actions. The digital twin (410) can be used for various use cases, including, e.g., localizing faults in links (14) and/or nodes (12), optimizing QoS metrics over potential BGP routes via a local search algorithm (414), network planning to optimize network topologies of the network (10), what-if failure scenarios involving removal or disabling of links (14) and/or nodes (12), and the like.

IPC Classes  ?

  • H04L 41/12 - Discovery or management of network topologies
  • H04L 41/14 - Network analysis or design
  • H04L 41/147 - Network analysis or design for predicting network behaviour
  • H04L 41/149 - Network analysis or design for prediction of maintenance
  • H04L 41/16 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using machine learning or artificial intelligence

23.

LIQUID COOLED FACEPLATE FOR COOLING HIGH POWER PLUGGABLE OPTICAL MODULES AND OTHER DEVICES

      
Application Number US2025053890
Publication Number 2026/122250
Status In Force
Filing Date 2025-11-04
Publication Date 2026-06-11
Owner CIENA CORPORATION (USA)
Inventor
  • Ajersch, Peter
  • Meunier, Trevor

Abstract

A liquid cooled faceplate assembly for cooling a pluggable optical module including a faceplate body and a coolant channel coupled to a surface of the faceplate body or formed through the faceplate body adjacent to a nose of the pluggable optical module when the pluggable optical module is inserted through an opening formed in the faceplate body and thermally coupled to the faceplate body. The liquid cooled faceplate assembly also includes a bullnose including a wall structure integrally formed with or coupled to the surface or another surface of the faceplate body and disposed adjacent and thermally coupled to a side of the nose of the pluggable optical module when the pluggable optical module is inserted through the opening formed in the faceplate body.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

24.

Network Cut Analysis using GPU Acceleration

      
Application Number 18971776
Status Pending
Filing Date 2024-12-06
First Publication Date 2026-06-11
Owner Ciena Corporation (USA)
Inventor Cherrington, John Wade

Abstract

Systems and methods include for network cut analysis include storing a routing matrix and a traffic matrix in processing hardware that is configured for matrix multiplication; receiving a request from a controller for one or more cuts in the network with the one or more cuts represented in a path-selective traffic vector that is used to mask out any of the plurality of links associated with the one or more cuts and to shape the traffic demands between router pairs; multiplying the path-selective traffic vector by the traffic matrix to obtain a refined traffic matrix due to the one or more cuts; and multiplying the routing matrix by the refined traffic matrix to obtain a link loading vector representing traffic on each of the plurality of links based on the one or more cuts.

IPC Classes  ?

  • H04L 41/147 - Network analysis or design for predicting network behaviour
  • H04L 41/14 - Network analysis or design

25.

Liquid Cooled Faceplate for Cooling High Power Pluggable Optical Modules and Other Devices

      
Application Number 18966393
Status Pending
Filing Date 2024-12-03
First Publication Date 2026-06-04
Owner Ciena Corporation (USA)
Inventor
  • Ajersch, Peter
  • Meunier, Trevor

Abstract

A liquid cooled faceplate assembly for cooling a pluggable optical module including a faceplate body and a coolant channel coupled to a surface of the faceplate body or formed through the faceplate body adjacent to a nose of the pluggable optical module when the pluggable optical module is inserted through an opening formed in the faceplate body and thermally coupled to the faceplate body. The liquid cooled faceplate assembly also includes a bullnose including a wall structure integrally formed with or coupled to the surface or another surface of the faceplate body and disposed adjacent and thermally coupled to a side of the nose of the pluggable optical module when the pluggable optical module is inserted through the opening formed in the faceplate body.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

26.

COMMUNICATION SYSTEMS HAVING CO-PACKAGED OPTICAL MODULES

      
Application Number 19355377
Status Pending
Filing Date 2025-10-10
First Publication Date 2026-06-04
Owner Ciena Corporation (USA)
Inventor
  • Pupalaikis, Peter James
  • Zhang, Ron
  • Sawyer, Brett Michael Dunn
  • Giles, Clinton Randy
  • Winzer, Peter Johannes

Abstract

A system includes a housing that has a front panel; a substrate that is positioned at a distance from the front panel, in which a data processor is mounted on the substrate; and a pluggable module. The pluggable module includes a co-packaged optical module, at least one first optical connector, a first fiber optic cable that is optically coupled between the co-packaged optical module and the first optical connector, and a fiber guide that is positioned between the co-packaged optical module and the first optical connector and provides mechanical support for the co-packaged optical module and the first optical connector. The co-packaged optical module is configured to receive optical signals from the first optical connector, generate electrical signals based on the received optical signals, and transmit the electrical signals to the data processor. The pluggable module has a shape that enables the pluggable module to pass through an opening in the front panel to enable the co-packaged optical module to be coupled to the substrate.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/36 - Mechanical coupling means
  • G02B 6/38 - Mechanical coupling means having fibre to fibre mating means
  • G06F 1/16 - Constructional details or arrangements

27.

OPTICAL ARCHITECTURAL SOLUTION FOR COHERENT BURST MODE TRANSMITTER

      
Application Number US2025053948
Publication Number 2026/117354
Status In Force
Filing Date 2025-11-04
Publication Date 2026-06-04
Owner CIENA CORPORATION (USA)
Inventor
  • Harley, James
  • Mcghan, Douglas
  • Vitic, Michael
  • Chedore, Paul

Abstract

A coherent transmitter (100, 200) for use in a time division multiple access (TDMA) system is operated in multiple states to enable coherent burst transmission. In an OFF state, the transmitter (100, 200) generates a dummy laser output (fd) from either a dummy laser (102) or an active laser (52) tuned to a dummy frequency different from an active frequency (fa), thereby maintaining thermal and bias stability without adding excess power on an upstream channel (22). In an ON state, the active laser (52) produces an active laser output (fa) that is modulated by a quad-parallel Mach-Zehnder (QPMZ) modulator (60) to transmit data. A thermoelectric cooler (TEC) (58) stabilizes laser temperatures, and a variable optical attenuator (VOA) (54) controls output power. The transmitter (100, 200) is suitable for an optical network unit (ONU) (14) in a passive optical network (PON) (10) communicating with an optical line terminal (OLT) (12).

IPC Classes  ?

  • H04B 10/2575 - Radio-over-fibre, e.g. radio frequency signal modulated onto an optical carrier
  • H04B 10/296 - Transient power control, e.g. due to channel add/drop or rapid fluctuations in the input power
  • H04B 10/50 - Transmitters
  • H04B 10/572 - Wavelength control
  • H04J 14/08 - Time-division multiplex systems

28.

METHOD AND APPARATUS FOR REDUCING OPTICAL INTERFERENCE IN AN OPTICAL MODEM

      
Application Number 18960513
Status Pending
Filing Date 2024-11-26
First Publication Date 2026-05-28
Owner CIENA CORPORATION (USA)
Inventor
  • Kuntze, Scott
  • Betty, Ian
  • Vitic, Michael
  • Hartman, Ronald

Abstract

Aspects of the subject disclosure may include, for example, an optical modem that includes a tunable optical separator that separates optical signals into distinct wavelengths, resulting in a first optical signal with a first wavelength and a second optical signal with a second wavelength. A controller detects crosstalk between these signals due to operational variances in the tunable optical separator and performs adjustments to the tunable optical separator to reduce crosstalk. Other embodiments are disclosed.

IPC Classes  ?

  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • H04B 10/077 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using a supervisory or additional signal
  • H04B 15/00 - Suppression or limitation of noise or interference

29.

METHOD AND APPARATUS FOR REGULATING POWER SUPPLIED BY A LOCAL OSCILLATOR SOURCE IN AN OPTICAL MODEM

      
Application Number 18960609
Status Pending
Filing Date 2024-11-26
First Publication Date 2026-05-28
Owner CIENA CORPORATION (USA)
Inventor
  • Kuntze, Scott
  • Hartman, Ronald
  • Vitic, Michael
  • Betty, Ian

Abstract

Aspects of the subject disclosure may include, for example, mixing a local oscillator (LO) signal produced by a LO source and an incoming optical signal to produce a received optical signal directed to one or more photodetectors to produce a photocurrent that is supplied to an amplifier, monitoring the photocurrent supplied to the amplifier, and responsive to the monitoring, causing the LO source to perform an adjustment of an optical power of the LO signal to control the photocurrent supplied to the amplifier to avoid an overload condition. Other embodiments are disclosed.

IPC Classes  ?

30.

CONTROLLING RECEIVER LOCAL OSCILLATOR POWER IN A COHERENT MODEM TO IMPROVE SNR AND INCREASE RECEIVER DYNAMIC RANGE

      
Application Number 19176470
Status Pending
Filing Date 2025-04-11
First Publication Date 2026-05-28
Owner Ciena Corporation (USA)
Inventor
  • Kuntze, Scott
  • Vitic, Michael
  • Betty, Ian
  • Hartman, Ronald

Abstract

Aspects of the subject disclosure may include, for example, mixing a local oscillator (LO) signal produced by a LO source and an incoming optical signal to produce a beat signal having a beat signal power, monitoring the beat signal power, and responsive to the monitoring, adjusting an optical power of the LO signal to control the beat signal power. Other embodiments are disclosed.

IPC Classes  ?

  • H04B 10/564 - Power control
  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H04B 10/50 - Transmitters
  • H04B 10/67 - Optical arrangements in the receiver

31.

Optical Architectural Solution for Coherent Burst Mode Transmitter

      
Application Number 18989184
Status Pending
Filing Date 2024-12-20
First Publication Date 2026-05-28
Owner Ciena Corporation (USA)
Inventor
  • Harley, James
  • Mcghan, Douglas
  • Vitic, Michael
  • Chedore, Paul

Abstract

A method of operating a coherent transmitter in a time division multiple access (TDMA) system includes operating in an OFF state while the coherent transmitter is not assigned to transmit data in the TDMA system, wherein operating in the OFF state comprises generating a laser output having a dummy frequency different from an active frequency used to transmit data in the TDMA system; and operating in an ON state while the coherent transmitter is assigned to transmit data in the TDMA system, wherein operating in the ON state comprises generating an active laser output having the active frequency and modulating the active laser output using a modulator. Advantageously, the coherent transmitter can be used at an optical network unit (ONU) in a coherent passive optical network (CPON).

IPC Classes  ?

  • H04J 3/16 - Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
  • H04B 10/50 - Transmitters
  • H04B 10/61 - Coherent receivers

32.

MANAGING EVANESCENT OPTICAL COUPLING IN PHOTONIC INTEGRATED CIRCUITS

      
Application Number 19446470
Status Pending
Filing Date 2026-01-12
First Publication Date 2026-05-21
Owner Ciena Corporation (USA)
Inventor
  • Painchaud, Yves
  • Picard, Marie-Josee
  • Bois, Antoine

Abstract

A first waveguide core structure (WCS) is configured to confine an optical wave (OW) at a first wavelength to a first mode and a second wavelength to a second mode, each over a coupling region (CR). A second WCS is configured to confine an OW at the first wavelength to a third mode and the second wavelength to a fourth mode, each over the CR. The CR comprises a structure in which portions of the first and second WCS are in proximity over a coupling distance and provides a first coupling between the first and third mode, at a first location, that is greater than a second coupling between the second and fourth mode at the first location, and a third coupling between the second and fourth mode, at a second location, that is greater than a fourth coupling between the first and third mode at the second location.

IPC Classes  ?

  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/125 - Bends, branchings or intersections
  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means

33.

TRANSMITTER QUALITY METRIC FOR A STANDALONE ESTIMATE OF COHERENT OPTICAL TRANSMITTER PERFORMANCE

      
Application Number US2025055073
Publication Number 2026/107019
Status In Force
Filing Date 2025-11-12
Publication Date 2026-05-21
Owner CIENA CORPORATION (USA)
Inventor
  • Jakober, Lukas
  • Maniloff, Eric
  • Jamal, Riyaz
  • Borowiec, Andrzej
  • Betty, Ian

Abstract

txtxtxtx) is a difference between a RSNR to achieve a required pre-forward error correction, FEC, bit error rate, BER, and a theoretically required RSNR for an ideal modem (20).

IPC Classes  ?

  • H04B 10/077 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using a supervisory or additional signal
  • H01S 3/13 - Stabilisation of laser output parameters, e.g. frequency or amplitude
  • H04B 17/10 - MonitoringTesting of transmitters

34.

FORWARD-MOUNTED CPU FOR VERTICALLY MOUNTED ASIC SWITCH BOX

      
Application Number 18939187
Status Pending
Filing Date 2024-11-06
First Publication Date 2026-05-21
Owner CIENA CORPORATION (USA)
Inventor
  • Cole, Christopher Robert
  • Winzer, Peter Johannes

Abstract

An apparatus includes a housing capable of being mounted in a rack and a vertically oriented switch card. The vertically oriented switch card includes one or more vertically oriented application-specific integrated circuits (ASICs) mounted on the vertically oriented switch card. The apparatus includes a two-dimensional arrangement of plug ports, each plug port being configured to receive a pluggable optical module. The apparatus includes a two-dimensional arrangement of channel intakes, each channel intake being positioned adjacent to at least one of the plug ports of the two dimensional arrangements of plug ports and each channel intake receives air and directs the received air towards an interior of the housing capable of being mounted in a rack. The apparatus includes a central processing unit (CPU) positioned forward relative to the vertically oriented switch card. The CPU is oriented vertically relative to the vertically oriented switch card.

IPC Classes  ?

35.

Border Gateway Protocol Outbound Route Filtering Using Community Attribute

      
Application Number 19006465
Status Pending
Filing Date 2024-12-31
First Publication Date 2026-05-21
Owner Ciena Corporation (USA)
Inventor
  • Dharmshaktu, Anil
  • Saini, Parul
  • Dhillon, Param Preet
  • Munjal, Varun

Abstract

Systems and methods for border gateway protocol (BGP) outbound route filtering (ORF) using community attribute include, responsive to tagging one or more prefixes in border gateway protocol (BGP) with one or more community attributes for outbound route filtering (ORF) in a network, transmitting a single route refresh message with the one or more community attributes to a BGP peer router for purposes of the BGP peer router applying the ORF based on the one or more community attributes; and receiving prefixes from the BGP peer router based on the ORF applied at the BGP peer router.

IPC Classes  ?

  • H04L 45/748 - Address table lookupAddress filtering using longest matching prefix
  • H04L 45/02 - Topology update or discovery

36.

Prioritizing multicast streams in Internet Group Management Protocol (IGMP) networks

      
Application Number 19032364
Status Pending
Filing Date 2025-01-20
First Publication Date 2026-05-14
Owner Ciena Corporation (USA)
Inventor
  • Lnu, Priyanshu
  • Aggarwal, Ashutosh

Abstract

Systems and methods for prioritizing multicast streams in an Internet Group Management Protocol (IGMP) network are provided. According to one implementation, a method includes detecting a reboot scenario in a network environment; querying a plurality of hosts regarding membership in a plurality of IGMP multicast streams according to one or more predefined priority levels; receiving membership reports from the plurality of hosts, wherein the membership reports indicate whether each host wishes to join or leave one or more of the IGMP multicast streams; and requesting a server to restart the plurality of IGMP multicast streams according to the one or more predefined priority levels.

IPC Classes  ?

  • H04L 12/18 - Arrangements for providing special services to substations for broadcast or conference
  • H04L 12/46 - Interconnection of networks

37.

CONFIGURING WAVEGUIDING STRUCTURES FOR DETECTING OPTICAL WAVES

      
Application Number 19380214
Status Pending
Filing Date 2025-11-05
First Publication Date 2026-05-14
Owner Ciena Corporation (USA)
Inventor
  • Baudot, Charles
  • Afsharipour, Elnaz
  • Picard, Marie-Josee

Abstract

An apparatus for detecting optical waves comprises one or more closed-loop waveguiding structures (CWSs) formed from a core material, each CWS configured to guide optical waves along a closed-loop path. A coupling waveguiding structure is formed from the core material comprising: a first optical coupling portion configured to optically couple at least a portion of an optical wave propagating through the coupling waveguiding structure into the first CWS, and a second optical coupling portion configured to optically couple at least a portion of an optical wave propagating through the coupling waveguiding structure into the first CWS. A first absorbing structure is in optical communication with the first CWS. Circuitry is configured to detect optical waves at least partially absorbed by the first absorbing structure. The coupling waveguiding structure is configured to guide optical waves along a path outside the one or more CWSs.

IPC Classes  ?

38.

Transmitter Quality Metric for a standalone estimate of Coherent Optical Transmitter Performance

      
Application Number 18944101
Status Pending
Filing Date 2024-11-12
First Publication Date 2026-05-14
Owner Ciena Corporation (USA)
Inventor
  • Jakober, Lukas
  • Maniloff, Eric
  • Jamal, Riyaz
  • Borowiec, Andrzej
  • Betty, Ian

Abstract

Systems and methods for a transmitter quality metric (TQM) for a standalone estimate of coherent optical transmitter performance include, responsive to defining a reference receiver having known parameters, conducting noise loading on an output signal from a transmitter under test; utilizing the reference receiver and a calculation to determine a transmitter only required signal-to-noise ratio (RSNR) penalty, ΔRSNRtx; and providing the ΔRSNRtx as a transmitter quality metric (TQM). The transmitter only RSNR penalty is a difference between a RSNR to achieve a required pre-forward error correction (FEC) bit error rate (BER) and a theoretically required RSNR for an ideal modem.

IPC Classes  ?

  • H04L 5/00 - Arrangements affording multiple use of the transmission path
  • H04L 1/20 - Arrangements for detecting or preventing errors in the information received using signal-quality detector

39.

Parallel Single Mode Ganged Optical Circuit Switch

      
Application Number 18945892
Status Pending
Filing Date 2024-11-13
First Publication Date 2026-05-14
Owner Ciena Corporation (USA)
Inventor
  • Boertjes, David W.
  • Frankel, Michael Y.
  • Pelekhaty, Vladimir
  • Rivaud, Daniel

Abstract

A ganged optical circuit switch includes an input array and an output array each having a set of ports; a first switching plane and a second switching plane disposed between the input array and the output array, each having a plurality of switching elements; and one or more multiplexing lenses located between the input array and the output array, configured to perform angular multiplexing of a group of the set of ports where all channels from the group are on a single switching element of the plurality of switching elements. The group of the set of ports can correspond to a parallel single mode (PSM) optical transceiver, such that the angular multiplexing reduces the number of switching elements by a number of channels on the PSM optical transceiver.

IPC Classes  ?

  • G02B 6/35 - Optical coupling means having switching means

40.

APPARATUSES AND METHODS FOR FACILITATING A SUBSTRATE-TO-FLEX TRANSITION FOR HIGH-FREQUENCY AND HIGH-SPEED APPLICATIONS

      
Application Number 18947215
Status Pending
Filing Date 2024-11-14
First Publication Date 2026-05-14
Owner CIENA CORPORATION (USA)
Inventor
  • Deng, Shuhui
  • Tournier, Hugues

Abstract

Aspects of the subject disclosure may include, for example, a structure or apparatus for use as part of one or more circuits. The structure may include a first region including a flexible circuit, a second region including a transition region, the second region coupled to the first region, and a third region including a substrate region, the third region coupled to the second region. A solder height or distance between the flexible circuit and the substrate region may be equal to approximately 50 micrometers. Other embodiments are disclosed.

IPC Classes  ?

  • H05K 1/18 - Printed circuits structurally associated with non-printed electric components
  • H05K 1/02 - Printed circuits Details
  • H05K 1/11 - Printed elements for providing electric connections to or between printed circuits
  • H05K 3/24 - Reinforcing of the conductive pattern

41.

FLEXO/ZR SUBRATING AND PARTIAL SURVIVABILITY

      
Document Number 03308076
Status Pending
Filing Date 2022-03-09
Open to Public Date 2026-05-13
Owner CIENA CORPORATION (USA)
Inventor Gareau, Sebastien

Abstract

An optical interface comprises circuitry configured to i) interface a plurality of services over the optical interface and ii) responsive to a requirement to adjust the optical interface between a plurality of rates, partially fail one or more services of the plurality of services affected due to the requirement to adjust. The plurality of services may each be Optical Transport Unit-C (OTUC) slices. The plurality of services may each be Flexible Optical Transport Network (FlexO) instances. The plurality of services may each be ZR instances.

IPC Classes  ?

  • H04B 10/03 - Arrangements for fault recovery
  • H04B 10/80 - Optical aspects relating to the use of optical transmission for specific applications, not provided for in groups , e.g. optical power feeding or optical transmission through water

42.

COMPACT HIGH FREQUENCY CLOCK GENERATION

      
Application Number 18934571
Status Pending
Filing Date 2024-11-01
First Publication Date 2026-05-07
Owner Ciena Corporation (USA)
Inventor
  • Lam, Jerry Yee-Tung
  • Mcpherson, Douglas Stuart
  • Greshishchev, Yuriy

Abstract

Described herein are apparatus and methods for compact high frequency clock generation. A high frequency clock generation circuit includes a differential frequency doubler configured to generate a differential FS/2 frequency clock from a differential FS/4 frequency clock using two input clock phases, and a multistage clock driver configured to at least correct asymmetry of the differential FS/2 frequency clock generated by the differential frequency doubler.

IPC Classes  ?

  • G06F 1/06 - Clock generators producing several clock signals

43.

HIGH-SPEED DIGITAL TO ANALOG CONVERTER WITH HIGH-SPEED INTERLEAVER AND MISALIGNMENT DETECTOR

      
Application Number 18934558
Status Pending
Filing Date 2024-11-01
First Publication Date 2026-05-07
Owner Ciena Corporation (USA)
Inventor
  • Lam, Jerry Yee-Tung
  • Mcpherson, Douglas Stuart
  • Greshishchev, Yuriy

Abstract

Described is a high-speed digital-to-analog converter (DAC) with an interleaver and misalignment detector. The interleaver has a first pair of differential pair ports to receive a first data stream from a first sub-DAC and a second pair of differential pair ports to receive a second data stream from a second sub-DAC. Each of the first and second pair of differential pair ports are alternately selected or alternately selected identically clocked by a differential sampling frequency (FS)/2 (FS/2) frequency clock to generate output signals. A set of transmission wires combine certain output signals from the first pair of differential pair ports with certain output signals from the second pair of differential pair ports to generate a device output signal. A first transmission wire and a second transmission wire have a defined degree of crossover to reduce differential FS/2 frequency clock feedthrough with minimal change on a device output signal.

IPC Classes  ?

44.

Delay-based Availability as a TE attribute for Segment Routing

      
Application Number 18989840
Status Pending
Filing Date 2024-12-20
First Publication Date 2026-05-07
Owner Ciena Corporation (USA)
Inventor
  • Verma, Pankaj
  • Mittal, Aditya

Abstract

Systems and methods for delay-based availability include performing delay measurements with one or more nodes in the Segment Routing network on corresponding links to the one or more nodes; utilizing the delay measurements to determine delay-based availability of the corresponding links to the one or more nodes, wherein the delay-based availability describes how often a given link of the corresponding links is available in terms of quantum time intervals over a measurement interval; and advertising details of the delay-based availability in the Segment Routing network for use as a delay-based availability metric for use as a traffic engineering (TE) metric.

IPC Classes  ?

45.

Flexible and Scalable Automatic Next-Hop Resolution in Traffic Engineering Networks

      
Application Number 19440408
Status Pending
Filing Date 2026-01-05
First Publication Date 2026-05-07
Owner Ciena Corporation (USA)
Inventor
  • Gamage, Amila Pradeep Kumara Tharaperiya
  • Sivabalan, Muthurajah

Abstract

Systems and methods are provided for flexible and scalable Automatic Next-Hop Resolution (ANR) in Traffic Engineering (TE) networks using color-templates. A Customer Edge (CE) router associates a color with an advertised prefix and communicates the colored prefix to a node in a service provider network, such as a Provider Edge (PE) router or Border Router (BR). Upon receipt of the colored prefix, the node requests a controller to generate a Segment Routing (SR) policy or tunnel based on a color-template corresponding to the color. The controller maintains the color-templates, computes paths subject to template-defined parameters and constraints, and returns SR policy or tunnel information for installation at the requesting node. When the CE changes the color associated with the prefix, the node triggers generation of a new policy or tunnel based on the updated color-template. Default templates and template update handling are also supported, reducing provider-side configuration and improving operational scalability.

IPC Classes  ?

  • H04L 45/02 - Topology update or discovery
  • H04L 45/00 - Routing or path finding of packets in data switching networks

46.

DATA PROCESSING SYSTEMS INCLUDING OPTICAL COMMUNICATION MODULES

      
Application Number 19398333
Status Pending
Filing Date 2025-11-24
First Publication Date 2026-04-30
Owner CIENA CORPORATION (USA)
Inventor
  • Winzer, Peter Johannes
  • Sawyer, Brett Michael Dunn
  • Zhang, Ron
  • Pupalaikis, Peter James
  • Giles, Clinton Randy
  • De Valicourt, Guilhem
  • Proesel, Jonathan

Abstract

A system includes a housing and a first circuit board positioned inside the housing. The housing has a top panel, a bottom panel, a left side panel, a right side panel, a front panel, and a rear panel. The front panel is at an angle relative to the bottom panel in which the angle is in a range from 30 to 150°. The first circuit board has a length, a width, and a thickness, in which the length is at least twice the thickness, the width is at least twice the thickness, and the first circuit board has a first surface defined by the length and the width. The first surface of the first circuit board is at a first angle relative to the bottom panel in which the first angle is in a range from 30 to 150°. The first surface of the first circuit board is substantially parallel to the front panel or at a second angle relative to the front panel in which the second angle is less than 60°. The system includes a first data processing module and a first optical interconnect module both electrically coupled to the first circuit board. The optical interconnect module is configured to receive first optical signals from a first optical link, convert the first optical signals to first electrical signals, and transmit the first electrical signals to the first data processing module.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • G02B 6/43 - Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
  • H04B 10/27 - Arrangements for networking
  • H05K 1/14 - Structural association of two or more printed circuits

47.

Connector Shroud Assembly for a Hermaphroditic Connector Assembly

      
Application Number 18930364
Status Pending
Filing Date 2024-10-29
First Publication Date 2026-04-30
Owner Ciena Corporation (USA)
Inventor
  • Mckerlie, Maxwell Thomas
  • Aldea, Victor

Abstract

A connector shroud assembly that serves to align the connectors of a hermaphroditic connector assembly during mating, locking the mated connectors together and preventing relative motion (i.e., translation, rotation, and pivoting) between the connectors, especially (but not exclusively) when one of the connectors is coupled to a flexible ribbon or the like. The connector shroud assembly, which is disposed around and between the mated connectors, includes locking features that engage corresponding locking features of each of the connectors, thereby securing the connectors in the hermaphroditic connector assembly together. This provides a good pin connection and prevents de-mating of the connectors over time, during assembly or due to subsequent handling.

IPC Classes  ?

  • H01R 13/631 - Additional means for facilitating engagement or disengagement of coupling parts, e.g. aligning or guiding means, levers, gas pressure for engagement only
  • H01R 12/79 - Coupling devices for flexible printed circuits, flat or ribbon cables or like structures connecting to rigid printed circuits or like structures
  • H01R 13/28 - Contacts for sliding co-operation with identically-shaped contact, e.g. for hermaphroditic coupling devices
  • H01R 13/627 - Snap-action fastening
  • H01R 13/633 - Additional means for facilitating engagement or disengagement of coupling parts, e.g. aligning or guiding means, levers, gas pressure for disengagement only
  • H01R 43/26 - Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for engaging or disengaging the two parts of a coupling device

48.

CONFIGURING LAYERS TO PROVIDE A STRAIN TO AN OPTICAL WAVEGUIDING STRUCTURE

      
Application Number 19297322
Status Pending
Filing Date 2025-08-12
First Publication Date 2026-04-23
Owner Ciena Corporation (USA)
Inventor
  • Baudot, Charles
  • Simard, Alexandre D.
  • Afsharipour, Elnaz

Abstract

An apparatus comprises: a first layer of a first semiconductor material, wherein the first layer is substantially coplanar to a first plane, the first layer comprising first and second regions having p-type and n-type dopants mixed within the first semiconductor material, a third region adjacent to portions of the first and second regions, and an optical waveguiding structure configured to guide an optical wave, wherein a portion of the optical waveguiding structure is formed in the portion of the third region; a strain-inducing structure comprising one or more layers including a first strain-inducing layer comprising an alloy of silicon and germanium, where the first strain-inducing layer is configured to provide a strain to a portion of the first semiconductor material of the optical waveguiding structure; and a voltage source configured to apply a direct current electric field between the first and second regions.

IPC Classes  ?

  • G02F 1/025 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure
  • G02F 1/015 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
  • G02F 1/35 - Non-linear optics

49.

APPARATUSES AND METHODS FOR FACILITATING AN ADVANCED HIGH SPEED INTERCONNECT STRUCTURE FORMED BY AN INTEGRATED CIRCUIT, BUMP BALLS, AND PACKAGING

      
Application Number 18921115
Status Pending
Filing Date 2024-10-21
First Publication Date 2026-04-23
Owner CIENA CORPORATION (USA)
Inventor
  • Hu, Kaisheng
  • Mcpherson, Douglas Stuart
  • Knisely, William Che
  • Vigneswaran, Aravinthan

Abstract

Embodiments of the subject disclosure are directed to, for example, a circuit or device that includes a package corresponding to a first waveguide, a die corresponding to a second waveguide, and an array of bump balls disposed between the package and the die. Various embodiments may include a circuit or device that includes a plurality of ground planes, a plurality of ground bump balls, and a plurality of package ground planes, where the plurality of ground planes, the plurality of ground bump balls, and the plurality of package ground planes form a Faraday cage. Other embodiments are disclosed.

IPC Classes  ?

  • H01L 23/66 - High-frequency adaptations
  • H01L 23/00 - Details of semiconductor or other solid state devices
  • H01L 23/552 - Protection against radiation, e.g. light

50.

Spectrum Quality Indicator for Layer 0 Path Computation

      
Application Number 18924539
Status Pending
Filing Date 2024-10-23
First Publication Date 2026-04-23
Owner Ciena Corporation (USA)
Inventor Al Sayeed, Choudhury A.

Abstract

Systems and methods for a spectrum quality indicator for use in Layer 0 (optical or photonic) path computation include obtaining measured optical spectrum at an upstream location in an optical network; scaling the measured optical spectrum at a downstream location based on a plurality of components in the optical network to determine an estimated optical spectrum at the downstream location; evaluating the estimated optical spectrum to determine a spectrum quality indicator; and utilizing the spectrum quality indicator to one or more of i) block the downstream location for new capacity adds, ii) allow the downstream location for the new capacity adds, or iii) weight the upstream location in for the new capacity adds.

IPC Classes  ?

  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H04J 14/02 - Wavelength-division multiplex systems

51.

Adjustable Heat Sink Holder Assembly for Cooling the Front Portion of a High Power Optics Plug Device in an Outdoor Conduction Cooled Network System

      
Application Number 18969398
Status Pending
Filing Date 2024-12-05
First Publication Date 2026-04-23
Owner Ciena Corporation (USA)
Inventor
  • Gupta, Chander Prakash
  • Chaurasiya, Ranjeet
  • Kumar, Shubham
  • Mahawar, Rampratap

Abstract

An adjustable heat sink holder assembly including a heat spreader plate adapted to be disposed adjacent to and in thermal communication with a plug device, where the heat spreader plate includes a main body portion adapted to be disposed adjacent to a central portion of the plug device and thermally condition the central portion of the plug device and an extension portion adapted to be disposed adjacent to a front end portion of the plug device and thermally condition the front end portion of the plug device. The plug device may be a high power optics plug device, with the central portion including digital signal processor hardware and the front end portion including an integrated coherent transmit-receive optical sub-assembly. In some embodiments, the heat spreader plate and the plug device are disposed in a sealed housing of an outdoor conduction cooled network system.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

52.

Sparse Route Computation for Determining Optical Paths with Defined Optical Regenerator Locations

      
Application Number 19006463
Status Pending
Filing Date 2024-12-31
First Publication Date 2026-04-16
Owner Ciena Corporation (USA)
Inventor
  • Bisht, Seemant
  • Chaudhary, Anikash
  • Richens, Dominic
  • Chhillar, Mohit

Abstract

Systems and methods for a sparse route computation for determining optical paths with defined optical regenerator locations in an optical network include receiving a request to compute one or more paths from a source node to a destination node with one or more regen nodes in an optical network; utilizing the one or more regen nodes as an inclusion hops list; and performing a Shortest Path First (SPF) computation with the inclusion hops list to find the one or more paths with tentative (tent) paths maintained in a tent list and further utilizing a discourage factor in minimal route diversity to order the tent paths in the tent list based on the inclusion hops list.

IPC Classes  ?

  • H04L 45/122 - Shortest path evaluation by minimising distances, e.g. by selecting a route with minimum of number of hops
  • H04B 10/27 - Arrangements for networking

53.

APPARATUSES AND METHODS FOR FACILITATING AN EQUIPMENT/RESOURCE LOCK WITH NETWORK/SYSTEM SPECIFIC HOST IDENTIFIERS COMBINED WITH USER PROVIDED CREDENTIALS

      
Application Number 18907745
Status Pending
Filing Date 2024-10-07
First Publication Date 2026-04-09
Owner CIENA CORPORATION (USA)
Inventor
  • Parsons, Andrew Alexander
  • Brown, Christopher John
  • Fougere, Sandra Lynn
  • Moore, Brian
  • Chow, David James
  • Charbonneau, Magdalena
  • Kemp, Colin William

Abstract

Aspects of the subject disclosure may include, for example, obtaining a first instance of a host identifier associated with a first server based on a communicative coupling between a device and the first server, obtaining a first instance of a credential associated with a first user, and activating a lock feature in respect of a resource coupled to the device based on the first instance of the host identifier associated with the first server and the first instance of the credential, resulting in a first activation, wherein upon the first activation the resource is restricted to operating in a first communication network associated with the first server. Other embodiments are disclosed.

IPC Classes  ?

54.

Remapping reference codes in pluggable modules to support different applications

      
Application Number 18905510
Grant Number 12681880
Status In Force
Filing Date 2024-10-03
First Publication Date 2026-04-09
Grant Date 2026-07-14
Owner Ciena Corporation (USA)
Inventor
  • Maniloff, Eric
  • Khan, Munjeen
  • Amarsi, Rahim
  • Bluethner, Martin
  • Alderdice, Ian
  • Lemus, Avid

Abstract

A pluggable module includes a media interface including a receiver and a transmitter, wherein the media interface is configured to operate a media interface mode defined by a code; circuitry communicatively coupled to the media interface; and an electrical interface communicatively coupled to the circuitry and to a host device housing the pluggable module; wherein the circuitry stores a remapping table used to convert the code exchanged between the host device and the pluggable module. This enables a host device to operate the pluggable module in media interface modes that are unsupported by the host device, e.g., vendor-specific codes for custom applications.

IPC Classes  ?

55.

Effective LAG Load Distribution via L2 Source Forwarding/Routing

      
Application Number 18908032
Status Pending
Filing Date 2024-10-07
First Publication Date 2026-04-09
Owner Ciena Corporation (USA)
Inventor
  • Holness, Marc
  • Abdullah, Bashar
  • Gilson, David

Abstract

Systems and methods provide Link Aggregation Group (LAG) load distribution via Layer 2 (L2) source forwarding/routing in a network. An apparatus includes circuitry configured to monitor a status of the network, and, responsive to new traffic from an access node, determine a path in one or more LAGs in the network, each LAG of the one or more LAGs includes multiple links aggregated together as a single logical link, wherein the path is determined between the access node and other nodes in the network based on the status. The circuitry can be further configured to provide instructions to the access node for forwarding the new traffic on the determined path.

IPC Classes  ?

  • H04L 47/122 - Avoiding congestionRecovering from congestion by diverting traffic away from congested entities
  • H04L 45/24 - Multipath
  • H04L 47/20 - Traffic policing

56.

Fast-forwarding Binary Data through a Distributed Microservice Architecture

      
Application Number 18908960
Status Pending
Filing Date 2024-10-08
First Publication Date 2026-04-09
Owner Ciena Corporation (USA)
Inventor
  • Hu, Quantum
  • Miedema, David
  • Mulvihill, Emily Michelle

Abstract

Systems and methods are provided for fast-forwarding binary data through a chain of microservices. A requester microservice may be arranged at one endpoint of a microservice chain while a provider microservice may be arranged at the other endpoint. The provider microservice, for example, may be configured to execute various data transmission methods. According to one implementation, a method may include receiving a request from the requester microservice to obtain binary data formatted in a specific data format. The method may include converting the binary data from a native data format to the specific data format as requested by the requester microservice. In addition, the method includes adding a tag with the binary data, wherein the tag is configured to instruct each intermediate microservice along the microservice chain to bypass a Serialize/Deserialize (SerDes) stage therein while forwarding the binary data to a next microservice in the microservice chain.

IPC Classes  ?

  • G06F 16/25 - Integrating or interfacing systems involving database management systems
  • G06F 9/54 - Interprogram communication

57.

REMAPPING REFERENCE CODES IN PLUGGABLE MODULES TO SUPPORT DIFFERENT APPLICATIONS

      
Application Number US2025048402
Publication Number 2026/075907
Status In Force
Filing Date 2025-09-29
Publication Date 2026-04-09
Owner CIENA CORPORATION (USA)
Inventor
  • Maniloff, Eric
  • Khan, Munjeen
  • Amarsi, Rahim
  • Bluethner, Martin
  • Alderdice, Ian
  • Lemus, Avid

Abstract

A pluggable module (10) includes a media interface with a receiver (22) and a transmitter (24) configured to operate a media-interface mode identified by a code; circuitry (20) communicatively coupled to the media interface; and an electrical interface (18) communicatively coupled to the circuitry (20) and to a host device (12) housing the pluggable module (10). The circuitry (20) stores a remapping table (26) used to convert the code exchanged between the host device (12) and the pluggable module (10), for example mapping a standardized identifier (e.g., 3Eh) to a vendor-specific identifier (e.g., COh). This enables the host device (12) to operate the pluggable module (10) in media¬ interface modes unsupported by the host device (12), such as vendor-specific codes for custom applications, while leaving the host electrical-interface code unchanged.

IPC Classes  ?

  • G06F 13/00 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
  • H04L 41/00 - Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks

58.

Monitoring and Selecting a Stable and Best PTP Master in a Packet Network

      
Application Number 18944090
Status Pending
Filing Date 2024-11-12
First Publication Date 2026-04-02
Owner Ciena Corporation (USA)
Inventor
  • Saxena, Ankur
  • Srivastava, Sharad Kumar

Abstract

A network element in a packet network includes circuitry configured to communicate with a master clock for Precision Time Protocol (PTP), monitor one or more of link stability to the master clock, errors in packets to the master clock, and clock class stability of the master clock; and perform a Best Master Clock Algorithm (BMCA) based on the monitored one or more of the link stability, the errors, and the clock class stability. The BMCA is further performed based on one or more of loss of synchronization messages, loss of announce messages, loss of follow up messages, unusable timing information, and a holdover mode.

IPC Classes  ?

  • H04J 3/06 - Synchronising arrangements
  • H04L 41/0668 - Management of faults, events, alarms or notifications using network fault recovery by dynamic selection of recovery network elements, e.g. replacement by the most appropriate element after failure

59.

SELECTING AND MANAGING CLOCK SOURCES TO ENHANCE HOLDOVER AND SYNCHRONIZATION IN PRECISION TIME PROTOCOL (PTP) NETWORKS

      
Application Number US2025048407
Publication Number 2026/073088
Status In Force
Filing Date 2025-09-29
Publication Date 2026-04-02
Owner CIENA CORPORATION (USA)
Inventor
  • Saxena, Ankur
  • Srivastava, Sharad, Kumar
  • Arshad, Saleem, A
  • Choudhary, Amit, Kumar
  • Singh, Krishan
  • Srivastavam, Hirdesh

Abstract

Systems and methods (300, 1030, 3080, 4090) are disclosed for selecting and managing clock sources in packet-based networks (10, 1010, 3010, 4010) to enhance holdover and synchronization recovery. A network element (100, 1016, 3036, 4020-2) receives timing information from multiple master clocks (12, 14, 1012, 3032, 4012) and monitors link stability (ptsfjinkstability), CRC errors (ptsfjinkcrc), and clock class fluctuations (ptsf_m asterci kclass). An enhanced Best Master Clock Algorithm (BMCA) (306) selects a stable grandmaster to reduce flapping. During holdover, an enhanced Best Time Transmitter Clock Algorithm (BTCA) (1030, 3080) considers a Frequency Traceable flag for Synchronous Ethernet (SyncE) sources (1018, 1020) to prioritize frequency-traceable clocks. When a Global Navigation Satellite System (GNSS) source (20, 3040, 3060) is unavailable, backup clocks (3074, 3076) are compared based on offset variability to select the most stable substitute. In branched systems (4010, 4030), Ethernet Synchronization Messaging Channel (ESMC) PDUs (4060) convey source recovery indicators, enabling downstream selection units (4022, 4042) to prefer physical-layer over packet-layer references, ensuring robust 5G/NR synchronization.

IPC Classes  ?

60.

Service Function Proxy for Service Chaining in SRv6 Networks

      
Application Number 18892887
Status Pending
Filing Date 2024-09-23
First Publication Date 2026-03-26
Owner Ciena Corporation (USA)
Inventor
  • Narasimhan, Ashwath
  • Sivabalan, Muthurajah
  • Rajasekaran, Lakshmi
  • Baqai, Jahanzeb

Abstract

A node in a Segment Routing Internet Protocol version 6 (SRv6) network with the node configured as a Service Function (SF) Proxy in the SRv6 network, the node includes circuitry configured to, subsequent to installation of a Segment Identifier (SID) for a Service Function Chain (SFC), receive a packet with the SID included therein, remove all Segment Routing (SR) information from the packet, send the packet on an interface associated with an SR-unaware SF, and receive the packet on the interface after processing by the SR-unaware SF, wherein the packet from the interface is associated as returning traffic from the SF.

IPC Classes  ?

  • H04L 45/42 - Centralised routing
  • H04L 45/00 - Routing or path finding of packets in data switching networks
  • H04L 45/586 - Association of routers of virtual routers

61.

COMMON-MODE STABILIZATION OF HIGH-FREQUENCY DIFFERENTIAL DISTRIBUTED DRIVER AMPLIFIER

      
Application Number 18895659
Status Pending
Filing Date 2024-09-25
First Publication Date 2026-03-26
Owner CIENA CORPORATION (USA)
Inventor
  • Bennett, Jeffrey Henry
  • Pourzadi, Aref

Abstract

Aspects of the subject disclosure may include, for example, a common emitter stage having a differential input configured to receive an input signal from an input transmission line, a common base stage coupled with the common emitter stage and having a differential output configured to provide a differential output signal to an output transmission line, and a biasing network to bias the common base stage, the biasing network including components selected to limit common mode gain of the common base stage at relatively high frequencies of interest without affecting a differential mode gain of the common base stage. Other embodiments are disclosed.

IPC Classes  ?

  • H03F 3/343 - DC amplifiers in which all stages are DC-coupled with semiconductor devices only
  • H03F 3/45 - Differential amplifiers
  • H03F 3/60 - Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators

62.

SERVICE FUNCTION PROXY FOR SERVICE CHAINING IN SRV6 NETWORKS

      
Application Number US2025046682
Publication Number 2026/064339
Status In Force
Filing Date 2025-09-17
Publication Date 2026-03-26
Owner CIENA CORPORATION (USA)
Inventor
  • Narasimhan, Ashwath
  • Sivabalan, Muthurajah
  • Rajasekaran, Lakshmi
  • Baqai, Jahanzeb

Abstract

A node (102) in a Segment Routing Internet Protocol version 6 (SRv6) network (100) with the node (102) configured as a Service Function (SF) Proxy (16) in the SRv6 network (100), the node (102) including circuitry configured to, subsequent to installation of a Segment Identifier (SID) (40) for a Service Function Chain (SFC) (12), receive a packet with the SID (40) included therein, remove all Segment Routing (SR) information including a Segment Routing Header (SRH) from the packet, send the packet on an interface associated with an SR-unaware SF (62, 64, 66, 104, 106), and receive the packet on the interface after processing by the SR-unaware SF (62, 64, 66, 104, 106), wherein the packet from the interface is associated as returning traffic from the SF (62, 64, 66, 104, 106).

IPC Classes  ?

  • H04L 45/00 - Routing or path finding of packets in data switching networks

63.

Compensation of PTP network asymmetry for APTS clocks during PTP disruption

      
Application Number 18937556
Status Pending
Filing Date 2024-11-05
First Publication Date 2026-03-26
Owner Ciena Corporation (USA)
Inventor
  • Saxena, Ankur
  • Garg, Vineet Kumar

Abstract

A method for compensating Precision Time Protocol (PTP) network asymmetry for Assisted Partial Timing Support (APTS) clocks during PTP disruptions in a network includes, while a local time reference is connected to the APTS node and while PTP is operational, determining a current network path to a PTP Grandmaster connected to the APTS node, determining asymmetry between the APTS node and the PTP Grandmaster, and storing the determined asymmetry based on the current network path; and during a failure of the local time reference and subsequent to recovery of a PTP disruption between the APTS node and the PTP Grandmaster, utilizing a corresponding stored determined asymmetry on a recovered path between the APTS node and either the PTP Grandmaster or another PTP Grandmaster.

IPC Classes  ?

64.

COMPACT DIFFERENTIAL BIAS TEE

      
Application Number 18893433
Status Pending
Filing Date 2024-09-23
First Publication Date 2026-03-26
Owner CIENA CORPORATION (USA)
Inventor
  • Khan, Bakhtiar Ali
  • Vitic, Michael
  • Brookes, Gregory
  • Lau, Andrew Man Kin

Abstract

Aspects of the subject disclosure may include, for example, a differential biasing device that includes first and second bias tees having respective high-frequency biased terminals, high-frequency unbiased terminals and biasing terminals. The first and second bias tees can be configured at least partially on and/or within different layers of a substrate to facilitate a compact configuration. The layers can include surface layers and/or internal layers that enable an overlapping of at least portions of the first and second bias tees. Other embodiments are disclosed.

IPC Classes  ?

  • H01P 1/20 - Frequency-selective devices, e.g. filters
  • H03H 7/38 - Impedance-matching networks

65.

Automatic Shared Risk Link Group Detection

      
Application Number 18887110
Status Pending
Filing Date 2024-09-17
First Publication Date 2026-03-19
Owner Ciena Corporation (USA)
Inventor
  • Boertjes, David W.
  • Mackay, Alex W.
  • Shiner, Andrew D.

Abstract

A method for detecting shared risk link is provided. The method can include receiving physical measurements from a plurality of fibers in an optical network, correlating the plurality of fibers to one another by analyzing the physical measurements to predict which fibers of the plurality of fibers share common infrastructure, and providing details of the fibers that share common infrastructure.

IPC Classes  ?

  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H04B 10/25 - Arrangements specific to fibre transmission

66.

CHARACTERIZING OPTICAL STRUCTURES BASED ON OPTICAL CIRCUITS WITH DIFFERENT STRUCTURAL FEATURES

      
Application Number 18888652
Status Pending
Filing Date 2024-09-18
First Publication Date 2026-03-19
Owner Ciena Corporation (USA)
Inventor
  • Simard, Alexandre D.
  • Caron, Martin
  • Picard, Marie-Josee
  • Bedard, Keven

Abstract

In one aspect, in general, a method comprises: providing optical waves to each of N optical circuits, each optical circuit comprising one or more of each of p structural features, where p is an integer greater than 1, and N is greater than or equal to p+1; measuring optical responses from each of the optical circuits, where each measured optical response depends at least in part on the optical wave provided to the respective optical circuit; and computing an optical loss associated with each of the p structural features based at least in part on an optical loss for each optical circuit that is calculated based at least in part on the optical wave provided to and the measured optical response from a respective optical circuit, and quantities of each of the p structural features in each of the respective optical circuits.

IPC Classes  ?

  • G01M 11/00 - Testing of optical apparatusTesting structures by optical methods not otherwise provided for
  • G02B 6/126 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind using polarisation effects

67.

Adaptive Flow Control of a gNMI-based Telemetry Session

      
Application Number 18928710
Status Pending
Filing Date 2024-10-28
First Publication Date 2026-03-19
Owner Ciena Corporation (USA)
Inventor
  • Maheshwari, Ashutosh
  • Mishra, Shubham
  • Jain, Sourabh
  • Tripathi, Shalendra

Abstract

Systems and methods provide adaptive flow control of a gRPC Network Management Interface (gNMI)-based telemetry session at a gNMI server. A method includes receiving a telemetry subscription from a gNMI client for telemetry from the gNMI server; determining a sample interval for the telemetry subscription; and, based on the sample interval either performing (1) regular streaming via gNMI of the telemetry subscription or (2) adaptive streaming via gNMI of the telemetry subscription where the sample interval is periodically updated.

IPC Classes  ?

  • H04L 43/0876 - Network utilisation, e.g. volume of load or congestion level
  • H04L 47/25 - Flow controlCongestion control with rate being modified by the source upon detecting a change of network conditions

68.

THERMAL DESIGN FOR RACK MOUNT SYSTEMS INCLUDING OPTICAL COMMUNICATION MODULES

      
Application Number 19398387
Status Pending
Filing Date 2025-11-24
First Publication Date 2026-03-19
Owner CIENA CORPORATION (USA)
Inventor
  • Sawyer, Brett Michael Dunn
  • Zhang, Ron
  • Pupalaikis, Peter James
  • Winzer, Peter Johannes
  • Giles, Clinton Randy
  • De Valicourt, Guilhem

Abstract

An apparatus includes a rackmount device, in which the rackmount device includes a housing configured to be installed in a server rack, in which the housing has a width in a range from 16 to 20 inches and a height in a range from 1 to 12 inches, the housing includes a front panel, a rear panel, and a bottom surface. The rackmount device includes a first circuit board or substrate having a first surface that defines a length and a width of the first circuit board or substrate, in which the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate is at an angle relative to the bottom surface of the housing, and the angle is in a range from 45° to 90°. At least one of (i) the front panel of the housing is formed at least in part by the first circuit board or substrate, (ii) the first circuit board or substrate is attached to the front panel of the housing, or (iii) the first circuit board or substrate is substantially parallel to the front panel of the housing. The rackmount device includes at least one data processor electrically coupled to the first circuit board or substrate and configured to process data; and at least one optical/electrical communication interface coupled to the first circuit board or substrate and configured to convert received optical signals to electrical signals that are provide to the at least one data processor. The rackmount device includes at least one of (i) at least one inlet fan attached to the front panel of the housing, or (ii) at least one fan positioned near the front panel in which at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least some time period during operation of the at least one fan, and the first distance is less than one-fourth of a second distance between the front panel and the rear panel.

IPC Classes  ?

  • H05K 7/14 - Mounting supporting structure in casing or on frame or rack
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

69.

Enhanced Optical Module Cooling with Angled Fins

      
Application Number 19388721
Status Pending
Filing Date 2025-11-13
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor
  • Mack, Bonnie Lynne
  • Turcotte, Georges
  • Aldea, Victor
  • Pellerin, Francois

Abstract

An optical module includes a housing, an optical subassembly arranged at an angle relative to the housing, and a thermal dissipation structure on the housing. The angled orientation of the optical subassembly improves compliance with fiber bend radius requirements and enables fins of the thermal dissipation structure to be dimensioned in correspondence with the angle to provide increased surface area in regions of higher airflow. In some embodiments, the fins are disposed on a top side of the housing, and in other embodiments, the fins are disposed on a bottom side of the housing. The angled fin configuration enhances convective heat transfer while maintaining compact form factor compliance for pluggable modules such as QSFP-DD and OSFP coherent optics.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements

70.

Authenticated Channel for Encryption Management

      
Application Number 19392679
Status Pending
Filing Date 2025-11-18
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor
  • Cayer, Yves
  • Slodki, Zenon

Abstract

A control processor (CP) manages authenticated channels for encryption in a communication system. The CP includes a management interface and processing circuitry configured to establish a local authenticated channel with a local modem and to provide encryption parameters enabling the local modem to manage a trusted channel with a remote modem. The CP receives, via the local authenticated channel, an alarm message indicating that the remote modem is in an unmanaged state due to failure of a remote authenticated channel between the remote modem and a first remote CP. In response, the CP generates and communicates a reauthentication command toward the remote modem via the local modem and the trusted channel. The reauthentication command causes the remote modem to reestablish the remote authenticated channel with a second remote CP, optionally using runtime authentication material obtained by the CP from a user or network management server.

IPC Classes  ?

  • H04L 69/40 - Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection
  • H04L 9/40 - Network security protocols
  • H04L 41/0654 - Management of faults, events, alarms or notifications using network fault recovery

71.

Compact Laser Assembly For Reverse On-PCB Direct-Coupling

      
Application Number 18828072
Status Pending
Filing Date 2024-09-09
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor
  • Beaupré-Laflamme, Raphaël
  • Gamache, Claude

Abstract

A laser assembly is provided. The laser assembly includes a printed circuit board; a laser sub-assembly including a thermo-electric cooler and an optical train, wherein the laser sub-assembly is configured to connect to the printed circuit board such that the optical train is disposed between the printed circuit board and the thermo-electric cooler, wherein the thermo-electric cooler is configured to extract heat from the optical train outwardly from the printed circuit board, and wherein the laser assembly is configured to connect optically with a photonic integrated circuit via free space. Advantageously, the laser assembly includes a top-down approach where the thermo-electric cooler radiates heat outward, supports a pre-assembled approach, and uses free space connectivity for the laser path to the photonic integrated circuit, i.e., no fiber connections.

IPC Classes  ?

  • H01S 5/0239 - Combinations of electrical or optical elements
  • H01S 5/02253 - Out-coupling of light using lenses
  • H01S 5/02255 - Out-coupling of light using beam deflecting elements
  • H01S 5/02325 - Mechanically integrated components on mount members or optical micro-benches
  • H01S 5/024 - Arrangements for thermal management
  • H01S 5/068 - Stabilisation of laser output parameters

72.

Manufacturable High Port Count Optical Cross Connect

      
Application Number 18829551
Status Pending
Filing Date 2024-09-10
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor
  • Boertjes, David W.
  • Rivaud, Daniel
  • Frankel, Michael Y.
  • Pelekhaty, Vladimir
  • Colton, Fabien

Abstract

A modular and manufacturable optical cross connect includes a plurality of subassemblies each including either of an array of collimators and an array of adjustable mirrors, wherein the plurality of subassemblies are configured to modularly scale a size of the optical cross connect, wherein the plurality of subassemblies are arranged relative to one another with an optical propagation region in between, and wherein the plurality of subassemblies with the array of collimators each include one or more probe ports configured to support an alignment signal for active alignment control.

IPC Classes  ?

  • G02B 6/35 - Optical coupling means having switching means
  • G02B 6/26 - Optical coupling means

73.

METHODS, SYSTEMS, AND DEVICES TO IMPLEMENT BIMODAL VPWS AND VPLS FORWARDING DOMAIN IN A LAYER 2 VIRUTAL PRIVATE NETWORK (L2VPN) NODE

      
Application Number 18829553
Status Pending
Filing Date 2024-09-10
First Publication Date 2026-03-12
Owner CIENA CORPORATION (USA)
Inventor
  • Gilson, David H
  • Shah, Himanshu
  • Holness, Marc

Abstract

Aspects of the subject disclosure may include, for example, receiving first data via a first user-to-network interface (UNI) of a group of user-to-network interfaces (UNIs) from a first communication device, transferring the first data to a network-to-network interface (NNI) in response to receiving the first data from the first UNI, and receiving second data via the NNI from a second communication device. Further embodiments can include identifying a destination media access control (MAC) address associated with the second data, determining a second UNI of the group of UNIs based on the destination MAC address resulting in a first determination, and transferring the second data to the second UNI based on the first determination for transmitting to a third communication device. Other embodiments are disclosed.

IPC Classes  ?

  • H04L 45/74 - Address processing for routing
  • H04L 12/46 - Interconnection of networks
  • H04L 45/00 - Routing or path finding of packets in data switching networks

74.

Dynamic path computation in networks based on automatically detected unavoidable risks

      
Application Number 19106826
Status Pending
Filing Date 2023-08-22
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor
  • Yadav, Bhupendra
  • Vaithilingam, Prabhu
  • Smallegange, Gerald

Abstract

Systems and methods for dynamic path computation in networks based on automatically detected unavoidable risks include receiving (402) a plurality of shared risks associated with any of one or more network layers, network links, and network equipment, of a network (10); automatically (404) creating a local ignore list for a source node (12A) and a remote ignore list for a destination node (12F), based on the plurality of shared risks; and utilizing (406) the plurality of shared risks in a path computation for a path between the source node (12A) and the destination node (12F) and ignoring any of the plurality of shared risks in the local ignore list and the remote ignore list.

IPC Classes  ?

  • H04L 45/28 - Routing or path finding of packets in data switching networks using route fault recovery
  • H04L 45/036 - Updating the topology between route computation elements, e.g. between OpenFlow controllers

75.

SYSTEM AND METHODS FOR CLOCK PULSE GENERATION

      
Application Number 19393711
Status Pending
Filing Date 2025-11-19
First Publication Date 2026-03-12
Owner CIENA CORPORATION (USA)
Inventor
  • Weiss, Naftali
  • Pike, Jacob
  • Flemke, Philip
  • Sawires, Michael
  • Bonen, Shai
  • Chong, Euhan

Abstract

Aspects of the subject disclosure may include, for example, a track-and-hold sampling circuit, having: a duty-cycle limiter that generates a clock signal having a duty cycle that is less than 100% from three out of four clock signals; and a sampling circuit comprising complementary positive and negative input gates that track and sample data input signals, wherein the sampling circuit generates sampled data signals, wherein the complementary positive and negative input gates are coupled to the clock signal. Other embodiments are disclosed.

IPC Classes  ?

  • H03K 3/017 - Adjustment of width or dutycycle of pulses
  • H03K 21/17 - Circuits for carrying-over pulses between successive decades with field-effect transistors
  • H03K 21/40 - MonitoringError detectionPreventing or correcting improper counter operation
  • H03L 7/08 - Details of the phase-locked loop

76.

Multi-mode optical waveguides with deviations in geometric features to improve performance

      
Application Number 18883035
Status Pending
Filing Date 2024-09-12
First Publication Date 2026-03-12
Owner Ciena Corporation (USA)
Inventor Painchaud, Yves

Abstract

Systems and methods are provided for designing and fabricating a multi-mode waveguide, such as a waveguide incorporated in a Multi-Mode Interferometer (MMI) device having at least one multi-mode waveguide. According to one implementation, a multi-mode waveguide includes one or more side boundary sections that are non-parallel to a propagation axis of the multi-mode waveguide. In another implementation, a multi-mode waveguide having a propagation axis extending therethrough includes a top planar boundary parallel to the propagation axis and a bottom planar boundary parallel to the propagation axis. Furthermore, the multi-mode waveguide includes a first side boundary having at least one section that is non-parallel to the propagation axis with deviations in geometric features associated therewith. Such deviations are selected based on one or more performance metrics, for improvement thereof.

IPC Classes  ?

  • G02B 6/293 - Optical coupling means having data bus means, i.e. plural waveguides interconnected and providing an inherently bidirectional system by mixing and splitting signals with wavelength selective means
  • G02B 27/00 - Optical systems or apparatus not provided for by any of the groups ,

77.

METHOD FOR ENABLING MAC ROUTE IMPORTING BY ALL-ACTIVE MULTIHOMING LEAF SITE-ONLY DEVICES IN AN EVPN E-TREE SERVICE

      
Application Number US2025043107
Publication Number 2026/054997
Status In Force
Filing Date 2025-08-22
Publication Date 2026-03-12
Owner CIENA CORPORATION (USA)
Inventor
  • Karboubi, Amal
  • Boutros, Sami

Abstract

Aspects of the subject disclosure may include, for example, identifying, by an apparatus, a media access control (MAC) address of a customer edge (CE) device, and advertising the MAC address in a MAC route based on the identifying, wherein the MAC route is tagged with an extended community that identifies an Ethernet Segment (ES) associated with the apparatus, the extended community enabling another apparatus that is also associated with the ES to import the MAC route. Other embodiments are disclosed.

IPC Classes  ?

  • H04L 45/02 - Topology update or discovery
  • H04L 12/46 - Interconnection of networks
  • H04L 45/00 - Routing or path finding of packets in data switching networks

78.

TRANSMITTING ELECTROMAGNETIC SIGNALS OVER AN INTERFACE TRANSITION REGION BETWEEN INTEGRATED CIRCUIT DEVICE PLANES

      
Application Number 18918494
Status Pending
Filing Date 2024-10-17
First Publication Date 2026-03-05
Owner Ciena Corporation (USA)
Inventor
  • Brookes, Gregory
  • Therriault, Etienne
  • Matta, Charbel
  • Jacques, Maxime

Abstract

In one aspect, in general, an apparatus comprises: a first interface comprising one or more edge-coupled coplanar striplines distributed along a first axis, where each edge-coupled coplanar stripline comprises at least two conductor strips; a second interface comprising one or more edge-coupled striplines distributed along a second axis, where each edge-coupled stripline comprises at least three conductor strips; and a transition region between the first interface and the second interface, the transition region comprising a transition structure comprising different respective conductors connecting each conductor strip of an edge-coupled coplanar stripline of the first interface to one or more respective conductor strips of a corresponding edge-coupled stripline of the second interface, wherein at least a portion of the transition structure comprises broad-side coupled conductors.

IPC Classes  ?

79.

TRANSMITTING ELECTROMAGNETIC SIGNALS BETWEEN INTEGRATED CIRCUIT DEVICES AND SIGNAL CARRYING STRUCTURES

      
Application Number 18816721
Status Pending
Filing Date 2024-08-27
First Publication Date 2026-03-05
Owner Ciena Corporation (USA)
Inventor
  • Nguyen, Lam
  • Brookes, Gregory
  • Therriault, Etienne
  • Matta, Charbel
  • Askarian, Amir

Abstract

In one aspect, in general, an apparatus for transmitting signals between an integrated circuit device and a signal carrying structure comprises: a first interface comprising a plurality of device coupling transmission lines (DCTLs) distributed along a first axis contained within a first plane, each DCTL comprising at least two conductor strips distributed along the first axis and substantially coplanar with the first plane; a second interface comprising a plurality of signal carrying structure coupling transmission lines (SCSCTLs) distributed along a second axis, wherein each SCSCTL comprises at least two conductor strips distributed along a respective axis that is substantially perpendicular to the second axis; and a transition region between the first interface and the second interface comprising a transition structure comprising different respective conductors connecting each conductor strip of a DCTL to a respective conductor strip of a corresponding SCSCTL.

IPC Classes  ?

80.

OPTICAL COUPLING ARRANGEMENTS FOR CHIP CONNECTION ARRANGEMENTS BETWEEN DIFFERENT CHIPS OF AN INTEGRATED CIRCUIT SYSTEM

      
Application Number 18823152
Status Pending
Filing Date 2024-09-03
First Publication Date 2026-03-05
Owner Ciena Corporation (USA)
Inventor
  • Nguyen, Lam
  • Savard, Simon
  • Beaupré-Laflamme, Raphael
  • Boyer, Nicolas

Abstract

An apparatus comprises: an interposer chip (IC) having a first layer with a first plurality of optical waveguiding structures (OWSs), where the first layer is below a surface of the IC substantially coplanar with a first plane; a device chip (DC) having a second layer with a second plurality of OWSs, where the second layer is below a surface of the DC substantially coplanar with a second plane; and a chip connection arrangement between the IC and the DC forming a nonzero angle between the first and second planes, where the chip connection arrangement comprises at least one optical coupling arrangement comprising a first cutout in the IC extending below the surface, and exposing an end of a first OWS, and a first protrusion extending from a portion of the DC, containing a portion of a bend in a second OWS, and exposing an end of the second OWS.

IPC Classes  ?

  • G02B 6/125 - Bends, branchings or intersections
  • G02B 6/12 - Light guidesStructural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
  • G02B 6/122 - Basic optical elements, e.g. light-guiding paths
  • G02B 6/13 - Integrated optical circuits characterised by the manufacturing method

81.

Configuring publication/subscription proxies in a microservice architecture

      
Application Number 18824257
Status Pending
Filing Date 2024-09-04
First Publication Date 2026-03-05
Owner Ciena Corporation (USA)
Inventor Miedema, David

Abstract

Systems and methods are provided for configuring publication/subscription (pub/sub) system to perform alternative pub/sub tasks. According to one implementation, a publisher operating within a pub/sub system includes multiple modules arranged in a tree structure. A subscriber interface is arranged at a top root of the tree structure, wherein the subscriber interface is configured for communicating with one or more subscribers. Each module of a first group of the modules includes a microservice. Each module of a second group of the modules, located above a lowest level of the tree structure, acts as an intermediary pub/sub proxy module. Also, each module of the first group is configured to self-publish a telemetry message by capturing a metric and pushing the metric upward through one or more intermediary pub/sub proxy modules to the subscriber interface for publication to the one or more subscribers.

IPC Classes  ?

  • G06F 9/22 - Microcontrol or microprogram arrangements

82.

METHOD FOR ENABLING MAC ROUTE IMPORTING BY ALL-ACTIVE MULTIHOMING LEAF SITE-ONLY DEVICES IN AN EVPN E-TREE SERVICE

      
Application Number 18824426
Status Pending
Filing Date 2024-09-04
First Publication Date 2026-03-05
Owner CIENA CORPORATION (USA)
Inventor
  • Karboubi, Amal
  • Boutros, Sami

Abstract

Aspects of the subject disclosure may include, for example, identifying, by an apparatus, a media access control (MAC) address of a customer edge (CE) device, and advertising the MAC address in a MAC route based on the identifying, wherein the MAC route is tagged with an extended community that identifies an Ethernet Segment (ES) associated with the apparatus, the extended community enabling another apparatus that is also associated with the ES to import the MAC route. Other embodiments are disclosed.

IPC Classes  ?

83.

IMPLEMENTATION AND ANALYSIS OF 3 DIMENSIONAL SWEEPS FOR IQ MODULATOR CALIBRATION

      
Application Number 18813334
Status Pending
Filing Date 2024-08-23
First Publication Date 2026-02-26
Owner CIENA CORPORATION (USA)
Inventor
  • Gao, Ying
  • Beaulieu, Yves
  • Long, Fan

Abstract

Aspects of the subject disclosure may include, for example, applying a plurality of time-varying bias signals to bias inputs of a quad-parallel Mach-Zehnder (QPMZ) modulator, receiving output signals of the QPMZ modulator, wherein the output signals are produced by the QPMZ modulator responsive to the plurality of time-varying bias signals, and determining a biasing map, optical loss, and optical characteristics including extinction ratio and crosstalk for the QPMZ modulator based on the output signals of the QPMZ modulator. Other embodiments are disclosed.

IPC Classes  ?

  • H04B 10/556 - Digital modulation, e.g. differential phase shift keying [DPSK] or frequency shift keying [FSK]

84.

Blind Godard-based timing phase detector for T-spaced transmissions

      
Application Number 18814686
Grant Number 12640902
Status In Force
Filing Date 2024-08-26
First Publication Date 2026-02-26
Grant Date 2026-05-26
Owner CIENA CORPORATION (USA)
Inventor
  • Nguyen, Trong Tung
  • Tran, Tuan Vinh
  • Gharan, Shahab Oveis

Abstract

Aspects of the subject disclosure may include, for example, obtaining, from a sampling device of a receiver, samples of a signal that is received from a transmitter, and facilitating acquisition between the receiver and the transmitter by deriving, based on the samples, a phase error output for centering a sampling clock of the sampling device with respect to a transmitter clock, wherein the deriving involves estimating group delay using a detection algorithm that is based on a blind Godard LMS algorithm.

IPC Classes  ?

  • H04L 7/04 - Speed or phase control by synchronisation signals

85.

DUAL FLOW LOW PROFILE COOLANT DISTRIBUTION MANIFOLD

      
Application Number 19273249
Status Pending
Filing Date 2025-07-18
First Publication Date 2026-02-26
Owner Ciena Corporation (USA)
Inventor
  • Shearman, Simon J.
  • Mohajer, Behzad
  • Ajersch, Peter

Abstract

A coolant distribution manifold assembly for use in a module or circuit pack of an optical networking system, including: a body defining a main inlet port at one end, a main outlet port at another end, and a plurality of cooling plate inlet ports and cooling plate outlet ports disposed between the main inlet port and the main outlet port; where the body further defines an upper internal plenum and a lower internal plenum each coupled to one of the main inlet port and the plurality of cooling plate inlet ports and the main outlet port and the plurality of cooling plate outlet ports. Optionally, the upper internal plenum and the lower internal plenum each have a variable cross-sectional area along a length of the body between the main inlet port and the main outlet port.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
  • H01R 12/72 - Coupling devices for rigid printing circuits or like structures coupling with the edge of the rigid printed circuits or like structures

86.

Bandwidth Optimization for Connection Validation in Pre-Occupied Spectrum

      
Application Number 19370465
Status Pending
Filing Date 2025-10-27
First Publication Date 2026-02-26
Owner Ciena Corporation (USA)
Inventor
  • Al Sayeed, Choudhury A.
  • Chen, Edward
  • Palmer, Robert
  • Tang, Ran

Abstract

A system and method are provided for performing a loopback test in a pre-provisioned multi-channel optical network. A controller determines actual spectral availability within an optical spectrum, irrespective of reserved or pre-planned channel allocations, and overrides spectrum reservation limits to define an effective loopback-test bandwidth. The controller configures a selected network-management channel (NMC) and associated modem for the loopback test based on the determined availability, enabling loopback operation even within an occupied or partially utilized spectrum. The system dynamically adjusts modem transmission parameters and establishes spectral guard bands or deadbands as needed to preserve integrity of in-service traffic and mitigate filter roll-off effects. The approach allows flexible, non-disruptive photonic loopback testing in deployed Reconfigurable Optical Add/Drop Multiplexers (ROADMs) or other multi-channel optical environments without re-provisioning the existing channel plan.

IPC Classes  ?

  • H04B 10/077 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using a supervisory or additional signal
  • H04J 14/02 - Wavelength-division multiplex systems

87.

USING UNDERLAY TRANSPORT LINK PROTECTION TO PROTECT POINT TO MULTIPOINT TREES

      
Application Number 18802495
Status Pending
Filing Date 2024-08-13
First Publication Date 2026-02-19
Owner CIENA CORPORATION (USA)
Inventor
  • Komath, Bindhia
  • Huang, Chien-Hung
  • Lin, Norman
  • Boutros, Sami
  • Parameswaran, Ramkumar

Abstract

Aspects of the subject disclosure may include, for example, receiving, at a router forming an ingress router in a point-to-multipoint network, a point-to-multipoint dataflow comprising a plurality of packets, forwarding, to a data network, packets of the point-to-multipoint dataflow for communication to a plurality of point-to-multipoint receivers along respective Label Switched Paths, the plurality of point-to-multipoint receivers associated with one or more egress nodes of the point-to-multipoint network, identifying a network failure between the router and a nexthop router for one Label Switched Path, and routing packets of the point-to-multipoint dataflow according to a preexisting unicast backup Label Switched Path for the one Label Switched Path. Other embodiments are disclosed.

IPC Classes  ?

  • H04L 45/16 - Multipoint routing
  • H04L 45/28 - Routing or path finding of packets in data switching networks using route fault recovery
  • H04L 45/50 - Routing or path finding of packets in data switching networks using label swapping, e.g. multi-protocol label switch [MPLS]

88.

System and method for Doppler frequency shift compensation in free space optical links

      
Application Number 19101008
Status Pending
Filing Date 2023-09-25
First Publication Date 2026-02-19
Owner Ciena Corporation (USA)
Inventor
  • Frankel, Michael Y.
  • Pelekhaty, Vladimir

Abstract

Systems and methods for Doppler frequency shift compensation in free space optical links include determining a Doppler frequency shift associated with relative movement between the first satellite and the second satellite; and tuning a transmit laser in the first satellite and a local oscillator laser in the second satellite to compensate for the Doppler frequency shift. Also, a digital signal processor (DSP) can be used to electrically compensate any residual frequency error that remains after optical tuning of the transmit laser and the local oscillator laser.

IPC Classes  ?

89.

Controlling a Multi-Rail Switch in a Space-Division Multiplexing Optical Network

      
Application Number 18796074
Status Pending
Filing Date 2024-08-06
First Publication Date 2026-02-12
Owner Ciena Corporation (USA)
Inventor Jones, Kevan Peter

Abstract

Systems and methods are provided for configuring routes through a multi-rail system. A network element in a Space Division Multiplexed (SDM) optical network includes a first switch connected to a plurality of rails in a west direction relative to the network element; a second switch connected to the plurality of rails in an east direction relative to the network element; and a plurality of optical components, located between and connected to the first switch and the second switch, each optical component supporting a rail of the plurality of rails where each rail includes a fiber path being amplified in the SDM optical network, wherein each of the first switch and the second switch are configured to selectively switch individual rails of the plurality of rails to different optical components of the plurality of optical components.

IPC Classes  ?

90.

Parallel Flow Liquid Cooling Distribution Assembly With Piston Like Pluggable Optical Module Riding Cold Plates

      
Application Number 18796458
Status Pending
Filing Date 2024-08-07
First Publication Date 2026-02-12
Owner Ciena Corporation (USA)
Inventor
  • Shearman, Simon
  • Mohajer, Behzad

Abstract

A parallel flow liquid cooling distribution assembly for use in a telecommunications or optical networking system, the assembly including: a fluid distribution plenum defining an inlet plenum and an outlet plenum; and a plurality of cold plates coupled to the fluid distribution plenum in parallel, where each of the plurality of cold plates defines a fluid flow path and includes an inlet piston cylinder adapted to be sealingly disposed within an inlet port of the inlet plenum utilizing an intervening O-ring and an outlet piston cylinder adapted to be sealingly disposed within an outlet port of the outlet plenum utilizing an intervening O-ring, and where each of the plurality of cold plates is positioned to be disposed adjacent to and in contact with a surface of an associated pluggable optical module through an associated cage of a plurality of cages and pluggable optical modules.

IPC Classes  ?

  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

91.

Controlling a Multi-Rail Switch in a Space-Division Multiplexing Optical Network

      
Application Number 18799363
Status Pending
Filing Date 2024-08-09
First Publication Date 2026-02-12
Owner Ciena Corporation (USA)
Inventor Jones, Kevan Peter

Abstract

Systems and methods are provided for configuring routes through a multi-rail system. A method of path computation in a Space Division Multiplexed (SDM) optical network includes representing the SDM optical network as a plurality of parallel components in an optical section; for each of N SDM services in the SDM optical network, assigning a component of the plurality of parallel components to form a serial path in the SDM optical network, wherein, once a corresponding component is assigned, the corresponding component is marked as unavailable for other services; and configuring the SDM optical network based on the assigning of the plurality of components for the N SDM services.

IPC Classes  ?

92.

PARALLEL FLOW LIQUID COOLING DISTRIBUTION ASSEMBLY WITH PISTON LIKE PLUGGABLE OPTICAL MODULE RIDING COLD PLATES

      
Application Number US2025041051
Publication Number 2026/035919
Status In Force
Filing Date 2025-08-07
Publication Date 2026-02-12
Owner CIENA CORPORATION (USA)
Inventor
  • Shearman, Simon
  • Mohajer, Behzad

Abstract

A parallel flow liquid cooling distribution assembly for use in a telecommunications or optical networking system, the assembly including: a fluid distribution plenum defining an inlet plenum and an outlet plenum; and a plurality of cold plates coupled to the fluid distribution plenum in parallel, where each of the plurality of cold plates defines a fluid flow path and includes an inlet piston cylinder adapted to be sealingly disposed within an inlet port of the inlet plenum utilizing an intervening O-ring and an outlet piston cylinder adapted to be sealingly disposed within an outlet port of the outlet plenum utilizing an intervening O-ring, and where each of the plurality of cold plates is positioned to be disposed adjacent to and in contact with a surface of an associated pluggable optical module through an associated cage of a plurality of cages and pluggable optical modules.

IPC Classes  ?

  • G02B 6/42 - Coupling light guides with opto-electronic elements
  • H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating

93.

SYSTEMS AND METHODS IMPLEMENTING CONTROLLER-BASED MULTIPLE DOMAIN AUTOMATIC NEXT-HOP RESOLUTION (ANR) IN TRAFFIC ENGINEERING NETWORKS

      
Application Number 18800509
Status Pending
Filing Date 2024-08-12
First Publication Date 2026-02-12
Owner CIENA CORPORATION (USA)
Inventor
  • Tharaperiya Gamage, Amila Pradeep Kumara
  • Sivabalan, Muthurajah
  • Vaithilingam, Prabhu

Abstract

Aspects of the subject disclosure may include, for example, in response to a Border Gateway Protocol (BGP) update from an egress provider edge router connected to a destination customer network, receiving a request for an end-to-end SR policy or an end-to-end path from an ingress provider edge router, where the BGP update includes a prefix of the destination customer network and a first color; using color mapping data, determining a first domain associated with the first color and determining a second color to be associated with a second domain and mapped to the first color, where a color is a numerical value associated with a network intent of a domain, the color mapping data define mappings between different colors associated with different domains, and the mapped first color and second color enable identification of a first intent and a second intent that belong to the first domain and the second domain, respectively; and generating the end-to-end path reflecting each definition of the first and the second intents identified by the first color in the first domain and the second color in the second domain. Other embodiments are disclosed.

IPC Classes  ?

94.

CONTROLLING A MULTI-RAIL SWITCH IN A SPACE-DIVISION MULTIPLEXING OPTICAL NETWORK

      
Application Number US2025039689
Publication Number 2026/035475
Status In Force
Filing Date 2025-07-29
Publication Date 2026-02-12
Owner CIENA CORPORATION (USA)
Inventor Jones, Kevan, Peter

Abstract

Systems and methods are provided for configuring routes through a multi-rail system. A method (300) of path computation in a Space Division Multiplexed (SDM) optical network (200A-200E) includes representing (302) the SDM optical network as a plurality of parallel components (204, 202, 210) in an optical section (206); for (304) each of N SDM services in the SDM optical network, assigning a component of the plurality of parallel components (204, 202, 210) to form a serial path in the SDM optical network, wherein, once a corresponding component is assigned, the corresponding component is marked as unavailable for other services; and configuring (306) the SDM optical network based on the assigning of the plurality of components for the N SDM services.

IPC Classes  ?

95.

RF Crossing in an Optical Modulator for Equalization

      
Application Number 19352101
Status Pending
Filing Date 2025-10-07
First Publication Date 2026-02-05
Owner Ciena Corporation (USA)
Inventor
  • Delisle-Simard, Alexandre
  • Brookes, Gregory
  • Vitic, Michael

Abstract

An optical modulator includes an optical waveguide extending a length and three Radio Frequency (RF) electrodes configured to modulate an optical signal in the waveguide. The RF electrodes include an RF crossing positioned at or near an end of the length and configured to equalize the optical signal by introducing destructive interference after the crossing. At this location, high-frequency components of the optical signal are already attenuated, while low-frequency components are selectively reduced, thereby flattening the electro-optic frequency response. The RF crossing may implement topologies including GSG-to-SGS transitions, stacked or staggered electrode arrangements, symmetrical or asymmetrical crossings, or multi-layer implementations. The geometry and placement of the RF crossing are selected to maintain impedance and velocity matching while optimizing equalization. This approach improves bandwidth of traveling-wave modulators without significantly increasing half-wave voltage (VTT) or optical loss and is applicable across lithium niobate, barium titanate, Pockels, QCSE, and quantum well platforms.

IPC Classes  ?

  • G02F 1/225 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour by interference in an optical waveguide structure
  • G02F 1/025 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction in an optical waveguide structure
  • G02F 1/035 - Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulatingNon-linear optics for the control of the intensity, phase, polarisation or colour based on ceramics or electro-optical crystals, e.g. exhibiting Pockels or Kerr effect in an optical waveguide structure

96.

Semiconductor Device With Selective Area Epitaxy Growth Utilizing a Mask to Suppress or Enhance Growth at the Edges

      
Application Number 19357857
Status Pending
Filing Date 2025-10-14
First Publication Date 2026-02-05
Owner Ciena Corporation (USA)
Inventor
  • Macquistan, David Alexander
  • Prosyk, Kelvin

Abstract

A method of Selective Area Epitaxy (SAE) on a semiconductor wafer is disclosed. A dielectric mask is deposited on the wafer surface to define an opening for epitaxial growth. The mask includes a zigzag edge formed by successive straight facets oriented to avoid crystallographic directions associated with unintentional growth enhancement. During SAE, a semiconductor layer is grown in the opening such that edge-growth enhancement at the zigzag edge is suppressed relative to straight edges aligned with [011] or [0 11] directions. By replacing straight mask edges with zigzag geometry, fragile linear overgrowth is avoided, reducing particulate contamination and improving device reliability. The zigzag edge may be tailored by pitch, amplitude, or facet orientation, including angles such as 34°, 56°, 124°, or 146° relative to [011]. The method is applicable to III-V materials, including InP-based photonic integrated circuits, lasers, modulators, and amplifiers.

IPC Classes  ?

  • H01S 5/32 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures
  • H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
  • H01S 5/10 - Construction or shape of the optical resonator
  • H01S 5/22 - Structure or shape of the semiconductor body to guide the optical wave having a ridge or a stripe structure
  • H10F 71/00 - Manufacture or treatment of devices covered by this subclass

97.

Express Mesh Intersatellite Optical Coherent Networking

      
Application Number 19357846
Status Pending
Filing Date 2025-10-14
First Publication Date 2026-02-05
Owner Ciena Corporation (USA)
Inventor
  • Frankel, Michael Y.
  • Pelekhaty, Vladimir

Abstract

A satellite system is disclosed including a plurality of optical modems with digital signal processing circuitry supporting programmable modulation formats. A processor assigns subsets of the modems to establish inter-satellite links and ground links, and selects modulation formats based on link performance requirements such as connection distance and bandwidth demand. The system enables an express mesh inter-satellite topology, providing direct optical links among satellites positioned according to ground traffic sources and sinks, thereby reducing the number of hops, network latency, and power consumption. The processor may further adjust forward error correction coding, transmitted optical power, and wavelength allocation to optimize link performance. Satellites may dynamically reassign modems, power down unused modems, and operate in Low Earth Orbit (LEO) or Medium Earth Orbit (MEO). The disclosed methods and architectures allow efficient, low-latency satellite networking through coherent optical communications adaptable to evolving traffic patterns and environmental conditions.

IPC Classes  ?

  • H04B 10/118 - Arrangements specific to free-space transmission, i.e. transmission through air or vacuum specially adapted for satellite communication
  • H04B 10/27 - Arrangements for networking

98.

Distributed Design for Deep Reinforcement Learning and Scalable Service Function Chain Provisioning with Efficient Path Discovery

      
Application Number 18781238
Status Pending
Filing Date 2024-07-23
First Publication Date 2026-01-29
Owner Ciena Corporation (USA)
Inventor
  • Onsu, Murat Arda
  • Kantarci, Burak
  • Janulewicz, Emil

Abstract

A system for networking and computing is provided herein which can include one or more processors and a memory storing instructions that cause the system to receive a request for a SFC in a network having a plurality of data centers arranged in clusters, wherein the SFC includes one or more VNFs located in the data centers in which packets traverse for various services, provide details of the request to one or more local agents each covering a cluster, and is configured to determine provisioning aspects of the SFC in the corresponding cluster, and receive the provisioning aspects for the SFC from the one or more local agents.

IPC Classes  ?

99.

FLEXO REMOTE DESKEW

      
Application Number US2025034128
Publication Number 2026/024388
Status In Force
Filing Date 2025-06-18
Publication Date 2026-01-29
Owner CIENA CORPORATION (USA)
Inventor
  • Gareau, Sebastien
  • Osorio Cuadros, Luz Adriana

Abstract

Systems and methods for Flexible Optical Transport Network (FlexO) remote deskew procedure include, at a terminating receiver (30, 54), detecting relative skew between multiple interfaces (56, 62) in a group in a FlexO network (10, 50, 80), and signaling information based on the detected skew to one or more remote transceivers (26, 28, 52) located in a backwards direction relative to the receiver (30, 54). At a remote transceiver (26, 28, 52), the systems and methods include, based on detected skew between multiple interfaces at the terminating receiver (30, 54), receiving skew information therefrom, and causing alignment of the multiple interfaces based on the received skew information.

IPC Classes  ?

  • H04J 3/16 - Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted

100.

FlexO Remote Deskew

      
Application Number 18781324
Status Pending
Filing Date 2024-07-23
First Publication Date 2026-01-29
Owner Ciena Corporation (USA)
Inventor
  • Gareau, Sebastien
  • Osorio Cuadros, Luz Adriana

Abstract

Systems and methods for Flexible Optical Transport Network (FlexO) remote deskew procedure include, at a terminating receiver, detecting relative skew between multiple interfaces in a group in a FlexO network, and signal information based on the detected skew to one or more remote transceivers located in a backwards direction relative to the receiver. At a remote transceiver, the systems and methods include based on detected skew between multiple interfaces in a group in at a terminating receiver, receiving skew information therefrom, and causing alignment of the multiple interfaces based on the received skew information.

IPC Classes  ?

  • H04J 3/16 - Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
  • H04B 10/079 - Arrangements for monitoring or testing transmission systemsArrangements for fault measurement of transmission systems using an in-service signal using measurements of the data signal
  • H04J 14/08 - Time-division multiplex systems
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