Abstract

A light-emitting diode includes a light-emitting epitaxial layer having a first surface as a light-emitting surface and a second surface opposing the first surface, a first type semiconductor layer, an active layer, and a second type semiconductor layer; a transparent dielectric layer located on the second surface and in direct contact with the light-emitting epitaxial laminated layer, and having conductive through-holes therein; a transparent conductive layer located on one side surface of the transparent dielectric layer that is distal from the light-emitting epitaxial laminated layer; and a metal reflective layer located on one side surface of the transparent conductive layer that is distal from the transparent dielectric layer; wherein the transparent dielectric layer includes a first layer and a second layer; and wherein the first layer is thicker than the second layer, and a refractivity of the first layer is less than a refractivity of the second layer.

IPC Classes  ?

• H01L 33/40 - Materials therefor
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/42 - Transparent materials
• H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A light-emitting diode includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer, having an upper surface providing a first electrode area containing a pad area and an extended area; a transparent conductive layer over the first semiconductor layer having a first opening to expose a portion of a surface of the first semiconductor layer corresponding to the pad area; a protective layer over the transparent conductive layer having a second opening and a third opening respectively at positions corresponding to the pad area and the extended area, while exposing a portion of the surface of the first semiconductor layer corresponding to the pad area and a portion of a surface of the transparent conductive layer corresponding to the extended area; and a first electrode over the protective layer directly contacting the first semiconductor layer corresponding to the pad area via the first and second openings.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/42 - Transparent materials

Abstract

Disclosed in the present invention is a light-emitting diode, comprising a metal substrate, and a semiconductor layer sequence arranged above the metal substrate, the semiconductor layer sequence being at least composed of a first-type semiconductor layer, a second-type semiconductor layer, and an active layer located between the first-type semiconductor layer and the second-type semiconductor layer. The light-emitting diode further comprises a first electrode and a second electrode; the first electrode is electrically connected to the first-type semiconductor layer; the second electrode is electrically connected to the second-type semiconductor layer; the metal substrate comprises a first metal layer; a groove is formed in the side of the metal substrate distant from the semiconductor layer sequence; a second metal layer is arranged in the groove; the groove is provided with a protruding groove edge; and the groove edge is not more than 0.5 micrometer higher than the second metal layer. Therefore, the reliability of a product after packaging and bonding of the light-emitting diode is improved.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

Abstract

11 of the dielectric layer on the side wall of the epitaxial layer is less than the height of the mesa. According to the present application, the dielectric layer is arranged on the first surface of the epitaxial layer, and can serve as a stress recovery layer, such that during the separation of a substrate from the micro light-emitting diode by using a laser lift-off process, the defects of cracks and the like of the epitaxial layer are avoided or the coarsening damage caused by an etching process to the epitaxial layer is prevented from further expanding, thereby improving the reliability of the micro light-emitting diode.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Abstract

An ultraviolet light-emitting diode and a light-emitting device. The ultraviolet light-emitting diode comprises: a semiconductor layer sequence (120) comprising a first semiconductor layer (121) having first conductivity, a second semiconductor layer (123) having second conductivity different from the first conductivity, and an active layer (122) interposed between the first semiconductor layer and the second semiconductor layer and generating light by means of the compounding of electrons and holes; an ohmic contact layer (132) which is formed on the second semiconductor layer, forms ohmic contact with the second semiconductor layer, and has a thickness of 30 nm or less; a metal current expansion layer (134) formed on the ohmic contact layer and electrically connected to the second semiconductor layer by means of the ohmic contact layer; and a reflective layer (143) which is formed on the metal current expansion layer and covers the exposed surface of the second semiconductor layer. The light-emitting diode can effectively improve the light-emitting efficiency.

IPC Classes  ?

• H01L 33/40 - Materials therefor
• H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape

Abstract

A semiconductor device includes a transfer substrate, an array of connecting structures, and an array of micro semiconductor elements. Each of the micro semiconductor elements has a semiconductor layered unit and at least one electrode. Each of the connecting structures interconnects a respective one of the micro semiconductor elements and the transfer substrate. In each of the micro semiconductor elements, the electrode is disposed on the semiconductor layered unit opposite to a respective one of the connecting structures. A width of at least a part of each of the connecting structures is smaller than a width of a connecting surface of the semiconductor layered unit of the respective one of the micro semiconductor elements. The connecting surface of the semiconductor layered unit of each of the micro semiconductor elements is connected to the respective one of the connecting structures.

IPC Classes  ?

• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Disclosed in the present invention are a light-emitting diode and a preparation method therefor, and a display panel. The light-emitting diode comprises a semiconductor epitaxial stack layer, which includes a first surface and a second surface, which are opposite each other, and includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer, and an active layer, which is located between the second semiconductor layer and the third semiconductor layer, the light-emitting diode being characterized in that the first semiconductor layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer provides the first surface; the first surface is a roughened surface; the second sub-layer is closer to the second surface relative to the first sub-layer; the first sub-layer and the second sub-layer each have a compound semiconductor material containing Al; and the content of the Al component of the first sub-layer is lower than the content of the Al component of the second sub-layer. By means of the present invention, the roughness of a light emission surface of the light-emitting diode can be improved, thereby improving the light emission efficiency of the light-emitting diode; in addition, the overetching phenomenon of a semiconductor epitaxial stack layer during the roughing process can be prevented from occurring, thereby improving the reliability of the light-emitting diode.

IPC Classes  ?

• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
• H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system

Abstract

A micro-LED chip includes an epitaxial layered structure, and first and second electrodes. The epitaxial layered structure includes first-type and second-type semiconductor layers, and a light emitting layer sandwiched therebetween. The first and second electrodes are electrically connected to the first-type and second-type semiconductor layers, respectively. The micro-LED chip has a first distinctive region on an electrode surface of the first electrode. The first distinctive region has a surface morphology different from that of an adjacent region of the electrode surface of the first electrode. A method for manufacturing a micro-LED device including at least one micro-LED chip is also provided.

IPC Classes  ?

• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 21/66 - Testing or measuring during manufacture or treatment

Abstract

Disclosed are a micro light-emitting element, and a micro light-emitting diode and a transfer method therefor. The micro light-emitting diode comprises: a semiconductor epitaxial stack comprising a first-type semiconductor layer, a second-type semiconductor layer, and an active layer between the first-type semiconductor layer and the second-type semiconductor layer; a first mesa formed by the first-type semiconductor layer exposed by the recess of the semiconductor epitaxial stack; a second mesa formed by the second-type semiconductor layer; a side wall formed on an outer edge of the semiconductor epitaxial stack and located between the first mesa and the second mesa; a first contact electrode and a second contact electrode that are formed on the first mesa and the second mesa, respectively; and a first bonding electrode and a second bonding electrode that are formed on the first contact electrode and the second contact electrode, respectively. The micro light-emitting diode is characterized in that: the included angle between the side wall and the first mesa is θ1, and the range of the θ1 is 105°≤θ1≤165°. The present invention can improve the transfer yield of the micro light-emitting element by means of the design in which the side wall has an inclined surface and the bonding electrodes bridge the mesas.

IPC Classes  ?

• H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

The present invention provides a micro-light-emitting diode. The micro-light-emitting diode comprises at least an N-type layer, a transition layer, a light-emitting layer, and a P-type layer. The transition layer has a structure extending along a growth direction and comprises a first transition layer, a second transition layer, and a third transition layer. The band gap of the transition layer is between the N-type layer and the light-emitting layer, the band gap of the N-type layer is defined as Egn, the band gap of the first transition layer is defined as Eg1, the band gap of the second transition layer is defined as Eg2, the band gap of the third transition layer is defined as Eg3, the band gap of the light-emitting layer is defined as Ega, and the band gaps satisfy the following relationship: Egn≥Eg1>Eg2>Eg3>Ega. The ratio of the total thickness of the transition layer to the total thickness of the light-emitting layer is defined as x, and x satisfies the following relationship: 5≤x≤150. The micro-light-emitting diode prepared by using the present structure can achieve that the current density corresponding to the peak photoelectric conversion efficiency is less than 0.1 A/cm2, and that the peak photoelectric conversion efficiency can be improved by more than 5%.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Disclosed are a light-emitting diode device and a production method therefor. The present invention is not only suitable for light-emitting diode devices having vertical structures, but also suitable for other series of light-emitting diode devices having horizontal structures, high-voltage structures, etc. The light-emitting diode device comprises a substrate and a plurality of mesa structures located on the upper surface of the substrate; the mesa structures comprise light-emitting diode mesas located in light-emitting areas and cutting area mesas located in cutting areas; the light-emitting diode mesas and the cutting area mesas are arranged alternately; the cutting area comprises a cutting channel and a spacing area; a reflective metal layer, a sacrificial layer, and a first insulating layer inside the cutting channel are distributed in a trapezoidal shape; such a trapezoidal distribution effectively improves the continuous direction of stress at the cutting channel and reduces continuous accumulation of stress. Therefore, stress lines and the abnormality that a semiconductor epitaxial layer is prone to peel off and fall off are reduced or eliminated, the appearance yield of the light-emitting diode device can be effectively improved, and the product quality of the light-emitting diode device is improved.

IPC Classes  ?

• H01L 33/24 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
• H01L 27/32 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes

Abstract

Provided is an epitaxial structure of a micro LED. The epitaxial structure at least comprises an N-type layer, a light-emitting layer and a P-type layer, wherein the light-emitting layer comprises quantum well structures in n periods; the quantum well structure in each period comprises a well layer and a barrier layer; the quantum well structure in n1 period is defined as a first light-emitting area; the quantum well structure in n2 period is defined as a second light-emitting area; n1 and n2 are greater than or equal to one, and n1 + n2 is less than or equal to n; the first light-emitting area is closer to the N-type layer than the second light-emitting area; an average band gap of the material of the barrier layers in the two light-emitting areas meets the following condition: the first light-emitting area is smaller than the second light-emitting area; and an average band gap of the material of the well layers in the two light-emitting areas meets the following condition: the first light-emitting area is larger than or equal to the second light-emitting area. The micro LED prepared by using the epitaxial structure can realize the current density corresponding to the peak photoelectric conversion efficiency being lower than 1 A/cm2, and the photoelectric conversion efficiency is improved by about 30%.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

A light-emitting apparatus having a limited light-emitting area, and comprising a support (310), and an LED chip (320) and a light blocking layer (330) mounted on the support (310). The light blocking layer (330) fills a non-light-emitting region in a recess and covers a portion of the surface of the LED chip (320). The light-emitting area of the light-emitting apparatus is less than or equal to the size of the LED chip (320), so as to form an obvious point light source, and there is no halo problem.

IPC Classes  ?

• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages

Abstract

A light emitting diode device includes a light emitting epitaxial layered structure and a current spreading layer formed on the light emitting epitaxial layered structure. The current spreading layer has a top surface and a bottom surface that are respectively distal from and proximal to the light emitting epitaxial layered structure, and a peripheral surface that interconnects the top surface and the bottom surface and that is formed with a first patterned structure. The peripheral surface and the bottom surface cooperatively define an interior angle included therebetween which is greater than 90° and smaller than 180°.

IPC Classes  ?

• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

A micro light-emitting device includes a support substrate, at least one micro light-emitting element, and a support structure. The support structure includes a bonding layer, an electrically conductive layer, and a protective insulation layer. The micro light-emitting element is supported by the support structure on the support substrate. The micro light-emitting element includes a light-emitting structure and first and second electrodes. First and second contact regions of the first electrode are respectively connected to a supporting post portion of the electrically conductive layer and a surrounding post portion of the protective insulation layer. A production method of the device and use of the element are also disclosed.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

A micro device transferring apparatus includes a first conveying mechanism, a carrier unit, a push device and a release device. The first conveying mechanism includes a release tape having a release adhesive, a first roller connected to an end of the release tape, and a conveying device connected to a horizontal section of the release tape to drive the release tape to move in a moving direction. The carrier unit includes a first carrier holding multiple micro devices, and a second carrier for receiving the micro devices. The push device is for pushing the release tape to pick up the micro devices with the release adhesive. The release device is for decomposing the release adhesive to release the micro devices.

IPC Classes  ?

• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations

Abstract

The present invention relates to the technical field of LED chips, and in particular, to an LED chiplet and an invisible cutting method for an LED chip. Disclosed is an LED chiplet. The side surface of a substrate of the LED chiplet is provided with multiple laser scratches spaced along the thickness direction of the substrate, and the number of the laser scratches is three or more; the side surface of the substrate is provided sequentially in an up-and-down manner along the thickness direction of the substrate. Also disclosed is an invisible cutting method for an LED chip. The method comprises a step S1, forming multiple laser scratches spaced along the thickness direction of the substrate inside the substrate corresponding to a cutting passage by adopting invisible cutting, and the number of the laser scratches is three or more. According to the present invention, the yield of chiplet cutting can be effectively increased, an oblique crack phenomenon of the substrate is reduced, and the line width of the cutting passage can be reduced, thereby increasing the yield of a single chip. Side light extraction is increased, a light emitting angle is decreased and forward-direction light is increased, thereby increasing the brightness of the chiplet.

IPC Classes  ?

• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Abstract

The present invention discloses a light-emitting device and a manufacture method therefor. The light-emitting device can work at a high current density above 3A/mm2, and comprises: a support having a first surface and a second surface opposite to each other, the first surface being provided with a patterned conductive layer; and an LED device, formed on the first surface of the encapsulation support and comprising an insulation substrate and a plurality of light-emitting units located on the insulation substrate. Each light-emitting unit contains a semiconductor layer sequence, a first electrode and a second electrode. The semiconductor layer sequence has a first type semiconductor layer, a second type semiconductor layer, and an active layer located therebetween. The first type semiconductor layer is located at the positive side of the semiconductor layer sequence; the first electrode and the second electrode face the positive side of the semiconductor layer sequence and are respectively connected to the conductive layer on the encapsulation support via leads. The first electrode is electrically connected with the first type semiconductor layer, and the second electrode is electrically connected with the second type semiconductor layer.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A manufacturing method for a display device, comprising the steps: providing N LED chip sets, the N LED chip sets being obtained by cutting N wafers, without rearrangement, wherein a first LED chip set is produced from a first wafer, a second LED chip set is produced from a second wafer,..., and an N-th LED chip set is produced from an N-th wafer, wherein N is an integer greater than 2; providing a circuit board (200), an upper surface of the circuit board (200) having a plurality of LED chip mounting areas (210); selecting an LED from the N LED chip sets and transferring same to the circuit board (200) until the LED chips are arranged on all the chip mounting areas (210), chips from different LED chip sets being arranged in a mixed manner; and packaging the LED chips to form the display device. Also provided is the display device.

IPC Classes  ?

• H01L 25/00 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices

Abstract

Disclosed is a semiconductor light-emitting device. The semiconductor light-emitting device comprises a substrate (012) and a multi-layer structure on the substrate (012), wherein the multi-layer structure successively comprises a second electrical connection layer (010), an insulating layer (009), a first electrical connection layer (008) and a semiconductor light-emitting sequence starting from a substrate (012) side; the semiconductor light-emitting sequence comprises a first conduction type semiconductor layer (004), a light-emitting layer (003) and a second conduction type semiconductor layer (002); a first electrode (013) for external wire bonding is electrically connected to the first conduction type semiconductor layer (004) by means of the first electrical connection layer (008); a second electrode (014) for external wire bonding is electrically connected to the second conduction type semiconductor layer (002) by means of the second electrical connection layer (010); the semiconductor light-emitting sequence, the first electrode (013) and the second electrode (014) are located at the same side of the substrate; the second electrical connection layer (010) comprises a first part (0101) and a second part (0102); the first part (0101) is located at one side of the insulating layer (009); the second part (0102) extends from the first part (0101) at one side of the insulating layer (009) to penetrate through the insulating layer (009) to reach the same side of the first electrical connection layer (008) and is connected to the second electrode (014); and the second part of the second electrical connection layer (010) is not arranged at a central position below the second electrode (014).

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls

Abstract

A micro light emitting assembly, comprising: a base frame comprising a post structure (310); and at least one micro light emitting diode (100) connected to the base frame by means of the post structure (310) and supported by the post structure (310), wherein an end of the post structure (310) connected to the micro light emitting diode (100) is located in a recess (101) on a surface of the micro light emitting diode (100). The micro light emitting assembly reduces or eliminates a remaining portion of the post structure (310) left on the micro light emitting diode (100) after the post structure (310) has been split and separated therefrom during a transfer process, thereby preventing excessive processing residues from affecting a subsequent die-bonding process in which the micro light emitting diode (100) is attached to a circuit board.

IPC Classes  ?

• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Abstract

121211 being between 50%-100%.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

Disclosed are a light-emitting diode and a manufacturing method therefor, the light-emitting diode comprising: a substrate having top and bottom surfaces opposite one another; a DBR reflective layer formed on the top surface of the substrate; a semiconductor stack layer formed on the DBR reflective layer, emitting light having a first wavelength; the reflectivity of the DBR reflective layer relative to a first light wave is 30% or below, and the reflectivity relative to a second light wave different to the first light wave is 60% or above, the first light wave being emitted by the light-emitting diode and the second light wave not being emitted by the light-emitting diode.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A light-emitting diode device, comprising at least a light-emitting diode chip and a packaging substrate for bearing the light-emitting diode chip. The light-emitting diode chip comprises: a semiconductor epitaxial layer comprising a first semiconductor epitaxial layer, a second semiconductor epitaxial layer and a light-emitting layer located therebetween; and an insulating substrate, two surfaces of which are oppositely provided with a first metal layer and a second metal layer, wherein the first metal layer and the second metal layer have opposite polarities and form a capacitor with the insulating substrate; the first metal layer is electrically connected to the first semiconductor epitaxial layer; and the second metal layer is electrically connected to the second semiconductor epitaxial layer. The capacitor and the semiconductor epitaxial layer are used to form a parallel circuit, and the charge and discharge characteristics of the capacitor are used to provide electrostatic protection for a light-emitting diode.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/42 - Transparent materials
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

Disclosed is a light-emitting diode. In some embodiments, the light-emitting diode comprises: a light-emitting epitaxial laminated layer, which includes a first semiconductor layer, an active layer and a second semiconductor layer, and is provided with a corresponding first surface and second surface; a light-transmitting layer, which is formed on the second surface of the light-emitting epitaxial laminated layer; a first metal layer, which is formed on one surface, away from the light-emitting epitaxial laminated layer, of the light-transmitting layer; and a second metal layer, which is formed on one surface, away from the light-emitting epitaxial laminated layer, of the first metal layer, wherein the first metal layer and the second metal layer constitute a mirror plane structure.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/60 - Reflective elements

Abstract

Disclosed is a light-emitting diode chip. A first electrode and a second electrode of the light-emitting diode chip face towards a front side. A back side of a first conductive layer is directly connected to a front side of a substrate. The area of contact between a front side of the first conductive layer and a back side of a first-type semiconductor layer is greater than the area of the first-type semiconductor layer by 1.5%. Part of the first conductive layer is at least exposed from the front side to be used for the arrangement of the first electrode. Part of a second conductive layer is at least exposed from the front side to be used for the arrangement of the second electrode. The exposed first conductive layer and the exposed second conductive layer are of equal height. An insulating layer extending from a recess covers a back side of the second conductive layer. The light-emitting diode chip has a stronger heat dissipation capability, thereby avoiding or reducing the situation where there is a reduction in the service life of the light-emitting diode chip under the conditions of a large current.

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Disclosed are a light-emitting diode element and a manufacturing method therefor, wherein same are mainly used in working conditions of high voltages and large current densities. A first electrode and a second electrode of the light-emitting diode element face towards a front side. A back side of a first conductive layer is connected to a front side of a substrate. The area of contact between a front side of the first conducting layer and a back side of a first-type semiconductor layer is greater than the area of the first-type semiconductor layer by 1.5%. An insulating layer extending from a recess covers a back side of a second conductive layer. A second conductive layer of one light-emitting diode unit from among any two adjacent light-emitting diode units and a first conductive layer of the other light-emitting diode unit are provided with connecting portions, and these are integrally connected. A plurality of light-emitting diode units share the same supporting and heat dissipation substrate. The present invention improves the reliability of the light-emitting diode element and avoids or reduces the problem of the service life of the light-emitting diode element being too short under large current densities.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape

Abstract

An ultraviolet light-emitting diode (LED) package structure and a manufacturing method therefor. The manufacturing method comprises: providing a support, an LED chip, and a package enclosure; providing the LED chip on the support; and providing a groove structure and a non-groove region on the support. The package enclosure is made of a fluorine-containing resin, and the fluorine-containing resin covers the LED chip, the upper surface of the support, and the groove structure. The package enclosure is made of the fluorine-containing resin, and a groove structure is formed on the upper surface and/or the side surface and/or the lower surface of the support to enhance the binding force of the fluorine-containing resin and the support.

IPC Classes  ?

• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 33/52 - Encapsulations
• H01L 33/56 - Materials, e.g. epoxy or silicone resin

Abstract

A light emitting diode, comprising: a light emitting epitaxial stack, and a current spreading layer located on the light emitting epitaxial stack. The angle between the side wall of the current spreading layer and the bottom surface of the current spreading layer is greater than 90° and less than 180°, and the sidewall of the current spreading layer has a patterned structure.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Abstract

Provided are a light-emitting diode chip structure and a manufacturing method therefor. The structure comprises: a substrate; a light-emitting epitaxial structure, located on the substrate and comprising a first conductive-type semiconductor layer, a quantum well layer and a second conductive-type semiconductor layer which are sequentially stacked; a current extension layer formed on a part of a surface of the epitaxial structure; an insulating layer wrapping a side wall of the current extension layer, wherein the insulating layer has a series of patterned through-hole structures; and a metal layer formed on a surface of the insulating layer, wherein the part of the metal layer is in contact with the transparent conductive layer by means of a part of the through-hole structures, and the other part of the metal layer is in contact with the light-emitting epitaxial structure by means of a part of the through-hole structures.

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Disclosed are a micro light-emitting element and a manufacturing method thereof. A conductive substrate with insulating isolation forms a support post for a pinhole electrode in a common electrode parallel connection means. A modular metal sacrificial layer is used as a testing electrode to perform a large number of total tests of micro light-emitting elements. The micro light-emitting element comprises: an epitaxial layer sequentially comprising a first type semiconductor layer, an active layer, and a second type semiconductor layer, and having a first surface and a second surface opposite to each other; a first electrode formed on the second surface of the epitaxial layer and connected to the first type semiconductor layer; and a second electrode formed on the second surface of the epitaxial layer and connected to the second type semiconductor layer; wherein first connection regions are respectively disposed on the surfaces of the first electrode and the second electrode. The first connection regions can be distinguished from other regions of the electrodes where the first connection regions are located by surface appearance or exterior color thereof.

IPC Classes  ?

• H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Disclosed are a chip for an LED light source, and an LED light source prepared using same. The chip comprises: at least one string of LED chip units, wherein each LED chip unit comprises: a substrate and a light-emitting epitaxial layer, and the LED chip unit is divided into several LED sub-chip units, characterized in that the substrate has a thickness of ≥200 μm.

IPC Classes  ?

• H01L 33/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Abstract

Disclosed is an LED filament structure, comprising: a base plate (100); an LED chip component, which comprises at least one first LED chip (101) and at least one second LED chip (102); a fluorescent material layer (103) for encapsulating both the LED chips; and a light filter material layer (104) for covering a surface of either of the first LED chip (101) and the second LED chip (102), wherein when the LED filament structure has just been turned on, the light filter material layer (104) does not transmit light, so that the fluorescent material layer (103) emits light of a first color temperature; and in a pre-set period of time after the filament structure is turned on, the light filter material layer (104) gradually becomes transparent, so that light emitted by both the first LED chip (101) and the second LED chip (102) can excite the fluorescent material layer (103) to emit light of a second color temperature, the second color temperature being different from the first color temperature.

IPC Classes  ?

• F21K 9/20 - Light sources comprising attachment means
• F21K 9/64 - Optical arrangements integrated in the light source, e.g. for improving the colour rendering index or the light extraction using wavelength conversion means distinct or spaced from the light-generating element, e.g. a remote phosphor layer
• F21V 9/30 - Elements containing photoluminescent material distinct from or spaced from the light source
• F21V 9/40 - Elements for modifying spectral properties, polarisation or intensity of the light emitted, e.g. filters with provision for controlling spectral properties, e.g. colour, or intensity
• F21V 19/00 - Fastening of light sources or lamp holders
• H01L 33/50 - Wavelength conversion elements
• F21Y 115/10 - Light-emitting diodes [LED]
• H01L 25/075 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

Provided are a light-emitting diode chip structure and a manufacturing method therefor. The structure comprises a substrate, an epitaxial structure, a mesa structure, a first current barrier layer, a current spreading layer, a second current barrier layer, a first P electrode, a distributed Bragg reflection layer, a second P electrode and an N electrode, wherein the first current barrier layer is formed on part of the surface of the epitaxial structure; the current spreading layer is wrapped around the first current barrier layer; the second current barrier layer is formed on the surface of the current spreading layer and has a patterned rough surface; and the distributed Bragg reflection layer is wrapped around the first P electrode, a surface of the second current barrier layer and a sidewall of the epitaxial structure. According to the present invention, by means of a current barrier layer with a patterned rough structure, the interfacial surface area of a current spreading layer and a distributed Bragg reflection layer can be greatly increased, such that the scattering of incident light of the distributed Bragg reflection layer is enhanced, and the chip brightness is thus improved; moreover, the adhesion of the current barrier layer and the distributed Bragg reflection layer can be enhanced, and the structural reliability is improved.

IPC Classes  ?

• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector

Abstract

Disclosed by the present invention are a light-emitting diode and a manufacturing method therefor. In some embodiments, the light-emitting diode comprises: a light-emitting epitaxial layer, comprising in sequence from top to bottom a first semiconductor layer, a light-emitting layer and a second semiconductor layer, wherein an upper surface of the light-emitting epitaxial layer is provided with a first electrode region, which comprises a pad region and an extension region; an insulating layer, which is formed on the extension region of the first semiconductor layer; a transparent conductive layer, which is formed on a surface of the first semiconductor layer and which covers the insulating layer; a protective layer, which is formed on a surface of the transparent conductive layer and which forms a first opening in the extension region to expose a portion of a surface of the transparent conductive layer of the extension region; a first electrode, which is formed on the protective layer and which comprises a pad portion and an extension portion, the expansion portion being electrically connected to the transparent conductive layer of the extension region by means of the first opening.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/46 - Reflective coating, e.g. dielectric Bragg reflector
• H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

The present invention relates to a microelement transfer device and a method for transferring a microelement using the transfer device. The transfer device comprises a first conveying device, a first carrier, a second carrier, a pressing device and a releasing device; the first conveying device comprises a conveyor belt having a separable plastic material provided on a lower surface thereof. The first carrier and the second carrier are respectively used for placing microelements to be transferred and for receiving transferred microelements. The pressing device can move up and down in a vertical direction to squeeze the conveyor belt, such that the separable plastic material on the conveyor belt makes contact with and grasps the microelements underneath. The release device is used to cause the separable plastic material on the conveyor belt to separate, thereby releasing the microelements grasped by the conveyor belt. The transfer device and method provided by the present invention can achieve accurate positioning and efficient transfer of one or more microelements by combining the pressing device, the releasing device and the separable plastic material together.

IPC Classes  ?

• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

Provided is a white LED packaging structure, comprising: a substrate, LED chips and a wavelength conversion material layer, wherein the LED chips have at least two types of wavelengths; a peak wavelength of the first type of LED chips is between 385 nm and 425 nm; a peak wavelength of the second type of chips is greater than the peak wavelength of the first type of LED chips; a peak wavelength of an emission spectrum of the wavelength conversion material layer is between 440 nm and 700 nm; and the wavelength conversion material layer absorbs light emitted from the LED chips, so as to emit a white light source.

IPC Classes  ?

• H01L 33/50 - Wavelength conversion elements

Abstract

Disclosed are a micro light-emitting diode and a transfer method therefor. The method involves: providing a micro light-emitting diode core particle, the top face of which has a hole; plating a side face and a bottom face of the core particle with a sacrificial layer; fixing the core particle to a bonding layer by means of the sacrificial layer, and then bonding the core paticle to a temporary substrate by means of the bonding layer; arranging a bridge structure connecting the bonding layer and the core particle respectively; and consuming the sacrificial layer to form a transfer device. A transfer film applies a torque, relative to the bridge structure, to the core particle by means of extruding the hole. Under the action of the torque, the core particle is separated from a bridge, and the core particle is fixed by means of the transfer film for transfer.

IPC Classes  ?

• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

The present utility model discloses an LED light emitting device, comprising: a substrate having a groove; an LED chip and an antistatic component mounted in the groove; an upper surface of the substrate has a conductive layer, which is divided into at least two electrically isolated regions by means of a gap; the gap has at least one corner so as to divide the gap into a first segment and a second segment which are connected but not in a same straight line; the LED chip is mounted on the first segment of the gap, and the antistatic component is mounted on the second segment of the gap.

IPC Classes  ?

• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields

Abstract

The present invention provides a method for mass transfer of micro-components, comprising steps of: 1) grasping micro-components by means of a finished photosensitive material; 2) using the micro-components as a photolithographic mask to form the photosensitive material into a trapezoidal structure and supporting micro-columns; and 3) breaking the supporting micro-columns with a mechanical force to realize mass transfer of the micro-components. The present invention adopts a finished photosensitive material to grasp micro-components, avoiding the issue of imprecise alignment when grasping the micro-components. The present invention utilizes the micro-components as a photolithographic mask, and forms the photosensitive material into a trapezoidal structure and supporting micro-columns, so as to improve the stability of the micro-components and the ease of subsequent separation. The present invention only requires breaking the supporting micro-columns with a mechanical force to achieve mass transfer of the micro-components. The device involves a simple process, and effectively reduces processing costs.

IPC Classes  ?

• H01L 21/68 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for positioning, orientation or alignment
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided is an ultraviolet LED packaging structure, comprising a support (10), a cavity (20), an LED chip (30), a filling material layer (40), an adhesive layer (50), and a lens (60). The cavity (20) is located between the support (10) and the lens (60); the LED chip (30) is located inside the cavity (20); and the support (10) and the lens (60) are packaged by means of the adhesive layer (50). The adhesive layer (50) has a multi-layer structure; and a material of at least one layer of the structure of the adhesive layer (50) is identical with that of the filling material layer (40).

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/58 - Optical field-shaping elements
• H01L 33/56 - Materials, e.g. epoxy or silicone resin
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages
• H01L 33/52 - Encapsulations

Abstract

The present invention provides a micro-component packaging method, comprising: 1) forming a packaging material layer on a substrate and performing semi-curing processing on the packaging material layer; 2) grabbing an array of micro-components to the surface of the packaging material layer on the basis of the surface viscosity of the packaging material layer; 3) aligning and bonding the array of the micro-components with eutectic metal on a packaging base plate; 4) performing eutectic processing on the array of the micro-components and the eutectic metal, and maintaining the semi-cured state of the packaging material; 5) pressing the semi-cured packaging material layer and the packaging base plate together so that the packaging material layer covers the micro-components, and completely curing the packaging material; and 6) removing the substrate. According to the present invention, grabbing of the micro-components is implemented by using semi-cured silica gel, and transferring and sealing of the micro-components are implemented by means of low-temperature and high-vacuum pressing, so that the process is simple and smooth, void-free packaging of the micro-components can be implemented, the packaging quality can be improved, and packaging costs can be effectively reduced.

IPC Classes  ?

• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings

Abstract

A packaging structure for a laser device and a light guide structure (230) thereof. The packaging structure for a laser device comprises a substrate (210), a laser element (220), a light guide structure, and a wavelength conversion layer (240). The laser element (220) is fixed on the upper surface of the substrate, and can emit a first laser beam. The light guide structure comprises a transparent heat conduction block and a reflector (232), and carries out light shaping of horizontal light sent by the laser element and then convert the light into vertical light and emit the light. The wavelength conversion layer (240) is formed on the upper surface of the light guide structure. The light guide structure serves as a heat dissipation channel, and discharges heat generated in a wavelength conversion process. SMD packaging is used on the packaging structure for a laser device, and a light source component has a high heat conductivity and good heat dissipation performance, thereby reducing the impact of heat on the laser device emitting light, and improving the reliability of a packaged body.

IPC Classes  ?

• F21V 13/14 - Combinations of only three kinds of elements the elements being filters or photoluminescent elements, reflectors and refractors
• H01S 5/00 - Semiconductor lasers

Abstract

Disclosed are a transfer method and a transfer apparatus for a semiconductor micro-element. The method involves: arranging a bonding layer on a substrate; and connecting the bonding layer with a semiconductor micro-element, wherein the connected bonding layer partially has a columnar support structure; there is a through hole for blowing air in the middle of the columnar support structure of the bonding layer; one end, close to the semiconductor micro-element, of the through hole is an electrode or non-electrode area; and the bonding layer is made of a polymer.

IPC Classes  ?

• H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation

Abstract

Disclosed are a microscopic light-emitting diode, a display device and a manufacturing method therefor, wherein at least one electrode is provided with a connection area for metal wiring so as to achieve the full measurement aim of a Micro-LED. A miniature light-emitting diode chip (100) comprises: an epitaxial laminate layer (110), which successively includes a first-type semiconductor layer (112), an active layer (113) and a second-type semiconductor layer (114), and has first and second surfaces, which are opposite each other; a first electrode (121), which is formed on the second surface of the epitaxial laminate layer (110) and is connected to the first-type semiconductor layer (112); a second electrode (122), which is formed on the second surface of the epitaxial laminate layer (110) and is connected to the second-type semiconductor layer (114); and a first connection area (123), which is respectively disposed on a surface of the first electrode (121) and the second electrode (122), wherein the first connection area (123) can be distinguished from other areas of an electrode where same is located in terms of surface topography or appearance color.

IPC Classes  ?

• H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Abstract

Disclosed are a white light LED package structure and a white light source system. The structure comprises: a substrate (100), an LED chip (200) and a wavelength conversion material layer (300), wherein the luminescence peak wavelength of the LED chip is between 400 nm and 425 nm; the luminescence peak wavelength of the wavelength conversion material layer is between 440 nm and 700 nm; and the wavelength conversion material layer absorbs light emitted by the LED chip and emits a white light source. Where P(λ) is the luminescence spectrum of the white light source, S(λ) is the luminescence spectrum of a blackbody radiation having the same colour temperature as the white light source, P(λmax) is the maximum light intensity in 380-780 nm, S(λmax) is the maximum light intensity of the blackbody radiation in 380-780 nm, and D(λ) is a difference value between the spectrum of a white light LED and the spectrum of the blackbody radiation in 510-610 nm, the white light source meets the following condition: D(λ) = P(λ)/P(λmax) - S(λ)/S(λmax), -0.15 < D(λ) < 0.15.

IPC Classes  ?

• H01L 33/50 - Wavelength conversion elements
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An infrared radiation LED light emitting element, comprising: a support structure (10); a baffle structure (20), connected to the periphery of the support structure; an infrared radiation LED chip (30), provided on the support structure; a packaging adhesive (40), covering the periphery of the infrared radiation LED chip; a lens (50), formed on the packaging adhesive and having a first surface (51) facing the packaging adhesive and a second surface (52) away from the packaging adhesive, the first surface comprising a first sub-surface (511) and a second sub-surface (512) located on either side of the first sub-surface (512), wherein the longitudinal section of the first sub-surface is in a curved shape, and the longitudinal section of the second sub-surface is in a trapezoid shape.

IPC Classes  ?

• H01L 33/54 - Encapsulations having a particular shape
• H01L 33/58 - Optical field-shaping elements

Abstract

A transposing head for transferring micro-elements, comprising: a substrate body; a protruding structure, protruding from the substrate body; and a flexible adhesive layer covering the surface of the protruding structure. The transposing head provided in the present utility model uses a protruding structure protruding from the substrate body and the suction force of the flexible adhesive layer covering the protruding layer on the micro-elements to implement transfer, being particularly suited to transferring micro-elements having a certain degree of surface coarseness; the protruding structure uses through holes to expel air, and uses vacuum pressure to transfer the micro-elements, improving the reliability of high quality rapid transfer of micro-elements.

IPC Classes  ?

• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

Disclosed are a microelement transfer device having a test circuit, a transfer method and a manufacture method for microelements, a microelement device, and an electronic apparatus. During the transfer of microelements, the transfer device can test the microelements, and exclude a defective microelement. The microelement transfer device (1100) having the test circuit comprises: a base substrate (1110) having two opposite surfaces (1110A, 1110B); a pick-up head (1120) array being formed on a first surface (1110A) of the base substrate (1110) and used for picking up or releasing the microelements; and the test circuit being provided in the internal portion and/or on the surfaces (1110A, 1110B) of the base substrate (1110) and having a series of sub-test circuits. Each sub-test circuit has at least two test electrodes (1134A, 1134B), which test the photoelectric parameter of the microelement during transfer of the microelements by the transfer device (1100).

IPC Classes  ?

• H01L 21/66 - Testing or measuring during manufacture or treatment
• H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

A transposing head for transferring micro-components and a transfer method for the micro-components. The transposing head (300) comprises: a cavity (330); a plurality of vacuum paths (350) communicated with the cavity (330) respectively and are provided with openable/closable valves (352) at communication positions; a plurality of suction nozzles (360) communicated with the plurality of vacuum paths (350) respectively, the suction nozzles sucking or releasing micro-components by means of vacuum pressure, and the vacuum pressure being transmitted through each of the vacuum paths (350); and a switching assembly for controlling opening or closing of the valves (352) of the respective vacuum paths, so as to control the suction nozzles to suck or release a required micro-component by means of vacuum pressure.

IPC Classes  ?

• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

A pick-and-place head (300) for use in the transfer of micro-components (200) and a method for transferring the micro-components (200), comprising: a cavity (301) having a vacuum path and a kit (302) having several suction nozzles (303) and several vacuum path members (304), the suction nozzles (303) being configured to be in communication respectively with the vacuum path members (304), the vacuum path members (304) being formed to be in communication respectively with the vacuum path in the cavity (301), and the suction nozzles (303) using vacuum pressure for suctioning the micro-components (200) or releasing the micro-components (200). The vacuum pressure is transmitted via the vacuum path members (304) in the paths and via the vacuum path. When the kit (302) is mounted in the cavity (301), the upper surface of the kit (302) is provided with optical switch components (305) used for controlling the opening or closing of the vacuum path members (304) in the paths and of the vacuum path, thus controlling the suction nozzles (303) to use the vacuum pressure in suctioning or releasing the required micro-components (200).

IPC Classes  ?

• H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping

Abstract

An HBT manufacturing method. The method comprises successively performing on a semiconductor substrate: emitter mesa etching, so as to leave an electrode forming region of an emitter electrode, to expose an electrode forming region of a base electrode layer (4) and to manufacture a base electrode (8), performing base electrode mesa etching so as to expose an electrode forming region of a collector electrode layer and to manufacture a collector electrode (9), depositing a dielectric layer (10) outside the electrode forming region of the emitter electrode, and etching the dielectric layer so as to open holes in regions corresponding to the base electrode and the collector electrode, and at the same time manufacturing a collector electrode lead-out wire (12), a base electrode lead-out wire (13) and an emitter electrode (11), and carrying out electrode interconnection wiring. An emitter electrode, a base electrode lead-out wire and a collector electrode lead-out wire are manufactured in the same process, thereby saving on the process of independently manufacturing the emitter electrode, and reducing the manufacturing costs.

IPC Classes  ?

• H01L 21/331 - Transistors
• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups

Abstract

A micro component transfer method and apparatus, and an electronic device. The transfer method comprises steps of: placing at least one micro component (200) on a first substrate (100); enabling a transfer head (300) made of a biomimetic gecko material to face and contact with the micro component, and absorbing the micro component by means of the adhesive capability of the biomimetic gecko material, so as to extract a required micro component; and enabling the transfer head to face a second substrate (400), and desorbing the micro component by means of the desorption capability of the biomimetic gecko material, so as to release the required micro component on the second substrate.

IPC Classes  ?

• H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided are a light-emitting diode and a manufacturing method therefor, comprising an underlayment (100), performing a cleaning process on a surface of the underlayment (100); growing a buffer layer (200) and an N-type semiconductor layer (300) on the surface of the underlayment (100) in sequence; growing a quantum well layer (400) on a surface of the N-type semiconductor layer (300), wherein the growth of the quantum well layer (400) comprises: the growth of a defect layer (410), a recovered layer (420) and a light-emitting layer (430); and growing a first P-type semiconductor layer (510), an electron blocking layer (520) and a second P-type semiconductor layer (530) on a surface of the quantum well layer (400). Increasing In composition on the premise of improving the quality of the quantum well and meanwhile using the high pressure and lightly doped first P-type layer structure, improve the light-emitting brightness of the light-emitting diode.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

Disclosed is an AlGaInP light emitting diode. The AlGaInP light emitting diode sequentially comprises, from bottom to top, a substrate, a DBR reflecting layer, an N-type semiconductor layer, a quantum well light emitting layer, a P-type semiconductor layer, a transition layer, and a P-type current spreading layer. The DBR reflecting layer uses multispectral doping. The P-type semiconductor layer comprises a combination of a first P-type semiconductor layer adjacent to the quantum well light emitting layer and a second P-type semiconductor layer adjacent to the transition layer, and a doping concentration of the second P-type semiconductor layer is smaller than a doping concentration of the first P-type semiconductor layer. The present invention facilitates spreading of a current in a DBR reflecting layer by increasing a doping concentration of a multispectral DBR, thereby improving aging performance. The present invention is used to balance doping of a transition layer by reducing a P-type semiconductor doping layer adjacent to the transition layer to form a concentration difference with the transition layer, and avoids increase of nonradiative recombination introduced through high doping of the transition layer in the long-time aging, resulting in light attenuation, and further improving aging performance.

IPC Classes  ?

• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

Provided are an ultraviolet light-emitting diode epitaxial structure and a preparation method therefor. The method comprises: providing a substrate (100); growing a high temperature AlN layer (101) first; then growing a low temperature AlN layer (102); further growing a high temperature AlN layer (101); growing an n-type AlGaN layer (103); growing an active layer (104); and growing a p-type AlGaN layer (106). Since the low temperature AlN layer (102) is in three-dimensional small islands rather than a two-dimensional thin film, as the high temperature AlN layers (101) are further grown continuously, the three-dimensional small islands grow gradually and merge with each other; in the process of merging the islands, dislocations extending from the lower AlN layer can be bent, thus increasing the probability of dislocations annihilating each other, improving the crystal quality of the upper AlN layer, improving the whole crystal quality of the epitaxial structure layer material, and improving the luminance of an ultraviolet LED.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

Disclosed are a nitride underlayer, a light emitting diode and an underlayer manufacturing method. An aluminum nitride layer is deposited using physical vapor deposition, comprising: introducing oxygen into a reaction chamber during deposition to form an aluminum nitride layer containing oxygen (210); and treating the surface of the aluminum nitride layer by use of the physical properties of plasma, so as to reduce surface oxygen content of the aluminum nitride layer, forming a modified aluminum nitride layer (220), wherein the morphology of the modified layer is the same as the morphology of the aluminum nitride layer. Due to decreased surface oxygen content of the modified layer, the energy state of the surface is reduced, probability of bonding with a buffer layer is increased, and difference in lattice parameters with the buffer layer is decreased, such that stress on the underlayer of a light emitting diode is reduced.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof

Abstract

Disclosed are a semiconductor epitaxial wafer and a manufacturing method thereof. A first reflecting layer (20) is disposed between a sapphire substrate (10) and an epitaxial layer (30). When a laser is used to perform repeated irradiation of the lower surface of the substrate (10) to form irradiation points, the first reflecting layer (20) reflects the laser light that escapes and is radiated towards the upper surface of the substrate (10), thereby preventing heat damage of the epitaxial wafer during wafer slicing.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions

Abstract

A semi-polarity LED epitaxial structure and a preparation method therefor, which comprises the following processing steps: providing a sapphire substrate (11); growing a semiconductor bottom layer structure (14 and 15) on the sapphire substrate to form V-shaped pits on the surface, wherein the side face (17) of each V-shaped pit is a semi-polarity surface corresponding to (1-101) crystal plane family; and growing a semiconductor functional layer (16) on the semi-polarity surface of the semiconductor bottom layer structure. Selective area epitaxy and secondary epitaxy are not required, which simplifies the production process. The semi-polarity surface belongs to the (1-101) crystal plane family. The overlapped area of the smooth conduction band bottom and valence-band top is quite large in a reciprocal space, so that the radiation composite efficiency is greatly improved. The exposing of the semi-polarity surface is realized by adjusting the material growth process, avoiding limitation by the geometrical shape of the substrate, and allowing the preparation of the semi-polar surface material being more operable and with low cost.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

A bonded electrode structure of a flip LED chip and a manufacturing method therefor. The flip LED chip comprises: a substrate (100); a light-emitting epitaxial layer (101), arranged on the substrate; and bonded electrodes (102, 103), arranged on the light-emitting epitaxial layer. The bonded electrode structure is a metal laminate consisting of, from bottom to top in the vertical direction, bottom layers (1021A, 1021B) and top layers (1022A, 1022B), wherein the bottom layer structure is made of a readily-oxidizable metal with oxidized layers (104) formed on the sidewalls, and the top layer structure is made of a non-readily-oxidizable metal. The bonded electrode structure is divided, in the horizontal direction, into main contact portions (1021A, 1022A) and grid-shaped portions (1021B, 1022B) surrounding the main contact portions. The bonded electrode structure and manufacturing method therefor solve the problem in which short circuits or electrical leakage easily occurs in a conventional flip LED chip structure during package welding.

IPC Classes  ?

• H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A method for producing a nitride substrate, comprises the following steps of: using PVD to sputter an AIN layer while adding a small amount of non-Al material to form a nitride having a lower decomposition temperature than AlN; and then annealing at a high temperature, the annealed AlN layer being no longer a flat surface but ridged at the micro level; continuing to use MOCVD on this surface to grow AlGaN such that the stress can be released by three dimensional to two dimensional mode conversion, thereby improving the AlN cracks.

IPC Classes  ?

• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

A light-emitting diode and a manufacturing method therefor. The light-emitting diode sequentially comprises, from bottom to top: a substrate (100); a light-emitting epitaxial layer (102) formed by stacking semiconductor material layers and formed on the substrate; a current expansion layer (104) doped with conductive metal nano groups (105) and formed on the light-emitting epitaxial layer; and metal nano groups (106) having high transmittance for visible light and formed on the current expansion layer. The doped conductive metal nano groups are dispersed inside the current expansion layer, thereby reducing the lateral resistance of the current expansion layer so as to improve the lateral expansion uniformity of a current. The metal nano groups having high transmittance for visible light are distributed on an upper surface of the current expansion layer, thereby having a coarsening effect so as to increase the extraction efficiency of light.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

An epitaxial structure having an electron barrier layer and a hole adjustment layer and a method for preparing the same are disclosed. A buffer layer (20), an N-type doped epitaxial layer (30), a light-emitting layer (40), and a P-type doped epitaxial layer (70) are sequentially grown from bottom to top. The epitaxial structure is characterized in that: the light-emitting layer (40) and the P-type doped epitaxial layer (70) further comprise therebetween a P-type doped hole injection layer (50) of which the material is Alx0Iny0Ga1-x0-y0N and a multi-layer structure (60) that is formed by stacking a plurality of sub-combination layers; and each of the sub-combination layers consists of an electron barrier layer of which the material is Alx1Iny1Ga1-x1-y1N and a hole adjustment layer of which the material is Alx2Iny2Ga1-x2-y2N, wherein y0>x0>0, x1>y1>0, x2≥y2>0, x1>x2≥x0, and y0>y2>y1. P-type impurities in the hole injection layer (50) enter a sub-combination layer near the hole injection layer (50) by using a delay effect and a diffusion effect in a subsequent high-temperature condition. The component content of aluminum and indium in the multi-layer structure (60) is adjusted to result in desirable electron barrier performance, reducing a resistance value, providing an effective hole injection source, and enhancing antistatic performance of a chip.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

Disclosed are a high-pressure light-emitting diode and a manufacturing method therefor, comprising: providing an underlayment, and forming a luminescent epitaxial laminated layer on the underlayment; patterning the luminescent epitaxial laminated layer and manufacturing a groove until an underlayment surface is exposed so that the luminescent epitaxial laminated layer is divided into a plurality of light-emitting diode units and the light-emitting diode units constitute at least two rows; manufacturing an electrode interconnection line across the groove, two adjacent light-emitting diode units being connected via the electrode interconnection line; manufacturing an electrode welding pad which is formed on a light-emitting diode unit on the outermost periphery of the high-pressure light-emitting diode, characterized in that an insulating protective layer opening is provided at the groove where an electric potential difference of the any two adjacent light-emitting diodes is greater than or equal to three times the forward voltage of a single light-emitting diode for preventing the heat generated when the insulating protective layer is broken through by dielectric from inducing the luminescent epitaxial laminated layer to be broken through.

IPC Classes  ?

• H01L 23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A light-emitting diode and a method for manufacturing the same. The light-emitting diode comprises at least a substrate (10) and an N-type layer (20), a light-emitting layer (30), a P-type layer (40), a transparent conductive layer (50), an N electrode (70), and a P electrode (60) that are sequentially deposited on the substrate (10). The light-emitting diode is characterized in that: the transparent conductive layer (50) comprises a graphene layer (51) and a metal oxide layer (52) located on the graphene layer (51); the graphene layer (51) is a cellular-form structure having openings (511); a lower surface of the metal oxide layer (52) extends into the openings (511) of the graphene layer (51) having the cellular-form structure to reach the P-type layer (40) to form multiple protrusions (53); and the protrusions (53) are in contact with an upper surface of the graphene layer (51) and the P-type layer (40) to form a eutectic structure used to reduce the contact resistance of the transparent conductive layer (50) and the P-type layer (40), thereby enhancing a current expansion capability of the transparent conductive layer (50).

IPC Classes  ?

• H01L 33/42 - Transparent materials
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

A nitride bottom layer structure and a manufacturing method therefor. A sputtering-type AlN layer having an open-type strip-shaped hole (130) is used as a buffer layer (120), so that a stress release path is provided before a nitride film is grown on the buffer layer (120), thus increasing the lattice quality of a nitride bottom layer structure and improving a surface cracking condition. In addition, also provided is a light-emitting diode structure adopting the nitride bottom layer structure.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A nitride light-emitting diode and a growth method therefor, wherein a structure comprises a substrate (10), and a nitride buffer layer (20), an n-type layer (40), a quantum well luminescent layer (50) and a p-type layer (60) successively formed on the substrate, wherein the n-type layer is of a superlattice structure formed by alternatively stacking a non-AlGaN-doped layer (41) and an n-type GaN-doped layer (42) and controls an Al group of the non-AlGaN-doped layer, so as to generate a first stress for offsetting a second stress generated by the n-type GaN-doped layer, thereby reducing the crystal defect and warpage generated when the n-type layer is doped with impurities. Simultaneously provided is a growth method for a nitride light-emitting diode, wherein by controlling the growth temperature and pressure of an n-type layer, the thickness of an n-type GaN-doped layer is greater than that of a non-AlGaN-doped layer for improving the surface roughness of the non-AlGaN-doped layer and forming the n-type GaN layer with a smooth surface. While improving a series resistor of a device, the invention improves the crystal defect and warpage and further enhances the photoelectric performance of the device.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

A light emitting diode and a method for manufacturing same, comprising implanting a conductive mask layer (2) onto the surface of a substrate (1), performing epitaxial growth on the conductive mask layer (2) to form epitaxial laminated layers (3, 4, 5, 6, 7, 8), and arranging current channels (12, 13) in the epitaxial laminated layers (3, 4, 5, 6, 7, 8). When a current is injected, the current is at first conducted through the current channel (12) to the conductive mask layer (2), and enters the epitaxial laminated layers (3, 4, 5, 6, 7, 8) after spreading laterally at the conductive mask layer (2), effectively improving the current spreading uniformity, being able to reduce the operating voltage of the device. At the same time, the conductive mask layer (2) has a light reflecting effect, further improving the extracting efficiency and the lighting luminance.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/02 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An LED epitaxial structure, a chip structure, and a preparation method therefor. The chip comprises a conductive substrate (9), a p-type nitride layer (7), an active layer (6), an n-type recovery layer (4), an n-type nitride layer (3), and an n electrode (10) from the bottom to the top in sequence. The present invention is characterized in that: the n-type nitride layer (3) is provided with a nitrogen polarity crystal and a gallium polarity crystal; a height difference exists between the surface of the nitrogen polarity region and the surface of the gallium polarity region; mixed polarity consistent with that of the n-type nitride layer (3) exists on the surface of one side of the n-type recovery layer (4) adjacent to the n-type nitride layer (3); and the connected gallium polarity surface is disposed on the surface of one side of the n-type recovery layer (4) far away from the contacted n-type nitride layer (3).

IPC Classes  ?

• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided are an LED epitaxial structure and a manufacturing method, comprising in an ascending sequence: a substrate (1), a first electrically-conductive-type semiconductor layer (4), a superlattice (5), a multi-quantum well layer (7), and a second electrically-conductive-type semiconductor layer (9), and characterized in that: at least one particle medium layer (6) is inserted into the superlattice (5), the particle medium layer (6) is used for forming V-shaped pits of different widths and depths in the superlattice (5), and the multi-quantum well layer (7) fills the V-shaped pits and is arranged on the top surface of the superlattice (5).

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided is a patterned sapphire substrate. The patterned sapphire substrate is provided with a first surface and a second surface that are opposite to each other. The first surface of the substrate is formed by multiple patterns (21) that are arranged at intervals. Each pattern (21) is provided with a top surface (210), a bottom surface (211), multiple side surfaces (212), and at least one recess region (213) sandwiched between an adjacent side surface (212) and the top surface (210). The depth and the width of the recess region (213) are gradually decreased from the top of the pattern (21) to the bottom. Also provided is a manufacturing method for the patterned sapphire substrate, a light emitting diode using the substrate, and a manufacturing therefor. The recess region on the pattern surface of the patterned sapphire substrate increases the area of light reflection, thereby improving the light extraction efficiency of the patterned sapphire substrate.

IPC Classes  ?

• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An LED epitaxial structure and a manufacturing method, comprising in an ascending sequence: a substrate (1), first electrically-conductive-type semiconductor layers (3 and 4), a superlattice (5), a multi-quantum well layer (6) having V-shaped pits, a hole injection layer (8), and second electrically-conductive-type semiconductor layers (9 and 10). The hole injection layer (8) is double-hexagonal cones filling the V-shaped pits and embedded into the second electrically-conductive-type semiconductor layers (9 and 10).

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

A light emitting diode and a manufacturing method therefor. A material structure of a light emitting well-region barrier is designed, to improve the limitation capability of electron holes and significantly improve the light emitting efficiency of an LED chip under high temperature. A structure of the light emitting diode comprises a first-classification semiconductor layer, a second-classification semiconductor, and an active layer (140) therebetween. The active layer (140) is a multi-quantum well structure formed by means of alternation of well layers and barrier layers. A first barrier layer (141) is a first AlGaN gradient layer of which aluminum component gradually increases in the direction from the first-classification semiconductor layer to the quantum well, a barrier layer (143) located between the well layers is an AlGaN/GaN/AlGaN multi-layer barrier layer, and a last barrier layer (144) is a second AlGaN gradient layer of which aluminum component gradually decreases in the direction from the quantum well to the second-classification semiconductor layer.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A patterned substrate (10), a preparation method, and a light-emitting diode. A dielectric layer (22) is deposited on the surface of a substrate with multiple protrusions (11), and by utilizing the amorphous body characteristics of the dielectric layer (22), aluminum nitride layers (42) deposited on side surfaces (112) and top surface platforms (113) of the protrusions by means of a PVD method are amorphous, while aluminum nitride (41) covering smooth surfaces (111) of protrusion gaps is polycrystal consisting of micro crystal particles. Thereafter, when the substrate (10) is applied to an MOCVD method for depositing gallium nitride-based epitaxial layers (50, 60, 70, 80) to form a light-emitting diode, by utilizing the characteristics that the polycrystalline aluminum nitride (41) on the smooth surfaces grows more easily and the amorphous aluminum nitride (42) is uneasily to deposit the gallium nitride-based epitaxial layers, the epitaxial layers selectively grow on the aluminum nitride layers (41) on the smooth surfaces (111) of the protrusion gaps, and are uneasy to grow on the side surfaces (112) and the top surface platforms (113) of the protrusions, so that the growth of the gallium nitride-based epitaxial layers on the side surfaces is reduced, the quantity of defects when the gallium nitride-based epitaxial layers in lateral growth and the gallium nitride-based epitaxial layers in positive growth on the smooth surfaces (111) are merged is reduced, and the performance of a finally-formed semiconductor element is improved. Moreover, the growth of the lateral gallium nitride-based epitaxial layers is inhibited, so that the gallium nitride-based epitaxial layers in positive growth are merged into a smooth surface more easily.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A light emitting diode, containing nitrates and emitting white light, comprises: a substrate (100), extension layers (101, 103, 104), an N-type electrode (102), and a P-type electrode (105). By forming channels on the substrate (100) and extension layers (101, 103, 104), respectively, and forming temperature isolation layers (106a/b) using a low heat transfer coefficient material, three temperature-independent zones I/II/III are formed on a single chip. Temperature control layers (107a/b/c, 108a/b/c) containing a high heat transfer coefficient material are formed at side walls of the extension layers (101, 103, 104) at the zones I/II/III and a back side of the substrate (100) to control temperatures of the extension layers (101, 103, 104) and the substrate (100), respectively, and configured to adjust, according to differences between thermal expansion coefficients, lattice constants of the nitrates of the zones I/II/III and the substrate (100), respectively, thereby adjusting a biaxial stress applied to the nitrate. Applying different biaxial stresses to a quantum well (103) can change locations of a conduction band bottom and valance band top, and modify a width of a forbidden band and a wavelength of an emitted light, thereby implementing irradiation of red light, green light, and blue light by adjusting and controlling, by adjusting the biaxial stress, a light emitting diode of an identical indium component, and realizing white light emittance from a single chip.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
• H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Abstract

A eutectic electrode structure of an LED flip chip, and LED flip chip, comprising: a substrate (200); a first semiconductor layer (201); a second semiconductor layer (203), wherein a first localized imperfection region is located on a portion of the second semiconductor layer (203) and extends downward to the first semiconductor layer (201); a first metal layer (206) located on a portion of the first semiconductor layer (201); a second metal layer (205) located on a portion of the second semiconductor layer (203); an insulation layer (207) covering the first metal layer (206), the second metal layer (205), the second semiconductor layer (203), and the first semiconductor layer (201) at the localized imperfection region, and having opening structures respectively located at the first metal layer (206) and the second metal layer (205); and a eutectic electrode structure located at the insulation layer (207) having the openings, wherein the eutectic electrode structure is formed by first eutectic layers (2081, 2091) and second eutectic layers (2082, 2092) from bottom to top in a vertical direction, and is divided into a first type of electrode region (209) and a second type of electrode region (208) in a horizontal direction. The technical solution addresses the problem of packaging defects due to a high rate of eutectic void formation likely to occur during a eutectic bonding process of conventional LED flip chips.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/40 - Materials therefor
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages

Abstract

A semiconductor element that avoids, by means of using a metal protection layer (21) and a metal oxide protection layer (22) grown on a substrate (10), the formation of an amorphous layer on the surface of the silicon substrate; and that uses an intermediate layer (23) to reduce the difference in lattice between the metal oxide protection layer and a group III-IV buffer layer (24), improving the crystal quality of the group III-IV buffer layer. Provided at the same time is a manufacturing method, which can avoid the formation of an amorphous layer near the interface of a silicon substrate, thereby avoiding the emergence of cracks. Moreover, a light-emitting diode or transistor element is manufactured by means of making good use of a high-quality multi-layered buffer structure deposited using PVD method and an epitaxial layer of gallium nitride, indium gallium nitride or aluminum gallium nitride grown on said buffer structure.

IPC Classes  ?

• H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
• H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

Abstract

A flip-chip light emitting diode (LED) structure and manufacturing method. The flip-chip LED structure comprises: a substrate (100); an external extension layer located on the substrate and comprising: a first semiconductor layer (101), a second semiconductor layer (103), and an illuminating layer (102) arranged between the first semiconductor layer (101) and the second semiconductor layer (103); a first electrode structure located on the first semiconductor layer, and comprising a first main electrode (1051) and a first electrode ring (1052); and a second electrode structure located on the second semiconductor layer, and comprising a second main electrode (1041) and a second electrode ring (1042); wherein the first electrode ring has a thickness exceeding or equal to a thickness of the first main electrode; and the second electrode ring has a thickness exceeding or equal to a thickness of the second main electrode. The first and second electrode rings serve as isolation barriers, and are configured to prevent an LED from being short circuited in a packaging or operation process and owing to an overflow of a conductive die bonding material, thereby enhancing reliability.

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A gallium nitride-based laser diode and a manufacturing method thereof. The laser diode comprises: a substrate (1), an n-type layer (2), an n-type limiting layer, an n-type waveguide layer (4), an active layer (5), a p-type waveguide layer (6), a p-type limiting layer (7) and a p-type layer (8), wherein the n-type limiting layer comprises a stacked structure consisting of a first n-type limiting layer (31) and a second n-type limiting layer (32). Using the AlN/AlGaN superlattice as the bottom layer of the n-type limiting layer, the Al component of the n-type limiting layer can be effectively improved, and the lasing threshold of a laser can be lowered; epitaxial layer can be effectively prevented from cracking, and the product yield improved.

IPC Classes  ?

• H01S 5/343 - Structure or shape of the active regionMaterials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser

Abstract

A semiconductor element and a preparation method therefor. The semiconductor element comprises a superlattice structure buffer layer (20) having an AlxN1-x layer and an AlyO1-y layer (0

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Abstract

The present invention provides a manufacturing method of an LED epitaxial structure. The method comprises: in-situ forming, via an epitaxy process, a recess, and then filling the recess with a current barrier dielectric layer, thus forming a current-spreading layer. The present invention has a current-spreading effect, thus improving the uniformity of an electron or hole current, increasing the illuminance of emitted light, and lowering the working voltage.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

A light emitting diode and preparation method thereof. In one embodiment, the method comprises: forming, at a back side of a substrate (10) of a plurality of LED units (20), a plurality of impurity release holes (12); forming a plurality of invisible blown points (11) by focusing a laser on locations corresponding to the plurality of impurity release holes and located inside the substrate so as to enable communication between the impurity release holes and the invisible blown points and remove, from inside the substrate, impurity formed during the formation of the invisible blown points. As a result, the method prevents the impurity from attaching to the invisible blown points and prevents external quantum efficiency of the LED units from decreasing. In another embodiment, the method comprises: focusing on a location at inside the substrate and 10μm to 40μm from the back side of the substrate (101) so as to increase a laser energy and adjust a laser frequency, and forming holes (105) passing through the inside of the substrate by invisible laser cutting so as to expose the back side of the substrate, thereby effectively removing byproducts such as burn marks and debris after the invisible laser cutting, decreasing light absorption of the byproducts, increasing light emitting from a side wall of the LED, and enhancing luminous efficacy.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Abstract

A light-emitting diode structure and the preparation method therefor. Using a secondary growing manner, an aluminum nitride layer is made and inserted, stops the defects extension of a bottom layer and improves wafer warpage phenomena caused by thermal reaction; meanwhile, patterning treatment is performed on the aluminum nitride layer so as to improve the light emitting efficiency of the light-emitting diode.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Abstract

A preparation method for a GaAs-based semiconductor device, comprises the following steps: providing a base material including a GaAs-based semiconductor wafer (1) formed with at least a base region (112), an emitter region (111) and a collector region (113), there being a height difference between adjacent electrode regions and a convex taper angle being formed at the height drop; forming an insulating layer (3) on the base material, the shape of the insulating layer being matched or basically matched with that of the base material; etching the insulating layer by photolithography process to expose the electrode regions; etching remaining insulating layer by photolithography process to make the insulating layer region corresponding to the height drop of the base material surface have a smooth transition; forming a metal layer (4). The problem that cracks are generated on the metal layer can be avoided by smoothing treatment of the insulating layer surface.

IPC Classes  ?

• H01L 21/311 - Etching the insulating layers
• H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers

Abstract

Provided are a nitride light emitting diode (LED) structure and preparation method thereof. The method comprises: providing a glass substrate (1); stacking, on the glass substrate (1), a buffer layer structure (2) comprising a SiAlN layer (21) and a AlGaN layer (22) in alternate layers, wherein a number of pairs of the alternate layers is 1 to 5; and sequentially disposing an undoped gallium nitride layer (3), N-type layer (4), quantum well structure layer (5) and P-type layer (6). By adopting glass having a low cost and a mature process as a substrate, and disposing the SiAlN and AlGaN buffer layers thereon, LED photoelectric performance and a lattice mismatch constant between the substrate and an epitaxial layer are improved.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided is a nitride light-emitting diode structure, comprising: a substrate (1), a buffer layer (2), an N-type layer (3), a stress relief layer (5), a quantum well light-emitting layer (6) and a P-type layer (7), wherein an electric field dispersion layer (4) with a growth temperature equal to or lower than that of the quantum well light-emitting layer (6) is inserted between the N-type layer (3) and the stress relief layer (5), and the electric field dispersion layer (4) is of an n-type doped multilayer gallium nitride structure. Electric field gathering is reduced step by step by different-density doped GaN layers, and a current is enabled to be dispersed evenly, thus improving an electrostatic voltage withstand feature of a nitride semiconductor component, lowering a failure rate of the component during use, increasing reliability in use, and prolonging the service life.

IPC Classes  ?

• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
• H01L 33/04 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction

Abstract

Disclosed is a nitride light-emitting diode. The nitride light-emitting diode comprises an n-type nitride layer, a light-emitting layer and a p-type nitride layer in sequence. The light-emitting layer is of a multiple-quantum-well structure consisting of barrier layers and well layers. An AlGaN electronic tunneling layer is inserted into at least one well layer close to the n-type nitride layer, and the barrier height of the AlGaN electronic tunneling layer is greater than that of the corresponding barrier layer. The barrier of the AlGaN electronic tunneling layer and the barrier of the well layer are high enough, so that it is difficult for electrons to jump in a thermionic emission manner, and the electrons mainly jump in the InGaN well layers in a tunneling manner, so as to limit the migration rate of the electrons, adjust the distribution of the electrons, and reduces the probability that the electrons overflow to the p-type nitride layer.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier

Abstract

A patterned sapphire substrate (100), a manufacture method thereof and a light emitting diode using the patterned sapphire substrate (100), wherein the patterned sapphire substrate (100) is provided with a first surface and a second surface opposite to each other, with no C surfaces, namely, (0001) surfaces present in the connection regions between all first protrusion parts (P1, P2). There can be no C surfaces on the growth surfaces of the patterned sapphire substrate (100), thus reducing the penetration dislocation density of a gallium nitride epitaxial material on the sapphire substrate (100).

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/16 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

A graphite carrying disk for a production process of an LED epitaxial wafer. The graphite carrying disk comprises a plurality of wafer grooves (100, 101) provided above the carrying disk for displacing an epitaxial wafer substrate, characterized in that a convex part structure (103, 104, 105) is provided on a central region of the carrying disk so that the vortex (102) area of the central region of the carrying disk in an epitaxial production process can be reduced, and the problem that the light intensity of a partial region, which is formed towards the center of a shaft of the carrying disk, of the epitaxial wafer of an inner ring is low can be solved; and therefore, the brightness uniformity of the inner ring is improved and the whole uniformity of the brightness of the epitaxial wafers of the inner and outer rings is improved.

IPC Classes  ?

• H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers

Abstract

Disclosed is a luminous element manufacturing method, the method comprising: growing gallium nitride (GaN) on a panel or a patterned substrate of plated AlN; and a conducting annealing treatment in an H2 ambience or a combined thermal treatment in an H2 and NH3 ambience to amend the problem of inter-material stress, thus improving warpage of an epitaxial wafer due to the stress, and increasing epitaxial quality of the luminous element and luminous efficiency thereof.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
• H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen

Abstract

An inverted high-voltage light emitting device and a manufacturing method therefor. The device comprises: a light emitting module composed of a plurality of inverted light emitting units connected in series to one another, wherein the light emitting module is provided with a first surface and a second surface that are opposite, clearances (111) are arranged among all the inverted light emitting units, and each light emitting unit comprises an n-type semiconductor layer (101), a light emitting layer and a p-type semiconductor layer (102); a light conversion layer (112), formed on the first surface of the light emitting module and covering the side surface of each light emitting unit; an insulation layer (107), formed on the second surface of the light emitting module, covering the second surface of the whole light emitting module, and only exposing the n-type semiconductor layer (101) of the first light emitting unit of the light emitting module and the p-type semiconductor layer (102) of the last light emitting unit of the light emitting module; and a first support electrode (109a) and a second support electrode (109b), formed on the insulation layer (107) and electrically isolated from each other, wherein the first support electrode (109a) is electrically connected to the n-type semiconductor layer (101) of the first light emitting unit of the light emitting module, and the second support electrode (109b) is electrically connected to the p-type semiconductor layer (102) of the last light emitting unit of the light emitting module.

IPC Classes  ?

• H01L 27/15 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier, specially adapted for light emission
• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/50 - Wavelength conversion elements
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

Provided are a light-emitting diode and a manufacturing method therefor. Quantum dots are used as a quantum well layer (104c) of a multi-quantum well (MQW) structure of a light-emitting layer; the combining efficiency of electrons and holes can be effectively improved by means of a quantum confinement effect of the quantum dots; in addition, a nano metal reflecting layer (104b) is disposed on a quantum barrier layer (104a) having a nano pit, so that light emitted downwards by the MQW can be immediately reflected to the front surface of an epitaxial structure; furthermore, a surface plasmon can be formed on the nano metal reflecting layer(104b), thereby further improving the light outgoing efficiency.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A light-emitting diode, at least comprising: an N-type layer (102), a light-emitting layer (104) and a P-type layer (105). The light-emitting layer (104) is a multi-quantum well periodical structure of a barrier layer (104a), a first transition layer (104b), a well layer (104c) and a second transition layer (104d), and at least two AlN thin layers (104an，104bn，104dn) of non-uniform thickness are inserted into the first transition layer and the second transition layer. The overlap structure formed by using the AlN thin layer with the barrier layer, the first transition layer and the second transition layer can effectively modulate the polarization field of the quantum well region, reduce polarization charge between the well and barrier layer, and reduce an incline of an energy band, and improve radiation recombination efficiency of a current carrier in the quantum well region.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An LED structure and a preparation method therefor, wherein the structure comprises a substrate (201), a first semiconductor layer (202) located on the substrate (201), a light-emitting layer (203) located on the first semiconductor layer (202), a second semiconductor layer (204) located on the light-emitting layer (203) and an electrode (205) located on the second semiconductor layer (204). The electrode (205) is constituted by a main body (208) and an extension part (209). The extension part (209) forms a certain included angle with a surface of the second semiconductor layer (204) contacted therewith, and separates the electrode main body (208) from light rays emitted to an upper surface and a side surface thereof in a semi-covering shape.

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape

Abstract

A method for manufacturing a nitride light emitting diode. A PVD method is used to deposit an AlN film layer (2) on a patterned substrate (1) having a larger depth; a CVD method is used to deposit a nitride epitaxial layer (3) having a small thickness on the AlN film layer; and a doped active layer (4) and a p-type layer (5) are formed on the nitride epitaxial layer. The thickness of an epitaxial layer is decreased to reduce stress so as to improve warping of an epitaxial wafer, and then improve electrical property uniformity of a single epitaxial wafer; a patterned substrate having a large depth is used to improve light extraction efficiency; and a high-concentration impurity is doped in an active layer, so that voltage characteristics can be effectively reduced without affecting current leakage, so as to improve overall yield of the light emitting diode.

IPC Classes  ?

• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

An upside-down mounted luminescent device and a manufacturing method therefor. The upside-down mounted luminescent device comprises: luminescent epitaxial laminated layers (101, 102), having two opposite surfaces, the first surface being a light-emitting surface; a first electrode and a second electrode (104, 105), located on the second surface of the luminescent epitaxial laminated layers (101, 102) and isolated from each other; an insulating substrate (200), having two opposite surfaces and side walls connected to the two surfaces, the first surface being connected to the luminescent epitaxial laminated layers (101, 102) via the first electrode and the second electrode (104, 105); and a first external electrode and a second external electrode (202, 203), located on the second surface of the insulating substrate (200), extending towards the side walls of the insulating substrate (200) to side walls of the first electrode and the second electrode (104, 105) respectively, and at least partially covering the side walls of the first electrode and the second electrode (104, 105) to form an electrical connection.

IPC Classes  ?

• H01L 33/38 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes with a particular shape
• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A light emitting diode device and a manufacturing method therefor. The light emitting diode device (200) comprises: an LED chip (210) which has an upper surface (210a) and a lower surface (210b) which are opposite and a side wall (210c) which connects the upper and lower surfaces, wherein the lower surface is provided with a first electrode (212) and a second electrode (214), and there is a gap between the first electrode and the second electrode for achieving electrical isolation between the two electrodes; an encapsulating material layer (220) which covers the upper surface of the LED chip and is used for protecting and supporting the LED chip; an insulating layer (230) which fills the gap and extends to the first electrode and the second electrode to cover part of the surface thereof close to the gap, and is thicker than the first and second electrodes; and a solder electrode layer (240) which covers the first and second electrodes of the LED chip and by which connection is performed when the light emitting diode device is mounted on a circuit board. The light emitting diode device can be directly mounted on a circuit board by heating for use, without adopting a reflow soldering device.

IPC Classes  ?

• H01L 33/62 - Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
• H01L 33/48 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor body packages

Abstract

A light-emitting diode, comprising in sequence: a substrate (100), a buffer layer (101), an N-type GaN layer (102), an MQW light-emitting layer (103) and a P-type GaN layer (104). The MQW light-emitting layer is formed by alternately stacking a well/base periodically; a well layer (103a) is an In xGa 1-xN layer; a base layer (103b) is a GaN layer doping N/P simultaneously, which can be uniform doping, non-uniform doping or delta doping; and the number of base layers doping N/P, and an N/P doping period, doping area and doping concentration in the base layer can all be adjusted. By adopting the method of simultaneously performing N/P doping in a GaN base layer of an MQW structure to form a tunnel junction, transmission and diffusion of a hole and an electron in the whole MQW area is improved, so as to broaden a light-emitting area of the MQW and improve the compound probability of the hole and the electron, and improve the light-emitting efficiency of a light-emitting diode.

IPC Classes  ?

• H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• H01L 33/14 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure

Abstract

A nitride light emitting diode and a manufacturing method therefor. The nitride light emitting diode comprises a substrate (1), a buffering layer (2), an N-type layer (3), an active layer (5), and a P-type layer (6). The nitride light emitting diode is characterized in that the buffering layer (2) is made of metal aluminum, the metal aluminum is in the form of irregular particles, and when light emitted by the active layer (5) is incident on the buffering layer (2), a reflection and refraction effect occurs. The light emitting efficiency of the light emitting diode is improved.

IPC Classes  ?

• H01L 33/12 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
• H01L 33/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof

Abstract

A quaternary light-emitting diode (LED) with a transparent substrate and a manufacturing method therefor. The diode comprises an AlGaInP-LED epitaxial wafer and is characterized in: the surface of a GaP layer of the AlGaInP-LED epitaxial wafer is coarsened to serve as a bonding surface, the bonding surface is plated with a thin film, then the thin film and the transparent substrate are bonded, and finally the GaAs substrate is removed. Light emitting rate of the LED can be increased.

IPC Classes  ?

• H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
• H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof