Abstract

A semiconductor device includes a semiconductor base body, a plurality of trenches, a gate insulation film, a gate electrode, an interlayer insulation film, and a surface electrode. The semiconductor base body has a protruding region of a second conductive type that is formed so as to protrude from a bottom portion of a second-conductive-type semiconductor region and is spaced apart from a trench, a peak position of dopant concentration of the protruding region is deeper than a bottom portion of the second-conductive-type semiconductor region, a total amount of dopants in a depth-direction cross section of the protruding region is equal to or smaller than a total amount of dopants in a depth-direction cross section of the second-conductive-type region.

IPC Classes  ?

• H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
• H10D 30/01 - Manufacture or treatment
• H10D 30/66 - Vertical DMOS [VDMOS] FETs
• H10D 62/13 - Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
• H10D 62/60 - Impurity distributions or concentrations
• H10D 64/23 - Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes

Abstract

This silicon carbide semiconductor device includes: a silicon carbide layer 12 of a first conductivity type; a plurality of well regions 50 of a second conductivity type, the plurality of well regions 50 being provided on the silicon carbide layer 12; source regions 40 of a first conductivity type, the source regions 40 being provided in the well regions 50; a JFET region 20 of the first conductivity type, the JFET region 20 being formed in a region sandwiched between the plurality of well regions 50 on the silicon carbide layer 12; an insulating film covering the JFET region 20; and a gate electrode 80 provided on the JFET region 20 with the insulating film interposed therebetween. First-conductivity-type impurities injected into the JFET region 20 are also injected into the well regions 50. Within the well regions 50, the concentration of second-conductivity-type impurities is higher than the concentration of the first-conductivity-type impurities.

IPC Classes  ?

• H10D 30/66 - Vertical DMOS [VDMOS] FETs
• H10D 30/01 - Manufacture or treatment

Abstract

The present invention provides a semiconductor device (100) which is provided with: an N-type gallium oxide crystal substrate (200); an electrode part (400) that is provided on the outer surface of the gallium oxide crystal substrate; a P-type oxide semiconductor part (210) that is provided on the inner surface of the gallium oxide crystal substrate so as to be in contact with the electrode part; a high resistance layer part (610) that is provided on the inner surface of the gallium oxide crystal substrate and on the outer surface of the P-type oxide semiconductor part; and an electrode part (300) that is provided on the outer surface of the gallium oxide crystal substrate, and is not electrically connected to any of the electrode part, the P-type oxide semiconductor, and the high resistance layer part.

IPC Classes  ?

• H10D 8/60 - Schottky-barrier diodes
• H10D 62/10 - Shapes, relative sizes or dispositions of the regions of the semiconductor bodiesShapes of the semiconductor bodies
• H10D 62/80 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials

Abstract

Provided is a semiconductor module that can also reduce difficulty in mounting while reducing a parasitic inductance. The semiconductor module that includes: a plurality of semiconductor chips arranged inside a mold resin M; and a plurality of terminals (first power source terminal, one second power source terminal, the other second power source terminal, first intermediate point terminal, and second intermediate point terminal) each having an inner lead portion that is positioned inside the mold resin and having an outer lead portion that is positioned outside the mold resin. The outer lead portion of the first power source terminal has a distal end branched structure where a distal end of the terminal at the outer lead portion is branched in plurals.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/06 - ContainersSeals characterised by the material of the container or its electrical properties

Abstract

This power supply device comprises: a transformer in which a first secondary winding and a second secondary winding are connected in series; a first switching circuit including at least one switching element between a first power supply line and a second power supply line, the switching element being connected to a first primary winding; a second switching circuit including at least one switching element between the first power supply line and the second power supply line, the switching element being connected to a second primary winding; a rectifying part that rectifies an AC voltage flowing through the first secondary winding and the second secondary winding connected in series; a choke input-type smoothing circuit that has a choke coil and that smoothes the output of the rectifying part; and a power supply controller that performs shift control in which the switching element of the first switching circuit is switched at a fixed duty ratio enabling ZVS, and the switching element of the second switching circuit is switched by shifting the phase at a fixed duty ratio.

IPC Classes  ?

• H02M 3/28 - Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC

Abstract

A semiconductor module includes: a semiconductor chip; a substrate on which the semiconductor chip is disposed; a lead terminal having a joining portion that is joined to the substrate by a conductive joining material; and a mold resin that seals at least the semiconductor chip, the substrate and a portion of the lead terminal. The lead terminal has a protruding portions that protrude toward a side of the substrate in the joining portion.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

[Problem] To provide an electronic module that suppresses mispositioning of an internal connection terminal and a chip spacer, suppresses rotation of the chip spacer when solder is melted, and improves desired self-alignment effects. [Solution] An electronic module 100 comprises an electronic element 120, at least one conductive internal connection terminal 134 that is electrically connected to the electronic element 120, and a chip spacer 122 that is formed between the electronic element 120 and a lower end surface of the internal connection terminal 134. The chip spacer 122 is bonded to the electronic element 120 via a conductive bonding material BM1, and at least one recess 113 that has a larger diameter than the internal connection terminal 134 is formed in an upper surface of the chip spacer 122.

IPC Classes  ?

• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A control circuit according to the present invention comprises a load state determination unit 120, an on-trigger generation unit 130, a gate control unit 150, a drive unit 160, and an interleaving signal generation unit 170. The load state determination unit 120 outputs load state information determined on the basis of an error amplifier output voltage to the interleaving signal generation unit 170. The on-trigger generation unit 130 generates an on-trigger and outputs the on-trigger to the gate control unit 150. The interleaving signal generation unit 170 outputs, to a slave converter 30, an interleaving signal including information pertaining to whether a slave switch control circuit 200a, 200b is to be stopped on the basis of the load state information and the control signal output information.　According to the control circuit of the present invention, the number of terminals does not increase, the load can be monitored without depending on the period of an AC power supply, new components and wiring are not required, and it is possible to easily switch whether a slave converter is stopped at the time of a light load without increasing the number of terminals.

IPC Classes  ?

• H02M 3/155 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Abstract

Control circuits 100a, 100b of the present invention comprise an interleaved signal input unit 110, a critical point detection unit 120, an on-width correction unit 130, an interleaved control unit 140, and a drive unit 150. The on-width correction unit 130 outputs on-width information to the interleaved control unit 140, said on-width information being corrected so as to adjust, on the basis of interleaved input signal information and critical point detection information, the on-width of a control signal for controlling the on/off of slave switches. The interleaved control unit 140 outputs the control signal adjusted on the basis of critical point detection information and the corrected on-width information to the drive unit 150, and the drive unit 150 turns on and off slave switches Q2, Q3 on the basis of the control signal.　According to the control circuits 100a, 100b of the present invention, a decrease in the power factor of the interleaved power supply is prevented and an overload operation of a main converter can be prevented.

IPC Classes  ?

• H02M 3/155 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Abstract

[Problem] To provide a semiconductor device capable of suppressing a channel current without increasing manufacturing processes, and capable of accurately forming a channel current suppression structure. [Solution] A semiconductor device 1 according to the present invention includes: a substrate 10; an epitaxial layer 20 formed on the substrate 10; and an insulating film 35 provided on one surface 20a side of the epitaxial layer 20. An active portion 40 provided with a predetermined element and a channel current suppression portion 50 being at a termination portion 70 side and provided outside the active portion 40 are provided on the one surface 20a side of the epitaxial layer 20 via the insulating layer 35. The channel current suppression portion 50 is provided with a trench 51 for suppressing the channel current flowing from the active portion 40 to the termination portion 70.

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 29/40 - Electrodes

Abstract

This control module for controlling a permanent magnet motor for traveling that causes a two-wheeled electric vehicle to travel comprises: an inverter that converts a DC voltage into an AC voltage and outputs the AC voltage to a permanent magnet motor for traveling; and a processor that controls the inverter. The processor turns off all the high-side and low-side switching elements of plural-phase arms after an ignition signal is input and before rotation of the permanent magnet motor for traveling, and determines that the high-side switching element of any of the plural-phase arms is short-circuited when the condition that the total phase voltage is equal to or less than a constant voltage for a certain period of time is not satisfied.

IPC Classes  ?

• B60L 3/00 - Electric devices on electrically-propelled vehicles for safety purposesMonitoring operating variables, e.g. speed, deceleration or energy consumption
• H02M 7/48 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

This power supply control device comprises: a communication unit that communicates with an external device connected to a connector; and a determination unit that determines whether the external device connected to the connector is a diagnostic device or a connected device different from the diagnostic device, on the basis of whether or not a signal acquired from the external device connected to the connector, via the communication unit is a diagnostic-device identifiable signal.

IPC Classes  ?

• B60R 16/02 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric
• G01M 17/007 - Wheeled or endless-tracked vehicles

Abstract

In a semiconductor module, first and third chips are disposed symmetrically with respect to a center line. Second and fourth chips are disposed symmetrically with respect to the center line. First and third wiring patterns are disposed symmetrically with respect to the center line. Second and fourth wiring patterns are disposed symmetrically with respect to the center line. Two intermediate points are disposed symmetrically with respect to the center line. Two second power terminals are disposed symmetrically with respect to the center line. A fifth wiring pattern and a first power terminal are disposed symmetrically with respect to the center line. The intermediate points are adjacent to each other on one side of the module. All power terminals are on the other side of the module. The first power terminal is above the fifth wiring pattern in a non-contact state and connects the first and third wiring patterns.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/373 - Cooling facilitated by selection of materials for the device
• H01L 23/498 - Leads on insulating substrates
• H01L 23/522 - Arrangements for conducting electric current within the device in operation from one component to another including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group

Abstract

Provided is a Schottky barrier diode capable of controlling a Schottky barrier height (ΦBn) to various values. The Schottky barrier diode includes a silicon layer and a silicide layer that is disposed on the silicon layer and contains Pt and Ni. A peak value of a concentration of Pt in the silicide layer having a thickness of 50 nm on the silicide layer side from an interface between the silicide layer and the silicon layer, or a peak value of the concentration of Pt in the silicide layer in a case where the thickness of the silicide layer is less than 50 nm is 1 at % to 60 at %.

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/47 - Schottky barrier electrodes
• H01L 29/66 - Types of semiconductor device

Abstract

This electronic module 100 comprises: a circuit 120; a first terminal 130; a first cap nut 230 for fixing an external connection member 250 to the first terminal 130 with a bolt 260; and a sealing resin 170 for sealing the circuit 120 and the first terminal 130 in a partial manner. When a surface where the first terminal 130 is exposed from the sealing resin 170 is defined as an upper surface 100A, and surfaces on the opposite side are defined as bottom surfaces 100B, 100C, a bottom surface 100B of a region where the first cap nut is disposed protrudes beyond the bottom surface 100C of a region where the circuit is disposed.　According to this electronic module 100, even when a power cable is fixed to a terminal by using a cap nut, wiring resistance and inductance can be reduced.

IPC Classes  ?

• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

Abstract

This electronic module fixing structure 10 is for fixing a first external connection member 250 and an electronic module 100 that has a first terminal 130 to a heat dissipation member 300 by means of a first bolt 260A. The first terminal 130: is provided to a surface of the electronic module 100 that is on the reverse side of a surface that abuts the heat dissipation member 300; and has a first hole 136 into which the first bolt 260A is inserted. A first insulation member 240A that has a hole 242A into which a screw part of the first bolt 250A can be inserted is provided between the first bolt 250A and the first external connection member 250A and between the first bolt 260A and the first terminal 130.　This electronic module fixing structure 10 makes it possible to keep an electronic module from being increased in size, even when the electronic module and an external connection member are to be fixed by screwing.

IPC Classes  ?

• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H01R 4/34 - Conductive members located under head of screw

Abstract

This electronic module is equipped with: an electronic element; a support member 171 having a through-hole 171a formed therein which passes therethrough in the sheet thickness direction; and a columnar pin terminal 172 which is supported by the support member 171 in a state of being inserted into the through-hole 171a, and is electrically connected to the electronic element. The pin terminal 172 has a pin body 172a and a conductive peeling material 172b positioned on the surface of the pin body 172a, and the conductive peeling material 172b is supported by the support member 171 in a state of being interposed in at least part of the interval between the through-hole 171a and the pin body 172a.　The electronic module of the present invention makes it possible to relax dimensional tolerance management accuracy for pin terminal diameter and through-hole size.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

Abstract

This electronic module 100 comprises: a first semiconductor element 118 having two electrodes, namely a first electrode and a second electrode; a second semiconductor element 120 having two electrodes, namely a third electrode and a fourth electrode; and a flat plate-shaped midpoint power terminal 160 connected to the other electrode of the first electrode and the second electrode and the other electrode of the third electrode and the fourth electrode. The electronic module also comprises a flat plate-shaped internal connection frame 152 connecting the other electrode of the first electrode and the second electrode and the other electrode of the third electrode and the fourth electrode, the internal connection frame having a long hole 156 into which the midpoint power terminal 160 is press-fitted. The midpoint power terminal 160 is press-fitted into the long hole 156 of the internal connection frame 152 and erected in the vertical direction.　According to the electronic module 100, the contact area of the midpoint power terminal with respect to the frame is reduced, the package size is reduced, and the wiring length is shortened, so as to reduce inductance and wiring resistance.

IPC Classes  ?

• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements

Abstract

An electronic module 100 according to the present invention comprises: an electronic element 120; an internal connection terminal 134 electrically connected to the electronic element 120 and having conductivity; and a chip spacer 122 formed between a lower end surface of the internal connection terminal 134 and the electronic element 120. The chip spacer 122 is bonded to the electronic element 120 with a conductive bonding material BM1 therebetween, and a recess 113 having a diameter larger than the internal connection terminal 134 is formed on the upper surface of the chip spacer 122.　According to the electronic module 100 of the present invention, it is possible to suppress positional deviation between an internal connection terminal and a chip spacer, and to achieve an improved self-alignment effect as desired.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

In a semiconductor module that includes four semiconductor chips Q1 to Q4, four wiring patterns, first and second power source terminals and first and second intermediate point terminals thus forming a bridge circuit in the semiconductor. The bridge circuit is formed where the chip Q1 and the chip Q3 are disposed on a high side and the chip Q2 and the chip Q4 are disposed on a low side. In a recessed portion that is formed in the wiring pattern, a wiring pattern on which a protruding portion having a first oblique side and a second oblique side is formed is disposed. Oblique sides parallel to the first oblique side and the second oblique side are formed on wiring patterns. The chips Q2, Q4 are obliquely arranged along the respective oblique sides. The wiring pattern functions as a current path from the intermediate point terminals to the power source terminal.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/495 - Lead-frames
• H01L 23/64 - Impedance arrangements
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass

Abstract

An active clamp circuit 10 according to the present invention comprises: a clamp voltage control switch 20 which has a first main electrode electrically connected to a main electrode of a main switch Q1, and has a second main electrode electrically connected to a control electrode of the main switch Q1; and a clamp voltage determination unit 30 which has one terminal electrically connected to the first main electrode of the clamp voltage control switch 20, and has the other terminal electrically connected to a control electrode of the clamp voltage control switch 20. The clamp voltage determination unit 30 has: a diode part 36 in which a plurality of sets 31 of a Zener diode 33 and a diode 34, connected in series in opposite polarities, are connected in series; and a temperature characteristic adjustment resistor 35 connected in series with the diode part 36.　The active clamp circuit 10 according to the present invention can clamp voltage by absorbing a surge voltage without using a large-sized diode, and can further stabilize operation of a switching circuit.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed

Abstract

This overcurrent suppression device comprises: a switching element that rectifies an AC signal output from a generator to convert the AC signal into DC power; a capacitor that smooths the output voltage of the switching element; a voltage control unit that controls the switching element such that the output voltage is a predetermined set voltage; a current control unit that limits a current flowing to an LED light unit by means of the output voltage so as to obtain a predetermined amount of light when the LED light unit is turned on; and a determination processing unit that determines whether a disconnection has occurred in a connection of the LED light unit on the basis of the current flowing to the LED light unit, and if a disconnection has occurred in the connection of the LED light unit, changes the predetermined set voltage to a second set voltage that is lower than a first set voltage at which the LED light unit can be turned on with the predetermined amount of light, and if no disconnection has occurred in the connection of the LED light unit, changes the predetermined set voltage to the first set voltage.

IPC Classes  ?

• H05B 45/54 - Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDsCircuit arrangements for operating light-emitting diodes [LED] responsive to LED lifeProtective circuits in a series array of LEDs
• H05B 47/16 - Controlling the light source by timing means
• H05B 47/17 - Operational modes, e.g. switching from manual to automatic mode or prohibiting specific operations

Abstract

In a semiconductor module including four semiconductor chips, first power and second power terminals, first and second intermediate points, a bridge circuit is formed. The first and second power terminal are disposed adjacently to each other. The first and second intermediate points are disposed adjacently to each other. At a time of using the semiconductor module, currents flow in opposite directions with respect to the first and second power terminals, and currents flow in opposite directions with respect to the first and second intermediate points. Outer lead portions of the first and second power terminals are disposed on one side of the semiconductor module, and outer lead portions of the first and second intermediate points are disposed on the other side of the semiconductor module which is a side opposite to the one side of the semiconductor module.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors

Abstract

In a semiconductor module including four semiconductor chips, first and second power terminals, and first and second intermediate points, a bridge circuit is formed. The first power terminal and second power terminal are disposed adjacently to each other, the first intermediate point and second intermediate point are disposed adjacently to each other. At a time of using the semiconductor module, currents flow in opposite directions with respect to the first power terminal and the second power terminal, currents flow in opposite directions with respect to the first intermediate point and the second intermediate point. An outer lead portion of the first power terminal and an outer lead portion of the second power terminal, and an outer lead portion of the first intermediate point and an outer lead portion of the second intermediate point, are disposed on a same side of the semiconductor module.

IPC Classes  ?

• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/498 - Leads on insulating substrates
• H01L 23/64 - Impedance arrangements
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits

Abstract

[Problem] The purpose is to provide a semiconductor module in which a case is reinforced and deflection can be suppressed by providing multiple ribs extending from the end of a terminal block. [Solution] In a semiconductor module 1 according to the present invention, a case 20 is attached in an annular manner around an edge 11 of a substrate 10. The semiconductor module 1 is characterized in that the case 20 has a terminal block 30, an inner rib 50, an outer rib 60, and an intermediate rib 70, the inner rib 50, the outer rib 60, and the intermediate rib 70 being provided in multiple numbers so as to extend from the terminal block 30.

IPC Classes  ?

• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings

Abstract

[Problem] The purpose of the present invention is to provide a semiconductor module that can inhibit an adhesive from protruding out to a mounting portion side of an electronic component on a substrate when adhering a case to the substrate. [Solution] This semiconductor module 1 has a substrate 10 with a case 20 attached thereto, and is sealed by a resin, the semiconductor module being characterized in that a protrusion 31 is provided to at least one among a facing surface 20A of the case 20 facing the substrate 10 and a facing surface 10A of the substrate 10 facing the case 20, an end face 31A of the protrusion 31 and the facing surface 20A of the case 20 or the facing surface 10A of the substrate 10 are separated from each other, and the section of the separation is an adhesion section 50 in which an adhesive 40 is interposed.

IPC Classes  ?

• H01L 23/28 - Encapsulation, e.g. encapsulating layers, coatings
• H01L 25/04 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

A bidirectional thyristor capable of improving (dv/dt)c capability first and second first-conductivity-type semiconductor layers; first and second second-conductivity-type semiconductor layers; a plurality of carrier emitting portions disposed on a third second-conductivity-type semiconductor layer; a fourth second-conductivity-type semiconductor layer; first and second electrodes; a gate electrode; and a passivation film. The plurality of carrier emitting portions are configured such that an opening is formed in the third second-conductivity-type semiconductor layer and the first first-conductivity-type semiconductor layer is located in the opening. In plan view, the carrier emitting portions are disposed between a position away from the gate electrode by a predetermined distance and an outer edge of the first electrode. The plurality of carrier emitting portions are disposed in contact with the outer edge of the first electrode which is in contact with a passivation film.

IPC Classes  ?

• H01L 29/747 - Bidirectional devices, e.g. triacs
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

Abstract

An active clamp circuit 10 according to the present invention comprises: a clamp voltage control switch 20 in which a first main electrode is electrically connected to a main electrode of a main switch Q1 and a second main electrode is electrically connected to a control electrode of the main switch Q1; and a clamp voltage determination unit 30 of which one terminal is electrically connected to the first main electrode of the clamp voltage control switch 20, and of which the other terminal is electrically connected to a control electrode of the clamp voltage control switch 20. The clamp voltage determination unit 30 has a plurality of sets 31 each composed of a temperature characteristics adjustment resistor 32, a Zener diode 33, and a diode 34 connected in series.　The active clamp circuit 10 according to the present invention can clamp voltage by absorbing a serge voltage without using a large-sized diode, and can further stabilize operation of a switching circuit.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
• H01L 21/76 - Making of isolation regions between components
• H01L 21/822 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
• H01L 21/8234 - MIS technology
• H01L 27/04 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
• H01L 27/06 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/12 - Semiconductor bodies characterised by the materials of which they are formed
• H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect
• H01L 29/861 - Diodes
• H01L 29/866 - Zener diodes
• H01L 29/868 - PIN diodes
• H02M 1/00 - Details of apparatus for conversion

Abstract

A semiconductor device includes, a semiconductor base body, an insulation layer that has an opening, and a surface electrode. The semiconductor base body includes a drift region, a p-type dopant region, and a peripheral dopant region. The p-type dopant region has a high concentration region that is formed in a region where the high concentration region overlaps with the p-type dopant region. A plurality of recombination centers are formed in the semiconductor base body, an inner peripheral end of the peripheral dopant region on the surface of the semiconductor base body is positioned on an inner peripheral side of an end portion of the opening, and a length from the inner peripheral end of the peripheral dopant region to the end portion of the opening is 0.01 μm or more to 130 μm or less.

IPC Classes  ?

• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate

Abstract

[Problem] To provide a semiconductor device which makes it possible to ensure high voltage resistance and to improve adhesion properties of an insulating layer. [Solution] A semiconductor device 1 according to the present invention which has a substrate 10, an epitaxial layer 20 formed on the substrate 10, and insulating layers 40, 50 provided on one surface 20a side of the epitaxial layer 20, said device being characterized in that: an active section 60 is provided on the one surface 20a side of the epitaxial layer 20 with the insulating layer 40 therebetween; a trench 71 is provided in a peripheral section 70, which is a region to the outside of the active section 60; and the insulating layer 50 provided to the peripheral section 70 is formed by layering a first insulating body 51 and a second insulating body 52 on one another.

IPC Classes  ?

• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/872 - Schottky diodes

Abstract

This battery charging device comprises: a switching element of which conduction state is controlled to rectify an AC voltage generated by an electric generator, and supply a charging voltage to a battery; a control signal generation unit that outputs a control signal for the switching element, using a control voltage obtained by boosting a power supply voltage output from the battery; and a control unit that controls the control signal to bring the switching element into a non-conducting state when a differential voltage is equal to or less than a predetermined threshold voltage, the differential voltage indicating the control voltage with respect to a voltage of a power supply line that is connected to the battery, and is connected to a terminal on the battery side of the switching element.

IPC Classes  ?

• H02P 9/04 - Control effected upon non-electric prime mover and dependent upon electric output value of the generator
• H02P 101/45 - Special adaptation of control arrangements for generators for motor vehicles, e.g. car alternators

Abstract

The present invention provides a Schottky barrier diode in which the Schottky barrier height (ΦBn) can be controlled to various values. The present invention is a Schottky barrier diode having a silicon layer 11, and a Pt- and Ni-containing silicide layer 12a disposed on the silicon layer 11. The peak value of the Pt concentration in the silicide layer having a thickness of 50 nm on the silicide layer side from the interface between the silicide layer 12a and the silicon layer 11, or the peak value of the Pt concentration in the silicide layer 12a when the thickness of the silicide layer 12a is less than 50 nm is 1 at% to 60 at%.

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/47 - Schottky barrier electrodes

Abstract

An electronic device 1 is provided with a substrate 2, a semiconductor element 3 that is mounted on the substrate 2, and a case 12 in which the substrate 2 and the semiconductor element 3 are housed. The case 12 comprises, on an opposite surface thereof opposite a mounting surface of the substrate 2 on which the semiconductor element 3 is mounted, a positioning portion 50 that, in a state before the semiconductor element 3 is mounted on the substrate 2, can position and dispose the semiconductor element 3.

IPC Classes  ?

• H05K 5/00 - Casings, cabinets or drawers for electric apparatus
• B60R 16/02 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric
• H05K 3/34 - Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

Abstract

A control circuit 30 of the present invention comprises: a zero current detection threshold calculation unit 31 which calculates zero current detection thresholds Vth1, Vth2 on the basis of a first divided voltage VFB obtained by dividing an output voltage of a DC conversion circuit 20; a zero current detection unit 32 which detects timing, at which a current flowing through an inductor L becomes zero, by comparing the zero current detection thresholds Vth1, Vth2 calculated by the zero current detection threshold calculation unit 31 and the voltage VFB based on a voltage applied to a switching element Q; and a switching element driving control unit 34 which controls turn-on of the switching element Q on the basis of the timing at which the current flowing through the inductor L, which is detected by the zero current detection unit 32, becomes zero.　According to the control circuit 30 of the present invention, the timing at which the inductor current becomes zero can be detected even in a case, such as immediately after startup, where the output voltage has not increased completely.

IPC Classes  ?

• H02M 3/155 - Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
• H02M 7/12 - Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

This battery charging device comprises: an electric power generator that generates electric power in accordance with rotation of a rotor and outputs an AC signal that corresponds to the generated electric power; a switching element that rectifies the AC signal outputted by the electric power generator and supplies the rectified AC signal to the battery as charging electric power; a diode that supplies movement electric power to a load unit, the diode being connected between the load unit and an output line of the switching element; a capacitor that is connected to an output line of the diode and is connected in parallel to the load unit; a voltage control unit that controls conduction to the switching element such that the voltage supplied to the load unit becomes an output-target set voltage; and a switching control unit that reduces the set voltage when the battery enters an abnormal state in which the battery cannot be used.

IPC Classes  ?

• H02J 7/34 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering
• H02H 7/20 - Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

This battery charging device comprises: a rectifying unit which outputs, as charging power for a battery, direct-current power obtained by rectifying three-phase alternating-current power by means of conduction of switch elements connected to respective output signal lines of the three-phase alternating-current power, the three-phase alternating-current power being output by an electric power generator in accordance with the rotation of a rotor; a power source maintaining switch capable of maintaining a state in which control power for the switch elements, from the battery, can be supplied when a main switch is in an interrupting state stopping the supply of the control power to a power source supply line; and a control unit which controls the conduction of the switch elements and which, if the main switch is turned to the interrupting state, maintains the power source maintaining switch in a state in which the control power for the switch elements can be supplied, and if the rotor is rotating, controls negative electrode side switch elements connected to a negative electrode of the battery to a conducting state.

IPC Classes  ?

• H02J 7/14 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from dynamo-electric generators driven at varying speed, e.g. on vehicle

Abstract

There is provided a thyristor with desensitized gate sensitivity. In accordance with this, the third P-type semiconductor layer, which is connected to a gate electrode, has an impurity concentration higher than that of a second P-type semiconductor layer. A fourth P-type semiconductor layer, which is in contact with each of the second P-type semiconductor layer and the second N-type semiconductor layer, is disposed below the cathode electrode, and has an impurity concentration higher than that of the second P-type semiconductor layer.

IPC Classes  ?

• H01L 29/66 - Types of semiconductor device
• H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action
• H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities

Abstract

This motor control device includes a control circuit that, in a first period, controls a high-side switching element of a first arm to be on, controls a low-side switching element of the first arm to be off, controls high-side and low-side switching elements of a second arm to be off, controls a high-side switching element of a third arm to be off, and controls a low-side switching element of the third arm to be on, and, in a second period following the first period, controls the high-side switching element of the first arm to be off, controls the low-side switching element of the first arm to be on, controls the high-side switching element of the second arm to be on, controls the low-side switching element of the second arm to be off, controls the high-side switching element of the third arm to be off, and controls the low-side switching element of the third arm to be on.

IPC Classes  ?

• H02P 6/10 - Arrangements for controlling torque ripple, e.g. providing reduced torque ripple
• H02P 27/08 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters with pulse width modulation

Abstract

This electric current detection device comprises: a plurality of first Rogowski coils that detect electric current flowing to first switching elements; a plurality of second Rogowski coils that detect electric current flowing to second switching elements; a plurality of first integral circuits that have a reset function, integrate an output of the first Rogowski coils, and output a first detection signal; a plurality of second integral circuits that have a reset function, integrate an output of the second Rogowski coils, and output a second detection signal; a detection processing unit that detects, on the basis of the first detection signal and the second detection signal, electric current flowing to an inverter part; a first reset output unit that outputs a first reset signal for resetting the plurality of first integral circuits in a first period in which all of the first switching elements are in a non-conducting state; and a second reset output unit that outputs a second reset signal for resetting the plurality of second integral circuits in a second period in which all of the second switching elements are in a non-conducting state.

IPC Classes  ?

• G01R 15/18 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers

Abstract

A semiconductor device 1 according to the present invention comprises a semiconductor substrate 10, a first electrode 20, and an insulating layer 30, wherein the semiconductor substrate 10 has: a first semiconductor region 12 of a first conductivity type (n-type); a second semiconductor region 16 of a second conductivity type (p-type) and formed at a position in contact with the first electrode 20 and the insulating layer 30; and a third semiconductor region 18 of a first conductivity type (n-type) formed in contact with the second semiconductor region 16 so as to surround the second semiconductor region 16 in a plan view. In the semiconductor device 1, when the sum of impurities of the second semiconductor region 16 is S1 and the sum of impurities of the third semiconductor region 18 is S2, the relationship S1

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/861 - Diodes
• H01L 29/866 - Zener diodes
• H01L 29/868 - PIN diodes

Abstract

The present invention is an electronic module comprising: a first semiconductor element that has a plurality of first electrodes; a second semiconductor element that has a plurality of second electrodes; a capacitor; a substrate that has a first wiring pattern on which the first semiconductor element is mounted, a second wiring pattern on which the second semiconductor element is mounted, and a third wiring pattern; and a plurality of electrical connection members. The first wiring pattern has one part of the first electrodes and another part of the second electrodes connected thereto. The second wiring pattern has one part of the second electrodes and one part of the capacitor connected thereto. The third wiring pattern has another part of the first electrodes and another part of the capacitor connected thereto. The plane of the first electrodes and the plane of the second electrodes are at mutually different height positions. The one part of the first electrodes, the another part of the second electrodes, and the first wiring pattern are connected by one electrical connection member among the plurality of electrical connection members. According to the present invention, an electronic module can be provided that satisfies the requirements of operation stability and reliability even during a high-speed switching operation.

IPC Classes  ?

• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 23/12 - Mountings, e.g. non-detachable insulating substrates
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or
• H02M 7/48 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

The present invention provides a plate-like electrical connecting member 110 used to connect an electrode of an electrode-including semiconductor element to a wiring pattern, the electrical connecting member including a semiconductor connection area 118 connected to an electrode of a semiconductor element via a conductive bonding material, a non–semiconductor-connection area 120 not connected to an electrode of a semiconductor element, and a wiring pattern connection area 122 connected to a wiring pattern, wherein a plurality of protrusions 112 are formed in the semiconductor connection area 118 and first through-hole 114 is formed between two adjacent protrusions 112 among the plurality of protrusions 112.　According to the electrical connecting member according to the present invention, the thickness of the conductive bonding material is less likely to be non-uniform.

IPC Classes  ?

• H01L 21/60 - Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

Disclosed is a drive device for winding-field-type rotary electrical machines, said drive device comprising: a first switching element between one end of a rotor winding and a high-potential-side line of a power source; a second switching element between the other end of the rotor winding and a low-potential-side line of the power source; and a control device. The control device performs driving in a first mode, in which the states of both the first switching element and the second switching element are switched between an on state and an off state, when the current applied to the rotor winding is to be decreased, and performs driving in a second mode, in which the state of one of the first switching element and the second switching element is maintained in an on state while the state of the other of the first switching element and the second switching element is switched between an on state and an off state, when the current applied to the rotor winding is to be increased.

IPC Classes  ?

• H02P 25/024 - Synchronous motors controlled by supply frequency
• H02P 27/06 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters

Abstract

This semiconductor device 100 comprises a semiconductor substrate 110, a plurality of trenches 120, a gate insulation film 122, a gate electrode 124, an interlayer insulation film 130, and a surface electrode 140. The semiconductor substrate 110 has a second-electroconductivity-type projecting region 115 that is formed so as to project from the bottom of a second-electroconductivity-type semiconductor region 113 and is set apart from the trenches 120. The peak position of the impurity concentration in the projecting region 115 is deeper than the bottom of the second-electroconductivity-type semiconductor region 113. The total amount of impurities in a depth-direction cross-section of the projecting region 115 is equal to or less than the total amount of impurities in a depth-direction cross-section of the second-electroconductivity-type semiconductor region 113.　According to this semiconductor device 100, switching loss and gate drive loss are low and parasitic bipolar activity does not readily occur even when the impurity concentration in a first-electroconductivity-type semiconductor layer is high.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 21/336 - Field-effect transistors with an insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/41 - Electrodes characterised by their shape, relative sizes or dispositions
• H01L 29/739 - Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field effect

Abstract

A wide gap semiconductor device has a wide gap semiconductor layer 10; and a metal electrode 20 disposed on the wide gap semiconductor layer 10. The metal electrode 20 has a monocrystalline layer 21 having a hexagonal close-packed (HCP) structure in an interface region between the metal electrode 20 and the wide gap semiconductor layer 10. The monocrystalline layer 21 has a specific element-containing region 22 containing O, S, P or Se.

IPC Classes  ?

• H01L 29/872 - Schottky diodes
• H01L 29/47 - Schottky barrier electrodes

Abstract

[Problem] To provide a semiconductor device capable of suppressing channel current without increasing manufacturing processes and accurately forming a channel current suppression structure. [Solution] A semiconductor device 1 according to the present invention comprises: a substrate 10; an epitaxial layer 20 formed on the substrate 10; and an insulating film 35 provided to one surface 20a side of the epitaxial layer 20. An active part 40 provided with a prescribed element and a channel current suppression part 50 of a terminal end part 70 side provided outside the active part 40 are provided on the one surface 20a side of the epitaxial layer 20 with the insulating layer 35 therebetween. The channel current suppression part 50 is provided with a trench 51 for suppressing channel current flowing from the active part 40 to the terminal end part 70.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/872 - Schottky diodes

Abstract

[Problem] To provide a thyristor having a desensitized gate sensitivity. [Solution] The present invention is a thyristor comprising: a first P-type semiconductor layer 11; a first N-type semiconductor layer 12 located in contact with the first P-type semiconductor layer; a second P-type semiconductor layer 13 located in contact with the first N-type semiconductor layer; a second N-type semiconductor layer 14 located in contact with the second P-type semiconductor layer; a third P-type semiconductor layer 15a located in contact with the second P-type semiconductor layer, and having a higher impurity concentration than the second P-type semiconductor layer; a gate electrode G; a cathode electrode K; and a fourth P-type semiconductor layer 15b in contact with each of the second P-type semiconductor layer and the second N-type semiconductor layer, and having a higher impurity concentration than the second P-type semiconductor layer. The third P-type semiconductor layer and the fourth P-type semiconductor layer are separated by the second P-type semiconductor layer, and the third P-type semiconductor layer and the second N-type semiconductor layer are separated by the second P-type semiconductor layer.

IPC Classes  ?

• H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action

Abstract

The semiconductor device includes a mesa diode structure(20) and a protective layer(17b). The mesa diode structure includes, from bottom to top, a P-type semiconductor layer(11), a first N-type semiconductor layer(12), and a second N-type semiconductor layer(13) having a higher impurity concentration than the first N-type semiconductor layer. The protective layer is arranged on a side wall around the mesa diode structure seen in a plane. Specifically, the protective layer is arranged on an upper side surface(11c) of the P-type semiconductor layer and on side surfaces(12a,13a) of the first N-type semiconductor layer and the second N-type semiconductor layer, but is not arranged on a lower side surface of the P-type semiconductor layer. A bevel angle(30) of a PN junction plane between the P-type semiconductor layer and the first N-type semiconductor layer to the upper side surface of the P-type semiconductor layer is set to 85 to 120 degrees.

IPC Classes  ?

• H01L 29/861 - Diodes
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 29/45 - Ohmic electrodes
• H01L 21/285 - Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
• H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
• H01L 21/311 - Etching the insulating layers
• H01L 21/56 - Encapsulations, e.g. encapsulating layers, coatings
• H01L 21/78 - Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
• H01L 29/66 - Types of semiconductor device

Abstract

[Problem] To provide a bidirectional thyristor with which (dv/dt)c tolerance can be improved. [Solution] The present invention provides a bidirectional thyristor comprising first and second first conduction type semiconductor layers 11, 21, first and second second conduction type semiconductor layers 13, 12, a plurality of carrier discharge portions 11a disposed in a third second conduction type semiconductor layer, a fourth second conduction type semiconductor layer 15, first and second electrodes 31, 32, a gate electrode 16, and a passivation film 17, wherein: in relation to the plurality of carrier discharge portions 11a, openings are formed in the third second conduction type semiconductor layer 14, the first first conduction type semiconductor layer 11 is positioned in the holes, and the carrier discharge portions 11a are arranged in an interval between a position separated a predetermined distance from the gate electrode and an outer edge of the first electrode, in a plan view; the plurality of carrier discharge portions are disposed so as to be in contact with the outer edge of the first electrode; the outer edge of the first electrode in contact with two or more of the plurality of carrier discharge portions is in contact with the passivation film; and an area of a triangle 33 is less than an area of a rectangle 22 in a plan view.

IPC Classes  ?

• H01L 29/747 - Bidirectional devices, e.g. triacs
• H01L 29/74 - Thyristor-type devices, e.g. having four-zone regenerative action

Abstract

To arrange an auxiliary member (2) having a greater absorption rate of laser light (LL) than a plurality of members (1) to be joined to each other so as to face a boundary exposed surface (12) of the plurality of members to be joined where a boundary (11) of the plurality of members to be joined is exposed, to melt the auxiliary member by applying laser light to the auxiliary member, to shift a boundary portion (13) in a state where laser light is easily absorbed by increasing a temperature of the boundary portion of the plurality of members to be joined by a melted portion (23) of the auxiliary member, and to weld a plurality of members to be joined by applying laser light to the boundary portion and melting the boundary portion.

IPC Classes  ?

• B23K 26/18 - Working by laser beam, e.g. welding, cutting or boring using absorbing layers on the workpiece, e.g. for marking or protecting purposes
• B23K 26/21 - Bonding by welding

Abstract

A wide gap semiconductor device has: a wide gap semiconductor layer; and a metal layer 20 provided on the wide gap semiconductor layer. The metal layer 20 has a single crystal layer 21 in an interface region at an interface with the wide gap semiconductor layer. When it is assumed that a lattice constant, in an equilibrium state, of a metal constituting the metal layer 20 is L, the single crystal layer 21 in the interface region includes a first region in which a lattice constant L1 is smaller than L by 1.5% to 8%.

IPC Classes  ?

• H01L 29/47 - Schottky barrier electrodes
• H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
• H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
• H01L 29/872 - Schottky diodes
• H01L 21/04 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
• H01L 29/66 - Types of semiconductor device

Abstract

A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal having a flat plate-shape that is connected to a first electrode of the semiconductor element; a second terminal having a flat plate-shape that is connected to the first conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, and the semiconductor element. Each of the first terminal and the second terminal includes: an inner terminal portion disposed inside the sealing resin; and an outer terminal portion disposed in a state of being exposed to an exterior of the sealing resin, and a female thread portion is provided in the outer terminal portion of each of the first terminal and the second terminal.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/495 - Lead-frames
• H01L 23/498 - Leads on insulating substrates
• H01L 23/18 - Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device

Abstract

A semiconductor device includes: an insulating substrate; a first conductor portion and a second conductor portion that are formed on the insulating substrate; a semiconductor element disposed on the first conductor portion; a first terminal that is connected to a first electrode of the semiconductor element; a second terminal that is connected to the first conductor portion; a connection member electrically connecting a control electrode of the semiconductor element and the second conductor portion to each other; a support member that is disposed at a predetermined distance from the second conductor portion; a pin terminal having that is supported in a state of being inserted through the support member and connected to the second conductor portion; and a sealing resin that seals the insulating substrate, the first conductor portion, the second conductor portion, the semiconductor element, the connection member, and the support member.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/498 - Leads on insulating substrates
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A semiconductor device includes: plural conductor portions formed on an insulating substrate; a semiconductor element disposed on one of the plural conductor portions on the insulating substrate; a support member that is disposed at a predetermined distance from one of the plural conductor portions on the insulating substrate; a columnar pin terminal that is supported by the support member and is connected to the one of the plural conductor portions on the insulating substrate from which the support member is disposed at the predetermined distance; and a sealing resin that seals the insulating substrate, the plural conductor portions, the semiconductor element, and the support member. The support member has a through-hole having a polygonal shape and penetrating in a plate thickness direction of the support member, and the pin terminal is supported by the support member in a state in which the pin terminal is inserted through the through-hole.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/495 - Lead-frames
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A battery charging device comprising: an electric generator that outputs an alternating-current signal corresponding to generated electric power; a switching element that rectifies the alternating-current signal output from the electric generator and supplies resultant charging power to a battery; a positive/negative switch determination unit that determines switching of positive and negative voltages of the alternating-current signal; a trigger output unit that, on the basis of a result of the determination by the positive/negative switch determination unit, outputs a trigger signal indicating a switching element conduction timing; a positive/negative determination control unit that detects the voltage of the alternating-current signal to detect the rotational speed of a rotor, and that, if the detected rotational speed is greater than or equal to a predetermined threshold value, causes the positive/negative switch determination unit to additionally maintain the determination of a negative voltage of the alternating-current signal for a predetermined period; and an invalidation control unit that invalidates the function of the positive/negative determination control unit if a load unit that consumes the power generated by the electric generator is connected in the negative voltage period of the alternating-current signal.

IPC Classes  ?

• H02J 7/16 - Regulation of the charging current or voltage by variation of field

Abstract

A terminal member connected to a connection target portion includes: a bent portion bent toward the connection target portion; and a tip connection portion provided at a tip part of the bent portion, in which the tip connection portion is connected to the connection target portion via a conductive bonding material.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/492 - Bases or plates

Abstract

A battery charging device according to one aspect of the present invention comprises: a power generator that generates power in accordance with the rotation of a rotor to output an AC signal corresponding to the generated power; a switching element that rectifies the AC signal outputted from the power generator to supply the rectified signal to a battery as charge power; a positive/negative change determination unit that determines a change of the positive/negative voltages of the AC signal; a trigger output unit that, on the basis of the determination result by the positive/negative change determination unit, outputs a trigger signal indicating the conduction timing of the switching element; and a positive/negative determination control unit that, by detecting the voltage of the AC signal, detects the rotational speed of the rotor, and, when the detected rotational speed has reached a predetermined threshold value or higher, causes the positive/negative change determination unit to additionally maintain the determination of the negative voltage of the AC signal for a predetermined period.

IPC Classes  ?

• H02J 7/14 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from dynamo-electric generators driven at varying speed, e.g. on vehicle

Abstract

Provided is a control circuit which can discharge a charge stored in an X capacitor with certainty even when an alternating current input voltage largely fluctuates. The control circuit for controlling a discharge of an X capacitor C100 connected between power source lines AC1 and AC2 having different polarities of an alternating current of an AC-DC convertor which receives inputting of the alternating current, converts the alternating current into a direct current, and outputs the direct current wherein the control circuit detects a change state of a voltage of the X capacitor C100, and controls the discharge such that a charge stored in the X capacitor C100 is discharged based on the change state.

IPC Classes  ?

• H02J 7/00 - Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
• H02J 7/34 - Parallel operation in networks using both storage and other DC sources, e.g. providing buffering

Abstract

An electronic device includes: a substrate at which an electronic component is mounted; and a resin case configured to accommodate the substrate internally, in which: the case has an attachment portion configured to attach the case to a flat plate-shaped fixing portion of a fixture target by the fixing portion being inserted into the attachment portion and the attachment portion engaging with the fixing portion; the attachment portion has a first pressing portion having a convex portion that is inserted into a concave portion of the inserted fixing portion, and a pair of second pressing portions that hold between them respective side faces of the inserted fixing portion; and leading end sides of the pair of second pressing portions abut on the inserted fixing portion and are resiliently deformed in directions away from each other, holding between them the respective side faces of the fixing portion in a state in which the leading end sides have been resiliently deformed.

IPC Classes  ?

• H05K 7/00 - Constructional details common to different types of electric apparatus
• H05K 7/14 - Mounting supporting structure in casing or on frame or rack
• H05K 5/02 - Casings, cabinets or drawers for electric apparatus Details

Abstract

−3.

IPC Classes  ?

• H01L 29/10 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
• H01L 29/40 - Electrodes
• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H03K 17/30 - Modifications for providing a predetermined threshold before switching
• H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
• H03K 17/51 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components

Abstract

A MOSFET includes: a semiconductor base substrate having an n-type column region and a p-type column region, the n-type column region and the p-type column region forming a super junction structure; and a gate electrode formed by way of a gate insulation film. Assuming a region of the semiconductor base substrate which provides a main operation of the MOSFET as an active region, a region of the semiconductor base substrate maintaining a withstand voltage of the MOSFET as an outer peripheral region, and a region of the semiconductor base substrate disposed between the active region and the outer peripheral region as an active connecting region, out of the active region, the active connecting region, and the outer peripheral region of the semiconductor base substrate, the crystal defects are formed only in the active region and the active connecting region.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/32 - Semiconductor bodies having polished or roughened surface the imperfections being within the semiconductor body
• H01L 29/66 - Types of semiconductor device

Abstract

A semiconductor device according to the present invention includes: a circuit board; a semiconductor element having a main electrode; a metal frame; and a metal plate having a flat plate shape, the metal plate being disposed between the metal frame and the main electrode, wherein the metal plate and a conductive bonding material, form a stress relaxation structure which relaxes a stress applied to metal plate and the conductive bonding material, disposed between the metal frame and the semiconductor element, and the stress relaxation structure is configured such that a thickness of the metal plate is smaller than a thickness of the metal frame, and at least one convex portion is formed on the metal plate at a position which corresponds to the main electrode. The semiconductor device according to the present invention can relax a stress applied to a conductive bonding material between a semiconductor element and a metal frame even when a relatively thick metal frame is used.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

A semiconductor apparatus according to the present invention is a semiconductor apparatus on which a plurality of external terminals are disposed. The semiconductor apparatus includes: a first lead portions having die pads, first outer leads and first inner leads; chips; second lead portions having second outer leads and second inner lead; and a resin. On at least one of the first inner leads, the second inner leads and the die pads, a terminal temperature equalizing structure which restricts a heat transfer amount of heat transferred from the chips to predetermined external terminals, and equalizes respective terminal temperatures of a plurality of external terminals is formed. According to the semiconductor apparatus of the present invention, it is possible to prevent specific external terminals from becoming extremely high temperature when the semiconductor apparatus is mounted.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

This wide gap semiconductor device has a wide gap semiconductor layer 10, and a metal electrode 20 provided in the wide gap semiconductor layer 10. The metal electrode 20 has a single crystal layer 21 having a hexagonal close-packed structure (HCP) in an interface region on the metal electrode 20 side with the wide gap semiconductor layer 10. The single crystal layer 21 has a designated element content range 22 containing O, S, P or Se.

IPC Classes  ?

• H01L 29/47 - Schottky barrier electrodes
• H01L 29/872 - Schottky diodes

Abstract

Provided is a semiconductor device in which a snubber-circuit is incorporated and can realize downsizing of a power conversion circuit into which the semiconductor device is assembled, and is flexibly applicable to various electric equipment. A semiconductor device includes a semiconductor substrate, a source electrode, a drain electrode, a plurality of trenches, a plurality of first electrodes disposed in a plurality of trenches by way of gate insulation films formed on side walls of the plurality of respective trenches, a plurality of second electrodes disposed above the plurality of first electrodes in a state where the second electrodes are spaced apart from the first electrodes, a plurality of first insulation regions, and a plurality of second insulation regions. The trenches, the first electrodes and the second electrodes are formed in stripes as viewed in a plan view. At least one of the plurality of second electrodes is connected to the drain electrode.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
• H01L 29/40 - Electrodes
• H01L 29/423 - Electrodes characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
• H01L 29/66 - Types of semiconductor device
• H02M 1/34 - Snubber circuits

Abstract

A wide gap semiconductor device has: a drift layer using wide gap semiconductor material being a first conductivity type; a well region being a second conductivity type and provided in the drift layer; a source region provided in the well region; a gate contact region provided in the well region and electrically connected to a gate pad; and a Zener diode region provided in the well region and provided between the source region and the gate contact region.

IPC Classes  ?

• H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
• H01L 29/08 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes

Abstract

This power control device comprises: a switching substrate comprising a wiring pattern that electrically connects a battery and a three-phase AC motor and a plurality of switching elements connected to the wiring pattern; a control substrate that comprises a first through hole that passes therethrough in the thickness direction thereof and a Rogowski coil formed around the first through hole; and a power-supply-side terminal member that electrically connects the battery and the wiring pattern of the switching substrate. The control substrate is disposed at a prescribed interval from the switching substrate, and the power-supply-side terminal member is inserted into the first through hole.

IPC Classes  ?

• G01R 15/18 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
• H05K 7/14 - Mounting supporting structure in casing or on frame or rack
• H02M 7/48 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

This wide gap semiconductor device has a wide gap semiconductor layer, and a metal electrode 20 provided in the wide gap semiconductor layer. The metal electrode 20 has a single crystal layer 21 in an interface region at the interface with the wide gap semiconductor layer. The single crystal layer 21 of the interface region contains a first region for which a lattice constant L1 of the C axis is smaller than L by 1.5-8%, where L is the lattice constant in the equilibrium state of the C axis of the metal constituting the metal electrode 20.

IPC Classes  ?

• H01L 21/28 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 29/47 - Schottky barrier electrodes
• H01L 29/872 - Schottky diodes
• H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes

Abstract

b is provided and passes through a space of the secondary coil 20.

IPC Classes  ?

• H01F 27/30 - Fastening or clamping coils, windings, or parts thereof togetherFastening or mounting coils or windings on core, casing, or other support
• H01F 30/06 - Fixed transformers not covered by group characterised by the structure

Abstract

An electronic device has a primary coil 10; a secondary coil 20 disposed to face the primary coil 10; a coil sealing part 50 sealing the primary coil 10 and the secondary coil 20 and being made of sealing resin; a primary-side electronic element 110 electrically connected to the primary coil 10; and a secondary-side electronic element 210 electrically connected to the secondary coil 20. The primary-side electronic element 110 is provided on a primary-side extension part 60 extending from the primary coil 10 to an outside of the coil sealing part 50, or the secondary-side electronic element 210 is provided on a secondary-side extension part 70 extending from the secondary coil 20 to an outside of the coil sealing part 50.

IPC Classes  ?

• H01F 27/32 - Insulating of coils, windings, or parts thereof

Abstract

An electronic device has a primary coil 10; a secondary coil 20 disposed to face the primary coil 10; a coil sealing part 50 sealing the primary coil 10 and the secondary coil 20 and being made of sealing resin; a primary-side sealing part 150 sealing a primary-side electronic element 110 electrically connected to the primary coil 10; and a secondary-side sealing part 250 sealing a secondary-side electronic element 210 electrically connected to the secondary coil 20.

IPC Classes  ?

• H01F 27/32 - Insulating of coils, windings, or parts thereof
• H01F 27/22 - Cooling by heat conduction through solid or powdered fillings
• H01F 27/29 - TerminalsTapping arrangements

Abstract

A magnetic component has a primary coil 10; a secondary coil 20 disposed to face the primary coil 10; a core 500 which passes through the primary coil 10 and the secondary coil 20; and a coil sealing part 50 which seals at least the primary coil 10 and the secondary coil 20, and a part or whole of region between the primary coil 10 and the secondary coil 20 and the core 500.

IPC Classes  ?

• H01F 27/28 - CoilsWindingsConductive connections
• H01F 27/32 - Insulating of coils, windings, or parts thereof
• H01F 30/10 - Single-phase transformers

Abstract

A semiconductor switch control circuit includes: a pulse signal generating part configured to generate a pulse signal which becomes a time reference for performing an ON/OFF control of a semiconductor switch; a drive current generating part configured to generate a drive current based on the pulse signal which the pulse signal generating part generates and to supply the drive current to a gate electrode of the semiconductor switch; a current detecting part configured to detect a drain current or a source current of the semiconductor switch; and a drive current control part configured to have a function of controlling a drive current which the drive current generating part generates based on the pulse signal which the pulse signal generating part generates and the current which the current detecting part detects.

IPC Classes  ?

• H03K 17/08 - Modifications for protecting switching circuit against overcurrent or overvoltage
• H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• H02M 1/00 - Details of apparatus for conversion
• H03K 17/041 - Modifications for accelerating switching without feedback from the output circuit to the control circuit
• H03K 17/082 - Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
• H03K 17/16 - Modifications for eliminating interference voltages or currents
• H03K 19/01 - Modifications for accelerating switching

Abstract

A semiconductor device includes: an inner substrate on which a semiconductor chip is mounted, and has a surface on which terminals including electric path terminals are formed; a lead frame which has a chip connecting electrode portion which is electrically connected to a surface of the semiconductor chip via a conductive bonding member, substrate connecting electrode portions which are electrically connected to the electric path terminals of the inner substrate, and horizontal surface support portions which bulge to the outside from the chip connecting electrode portion or the substrate connecting electrode portions; and pin terminals which are mounted upright over the inner substrate in a direction perpendicular to flat surfaces of the substrate connecting electrode portions of the lead frame, wherein the horizontal surface support portions bulge to the outside of the inner substrate.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/053 - ContainersSeals characterised by the shape the container being a hollow construction and having an insulating base as a mounting for the semiconductor body
• H01L 23/495 - Lead-frames

Abstract

A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices

Abstract

An electronic module has a first substrate 11, a first electronic element 13, a second electronic element 23, a second substrate 21, a first terminal part 110 provided on a side of the first substrate 11 and a second terminal part 120 provided on a side of the second substrate 21. The first terminal part 110 has a first surface direction extending part 114 and a first normal direction extending part 113 extending toward one side or the other side. The second terminal part 120 has a second surface direction extending part 124 and a second normal direction extending part 123 extending toward one side or the other side. The second surface direction extending part 124 is provided on one side of the first surface direction extending part 114, and the first surface direction extending part 114 and the second surface direction extending part 124 overlap one another in a surface direction.

IPC Classes  ?

• H01L 23/498 - Leads on insulating substrates
• H01L 23/495 - Lead-frames
• H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass

Abstract

An electronic module has a sealing part 90; a rear surface-exposed conductor 10, 20, 30 having a rear surface-exposed part 12, 22, 32 whose rear surface is exposed; a rear surface-unexposed conductor 40, 50 whose rear surface is not exposed; an electronic element 15, 25, which is provided in the sealing part 90 and provided on a front surface of the rear surface-exposed conductor 40, 50; a first connector 60 for electrically connecting the electronic element 15, 25 with the rear surface-exposed conductor 10, 20, 30; and a second connector 70 for electrically connecting the electronic element 15, 25 with the rear surface-unexposed conductor 40, 50. A thickness T1 of the first connector 60 is thicker than a thickness T2 of the second connector 70.

IPC Classes  ?

• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/495 - Lead-frames
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass

Abstract

An electronic module has a first electronic unit having a first substrate 11, a first conductor layer 12 provided on one side of the first substrate 11, and a first electronic element 13 provided on one side of the first conductor layer 12, a first connection body 60 provided on one side of the first electronic element 13, and a second electronic unit having a second electronic element 23 provided on one side of the first connection body 60. The first connection body 60 has a first head part 61 and a plurality of support parts 65 extending from the first head part 61. The electronic module is characterized by that the support part 65 abuts on the first substrate 11 or the first conductor layer 12.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 21/44 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 25/18 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different main groups of the same subclass of , , , , or

Abstract

An auxiliary member (2) having a higher absorption rate for laser light (LL) than do a plurality of joined members (1) that are joined to each other is positioned so as to face a boundary exposure surface (12) of the plurality of joined members, the boundary exposure surface being a surface at which a boundary (11) between the plurality of joined members is visible; the auxiliary member is irradiated with laser light and melted; the temperature of a boundary portion (13) of the plurality of joined members is raised by a molten portion (23) of the auxiliary member, and the boundary portion is caused to transition to a state where laser light is readily absorbed; and the boundary portion is irradiated with laser light and melted, whereby the plurality of joined members are welded.

IPC Classes  ?

• B23K 26/18 - Working by laser beam, e.g. welding, cutting or boring using absorbing layers on the workpiece, e.g. for marking or protecting purposes
• B23K 26/21 - Bonding by welding

Abstract

A control unit repeats the series of processing of comparing a first phase representing a phase of the first reference sine wave and being a phase included in the first synchronization signal, with a second phase that is the phase of the second reference sine wave when the first synchronization signal is received when the communication unit receives the first synchronization signal from the other inverter generator, changing a phase change amount per unit time of the second reference sine wave in accordance with the comparison result, continuing to update the phase of the second reference sine wave so that the phase of the second reference sine wave changes with a phase change amount per unit time after the change with reference to the first phase until the next first synchronizing signal is received from the other inverter generator.

IPC Classes  ?

• H02J 3/46 - Controlling the sharing of output between the generators, converters, or transformers
• H02J 3/40 - Synchronising a generator for connection to a network or to another generator
• H02J 3/42 - Synchronising a generator for connection to a network or to another generator with automatic parallel connection when synchronism is achieved
• H02M 7/493 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel

Abstract

An electronic device includes a board having a mounting surface for an electronic component, a case having an opening for insertion of the board into the case and configured to house the board inserted through the opening, and a cover fixed to the case so as to close the opening. The board also has at least one deformable device formed on an end side of the board and configured to be elastically deformable in a direction orthogonal to the mounting surface. The deformable device comes into contact with the case or the cover in a state of being elastically deformed to hold the board in a fixed state in a storage space formed through fixation of the cover to the case when the board is housed in the storage space.

IPC Classes  ?

• H05K 1/14 - Structural association of two or more printed circuits
• H05K 7/14 - Mounting supporting structure in casing or on frame or rack
• B60R 16/02 - Electric or fluid circuits specially adapted for vehicles and not otherwise provided forArrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric

Abstract

An electronic module has a first substrate 11, a first electronic element 13 provided on one side of the first substrate 11, a first connection body 60 provided on one side of the first electronic element 13, a second electronic element 23 provided on one side of the first connection body 60, a second substrate 21 provided on one side of the second electronic element 23, and an abutment body 250 that abuts on a face on one side of the second electronic element 23 and is capable of imparting a force toward one side with respect to the second substrate 21.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 23/495 - Lead-frames
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass

Abstract

A method of manufacturing a chip module comprises a step of disposing a first electronic element 13 on a first jig 500, a step of disposing a first connector 60 on the first electronic element 13 via a conductive adhesive 5, a step of disposing a second electronic element 23 on the first connector 60 via a conductive adhesive 5, a step of disposing a second connector 70 on a second jig 550, a step of reversing the second jig in a state where the second connector 70 is fixed to the second jig 550 and disposing the second connector 70 on the second electronic element 23 via a conductive adhesive 5, and a step of curing the conductive adhesives 5.

IPC Classes  ?

• H01L 21/44 - Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups
• H01L 23/495 - Lead-frames
• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass

Abstract

A semiconductor module is configured to convert a direct current to a three-phase alternating current, and to supply the three-phase alternating current to a three-phase motor to drive the three-phase motor, wherein a first gap M1 between side surfaces of the first and the second central wiring lines, which side surfaces are close to each other and face each other, and a second gap M2 between side surfaces of the second and the third central wiring lines, which side surfaces are close to each other and face each other, are bent on the top surface of the substrate.

IPC Classes  ?

• H05K 7/20 - Modifications to facilitate cooling, ventilating, or heating
• H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
• H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
• H02P 27/06 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters

Abstract

A semiconductor module includes: a semiconductor substrate; a switching element having a first electrode, a second electrode, and a gate electrode, and the switching element configured to perform turning on/off between the first electrode and the second electrode in response to applying of a predetermined gate voltage to the gate electrode; a control circuit part configured to control the gate voltage; and a current detection element configured to detect a current which flows between the first electrode and the second electrode of the switching element, wherein the switching element, the control circuit part, and the current detection element are mounted on the semiconductor substrate, and the current detection element is formed of a Rogowski coil.

IPC Classes  ?

• H03K 17/16 - Modifications for eliminating interference voltages or currents
• H01L 25/16 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices the devices being of types provided for in two or more different subclasses of , , , , or , e.g. forming hybrid circuits
• G01R 15/18 - Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
• H01F 38/28 - Current transformers
• H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds

Abstract

A semiconductor module is configured to convert a direct current to a three-phase alternating current, and to supply the three-phase alternating current to a three-phase motor to drive the three-phase motor, wherein the first ground terminal GND1, the second ground terminal GND2, and the third ground terminal GND3 are arranged along the second side B2 to be separated from one another and electrically isolated from one another.

IPC Classes  ?

• H02K 11/40 - Structural association with grounding devices
• H02K 11/25 - Devices for sensing temperature, or actuated thereby
• H02K 11/33 - Drive circuits, e.g. power electronics
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement
• H01L 23/34 - Arrangements for cooling, heating, ventilating or temperature compensation
• H01L 23/495 - Lead-frames
• H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
• H02M 7/48 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Abstract

A semiconductor module is configured to convert a direct current to a three-phase alternating current, and to supply the three-phase alternating current to a three-phase motor to drive the three-phase motor, wherein the first to the third control signal terminals Q1, Q2, and Q3 are arranged in a direction along which the first side B1 extends in a manner that one ends of the first to the third control signal terminals are in the vicinity of the first side B1 of the substrate B, and wherein the fourth to the sixth control signal terminals Q4, Q5, and Q6 are arranged in a direction along which the second side B2 extends in a manner that one ends of the fourth to the sixth control signal terminals are in the vicinity of the second side B2 of the substrate B.

IPC Classes  ?

• H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
• H01L 23/498 - Leads on insulating substrates
• H02M 7/00 - Conversion of AC power input into DC power outputConversion of DC power input into AC power output
• H02M 7/5387 - Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
• H01L 23/00 - Details of semiconductor or other solid state devices
• H02P 27/06 - Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using DC to AC converters or inverters
• H01L 23/528 - Layout of the interconnection structure

Abstract

A switching element control circuit includes: a third electrode voltage control part which controls a third electrode voltage; a first electrode current detection part which detects a first electrode current which flows through the switching element; a memory part which stores information including an initial threshold voltage and an initial first electrode current, and a drain current characteristic of a threshold voltage; and a threshold voltage calculation part which calculates a threshold voltage at a time of operating the switching element based on information including the first electrode current, the initial threshold voltage, and an initial first electrode current, and information relating to the first electrode current characteristic of the threshold voltage, wherein the third electrode voltage control part controls the third electrode voltage based on a threshold voltage at the time of operating the switching element calculated by the threshold voltage calculation part.

IPC Classes  ?

• H03K 17/687 - Electronic switching or gating, i.e. not by contact-making and -breaking characterised by the use of specified components by the use, as active elements, of semiconductor devices the devices being field-effect transistors
• H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• H03K 17/0812 - Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit by measures taken in the control circuit
• H03K 17/567 - Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
• H03K 17/16 - Modifications for eliminating interference voltages or currents

Abstract

A switching element control circuit: a third electrode voltage control part; a temperature detection part; a first electrode current detection part; a memory part which stores information including an initial threshold voltage and an operation temperature/first electrode current characteristic of the threshold voltage; and a threshold voltage calculation part which calculates a threshold voltage at the time of operating the switching element based on information including the initial threshold voltage, the operation temperature of the switching element, and a first electrode current, and information relating to an operation temperature/first electrode current characteristic of a threshold voltage, wherein the third electrode voltage control part controls the third electrode voltage based on a threshold voltage at the time of operating the switching element calculated by the threshold voltage calculation part.

IPC Classes  ?

• H03K 17/14 - Modifications for compensating variations of physical values, e.g. of temperature
• H02M 1/08 - Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• H03K 17/16 - Modifications for eliminating interference voltages or currents

Abstract

An electronic module has a first substrate 11; a first electronic element 13 provided on one side of the first substrate 11; a first connection body 60 provided on the one side of the first electronic element 13; a second electronic element 23 provided on the one side of the first connection body 60; and a second connection body 70 provided on the one side of the second electronic element 23. The first electronic element 13 and the second electronic element 23 do not overlap in a plane direction.

IPC Classes  ?

• H01L 23/00 - Details of semiconductor or other solid state devices
• H01L 25/07 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in subclass
• H01L 23/16 - Fillings or auxiliary members in containers, e.g. centering rings
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement

Abstract

A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, the semiconductor chip having an upper surface on which a first electrode is disposed and a lower surface on which a second electrode is disposed; a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; and a sealing resin for sealing the semiconductor chip, the die pad frame, and the conductive connection member for die pad.

IPC Classes  ?

• H01L 23/495 - Lead-frames
• H01L 23/31 - Encapsulation, e.g. encapsulating layers, coatings characterised by the arrangement