The present invention provides: a substrate containing a carbon-doped silicon epitaxial layer, the substrate having a carbon-doped silicon epitaxial layer on a silicon substrate and a non-carbon-doped silicon epitaxial layer on the carbon-doped silicon epitaxial layer, wherein the carbon concentration in the carbon-doped silicon epitaxial layer decreases continuously or stepwise from the silicon substrate side toward the non-carbon-doped silicon epitaxial layer side; and a method for manufacturing said substrate. Consequently, a substrate containing a carbon-doped silicon epitaxial layer, in which both good gettering characteristics and a high-quality silicon epitaxial layer having good crystallinity are achieved, and a method for manufacturing said substrate are provided.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
2.
SILICENE LAYER-CONTAINING SILICON SUBSTRATE AND METHOD FOR PRODUCING SAME
The present invention is a silicene layer-containing silicon substrate and a method for producing the same, the silicene layer-containing silicon substrate being characterized by comprising a silicene layer on a silicon substrate and a carbon-doped silicon layer on the silicene layer. Thus, provided are: a silicene layer-containing silicon substrate in which oxidation of the silicene layer is suppressed; and a method for producing the same.
The present invention relates to: a silicene layer-containing silicon substrate having a first carbon doped silicon layer on a silicon substrate, a silicene layer on the first carbon doped silicon layer, and a second carbon doped silicon layer on the silicene layer; and a method for producing the same. Provided is a silicene layer-containing silicon substrate in which a silicene layer is formed on an insulating layer.
The present invention is a method for evaluating a surface defect of an SiGe substrate, the method being characterized by including: a step for preparing an SiGe epitaxial substrate for cross-sectional observation; a first defect-manifesting step for manifesting a defect on the surface of the substrate for cross-sectional observation through selective etching; a cross-sectional observation step for evaluating, in advance, the cross-sectional shape of an etching pit formed through the selective etching in the substrate for cross-sectional observation, and obtaining a reference ratio of the lateral-width-direction size of the defect being evaluated to the depth; a step for preparing a substrate for evaluation; a second defect-manifesting step for manifesting a defect on the surface of the substrate for evaluation through selective etching; and an evaluation step for observing the surface of the substrate for evaluation that has been subjected to the second defect-manifesting step, counting only defects for which the ratio of the lateral-width-direction size to the depth is equal to or less than the reference ratio, and evaluating the surface defect. This makes it possible to provide a method for evaluating a surface defect of an SiGe substrate, the method making it possible to easily and very accurately evaluate defects.
The present invention is a method for managing a surface defect inspection device on which a high-low angle scattering detector is mounted, the method comprising steps of: preparing, as a standard wafer, a semiconductor Si wafer in which a plurality of defects having a convex or concave shape in which the dimension in the direction parallel to the surface is larger than the dimension in the vertical direction and having known coordinates and sizes are formed on the outermost surface; with a device to be managed, detecting by a detector scattered light from defects of the standard wafer; acquiring the coordinates and size of the defects; for defects of the same coordinates, calculating for each detector a detected size difference, which is the difference between the known size of a standard wafer and the detected size; acquiring the absolute value of the most frequent value for each detector; and when the absolute value of the most frequent value of the detection size difference of a high-angle scattering detector is larger than that of a low-angle scattering detector, performing inspection and calibration of the optical system of the device. Thus, it is possible to provide a management method for a surface defect inspection device capable of detecting an abnormality only in the high-angle scattering detector of the surface defect inspection device and calibrating the device in which the abnormality has been detected.
The present invention provides an epitaxial wafer which has a single crystal Si epitaxial layer (Si epitaxial layer) on a single crystal Si substrate. The Si epitaxial layer has a single crystal Si lattice spacing of 5.408 Å or less. A dopant in the single crystal Si substrate is diffused from the single crystal Si substrate into the Si epitaxial layer, while being reduced, and has a concentration profile locally higher on the Si epitaxial layer side than on the single crystal Si substrate side at the interface between the single crystal Si substrate and the Si epitaxial layer. The epitaxial wafer is a wafer for bonding. The Si epitaxial layer has a function as an etching stopping layer or a polishing stopping layer during thinning after bonding. Consequently, the present invention provides an epitaxial wafer which has a function as a stopping layer in an etching/polishing step during thinning after bonding especially in a silicon device manufacturing process.
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
7.
SELECTIVE ETCHING LIQUID AND METHOD FOR EVALUATING SIGE SUBSTRATE
3322O. Thus, provided is a chromium-free etching liquid that is specialized for SiGe substrates and is suitable for detecting defects in SiGe substrates.
x1-xy1-y1-yP (wherein 0 ≤ x ≤ 1 and 0 ≤ y ≤ 1) and in which at least an n-type cladding layer, an active layer, and a p-type cladding layer are sequentially stacked on an n-type GaP substrate; and a p-type GaP layer which is a window layer and is superposed on a second main surface of the quaternary light-emitting layer, the second main surface being on the opposite side of a first main surface which is on the n-type GaP substrate side. This compound semiconductor substrate is characterized in that, in the active layer, the p-type impurity concentration is 9 × 1015(Atoms/cm3) or less, and the n-type impurity concentration is 7 × 1015(Atoms/cm3) or less. Consequently, the present invention provides: a compound semiconductor substrate which has a quaternary light-emitting layer of AlGaInP, and which enables a light-emitting element to have good life characteristics of luminance during energization if applied thereto; and a method for producing the compound semiconductor substrate.
H10H 20/824 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H10H 20/816 - Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
9.
EXHAUST ARRARATUS, SILICON SINGLE-CRYSTAL PRODUCTION APPARATUS, EXHAUST METHOD, AND METHOD FOR PRODUCING SILICON SINGLE CRYSTALS
The present invention is an exhaust apparatus which is connected to a silicon single-crystal pulling apparatus which comprises a chamber and a quartz crucible in the chamber and pulls silicon single crystals from a raw material melt stored in the quartz crucible. The exhaust apparatus is characterized by comprising: an exhaust pipe which is connected to the chamber and discharges an inert gas introduced into the chamber; a water supply device which is connected to the exhaust pipe and supplies the exhaust pipe with water for removing sediment accumulated in the exhaust pipe; and a storage tank which is connected to the exhaust pipe and which stores the water discharged from the exhaust pipe and precipitates and removes the sediment included in the water. As a result, an apparatus which safely and continuously removes silicon oxide (SiOx) sediment generated in an exhaust pipe without opening an exhaust gas pipe in pulling silicon single crystals by CZ method is provided.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a SiGe substrate manufacturing method characterized by comprising: a step for epitaxially growing a SiGe layer on the main front surface of a Si substrate; a step for polishing the main front surface and the main back surface of the Si substrate, which has been provided with the SiGe layer, while sandwiching the Si substrate with pads; and a step for cleaning the Si substrate, which has been provided with the SiGe layer, after the polishing. As a result, the present invention provides a SiGe substrate manufacturing method in which a SiGe layer is formed on a Si substrate, the method efficiently homogenizing the surface of the SiGe layer and manufacturing a high-quality SiGe substrate.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
12.
Ge-CONTAINING SUBSTRATE, AND METHOD FOR MANUFACTURING Ge-CONTAINING SUBSTRATE
x1-x1-x layer (0≤x<1) on the silicon epitaxial layer. Thus provided is a high-quality, efficiently manufactured Ge-containing substrate having an Si substrate and a Ge-containing layer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a method for manufacturing an SiGe substrate provided with an SiGe layer on the main surface of a silicon substrate, the method being characterized in that the SiGe layer is grown on the main surface of the silicon substrate by using, as the silicon substrate, a silicon substrate having an off angle of 0.1° to 0.7° on the main surface thereof. Thereby provided are: a method for manufacturing an SiGe substrate in which defects on the surface of an SiGe layer, in particular cross-hatch-like defects, are suppressed; and an SiGe substrate.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
14.
METHOD FOR MEASURING OXYGEN CONCENTRATION OF OXYGEN ATOMIC LAYER
The present invention provides a method for measuring the oxygen concentration of an oxygen atomic layer of an epitaxial wafer in which the oxygen atomic layer and a single crystal silicon epitaxial layer on the oxygen atomic layer are formed on a silicon single crystal substrate. The method includes: creating in advance a calibration curve between the oxygen concentration of the oxygen atomic layer of an epitaxial wafer for a preliminary test and the band edge emission intensity of the epitaxial wafer for the preliminary test as determined by a photoluminescence method or a cathode luminescence method; and measuring the oxygen concentration of an oxygen atomic layer of an epitaxial wafer to be measured from the measurement result of the band edge emission intensity of the epitaxial wafer to be measured using the calibration curve. As a result, there is provided a method for measuring the oxygen concentration of an oxygen atomic layer in an epitaxial wafer in a stable and simple way in a non-destructive manner.
G01N 23/2258 - Measuring secondary ion emission, e.g. secondary ion mass spectrometry [SIMS]
G01N 27/62 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating the ionisation of gases, e.g. aerosolsInvestigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electric discharges, e.g. emission of cathode
The present invention is a production method for an SiGe substrate that involves growing an SiGe layer on a silicon substrate. The production method is characterized in that growth of the SiGe layer is begun at a temperature that is at or above room temperature and at or below the lowest glass transition temperature of the most stable structure at the surface of the silicon substrate in accordance with the crystal plane orientation at the surface of the silicon substrate, and the SiGe layer is grown as the temperature is raised above the lowest glass transition temperature. The present invention thereby provides a method for producing a high-quality SiGe substrate that has a good-quality SiGe layer formed on a silicon substrate.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention pertains to an epitaxial substrate comprising a nitride semiconductor epitaxial layer on a main surface of a Si substrate, the epitaxial substrate being characterized in that: the rear surface of the Si substrate has recesses in which the substrate thickness of a region other than an outer peripheral part is less than the substrate thickness of the outer peripheral part; the width of the outer peripheral part in the radial direction is 1/15 to 1/6 of the diameter of the Si substrate; the average thickness of the region other than the outer peripheral part is 1/3 to 1/2 of the thickness of the outer peripheral part; and the warpage of said epitaxial substrate is at most 50 μm. Consequently, provided are: an epitaxial substrate in which a nitride semiconductor layer is formed on a Si substrate and in which both shortening of etching time and ensuring of the load resistance of a Si support substrate are achieved, and both shortening of etching time and a reduction in warpage of an epitaxial wafer due to the stress of a heteroepitaxial film are achieved; and a method for manufacturing the same.
The present invention provides a method for producing a semiconductor wafer that has, on the surface thereof, protrusions made of silicon carbide crystals. The method is characterized by comprising: a step for forming a carbon-containing silicon film on a silicon substrate at a first temperature; a step for precipitating silicon carbide crystals in the silicon film by annealing the silicon substrate, on which the silicon film has been formed, at a second temperature; and a step for polishing the silicon film on the annealed silicon substrate to produce a semiconductor wafer in which protrusions made of the silicon carbide crystals are formed on the silicon substrate. Thus, there is provided a method for producing a semiconductor wafer containing silicon carbide crystals (SiC crystals) having a large surface roughness by a simple process.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
18.
CYLINDRICAL GRINDING METHOD AND CYLINDRICAL GRINDER
The present invention is a cylindrical grinding method for cylindrically grinding a crystal ingot, wherein: a support device having a concave-shaped support section able to support a conical end of the crystal ingot is used as a support device; a cylindrical grinder equipped with a remaining state determining means for determining whether part of the conical end of the crystal ingot remains inside the support section is used as a cylindrical grinder; and in continuous processing of the cylindrical grinding, continuous processing is maintained if the remaining state determining means determines that no part of the end is remaining inside the support section, and the continuous processing is stopped if it is determined that part of the end is remaining. Provided thereby are a cylindrical grinding method and a cylindrical grinder making it possible to reliably find it out if a distal end of a conical tail part is remaining inside the support device in an unloading step after a silicon single crystal ingot has been subjected to cylindrical grinding.
B24B 41/06 - Work supports, e.g. adjustable steadies
B24B 5/04 - Machines or devices designed for grinding surfaces of revolution on work, including those which also grind adjacent plane surfacesAccessories therefor involving centres or chucks for holding work for grinding cylindrical surfaces externally
B24B 49/08 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving liquid or pneumatic means
B24B 49/12 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving optical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
19.
DEFECT EVALUATION METHOD FOR SEMICONDUCTOR SILICON WAFER
The present invention is a defect evaluation method for a semiconductor Si wafer for evaluating a defect shape inside the Si wafer, the defect evaluation method comprising: a first defect detection step for irradiating a surface of an Si wafer with a DUV laser beam to acquire the position coordinates of defects included in the outermost surface; a second defect detection step for irradiating the surface of the Si wafer with a visible-light laser beam to acquire the position coordinates of defects included in a surface layer region including the outermost surface; a defect classification step for comparing the position coordinates of the defects acquired in the first and second defect detection steps, classifying defects detected only in the first defect detection step and defects of the same coordinates among the defects detected in the first and second defect detection steps into exposed defects, and classifying defects detected only in the second defect detection step into non-exposed defects; and a defect observation step for observing the shapes of the defects classified into the non-exposed defects. Accordingly, a method for observing the overall situations of defects present in an Si wafer without destroying the structures of the defects is provided.
The present invention is a method for manufacturing a high frequency SOI wafer having a structure in which a silicon single crystal substrate, a high resistivity epitaxial layer, a Trap-rich layer, a BOX layer, and an SOI layer are laminated in the stated order, wherein: a high resistivity epitaxial layer is formed in advance on the surface of another silicon single crystal substrate, the thickness of said high resistivity epitaxial layer being different from that of the silicon single crystal substrate; measurements are taken of the harmonic characteristics; and the thickness of the high resistivity epitaxial layer is determined on the basis of the measurement result. The present invention thereby provides a manufacturing method that makes it possible, in a silicon substrate having ordinary resistivity, for the harmonic characteristics to be improved a level equivalent to that of a high-resistivity substrate.
The present invention is a method for manufacturing an epitaxial wafer, for forming a single-crystal silicon layer on a silicon single-crystal wafer. The method is characterized by comprising a hydrofluoric acid cleaning step for removing a natural oxide film from the surface of the silicon single-crystal wafer with a cleaning liquid containing hydrofluoric acid, an oxygen atomic layer forming step for forming, by cleaning, an oxygen atomic layer on the surface of the silicon single-crystal wafer from which the natural oxide film has been removed, and an epitaxial growth step for epitaxially growing, by a vapor-phase growth method, the single-crystal silicon layer on the surface of the silicon single-crystal wafer on which the oxygen atomic layer has been formed, wherein a cleaning liquid containing at least hydrogen peroxide water is used for the cleaning in the oxygen atomic layer forming step. Thus, a method for manufacturing an epitaxial wafer is provided that makes it possible to efficiently form and control an oxygen atomic layer without causing a deterioration in the surface roughness of the wafer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
The present invention is a heat treatment method for performing a film-forming heat treatment which forms a film on a main surface of a silicon substrate in which the plane orientation of the main surface is {110}, said heat treatment method being characterized by including: a step in which the silicon substrate, in which the plane orientation of the main surface is {110}, is loaded into a heat treatment furnace while the internal temperature of the furnace is 540°C or lower; a step in which the temperature of the silicon substrate that was loaded into the heat treatment furnace is increased while a passivation film is formed on the main surface of the silicon substrate; and a step in which the film-forming heat treatment of the silicon substrate is performed after the temperature increase. Thus, provided is a method that suppresses and controls roughness, especially minute protruding defects, on the main surface while forming a film on the Si {110} substrate.
The present invention provides a silicon substrate in which the plane orientation of a main surface is (110), the silicon substrate including no hollow defect that has a length in the longitudinal direction of 50 nm to 2,000 nm inclusive in the surface. As a result, provided is an Si(110) substrate in which the formation of a hollow defect is suppressed.
The present invention is a method for determining a defect region of a silicon single-crystal substrate having a mirror-polished (100) surface orientation, using a laser scattering surface inspection apparatus with a rotary stage, the method being characterized in that: crystal defects present in regions of a main surface of the silicon single-crystal substrate in which the crystal orientation includes the <010> direction and the <011> direction are measured using the oblique incidence mode of the surface inspection apparatus to determine the number of defects or the defect density of the crystal defects, and it is determined whether an I-rich region is included in the silicon single-crystal substrate on the basis of the difference between the number of defects or the defect density of the crystal defects present in the region in which the crystal orientation includes the <010> direction and the number of defects or the defect density of the crystal defects present in the region in which the crystal orientation includes the <011> direction. Thus, a non-destructive and simple method for I-rich determination for a defect region of a semiconductor substrate is provided.
The present invention is a method for manufacturing a heteroepitaxial wafer by epitaxially growing a 3C–SiC monocrystalline film on a monocrystalline silicon substrate. The method is characterized in that: the method includes a step in which a monocrystalline silicon substrate with a plane orientation of (111) is prepared, a step in which, using a flash lamp device, a native oxide film on a surface of the monocrystalline silicon substrate is removed by hydrogen baking, and a step in which a source gas that includes carbon and silicon is supplied into the flash lamp device and a SiC monocrystal is grown on the surface of the monocrystalline silicon substrate; in the step in which the native oxide film is removed, after preliminary heating at 300°C–600°C, hydrogen baking is performed at 900°C–1350°C; and, in the step in which the SiC monocrystal is grown, after preliminary heating at 300°C–600°C, SiC nucleation is performed at 900°C–1350°C. Due to this configuration, a method for manufacturing a heteroepitaxial wafer is provided by which a good-quality 3C–SiC monocrystalline film is epitaxially grown with good efficiency on a monocrystalline silicon substrate.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
26.
MANUFACTURING METHOD FOR NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE, NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE, AND PLATFORM SUBSTRATE FOR NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE
The present invention is a manufacturing method for a nitride semiconductor epitaxial substrate, said method being characterized by comprising: a SiC single crystal film formation step in which, while epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, a vacancy is additionally formed in a silicon layer on a surface layer of the single crystal silicon substrate directly below the 3C-SiC single crystal film; and a nitride formation step in which, while epitaxially growing a nitride semiconductor layer on the 3C-SiC single crystal film, dislocations are formed over the entire surface of the single crystal silicon substrate, and the nitride semiconductor layer having a ratio of yellow light emission intensity to band edge emission intensity of 0.02 or less is formed. In this way, a manufacturing method is provided for a large-diameter nitride semiconductor epitaxial substrate having reduced yellow light emission and non-light emission defects even when a nitride semiconductor layer is grown on a single crystal silicon substrate.
The present invention provides a method for evaluating the crystallinity of a 3C-SiC film heteroepitaxially grown on a single-crystal silicon substrate, the method being characterized in that the crystallinity of the 3C-SiC film of the heteroepitaxial wafer is determined from both a WARP value of the heteroepitaxial wafer and a value of stress imposed on the substrate and obtained by the Stoney equation. By this method, the crystallinity of a 3C-SiC film heteroepitaxially grown on a single-crystal silicon substrate is easily evaluated in a non-destructive manner without the need of a wafer processing operation.
H01L 21/66 - Testing or measuring during manufacture or treatment
28.
PINHOLE AND DEAERATION FAILURE INSPECTION METHOD FOR BAG BODY IN WHICH SEALED STORAGE CONTAINER IS HERMETICALLY PACKAGED, AND PINHOLE AND DEAERATION FAILURE INSPECTION DEVICE FOR BAG BODY IN WHICH SEALED STORAGE CONTAINER IS HERMETICALLY PACKAGED
The present invention is a pinhole and deaeration failure inspection method for a bag body in which a sealed storage container is hermetically packaged, the method inspecting for the presence or absence of a pinhole or deaeration failure in the bag body in a state in which the sealed storage container accommodating a semiconductor wafer is hermetically packaged in the bag, made of resin or having aluminum vapor deposition, in a degasified state so as not to contact the outside air, the method characterized by comprising: a pressurization step for pressurizing, with a pad, at least one side surface part of the bag body having the sealed storage container hermetically packaged therein, after a predetermined time or longer has elapsed after the hermetic packaging; a measurement step for measuring, using a sensor provided above an upper end part of the bag body having the sealed storage container hermetically packaged therein, the distance between the upper end part and the sensor in a pressurized state achieved by the pressurization step; and a determination step for determining the presence or absence of a pinhole and the presence or absence of deaeration failure in the bag body on the basis of the distance measured in the measurement step. Thus, an inspection method is provided with which it is possible to determine the presence or absence of a pinhole and the presence or absence of deaeration failure in a bag body in which a sealed storage container is hermetically packaged, by a simple method regardless of the inspector.
H01L 21/673 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components using specially adapted carriers
G01M 3/26 - Investigating fluid tightness of structures by using fluid or vacuum by measuring rate of loss or gain of fluid, e.g. by pressure-responsive devices, by flow detectors
29.
SINGLE-CRYSTAL SILICON SUBSTRATE AND METHOD FOR PRODUCING SINGLE-CRYSTAL SILICON SUBSTRATE
The present invention relates to a single-crystal silicon substrate characterized in that the plane orientation is (110) and the surface of the single-crystal silicon substrate has a surface stable structure of 1×1 in a room-temperature environment. Thus, the haze of a silicon (110) substrate is reduced, and a single-crystal silicon substrate having a stable surface structure and a method for producing the single-crystal silicon substrate are provided.
The present invention provides a nitride semiconductor epitaxial wafer which includes a composite substrate including a ceramic wafer and a silicon single crystal layer that is bonded onto the ceramic wafer, and a nitride semiconductor layer epitaxially grown on the silicon single crystal layer of the composite substrate, wherein the thermal expansion coefficient of the ceramic wafer is substantially equal to the thermal expansion coefficient of the nitride semiconductor layer. This nitride semiconductor epitaxial wafer is characterized in that the thickness of the silicon single crystal layer is 100 nm to 200 nm inclusive. As a result, it is possible to suppress melt back etching even in a structure in which a nitride semiconductor is grown on a silicon single crystal layer, and the present invention provides a nitride semiconductor epitaxial wafer in which it is easy to form an ohmic contact at a silicon single crystal layer during device manufacture.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a method for manufacturing an epitaxial wafer in which a single crystal silicon layer is formed on a single crystal silicon wafer with an oxygen atom layer interposed therebetween, the method being characterized by comprising: a step for removing a natural oxide film from the surface of the single crystal silicon wafer; a step for forming a thermal oxide film on the surface of the single crystal silicon wafer from which the natural oxide film has been removed; a step for thinning the thermal oxide film; and a step for epitaxially growing the single crystal silicon after the thinning of the thermal oxide film to form an epitaxial wafer in which the single crystal silicon layer is formed on the single crystal silicon wafer with the oxygen atom layer interposed therebetween. Provided, through this feature, is a method for manufacturing an epitaxial wafer in which an oxygen atom layer can be stably and easily introduced into an epitaxial layer in the manufacture of a silicon epitaxial wafer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
Provided is a method for manufacturing an epitaxial wafer, the method comprising: a hydrofluoric acid washing step for removing a natural oxide film on a surface of a silicon single crystal wafer with hydrofluoric acid; a pure water washing step for washing the surface of the silicon single crystal wafer, from which the natural oxide film has been removed, with pure water to form an oxygen atomic layer on the surface; an epitaxial growth step for epitaxially growing, by a vapor phase growth method, a single crystal silicon layer on the surface of the silicon single crystal wafer on which the oxygen atomic layer has been formed; and a CMP step for performing CMP processing on the surface of the single crystal silicon layer grown in the epitaxial growth step. In the pure water washing step, a planar concentration of oxygen in the oxygen atomic layer is set to 1×1015atoms/cm2 or less, and pure water containing dissolved oxygen is used. Due to this configuration, provided is a method for manufacturing an epitaxial wafer with which the planar concentration of oxygen in the oxygen atomic layer can be controlled, and defects and roughness of the surface can also be improved.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is an epitaxial wafer comprising a single-crystal silicon substrate having a resistivity of 10-5,000 Ω·cm and having, formed thereon in the following order, an epitaxial silicon film having a carbon concentration of 2×1019atoms/cm3or higher but less than 3×1020atoms/cm3and containing carbon defects and a dielectric layer. The epitaxial silicon film has a thickness satisfying the formula: 6.6×1020×exp\{-1.6×[thickness (μm) of epitaxial silicon film]\}>[carbon concentration (atoms/cm3) of epitaxial silicon film]. As a result, the present invention provides: an epitaxial silicon wafer for high-frequency integrated circuit boards which is obtained by forming the epitaxial silicon film on a silicon substrate having an ordinary resistivity and which has the excellent ability to reduce higher harmonics and is easy to process; and a method for producing the epitaxial silicon wafer.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
The present invention is a SOI wafer comprising, in this order on a silicon single crystal substrate having a resistivity of 10–5000 Ω*cm: a silicon epitaxial film having a carbon concentration of not less than 2×1019atoms/cm3and less than 3×1020atoms/cm3, and including carbon defects; a dielectric layer; and a silicon single crystal film, wherein the thickness of the silicon epitaxial film satisfies the relationship 6.6×1020×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms/cm3)]. Thus, there is provided a SOI wafer for a high-frequency integrated circuit board comprising an epitaxial wafer in which a silicon epitaxial film containing carbon at a high concentration is formed on a normal resistivity substrate, wherein the ability to reduce harmonics is superior to that of a SOI wafer comprising a conventional polysilicon layer as a trap-rich layer. Also provided is a method for manufacturing the SOI wafer for a high-frequency integrated circuit board that can be processed easily.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
The present invention is a diamond substrate 100 characterized by comprising: a substrate 1; a 3C-SiC layer 3 grown on the substrate 1; and a single crystal diamond layer 4 grown on the 3C-SiC layer 3. The diamond substrate is also characterized by having pores formed at a density of 0.001 to 10 pores/μm 2 on the substrate side at the interface between the substrate 1 and the 3C-SiC layer 3. As a result of this configuration, an inexpensive diamond substrate having a large diameter can be provided.
C23C 16/511 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a cleaning process device 1 comprising a horn-type ultrasonic wave generation device 5 that transmits ultrasonic waves to a cleaning liquid supplied to a polishing cloth 109 of a polishing device 100 provided with a lower surface plate 101, an upper surface of which has the polishing cloth 109 affixed thereto, a sun gear 105 which is provided inward of the lower surface plate 101, and an internal gear 107 which is provided outward of the lower surface plate 101. The cleaning process device 1 is provided with a rail 3 which is fixed so as to span the lower surface plate 101 on the internal gear 107 and the sun gear 105, and on which the ultrasonic wave generation device 5 is mounted. The ultrasonic wave generation device 5 is capable of moving on the rail 3. As the ultrasonic wave generation device 5 moves on the rail 3, a horn 23 generates ultrasonic waves which are transmitted to the polishing cloth 109 via the cleaning liquid, thereby performing ultrasonic cleaning. Thus, provided is a cleaning process device that, even when provided with a horn-type ultrasonic wave generation device, is capable of ultrasonic cleaning in which a gap between a horn and a polishing cloth is maintained with high precision.
The present invention is a spin etching device 1 comprising a stage 5 that holds a wafer W and spins to rotate the wafer W, wherein a removal liquid is supplied onto an upper surface of the rotating wafer W to remove a film on the upper surface of the wafer W. The spin etching device 1 includes: a plurality of edge chuck pins 13 provided on the stage 5 so as to sandwich the wafer W in point contact with an edge part 21 of the wafer W; and a plurality of wafer support pins 15 that are provided on the stage 5 and that contact a lower surface of the wafer W to support the wafer W from below in a state where a gap is formed between the stage 5 and the wafer W. Thus, an edge chuck-type spin etching device is provided that suppresses local etching of a back surface (lower surface) oxide film as much as possible, and does not affect the SFQR value of the upper surface of the wafer after etching.
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
38.
PRODUCTION METHOD FOR GAN EPITAXIAL FILM AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
The present invention is a production method for a GaN epitaxial film. The production method is characterized by including a preparation procedure for preparing a support substrate that has a thickness of less than 1 mm and is formed by sealing a core that has a diameter of at least 150 mm and comprises a nitride ceramic with a sealing layer, a substrate production procedure for layering, in order, a flattening layer and a seed crystal layer that comprises an SiC single crystal on the support substrate to obtain an epitaxial growth substrate, and an epitaxial procedure for growing a GaN epitaxial film that has a thickness of at least 7 μm on the epitaxial growth substrate to produce a GaN epitaxial film that has a dislocation density of no more than 1.0×106/cm2. The present invention thereby provides a production method for a GaN epitaxial film that makes it possible to produce a GaN thick film that has a large diameter but has no warpage or cracks and has a dislocation density of no more than 1.0×106/cm2 by means of a simple process at low cost.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
39.
HETEROEPITAXIAL WAFER AND METHOD FOR MANUFACTURING SAME
The present invention provides a heteroepitaxial wafer which is obtained by epitaxially growing a silicon germanium layer on a silicon single crystal substrate and epitaxially growing a silicon layer on the silicon germanium layer, and which is characterized in that the relationship between the film thickness (film thickness) of the silicon germanium layer and the germanium concentration (Ge (%)) of the silicon germanium layer satisfies [film thickness (nm)] < 1.4 × 107× [Ge (%)]-4.5. As a result, provided is a heteroepitaxial wafer free of trapped metallic impurities.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/336 - Field-effect transistors with an insulated gate
H01L 29/78 - Field-effect transistors with field effect produced by an insulated gate
The present invention is a device for manufacturing a silicon single crystal by the CZ method, the device comprising: a chamber in which a quartz crucible and a heater for heating and melting a silicon polycrystalline raw material in the quartz crucible to obtain a raw material melt are disposed; a gas introduction pipe; and a gas exhaust pipe. The gas exhaust pipe has a plurality of pipes each having a joint part, and a pipe clamp that can be liquid-cooled by cooling water passing therethrough. The joint parts of the plurality of pipes face each other with a sealing material interposed therebetween, and the plurality of pipes are connected to each other by the facing joint parts being sandwiched by the pipe clamp. The sealing material between the joint parts can be cooled by the liquid cooling of the pipe clamp. As a result, a CZ silicon single crystal manufacturing device is provided in which the gas exhaust pipe is easy to handle and the deterioration of the sealing material between the pipes can be prevented.
The present invention provides a method for manufacturing an SiC substrate 100, the method being characterized by comprising: a bonding step in which a 3C-SiC layer 1a of a growth substrate 21 that is obtained by growing the 3C-SiC layer 1a on a silicon substrate 1 is bonded to a poly SiC substrate, which is a support substrate 3, thereby obtaining a bonded substrate 10; a removal step in which the silicon substrate 1 is removed from the bonded substrate 10; and a heat treatment step in which the bonded substrate 10 after the removal step is further subjected to a heat treatment so as to cause a phase transition of the 3C-SiC layer 1a, thereby obtaining an SiC substrate 100 which has a SiC layer 1b having a plane orientation that is different from the plane orientation before the heat treatment. Consequently, there is provided a method for manufacturing an SiC substrate that is capable of achieving both a larger diameter and various types of SiC.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/265 - Bombardment with wave or particle radiation with high-energy radiation producing ion implantation
42.
METHOD FOR APPLYING RESIN TO WAFER AND METHOD FOR MANUFACTURING WAFER
The present invention pertains to a resin applying method for applying a resin to a wafer, the method being characterized by comprising: preparing a wafer having a first main surface and a second main surface which is the reverse side of the first main surface; holding the second main surface of the wafer by a holding means; supplying a resin at the position opposite to the first main surface of the wafer; measuring the temperature of the resin or around the resin; referring to data of temperatures and press speeds, which are acquired in advance and at which the thickness of the resin and the press load each become a prescribed value, and selecting a press speed corresponding to the measured temperature; driving the holding means at the selected press speed to press and spread the resin on the first main surface of the wafer; stopping the holding means at a timing when the press load reaches the prescribed value; and curing the resin to form a flattened resin layer. As a result, provided are a method for applying a resin to a wafer, in which the resin thickness variation is suppressed, and a method for manufacturing a wafer, in which the wafer shape variation after grinding or after polishing is suppressed.
The present invention is a method for manufacturing a nitride semiconductor substrate that comprises a group III nitride layer including a group III nitride underlayer and a gallium nitride epitaxial layer on a Si substrate, the method comprising: a pre-flow step of supplying a gas containing an Al raw material and not containing a nitrogen raw material on a Si substrate that is heated to 1000°C or higher, using a Si 110 substrate; an underlayer formation step of supplying a gas containing a group III raw material and a nitrogen raw material to form the group III nitride underlayer on the Si substrate; and an epitaxial layer formation step of supplying a gas containing a Ga raw material and a nitrogen raw material to form the gallium nitride epitaxial layer. As a result, the present invention provides a method for manufacturing a nitride semiconductor substrate in which a Si 110 substrate is used, said nitride semiconductor substrate comprising a gallium nitride epitaxial layer having excellent surface morphology.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
44.
CYLINDRICAL GRINDING MACHINE AND CYLINDRICAL GRINDING METHOD
The present invention provides a cylindrical grinding machine which is capable of supporting a crystal rod regardless of the presence or absence of a conical cone portion and a tail portion at the two ends of the crystal rod, and which additionally comprises a discriminator capable of automatically discriminating between the presence or absence of the cone portion, etc., and a controller in which set values are registered separately depending on whether the cone portion, etc., are present or absent during traverse grinding, for a clamping force with which the crystal rod is clamped by a pair of support units and a maximum griding allowance per operation of a grinding unit, wherein the controller automatically selects a grinding recipe that includes the set values of the clamping force and the maximum griding allowance per operation, corresponding to the presence or absence of the cone portion, etc., as discriminated automatically by the discriminator, and traverse grinding can be automatically performed on the basis of the grinding recipe. The present invention thereby provides a cylindrical grinding machine and a cylindrical grinding method with which, when performing traverse grinding of a crystal rod, grinding can be performed efficiently and at low cost, and with a stable quality by preventing the occurrence of positional displacement and breakage of the crystal rod.
B24B 5/02 - Machines or devices designed for grinding surfaces of revolution on work, including those which also grind adjacent plane surfacesAccessories therefor involving centres or chucks for holding work
The present invention is a high mobility substrate characterized by comprising a semiconductor substrate, a first δ-doped layer having a band gap larger than that of the semiconductor substrate on the semiconductor substrate, a thin film of the same material as the semiconductor substrate on the first δ-doped layer, and a second δ-doped layer having a band gap larger than that of the semiconductor substrate on the thin film, the high mobility substrate being structured such that the thin film is sandwiched between the first δ-doped layer and the second δ-doped layer. In this way, a high mobility substrate and a method for manufacturing a high mobility substrate are provided that are practical and make uniform creation on the entire surface of a substrate having a large area possible, while achieving high mobility.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/316 - Inorganic layers composed of oxides or glassy oxides or oxide-based glass
46.
METHOD FOR PRODUCING JOINED SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention is a method for producing a joined substrate by directly joining the surfaces of two substrates to each other, said method comprising: a step for preparing two substrates, with an average surface roughness Ra and surface free energy of the surfaces to be directly joined being used as criteria; and a step for directly joining the two substrates prepared. In the step for preparing the two substrates, the substrates are prepared such that the surfaces to be directly joined have an average surface roughness Ra of 1 nm or less and such that a contact angle between water and the surfaces to be directly joined, which serves as an index of the surface free energy, is not more than 70°. The present invention thus provides a joined substrate production method that makes it possible to reduce the occurrence of joining defects in a joining technique.
The present invention is a polishing cloth cleaning method in which, in a wafer polishing machine having a surface plate, a horn-type ultrasonic wave generation device is used to clean the inside of a polishing cloth attached to the surface plate by transmitting ultrasonic waves to the inside of the polishing cloth while supplying a cleaning liquid such that a water seal is formed between the polishing cloth and the tip end of a horn, wherein the amplitude of the ultrasonic waves is 10-40 μm. The present invention thereby provides a cleaning method that cleans the inside of the polishing cloth without damaging the surface of the polishing cloth and that clears clogging caused by accumulated matter inside the polishing cloth.
B24B 53/017 - Devices or means for dressing, cleaning or otherwise conditioning lapping tools
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
B24B 37/24 - Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
The present invention provides a method for manufacturing a semiconductor substrate, the method comprising: an ion implantation step in which ions of at least one of silicon, carbon, and oxygen are implanted into the surface of a 4H-SiC substrate, and an amorphous layer in which silicon and carbon have been amorphized is formed in the 4H-SiC substrate; a joining step in which the 4H-SiC substrate that has been subjected to the ion implantation step and another supporting substrate are joined to each other with a thin film interposed therebetween so as to obtain a joined substrate; a separation step in which the 4H-SiC substrate is separated from the joined substrate at the amorphous layer so as to separate the joined substrate into a bonded substrate in which the surface layer of the 4H-SiC substrate is transferred onto the supporting substrate and a separated substrate that is the 4H-SiC substrate left after the separation of the surface layer; an etching step in which the separation surface of at least one of the bonded substrate and the separated substrate after the separation step is subjected to plasma etching; and an epitaxial step in which at least one of the bonded substrate and the separated substrate is subjected to epitaxial growth. As a result, the present invention provides a method for manufacturing a semiconductor substrate, with which it is possible to manufacture a semiconductor substrate of higher quality at lower cost.
The present invention pertains to an epitaxial wafer having a silicon epitaxial film on a silicon single-crystalline substrate having a resistivity of 10-5000 Ω·cm, wherein the carbon atom concentration in the silicon epitaxial film is at least 5×1017atoms/cm3and less than 2×1019atoms/cm3, and carbon defects are formed in the silicon epitaxial film. Accordingly, an epitaxial wafer and an SOI wafer and a method for manufacturing same are provided, wherein the wafers can be manufactured with a small number of processes and easy processing processes without using a high-resistivity substrate and harmonics are more reliably reduced.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
50.
SEMICONDUCTOR SUBSTRATE PRODUCTION METHOD, SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR DEVICE
The present invention is a method for producing a semiconductor substrate, said method comprising: a laser irradiation step for irradiating the surface of a 4H-SiC substrate with a laser beam and forming, within the 4H-SiC substrate, an amorphous layer obtained by amorphization of silicon and carbon; a joining step for joining, via a thin film, another support substrate and the 4H-SiC substrate which has been subjected to the laser irradiation step to obtain a joined substrate; a separation step for separating the 4H-SiC substrate at the amorphous layer of the joined substrate to cause separation into a bound substrate in which the surface layer of the 4H-SiC substrate as a 4H-SiC layer is transferred onto the support substrate and a separated substrate which has been obtained by separating the surface layer from the 4H-SiC substrate; an etching step for performing plasma etching on at least one of the separation surfaces of the bound substrate and of the separated substrate after the separation step; and an epitaxial step for performing epitaxial growth on at least one of the bound substrate and the separated substrate. Thus, a semiconductor substrate production method that makes it possible to produce a more inexpensive, high-quality semiconductor substrate is provided.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
B23K 26/57 - Working by transmitting the laser beam through or within the workpiece the laser beam entering a face of the workpiece from which it is transmitted through the workpiece material to work on a different workpiece face, e.g. for effecting removal, fusion splicing, modifying or reforming
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a defect evaluation method for a semiconductor substrate, the method being characterized by comprising: a first step for detecting defects on surfaces of a plurality of semiconductor substrates; a second step for acquiring microscopic images of the defects; a third step for conducting a component analysis as to whether the defects are Ni defects; a fourth step for classifying the types of the defects on the basis of the microscopic images and the result of the component analysis; a fifth step for machine-learning the microscopic images of the various types of the defects classified in the fourth step, by an image classification means; a sixth step for estimating the types of unknown defects by applying the image classification means subjected to machine learning in the fifth step, to microscopic images of the unknown defects; and a seventh step for stratifying and integrating the types of the unknown defects estimated in the sixth step into the Ni defects and non-Ni defects. Thus, a method for easily evaluating Ni defects on surfaces of semiconductor substrates is provided.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 23/2208 - Combination of two or more measurements, at least one measurement being that of secondary emission, e.g. combination of secondary electron [SE] measurement and back-scattered electron [BSE] measurement all measurements being of secondary emission, e.g. combination of SE measurement and characteristic X-ray measurement
G01N 23/2252 - Measuring emitted X-rays, e.g. electron probe microanalysis [EPMA]
52.
METHOD FOR MANUFACTURING 3C-SiC SINGLE-CRYSTAL EPITAXIAL SUBSTRATE, METHOD FOR MANUFACTURING 3C-SiC FREE-STANDING SUBSTRATE, AND 3C-SiC SINGLE-CRYSTAL EPITAXIAL SUBSTRATE
A method for manufacturing a 3C-SiC single-crystal epitaxial substrate according to the present invention is characterized by comprising: a hydrogen baking step for annealing a single-crystal silicon substrate in a hydrogen atmosphere to remove a natural oxide film on the surface of the single-crystal silicon substrate; an epitaxial step for performing a carbonization process on the surface of the single-crystal silicon substrate after the hydrogen baking step to generate SiC nuclei, and epitaxially growing a 3C-SiC single-crystal film using the generated nuclei as origins to obtain a 3C-SiC single-crystal epitaxial substrate; and a diffusion step for heating the 3C-SiC single-crystal epitaxial substrate to a temperature lower than the melting point of Si in a gas atmosphere containing carbon to cause solid-state diffusion of Si in the single-crystal silicon substrate to the interface between the 3C-SiC single-crystal film and the single-crystal silicon substrate, and further growing SiC through a solid phase reaction between the diffused Si and C that has reached the interface to form, at the interface with respect to the 3C-SiC single-crystal film in the single-crystal silicon substrate, a vacancy layer having vacancy generated at sites where Si has diffused. Accordingly, provided is a method for manufacturing a 3C-SiC single-crystal epitaxial substrate from which it is possible to obtain a large diameter 3C-SiC free-standing substrate through a simple manufacturing process.
The present invention provides a method for producing an epitaxial substrate, wherein: a single crystal Si substrate having a thickness of 1,500 µm or more is used; the epitaxial growth of a group III nitride epitaxial layer on the single crystal Si substrate and the measurement of a warp of the thus-obtained epitaxial substrate are performed using the resistivity of the single crystal Si substrate and the ratio a ((thickness of the single crystal Si substrate)/(thickness of the group III nitride epitaxial layer)) as parameters while varying the parameters; a correlation between the ratio a and the warp of the epitaxial substrate is determined for every resistivity of the single crystal Si substrate, and production parameters at which the absolute value of the warp of the epitaxial substrate becomes 50 µm or less are determined from the correlation; and a group III nitride epitaxial layer is epitaxially grown on the single crystal Si substrate with use of the thus-determined production parameters. Consequently, the present invention provides: an epitaxial substrate which has high pressure resistance characteristics and satisfies the formula |warp| ≤ 50 µm; and a production method by which such an epitaxial substrate can be obtained.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
This method for producing a heteroepitaxial substrate is characterized by comprising: a substrate production step in which a single-crystal silicon substrate is produced in a thickness which exceeds the upper limit of standard thicknesses corresponding to the substrate diameter but is not larger than 2 mm; an epitaxial step in which a heteroepitaxial layer is grown on the single-crystal silicon substrate obtained in the substrate production step, thereby obtaining an epitaxial substrate; and a thinning step in which the surface of the single-crystal silicon substrate having undergone the epitaxial step that is on the reverse side from the surface where the heteroepitaxial layer has been formed is ground to thin down the single-crystal silicon substrate to a thickness within the range of standard thicknesses. Due to the configuration, a heteroepitaxial substrate which can be introduced into existing device processes can be produced by this method even when a heteroepitaxial layer has been formed on a single-crystal silicon substrate having a thickness exceeding the standard thicknesses.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a heteroepitaxial single-crystal-silicon substrate for growing a heteroepitaxial layer on the surface, wherein said heteroepitaxial single-crystal-silicon substrate is characterized by satisfying one or more of the four conditions indicated below. What is provided thereby is a heteroepitaxial single-crystal-silicon substrate that can minimize the incidence of warping or cracking when growing a heteroepitaxial layer. Condition 1: A dopant content of at least 1.0×1016atoms/cm3Condition 2: An oxygen content of at least 5.0×1017atoms/cm3Condition 3: A nitrogen content of at least 5.0×1015atoms/cm3Condition 4: A carbon content of at least 5.0×1015atoms/cm 3 or greater
y1 − yx1 − x1 − xP (where 0.4 ≤ x ≤ 0.6 and 0 ≤ y ≤ 0.5) is sandwiched between a first clad and a second clad; an upper electrode; and a lower electrode, the polarity of which is different from that of the upper electrode. The micro-LED element is characterized in that the light emitting element structure, the upper electrode and the lower electrode are disposed in a first surface of the micro-LED element, the upper electrode is disposed over the light emitting element structure, and the lower electrode is disposed in a position where the light emitting element structure is not existent so that the periphery of the lower electrode is surrounded by the light emitting element structure. Thus, provided is a micro-LED element which has a dimension of each side of less than 100 μm and has, in the same surface, an AlGaInP-based light emitting element structure and two electrodes differing in polarity and which can be inhibited or prevented from suffering (die) breakage.
H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01L 33/36 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the electrodes
57.
MICRO-LED STRUCTURAL BODY AND MANUFACTURING METHOD FOR SAME
y1-yx1-x1-xP (0.4≤x≤0.6, 0≤y≤0.5). The light emission element structure is bonded to a transparent substrate which is transparent with respect to a light emission wavelength and an LLO transfer laser beam, by means of a bonding material or an adhesive agent which is transparent with respect to the light emission wavelength and which absorbs the LLO transfer laser beam. The light emission element structure is subjected to element-isolation. The element-isolated light emission element structure has at least two electrodes with different polarities on one surface thereof. The longitudinal direction of the outer shape of the element-isolated light emission element structure in a plan view does not coincide with a crystal orientation <110>. Accordingly, provided is a micro-LED structural body which is formed by bonding a light emission element structure having an AlGaInP-based active layer and a transparent substrate via a bonding agent or an adhesive agent, and which makes it possible to minimize or prevent cracking of the micro-LED structural body when transferred in an LLO process.
H01L 33/16 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
G09F 9/33 - Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
The present invention is a semiconductor epitaxial substrate manufacturing method characterized by comprising: an ion implantation step for implanting H+ into the surface of a 4H-SiC substrate; and an epitaxial growth step for epitaxially growing 4H-SiC on the surface of the 4H-SiC substrate subjected to the ion implantation step. Consequently, provided is a semiconductor epitaxial substrate manufacturing method by which forward-direction degradation due to the expansion of dislocation can be easily suppressed.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/329 - Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors the devices comprising one or two electrodes, e.g. diodes
The present invention is a method for evaluating a defect position in the depth direction of a wafer using X-ray topography (XRT), the wafer having a front surface and a back surface, the method characterized by comprising: a step for causing X-rays to enter the front surface from a right direction and a left direction at incident angles such that a diffraction condition is satisfied, to acquire two XRT images on the back surface of the wafer for a right-eye image and a left-eye image; an alignment step for aligning the acquired two XRT images at a defect position on either the front surface or the back surface; and a defect position determination step for determining another defect position having a different depth direction of the wafer on the basis of a shift between the right-eye image and the left-eye image. Thus, a method for evaluating a defect position in the depth direction of a wafer is provided through a simple method using X-ray topography (XRT).
G01N 23/205 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using diffraction of the radiation by the materials, e.g. for investigating crystal structureInvestigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using scattering of the radiation by the materials, e.g. for investigating non-crystalline materialsInvestigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using reflection of the radiation by the materials using diffraction cameras
H01L 21/66 - Testing or measuring during manufacture or treatment
60.
SILICON WAFER FOR EPITAXIAL GROWTH AND EPITAXIAL WAFER
The present invention is a silicon wafer for epitaxial growth, the silicon wafer being characterized by being composed of a silicon single crystal which is obtained by means of the Czochralski method, and in which the size and density of oxygen precipitation nuclei are adjusted, in the entire neutral (N) region not including voids and dislocation clusters, wherein the density of the oxygen precipitation nuclei having a size of at least 18 nm in the silicon wafer is less than 5×107/cm3. Consequently, provided is a silicon wafer for epitaxial growth from which defects have been suppressed and which has extremely excellent surface layer quality.
The present invention provides a substrate for high frequency devices, the substrate being obtained by forming a nitride semiconductor film on an SOI substrate, wherein: the SOI substrate is a TRSOI substrate wherein a trap rich layer, which is formed on a base substrate, and an SOI layer, which is formed of a silicon single crystal, are bonded to each other, with an oxide film being interposed therebetween; and the SOI layer has a resistivity of 1 kΩ∙cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less. Consequently, the present invention provides: a substrate for high frequency devices having excellent high frequency characteristics; and a method for producing this substrate for high frequency devices.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
62.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR EPITAXIAL WAFER, AND COMPOSITE SUBSTRATE FOR NITRIDE SEMICONDUCTOR EPITAXIAL WAFER
The present invention is a method for manufacturing a nitride semiconductor epitaxial wafer that comprises: a composite substrate comprising a ceramic-containing substrate and a single-crystal layer bonded to the ceramic-containing substrate; and a nitride semiconductor layer epitaxially grown on the composite substrate. The method includes: a step in which, as the composite substrate, a composite substrate is prepared that is provided with a ceramic-containing substrate with a coefficient of thermal expansion within ±10% of the coefficient of thermal expansion of the nitride semiconductor layer, and that has a shape which satisfies the conditions −150 < Bow (μm) ≤ 40, Warp (μm) < 150, and Warp (μm) < 90 − Bow (μm) shape; a step in which an intermediate layer that imparts compressive stress to the nitride semiconductor layer is formed on the single-crystal layer of the composite substrate; and a step in which the nitride semiconductor layer is epitaxially grown on the intermediate layer. The film thickness of the intermediate layer is adjusted so that the nitride semiconductor epitaxial wafer has a shape that satisfies the conditions Warp (μm) < 50 and |Bow (μm)| ≤ 40. This provides a method for manufacturing a nitride semiconductor epitaxial wafer with low curvature and no cracking or peeling.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
63.
BONDING DEFECT REMOVAL METHOD FOR BONDED WAFER AND METHOD FOR MANUFACTURING BONDED WAFER
y1-yx1-x1-xP(0.4 ≤ x ≤ 0.6, 0 ≤ y ≤ 0.5), and said transparent substrate transmitting light of a light-emitting wavelength, wherein the bonded wafer is introduced into a plasma atmosphere, and the defects of the thermosetting bonding member where curing is insufficient are removed by being selectively destroyed. Thus, there is provided a bonding defect removal method for a bonded wafer, said method making it possible to remove curing defects from a bonded wafer in which a transparent substrate and a light-emitting element structure that has an active layer of an AlGaInP type are bonded with a thermosetting bonding member interposed therebetween, without using techniques such as measuring or the like.
The present invention relates to a method for producing a bonded light-emitting element wafer having removed therefrom a defective part, the method being characterized by comprising: a step in which a light-emitting element structure that is to become a micro LED, and a substrate to be bonded, which is transparent with respect to an LLO transfer laser beam, are bonded to each other by an adhesive which absorbs the LLO transfer laser beam, thereby obtaining a bonded wafer; a step in which the bonded wafer is optically examined for defective parts so as to form map data for removal; and a step in which, on the basis of the map data for removal, a defective part in the bonded wafer is irradiated with a laser beam for removal, a portion of the light-emitting element structure included in the defective part is sublimated, and thereby, the portion of the light-emitting element structure included in the defective part is removed and a bonded light-emitting element wafer is obtained. Accordingly, the present invention provides a method for producing a bonded light-emitting element wafer, the method being capable of producing a bonded light-emitting element wafer by selectively removing a defective part of a light-emitting element structure which is to become a micro LED and is bonded to a bonding-subject wafer by an adhesive.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 33/08 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
65.
MICRO-LED CHARACTERISTICS EVALUATION WAFER AND MICRO-LED CHARACTERISTICS EVALUATION METHOD
The present invention provides a micro-LED characteristics evaluation wafer characterized by comprising a GaAs substrate, a micro-LED that is disposed on the GaAs substrate and has sides each measuring less than or equal to 100 μm, a pad-base portion adjacent to the micro-LED, an upper electrode pad on the micro-LED and the pad-base portion, and a lower electrode pad on the GaAs substrate in the vicinity of the micro-LED, wherein the micro-LED and the pad-base portion are connected with an insulating portion therebetween. This makes it possible to provide a micro-LED characteristics evaluation wafer with which it is possible to form a micro-LED-sized element in an epitaxial wafer state, and to evaluate energization characteristics, thus making it possible to perform transient characteristics evaluation without disconnection during environmental testing.
The present invention is a susceptor for performing epitaxial growth on a wafer that has a main surface (110), the susceptor for epitaxial growth comprising a pocket for placing the wafer, and a peripheral part that surrounds the pocket, and being characterized in that the peripheral part is provided with a flat part and a protrusion, said protrusion being a portion adjacent to the pocket and having a portion that protrudes from an upper surface of the flat portion, and the pocket is designed so that when the wafer is placed in the pocket, the height of the upper surface of the wafer is positioned above the height of the upper surface of the flat portion. Thus, there is provided a susceptor for expitaxial growth with which it is possible to manufacture a high-flatness (110) epitaxial wafer, using a wafer (substrate) where (110) is the main surface.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
H01L 21/683 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for supporting or gripping
67.
SINGLE CRYSTAL SILICON SUBSTRATE EQUIPPED WITH NITRIDE SEMICONDUCTOR LAYER, AND METHOD FOR MANUFACTURING SINGLE CRYSTAL SILICON SUBSTRATE EQUIPPED WITH NITRIDE SEMICONDUCTOR LAYER
The present invention is a single crystal silicon substrate equipped with a nitride semiconductor layer, said substrate including: a single crystal silicon substrate; a 3C-SiC single crystal film that has been epitaxially grown on the single crystal silicon substrate; and a nitride semiconductor layer that has been epitaxially grown on the 3C-SiC single crystal film. The single crystal silicon substrate equipped with a nitride semiconductor layer is characterized in that dislocations are formed throughout the entire single crystal silicon substrate, the length (dislocation length) when the dislocations are projected in a planar manner onto the single crystal silicon substrate is 1 mm or greater, and the dislocation density is 10/cm2 or greater. Through the above, provided are: a large diameter single crystal silicon substrate equipped with a nitride semiconductor layer, the diameter thereof being about 200 mm or 300 mm, and said substrate exhibiting reduced warping and no particular cracking when a Si substrate having an ordinary thickness is used therein; and a method for manufacturing a single crystal silicon substrate equipped with a nitride semiconductor layer.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a method for determining the presence or absence of debris around a hard laser mark, after forming the hard laser mark on the backside of a wafer, or after forming the hard laser mark and polishing the backside of the wafer, said method characterized by: after measuring a thickness variation parameter of the wafer with a flatness measuring device, extracting statistical data regarding the thickness variation parameter in an area (hereinafter referred to as "area A") including the hard laser mark, and extracting statistical data regarding the thickness variation parameter in an area (hereinafter referred to as "area B") adjacent to the area A; comparing the statistical data regarding the area A and the area B to calculate the difference therebetween; and if the difference is equal to or greater than a predetermined threshold, determining that debris is present. A debris determination method that can accurately detect local thickness changes due to debris is thus provided.
The present invention is a nitride semiconductor substrate comprising: a silicon substrate having a resistivity of 1000 Ω•cm or more or a base substrate equipped on the surface thereof with a silicon layer having a resistivity of 1000 Ω•cm or more; and a group III nitride semiconductor thin film epitaxially formed on the silicon substrate or the silicon layer. The nitride semiconductor substrate is characterized in that the average value of the carbon concentration within the group III nitride semiconductor thin film is 3E + 18 atoms/cm3 or less. It is thus possible to provide a nitride semiconductor substrate with high thermal conductivity and little high-frequency loss, and a method for producing the same.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a method for producing a bonded wafer for micro LEDs, the method comprising: a step for forming an epitaxial layer by epitaxially growing an AlGaInP first cladding layer, an active layer and a second cladding layer on a GaAs substrate; a step for growing a GaP window layer on the second cladding layer; a step for bonding the Gap window layer and a transparent substrate by the intermediary of a thermosetting bonding member; a step for separating GaAs substrate; a step for separating the epitaxial layer into a micro LED element; a step for having the second cladding layer or the GaP window layer of the micro Led element exposed; a step for forming an electrode; a step for bonding the electrode to a transfer substrate; and a step for separating the transparent substrate and the micro LED element from each other by means of laser irradiation from the transparent substrate side. With respect to this method for producing a bonded wafer for micro LEDs, the thickness of the GaP window layer is set to 6 µm or more. Consequently, the present invention provides a method for producing a bonded wafer for AlGaInP micro LEDs, the method being ameliorated in terms of yield decrease due to cracking of a micro LED element during the LLO step.
H01L 33/30 - Materials of the light emitting region containing only elements of group III and group V of the periodic system
H01S 5/323 - Structure or shape of the active regionMaterials used for the active region comprising PN junctions, e.g. hetero- or double- hetero-structures in AIIIBV compounds, e.g. AlGaAs-laser
71.
METHOD FOR PRODUCING SILICON SUBSTRATE FOR QUANTUM COMPUTERS, SILICON SUBSTRATE FOR QUANTUM COMPUTERS, AND SEMICONDUCTOR DEVICE
The present invention provides a method for producing a silicon substrate for quantum computers, the method comprising: a step for forming an Si epitaxial layer on a silicon substrate by performing epitaxial growth using, as a silicon-based material gas, an Si source gas in which the total content of 28Si and 30Si relative to the all silicon contained in the silicon-based material gas is 99.9% or more; a step for forming a δ-doped layer of oxygen (O) by oxidizing the surface of the Si epitaxial layer; and a step for forming an Si epitaxial layer on the δ-doped layer by performing epitaxial growth with use of an Si source gas in which the total content of 28Si and 30Si relative to the all silicon contained in the silicon-based material gas is 99.9% or more. Consequently, the present invention provides: a silicon substrate for quantum computers, the silicon substrate being capable of suppressing the influence of 29Si, thereby being capable of suppressing the influence of nuclear spin; and a method for producing this silicon substrate for quantum computers.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
72.
METHOD FOR MANUFACTURING 3C-SIC LAMINATED SUBSTRATE, 3C-SIC LAMINATED SUBSTRATE, AND 3C-SIC INDEPENDENT SUBSTRATE
The present disclosure provides a method for manufacturing a 3C-SiC laminated substrate, the manufacturing method being characterized by comprising: a step in which a 3C-SiC single crystal film is epitaxially grown on a first single crystal silicon substrate; a step in which a support substrate is pasted to the upper surface of the 3C-SiC single crystal film; and a step in which the first single crystal silicon substrate is removed so as to manufacture a 3C-SiC laminated substrate. The purpose of the aforementioned is to provide a method for manufacturing a 3C-SiC laminated substrate. In particular, a method is provided by which a 3C-SiC laminated substrate having a large diameter such as 200 mmφ or 300 mmφ is obtained.
The present invention provides a method for manufacturing an epitaxial wafer in which a single crystal silicon epitaxial layer is formed on a single crystal silicon wafer, the method being characterized by comprising: a step for removing a natural oxide film from the surface of the single crystal silicon wafer; a step for forming an oxide film on the surface of the single crystal silicon wafer by using an oxidizing solution after the step for removing the natural oxide film; a step for forming an oxygen atomic layer by thinning the oxide film after forming the oxide film; and a step for epitaxially growing single crystal silicon on the surface of the single crystal silicon wafer having the oxygen atomic layer after forming the oxygen atomic layer. Thereby, it is possible to provide a method for manufacturing an epitaxial wafer that can stably and easily introduce an oxygen atomic layer into an epitaxial layer and that can manufacture an epitaxial wafer having a high-quality single crystal silicon epitaxial layer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
74.
MEMBER WITH HEAT SPREADER STRUCTURE AND METHOD FOR PRODUCING SAME
The present invention provides a member 34 with a heat spreader structure, the member comprising: a substrate member 31 that is provided with an integrated circuit part 10; and a heat spreader structure part 9 that is formed on the integrated circuit part 10. This member with a heat spreader structure is characterized in that: the integrated circuit part 10 forms a relief pattern; the heat spreader structure part 9 is obtained by providing a diamond layer 6 with a relief pattern that fits into the relief pattern of the integrated circuit part 10, or alternatively obtained by providing a silicon substrate 8, on which a diamond layer 6 is formed, with a relief pattern that fits into the relief pattern of the integrated circuit part 10; and the heat spreader structure part 9 is bonded to the substrate member 31 by having the relief pattern of the heat spreader structure part 9 fitted into the relief pattern of the integrated circuit part 10. Consequently, the present invention provides a heat dissipation structure that has a higher efficiency.
The present invention is a bonded light-emitting element wafer in which a light-emitting element epitaxial wafer that has an epitaxial layer including an active layer and a transparent substrate that is transparent with respect to visible light and transparent with respect to ultraviolet light are bonded via an adhesive layer which is transparent with respect to visible light but non-transparent with respect to ultraviolet light, wherein the height by which a spike-shaped inclusion existing in the epitaxial layer protrudes from the epitaxial layer is not more than the thickness of the adhesive layer. Thus, provided is a bonded light-emitting element wafer in which an epitaxial wafer that has a spike-shaped inclusion is bonded to a transparent substrate that is transparent with respect to visible light and transparent with respect to ultraviolet light, via an adhesive layer that is transparent with respect to visible light but non-transparent with respect to ultraviolet light, wherein the range of a defective part that occurs due to the spike-shaped inclusion is small.
The present invention is a method for growing a diamond layer via microwave plasma CVD, said method being characterized by comprising a step for disposing a substrate 2 inside a reaction vessel 1 of a microwave plasma CVD device 10, a step for introducing a raw material gas (reaction gas) 6 into the reaction vessel 1, and a step for irradiating a surface of the substrate 2 with microwave plasma to grow a diamond layer on the surface of the substrate 2, wherein, in the step for growing the diamond layer, the substrate 2 is moved in a direction parallel to the surface of the substrate 2, and/or the irradiation position of the microwave plasma is moved in a direction parallel to the surface of the substrate 2. This method provides a large-diameter diamond substrate.
C23C 16/511 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention is a method for manufacturing a light-receiving element, the method comprising: a step for using an epitaxial wafer (10), in which an InP buffer layer (2), an InGaAs light absorption layer (3), and an InP cap layer (4) have been grown on an InP substrate (1), and forming an InGaAs contact layer (5A) on the InP cap layer (4); a step for removing a portion of the InGaAs contact layer (5A) by a photolithography method to form an InGaAs contact part (5B); a step for forming a protective film (6) so as to cover the InP cap layer (4) and the InGaAs contact part (5B); a step for forming an opening pattern part on a portion of the protective film (6); a step for diffusing impurities into the opening pattern part in a phosphorus-containing atmosphere; a step for selectively removing, using a strongly basic aqueous solution, phosphorus precipitates attached to the surface in the step for diffusing impurities; and a step for forming an electrode on the InGaAs contact part (5B) and the rear surface of the InP substrate (1). Consequently, provided is a method which is for manufacturing a light-receiving element and by which only phosphorus precipitates precipitated on a wafer surface can be selectively etched.
H01L 31/10 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
78.
NITRIDE SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING SAME
The present invention relates to a nitride semiconductor wafer comprising a silicon-based substrate, a buffer layer that comprises a nitride semiconductor and is laminated on the silicon-based substrate; and a functional layer that includes at least a GaN layer and is laminated on the buffer layer, the nitride semiconductor wafer being characterized in that: the buffer layer is doped with Fe; the Fe concentration distribution in the lamination direction of the buffer layer has a point where the Fe concentration is the highest, and the Fe concentration decreases from the point where the Fe concentration is the highest toward the functional layer; the Fe concentration at the point where the Fe concentration is the highest is 2.5×1018atoms/cm3to 6.0×1018atoms/cm3inclusive; and the Fe concentration in an upper surface of the functional layer side of the buffer layer is 4.0×1017atoms/cm3 or less. The present invention thus provides a nitride semiconductor wafer in which warping is suppressed.
The present invention provides a method for producing a bonded light-emitting element wafer wherein a light-emitting element structure that serves as a micro-LED and a substrate to be bonded are bonded to each other by the intermediary of an adhesive, the method comprising: a step in which a light-emitting element structure and a substrate to be bonded are bonded to each other by the intermediary of an adhesive, thereby obtaining a bonded wafer; a step in which the bonded wafer is optically examined for defective parts so as to form map data for removal; and a step in which a defective part of the bonded wafer is irradiated with a laser light beam for removal from the substrate to be bonded side on the basis of the map data for removal so that the adhesive contained in the defective part is sublimated by absorbing the laser light beam for removal, thereby removing a part of the light-emitting element structure contained in the defective part so as to obtain a bonded light-emitting element wafer. Consequently, the present invention provides a method for producing a bonded light-emitting element wafer, the method being capable of producing a bonded light-emitting element wafer by selectively removing a defective part of a light-emitting element structure.
H01L 21/66 - Testing or measuring during manufacture or treatment
B23K 26/00 - Working by laser beam, e.g. welding, cutting or boring
B23K 26/57 - Working by transmitting the laser beam through or within the workpiece the laser beam entering a face of the workpiece from which it is transmitted through the workpiece material to work on a different workpiece face, e.g. for effecting removal, fusion splicing, modifying or reforming
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
The present invention is a method for producing a heteroepitaxial wafer in which a 3C-SiC single crystal film is heteroepitaxially grown on a single crystal silicon substrate, said method comprising: a first step for removing a natural oxide film on a surface of a single crystal silicon substrate by hydrogen baking using a low-pressure CVD device; a second step for forming a SiC nucleus on the single crystal silicon substrate at a pressure of 13-13,332 Pa and a temperature of 600-1200℃ while supplying a source gas containing carbon; and a third step for growing a SiC single crystal at a pressure of 13-13,332 Pa and a temperature of not less than 800°C but less than 1200°C, while supplying a source gas containing carbon and silicon, to form a 3C-SiC single crystal film. Thus, provided is a method for producing a heteroepitaxial wafer that makes it possible to efficiently epitaxially grow a good 3C-SiC single crystal film on a single crystal silicon substrate.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
The present invention provides a method for producing a silicon single crystal by a CZ process that uses a cusp magnetic field that is formed by an upper coil and a lower coil, the coils being provided in a pulling furnace. This method for producing a silicon single crystal is characterized in that a silicon single crystal is pulled in a straight body formation step, while setting the rotation rate of a silicon single crystal to 7 rpm to 12 rpm, the rotation rate of a quartz crucible to 1.0 rpm or less, the position of the magnetic field minimum plane of the cusp magnetic field within the range from 10 mm below the surface of the raw material melt to 5 mm above the surface of the raw material melt, and the magnetic field strength of the cusp magnetic field at the intersection point of the inner wall of the quartz crucible and the plane that is level with the magnetic field minimum plane to 800 G to 1,200 G. Consequently, the present invention provides a method for efficiently producing a silicon single crystal which has a lower oxygen concentration than ever before, while having a good in-plane distribution of the oxygen concentration.
The present invention is a semiconductor wafer manufacturing method characterized by having: (1) a process of forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) a process of obtaining a laminated wafer by forming a carbon-non-doped silicon film on the carbon-doped silicon film at the first temperature; and (3) a process of obtaining a semiconductor wafer by annealing the laminated wafer at a second temperature higher than the first temperature or by further forming a film on the laminated wafer at the second temperature. Accordingly, provided is a method for manufacturing a semiconductor wafer having a carbon-containing silicon layer in which there is no deposition of SiC on the wafer surface and other defects are also suppressed.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/324 - Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
The present invention provides a resistivity measurement method for measuring, by a capacitance-voltage (C-V) method, the resistivity of an epitaxial (EP) layer formed in an epitaxial wafer (EPW) that has been manufactured using a low-resistivity substrate, the resistivity measurement method performing, with respect to an SEMI-converted resistivity obtained by measuring, with the C-V method, the resistivity of an EP layer to be measured, or with respect to a resistivity obtained by performing a predetermined conversion on the SEMI-converted resistivity, a conversion according to a first conversion formula and a conversion according to a second conversion formula to obtain a four-probe resistivity of the EP layer to be measured. The first conversion formula is determined by comparing a C-V resistivity, obtained by measuring, with the C-V method, a standard polished wafer (PW) to which a four-probe standard resistivity value is attached, with the four-probe standard resistivity. The second conversion formula is determined by comparing the C-V resistivities of the EP layers of a high-resistivity substrate EPW fabricated using a high-resistivity substrate having a resistivity measurable with the C-V method, and a low-resistivity substrate EPW fabricated using a low-resistivity substrate. Thus, it is possible to provide a resistivity measurement method having a novel resistivity conversion for tracing the C-V method to an international standard using a PW wafer.
H01L 21/66 - Testing or measuring during manufacture or treatment
G01N 27/00 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
G01N 27/06 - Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating impedance by investigating resistance of a liquid
84.
METHOD FOR DRY ETCHING SINGLE CRYSTAL SILICON WAFER, METHOD FOR PRODUCING SINGLE CRYSTAL SILICON WAFER, AND SINGLE CRYSTAL SILICON WAFER
22222 to 2.5 nm or more. Consequently, the present invention provides: a method for dry etching a single crystal silicon wafer, the method being capable of providing a silicon wafer with a roughened surface; and a method for producing a silicon wafer, wherein only one side of a silicon wafer is provided with a roughened surface.
The present invention pertains to a cylinder grinding machine that comprises: first and second detection means for detecting, in a non-contact manner, proximity between one end or the other end of a crystal rod and a spindle or a countershaft; and a drive mechanism which is capable of changing and adjusting the movement speed of a second support unit on the countershaft side. When one end of the crystal rod is to be supported through contact with the countershaft, a movement speed B of the second support unit during a period from when proximity between the one end and the countershaft is detected by the second detection means to when a contact for support takes place is so adjusted as to be slower than a movement speed A obtained until the detecting of proximity detection took place. Further, when the other end of the crystal rod is to be supported through contact with the spindle, a movement speed D during a period from when proximity between the other end and the spindle is detected by the first detection means to when a contact for support takes place is so adjusted as to be slower than a movement speed C obtained until the detecting of proximity took place. This configuration enables providing a cylinder grinding machine that makes it possible to minimize occurrences of breakage at terminal ends of a crystal rod and mechanical misalignment of a support unit during a loading process, to shorten the time required for the process, and to reduce the need for maintenance of portions for detecting the positional relation between the crystal rod and the spindle or the like.
B24B 5/04 - Machines or devices designed for grinding surfaces of revolution on work, including those which also grind adjacent plane surfacesAccessories therefor involving centres or chucks for holding work for grinding cylindrical surfaces externally
B24B 41/06 - Work supports, e.g. adjustable steadies
B24B 49/12 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving optical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
86.
METHOD FOR PRODUCING GROUND WAFER AND METHOD FOR PRODUCING WAFER
The present invention provides a method for producing a ground wafer, wherein a ground wafer is produced by grinding a starting material wafer that has a first main surface and a second main surface, the method comprising: a first resin bonding step in which a resin is bonded to the first main surface of the starting material wafer, thereby forming a first resin layer on the first main surface; a step in which the second main surface, on which the first resin layer is not present, is subjected to one-side grinding; a first resin layer removal step in which the first resin layer is removed; a step in which the first main surface is subjected to one-side grinding; a second resin bonding step in which a resin is bonded to the second main surface, thereby forming a second resin layer on the second main surface; a step in which the first main surface, on which the second resin layer is not present, is subjected to one-side grinding; a second resin layer removal step in which the second resin layer is removed; and a step in which the second main surface is subjected to one-side grinding. Consequently, the present invention provides: a method for producing a ground wafer for the purpose of improving nanotopography and warp level at the same time; and a method for producing a wafer, the method enabling the production of a wafer that has excellent quality such as excellent flatness.
B24B 41/06 - Work supports, e.g. adjustable steadies
B24B 7/22 - Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfacesAccessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
87.
SUBSTRATE FOR ELECTRONIC DEVICE, AND MANUFACTURING METHOD THEREFOR
The present invention is a substrate for an electronic device, the substrate being obtained by forming a nitride semiconductor film on a bonded substrate of a silicon single crystal, wherein: the bonded substrate is a substrate obtained by bonding, via an oxide film, a first silicon single crystal substrate having the (111) crystal plane orientation and a second silicon single crystal substrate having the (111) crystal plane orientation; and the film thickness of the oxide film is 2-470 nm. Consequently, provided is a substrate for an electronic device, the substrate being obtained by forming a nitride semiconductor on a silicon single crystal and having higher breaking strength.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
88.
RESISTIVITY MEASUREMENT DEVICE AND RESISTIVITY MEASUREMENT METHOD
The present invention is a resistivity measurement device for semiconductor wafers, characterized by comprising a mercury electrode unit provided with a mercury electrode as a measurement probe, and an inert gas supply means configured so as to cause an inert gas to flow to the mercury electrode unit from at least three directions. Thereby, a resistivity measurement device can be provided which makes it possible to inhibit deterioration of a mercury electrode due to mercury oxidization at a low cost, and to reliably measure semiconductor wafer resistivity for a long period of time.
The present invention is an epitaxial wafer in which an epitaxial film made of a semiconductor material that is different from silicon is formed on a silicon substrate. The epitaxial film has a film thickness of less than 1 at the outer peripheral part of the wafer when the film thickness at the central part of the wafer is 1. Due to this configuration, it is possible to provide an epitaxial wafer having a heteroepitaxial film with few defects, without having to rely on the silicon wafer dopant concentration or the type of silicon wafer.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers
The present invention provides a double-sided polishing method including a startup stage for gradually increasing a polishing rate from a polishing stopped state, a main polishing step, continuous with the startup stage, for performing double-sided polishing, and a ramp-down stage for gradually lowering the polishing rate from the main polishing step to return to the polishing stopped state, characterized in that the main polishing step includes a plurality of substeps for performing double-sided polishing with different polishing rates, and the polishing rate at which the double-sided polishing is performed in the last of the plurality of substeps is at most equal to 0.35 μm/minute. This makes it possible to provide a double-sided polishing method that has a high productivity and that enables wafers having good nanotopography to be obtained.
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
B24B 37/24 - Lapping pads for working plane surfaces characterised by the composition or properties of the pad materials
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
The present invention is a cleaning solution for cleaning a silicon wafer, the cleaning solution being characterized in that: said cleaning solution is an ozone-containing hydrofluoric acid aqueous solution; said cleaning solution has a hydrofluoric acid concentration at which the oxide film etching rate with hydrofluoric acid is at least 0.004 nm/sec, and has an ozone concentration at which the oxide film forming rate with ozone is at most 0.01 nm/sec; and the hydrofluoric acid concentration and the ozone concentration satisfy the relationship in which the rate ratio represented by (oxide film forming rate with ozone)/(oxide film etching rate with hydrofluoric acid) is at most 1. Consequently, provided is a cleaning solution with which particles or metal impurities on a silicon wafer surface can be removed while suppressing the occurrence of surface roughness (haze) deterioration or protruding defects (PID) of the silicon wafer.
The present invention is a light emitting element manufacturing method for manufacturing a plurality of light emitting elements, the method including a step for growing an epitaxial layer including a light emitting layer on a starting substrate, and a step for forming dividing grooves for element formation on the light emitting layer, wherein: the planar shape of each of the plurality of light emitting elements to be manufactured is a line-symmetric hexagon having an axis of symmetry; the axis of symmetry has two parallel sides; the length of the two parallel sides is longer than the other four sides; two apex angles through which the axis of symmetry passes are at least 90° but less than 180°; the plurality of light emitting elements to be manufactured are divided by the dividing grooves of a prescribed width; and the plurality of light emitting elements are disposed without gaps with the dividing grooves therebetween to form the dividing grooves. The foregoing provides a light emitting element and light emitting element manufacturing method with improved yield of elements per wafer without a reduction in yield during movement and mounting.
H01L 33/20 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
The present invention provides a method for producing a polysilicon wafer wherein a polysilicon layer is formed on a silicon single-crystal substrate, the method being characterized by comprising (1) a step in which a first polysilicon layer is formed on a silicon single-crystal substrate at a temperature that is not higher than 1000°C by means of a CVD method, and (2) a step in which a second polysilicon layer is formed on the first polysilicon layer at a temperature that is higher than 1000°C by means of a CVD method, while being also characterized in that, in the step (1), the value (%) of the in-plane film thickness distribution of the first polysilicon layer to be formed is controlled to be within a predetermined range and the difference between the maximum value (%) and the minimum value (%) within the predetermined range is not more than 5.2(%). Consequently, the present invention provides a method for producing a polysilicon wafer, the method being capable of producing polysilicon wafers with good reproducibility by reducing minute variation in the wafer shape even if different film forming apparatuses or chambers are used therefor.
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C01B 33/03 - Preparation by decomposition or reduction of gaseous or vaporised silicon compounds other than silica or silica-containing material by decomposition of silicon halides or halosilanes or reduction thereof with hydrogen as the only reducing agent
The present invention provides a substrate for electronic devices, the substrate being obtained by forming a nitride semiconductor film on a bonded substrate of silicon single-crystal; the bonded substrate is obtained by bonding a first silicon single-crystal substrate that has the (111) crystal plane orientation and a second silicon single-crystal substrate that has a main surface having an off angle with respect to the (100) crystal plane orientation with each other by the intermediary of an oxide film; and the nitride semiconductor film is formed on the surface of the first silicon single-crystal substrate of the bonded substrate. Consequently, the present invention provides a substrate for electronic devices, the substrate comprising a single-crystal silicon and a nitride semiconductor formed thereon, and being suppressed in the occurrence of slipping, cracking and the like, thereby having high fracture strength. The present invention also provides a method for producing this substrate for electronic devices.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
95.
EPITAXIAL WAFER AND METHOD FOR MANUFACTURING EPITAXIAL WAFER
The present invention is an epitaxial wafer characterized by having: a silicon substrate; a carbon-containing epitaxial film which is provided on the silicon substrate, has a thickness of at least 3 μm, and has a carbon atom concentration of at least 2.0×1019atoms/cm3; and a silicon epitaxial film which is provided on the carbon-containing epitaxial film and has a carbon atom concentration of less than 2.0×1019atoms/cm3. Consequently, provided are: an epitaxial wafer which can be made with a small number of steps and achieves a sufficient oxygen capturing amount; and a manufacturing method therefor.
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
H01L 21/205 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
x1-xy1-y1-yP (0 ≤ x < 1, 0.4 ≤ y ≤ 0.6), and a step for forming an isolation trench by ICP dry etching with an inductively coupled plasma in order to form an element in the light-emitting layer, wherein the temperature of the epitaxial layer-containing substrate during the process that forms the isolation trench by ICP dry etching is not more than 40°C. This can provide a method for producing light-emitting elements, that can prevent reductions in the luminance when microLED-sized light-emitting elements are formed using ICP dry etching to process an epitaxial layer that has an AlGaInP-based light-emitting layer.
111), which is the distance between the outer peripheral end of the film-forming substrate and the inner peripheral end of the chamfered portion, in the radial direction of the substrate surface is 500-1000 μm. Thus, the group III nitride semiconductor wafer having the group III nitride semiconductor film on the film-forming substrate, and a manufacturing method thereof are provided.
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 21/365 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
98.
RADIO-FREQUENCY DEVICE SUBSTRATE, AND METHOD FOR MANUFACTURING SAME
The present invention is a radio-frequency device substrate characterized by comprising: a support substrate which has an uneven surface; a diamond layer on the surface of the support substrate; and a silicon oxide film layer on the diamond layer. Thereby, a radio-frequency device substrate in which diamond, which has excellent radio-frequency characteristics, is used, and a method for manufacturing a radio-frequency device substrate in which diamond, which has excellent radio-frequency characteristics, is used are provided.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 29/16 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System in uncombined form
99.
METHOD FOR GROWING DIAMOND ON SILICON SUBSTRATE AND METHOD FOR SELECTIVELY GROWING DIAMOND ON SILICON SUBSTRATE
The present invention relates to a method for growing diamond on a silicon substrate by subjecting the silicon substrate surface to damage so that the Raman shift of a peak at 520 cm-1in Raman spectroscopy is 0.1 cm-1 or more, or forming unevenness on the silicon substrate surface so that the surface roughness Sa measured by AFM is 10 nm or more, or both subjecting the silicon substrate surface to the damage and forming the unevenness thereon as a pretreatment, and growing diamond by a CVD method on the silicon substrate subjected to the pretreatment. A method for growing diamond on a silicon substrate and a method for selectively growing diamond on a silicon substrate are thereby provided.
H01L 21/31 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to form insulating layers thereon, e.g. for masking or by using photolithographic techniquesAfter-treatment of these layersSelection of materials for these layers
The present invention is a double-sided polishing device for a wafer and has an upper platen and a lower platen, said double-sided polishing device being characterized in that: the upper platen is provided with a plurality of platen through holes between the rotational center and the peripheral edge thereof; a polishing cloth is provided to a polishing surface on the upper platen which faces the lower platen; holes having a diameter equal to or larger than the diameter of the platen through holes are provided in the polishing cloth at positions corresponding to the plurality of platen through holes; a resin hollow plug having a window material on the upper surface thereof and having a plug through hole is inserted into each of the platen through holes in the upper platen; and a wafer thickness measuring mechanism that is capable of optically measuring, through the plug through holes, the thickness of the wafer in real time during polishing is further provided above the upper platen. It is thus possible to provide a double-sided polishing device that exhibits excellent thickness measurement accuracy and that can eliminate concerns about metal impurities, flaws, and particles.
B24B 37/013 - Devices or means for detecting lapping completion
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
B24B 37/12 - Lapping plates for working plane surfaces
B24B 37/26 - Lapping pads for working plane surfaces characterised by the shape of the lapping pad surface, e.g. grooved
B24B 49/04 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent involving measurement of the workpiece at the place of grinding during grinding operation
B24B 49/12 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation involving optical means
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
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