A debris determination method of determining presence or absence of debris occurrence around hard laser mark after hard laser mark is formed on a back surface of wafer or after back surface of wafer is polished after formation of hard laser mark, wherein thickness unevenness parameter of wafer is measured by flatness measuring instrument, and statistical data on thickness unevenness parameter of region including hard laser mark (referred to as region A) is extracted, along with statistical data on a thickness unevenness parameter of a region adjacent to the region A (referred to as region B) is extracted and statistical data of region A and statistical data of region B are compared and a difference is calculated, when the difference is equal to or greater than a predetermined threshold, debris is determined to occur. This provides debris determination method that can accurately detect a local thickness variation due to debris.
A method for manufacturing a silicon substrate for a quantum computer, the method includes the steps of forming a Si epitaxial layer by epitaxial growth using a Si source gas as a silicon-based raw material gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on a silicon substrate, forming an oxygen (O) δ-doped layer by oxidizing a surface of the Si epitaxial layer, and forming a Si epitaxial layer by epitaxial growth using a Si source gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on the δ-doped layer.
C30B 29/68 - Crystals with laminate structure, e.g. "superlattices"
C30B 31/06 - Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structureApparatus therefor by contacting with diffusion material in the gaseous state
H10D 86/00 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
3.
GROUP-III NITRIDE SEMICONDUCTOR WAFER AND METHOD FOR PRODUCING SAME
The present invention is a group-III nitride semiconductor wafer including a group-III nitride semiconductor film on a substrate for film formation, in which in a cross-sectional shape of a surface of the substrate for film formation of a chamfered portion of the substrate in a diameter direction, a chamfering angle (θ1) relative to the surface of the substrate is 21° or more and 23° or less, and on the surface of the substrate in a diameter direction, a chamfering width (X1) is 500 μm or more and 1000 μm or less, which is a distance between an outer peripheral end portion of the substrate for film formation and an inner peripheral end portion of the chamfered portion. Thereby, the group-III nitride semiconductor wafer, in which the group-III nitride semiconductor film is provided on the substrate for film formation, and the method for producing the same are provided.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H10D 62/85 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
H10D 62/852 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP
The present invention is a method for producing a light emitting device, the method includes the steps of growing an epitaxial layer including at least a light emitting layer having (AlxGa1-x)yIn1-yP (0≤x<1, 0.4≤y≤0.6) as an active layer above a starting substrate, and forming an isolation groove to form a device in the light emitting layer by an ICP dry etching method using inductively coupled plasma, in which a temperature of a substrate including the epitaxial layer at the time of processing to form the isolation groove by the ICP dry etching method is 40° C. or less. Thereby, the method for producing a light emitting device can be provided, in which luminance decrease can be prevented when the light emitting device having a micro-LED size is formed by processing the epitaxial layer having the AlGaInP-based light emitting layer using the ICP dry etching method.
The present invention is a member 34 having a heat spreader structure including a substrate member 31 in which an integrated circuit portion 10 is formed, and a heat spreader structure portion 9 formed on the integrated circuit portion 10, in which the integrated circuit portion 10 forms a recessed and protruding shape, the heat spreader structure portion 9 is formed by either a diamond layer 6 with a protruding and recessed shape that fits the recessed and protruding shape of the integrated circuit portion 10 or by a silicon substrate 8 having a diamond layer 6 formed thereon where the silicon substrate 8 has a protruding and recessed shape that fits the recessed and protruding shape of the integrated circuit portion 10, and the protruding and recessed shape of the heat spreader structure portion 9 is fitted to the recessed and protruding shape of the integrated circuit portion 10 to bond the heat spreader structure portion 9 to the substrate member 31. This provides a more efficient heat dissipation structure.
The present invention is a method for growing a diamond layer by a microwave plasma CVD method, including: a step of placing a substrate 2 in a reaction vessel 1 of a microwave plasma CVD apparatus 10; a step of introducing a raw material gas (reaction gas) 6 into the reaction vessel 1; and a step of growing a diamond layer on a surface of the substrate 2 by irradiating microwave plasma on the surface of the substrate 2, wherein the step of growing the diamond layer includes at least one of moving the substrate 2 in a direction parallel to the surface of the substrate 2 and moving an irradiation position of the microwave plasma in a direction parallel to the surface of the substrate 2. Thereby, a large-diameter diamond substrate is provided.
C23C 16/458 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
C23C 16/46 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
7.
METHOD FOR PRODUCING SEMICONDUCTOR WAFER AND SEMICONDUCTOR WAFER
A method for producing a semiconductor wafer, the method including steps of: (1) forming a carbon-doped silicon film on a silicon substrate at a first temperature; (2) forming a carbon-undoped silicon film on the carbon-doped silicon film at the first temperature to obtain a stacked wafer; and (3) annealing the stacked wafer at a second temperature higher than the first temperature or further forming a film on the stacked wafer at the second temperature to obtain a semiconductor wafer. This provides a method for producing a semiconductor wafer having a carbon-containing silicon layer without precipitation of SiC on the wafer surface and with inhibited other defects.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H10D 62/834 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
A method for producing silicon single crystal by CZ method using a cusp magnetic field formed by upper and lower coils coil provided in pulling furnace, the silicon single crystal is pulled up in a straight-body step by setting a rotational rate of the silicon single crystal to 7 rpm or more and 12 rpm or less, rotational rate of a quartz crucible to 1.0 rpm or less, position of a magnetic field minimum plane of the cusp magnetic field in a range of 10 mm downward to 5 mm upward from a raw-material melt surface, and intensity of magnetic field of cusp magnetic field at intersection of plane having same height as magnetic field minimum plane and inner wall of quartz crucible from 800 to 1200 G. Method for efficiently producing silicon single crystal having lower oxygen concentration and better in-plane distribution of oxygen concentration compared to conventional techniques.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
C30B 15/30 - Mechanisms for rotating or moving either the melt or the crystal
The present invention is an epitaxial wafer, including an epitaxial film of a semiconductor material different from silicon being formed on a silicon substrate, in which the epitaxial film has a film thickness of less than 1 at a wafer outer-peripheral portion when a film thickness at a center of the wafer is defined as 1. Thereby, the epitaxial wafer having a heteroepitaxial film with few defects without dependence on a dopant concentration or a variety of a silicon wafer is provided.
C30B 25/18 - Epitaxial-layer growth characterised by the substrate
H10D 62/832 - Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
10.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SAME
The present invention provides a nitride semiconductor substrate including a substrate for film formation including a composite substrate having a plurality of layers bonded together and a single-crystal silicon layer formed on the composite substrate and a nitride semiconductor thin film formed on the substrate for film formation. The nitride semiconductor thin film includes a GaN layer, and the GaN layer is doped with at least 1×1019 atoms/cm3 or more and less than 5×1020 atoms/cm3 of carbon and/or 5×1018 atoms/cm3 or more and less than 5×1020 atoms/cm3 of iron. Thereby, the nitride semiconductor substrate with an improved high-frequency characteristic and a method of producing this substrate can be provided.
The present invention is a method for producing a bonded light-emitting device wafer, in which a light-emitting device structure, to be a micro LED, and a to-be-bonded substrate are bonded with each other via an adhesive, the method includes the steps of bonding the light-emitting device structure to the to-be-bonded substrate via the adhesive to obtain a bonded wafer, producing a map data for removal by optically investigating a failure portion of the bonded wafer, and irradiating the failure portion of the bonded wafer with the laser light for removal from the to-be-bonded substrate based on the map data for removal, causing a portion of the adhesive which is included in the failure portion to absorb the laser light for removal and causing the portion of the adhesive which is included in the failure portion to sublimate, thereby removing the portion of the light-emitting device structure which is included in the failure portion to obtain the bonded light-emitting device wafer. This can provide the method for producing a bonded light-emitting device wafer capable of selectively removing the failure portion of the light-emitting device structure and producing the bonded light-emitting device wafer.
A method for producing a heteroepitaxial wafer of hetero-epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, wherein the method includes: with using a reduced-pressure CVD apparatus, removing a natural oxide film on a surface of the single crystal silicon substrate with hydrogen baking; forming a SiC nucleus on the single crystal silicon substrate under a condition of a pressure of 13 Pa or higher and 13332 Pa or lower and a temperature of 600° C. or higher and 1200° C. or lower while a source gas containing carbon is supplied; and growing a SiC single crystal under a condition of a pressure of 13 Pa or higher and 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C. while a source gas containing carbon and silicon is supplied to form the 3C-SiC single crystal film.
The present invention is a substrate for an electronic device, comprising a nitride semiconductor film formed on a bonded substrate comprising a silicon single crystal, wherein the bonded substrate is a substrate comprising a first silicon single-crystal substrate having a crystal plane orientation of {111} and a second silicon single-crystal substrate having a main surface that has an off-angle with respect to a crystal plane orientation of {100}, the first silicon single-crystal substrate and the second silicon single-crystal substrate being bonded via an oxide film, and
the nitride semiconductor film is formed on a surface of the first silicon single-crystal substrate of the bonded substrate. This provides a substrate for an electronic device, including a nitride semiconductor formed on a silicon single-crystal, which is the substrate for the electronic device with the suppressed generation of slips, cracks, etc., and with a high breaking strength, and provides a method for producing the substrate.
H10D 86/00 - Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
14.
METHOD FOR MEASURING RESISTIVITY OF SILICON SINGLE CRYSTAL
The present invention is a method for measuring resistivity of a silicon single crystal with resistivity of 100 Ωcm or higher, the silicon single crystal being grown with addition of nitrogen by an MCZ method, the method including: performing oxidation heat treatment at a temperature of 1100 to 1250° C. for 90 to 240 minutes on a substrate sliced from the silicon single crystal to form a thermal oxide film on a surface of the substrate; and measuring resistivity of the substrate after removing the thermal oxide film from the surface of the substrate. This provides a method for measuring resistivity of a silicon single crystal is provided which can measure a precise resistivity derived from a dopant for a silicon single crystal with resistivity of 100 Ωcm or higher that is grown with addition of nitrogen by the MCZ method.
A method for efficiently producing a heteroepitaxial film in a thin film shape while minimizing damage to a device and material loss, including heteroepitaxial growing a 3C—SiC single crystal film on a single crystal Si substrate and then delaminating thereof, the method includes: with using a reduced-pressure CVD apparatus, removing a native oxide film on a surface of the single crystal Si substrate by hydrogen baking, performing nucleation of SiC at 1333 Pa or lower and 300° C. or higher and 950° C. or lower and forming the 3C—SiC single crystal film and forming a vacancy directly under the 3C—SiC single crystal film at 1333 Pa or lower and 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon; and producing the heteroepitaxial film by delaminating the 3C—SiC single crystal film along the vacancy.
The present invention provides a method for manufacturing a bonded semiconductor wafer, the method includes the steps of epitaxially growing an etching stop layer on a starting substrate, epitaxially growing a compound semiconductor functional layer on the etching stop layer, forming an isolation groove for forming a device in the compound semiconductor functional layer by a dry etching method, etching on a surface of the isolation groove by a wet etching method, bonding a visible light-transmissive substrate of a different material from a material of the compound semiconductor functional layer to the compound semiconductor functional layer via a visible light-transmissive thermosetting bonding member, and obtaining a bonded semiconductor wafer by removing the starting substrate from the compound semiconductor functional layer bonded to the visible light-transmissive substrate. This can provide a method for manufacturing a bonded semiconductor wafer that can make a device with suppressed generation of decrease in brightness when the device is produced on a substrate.
A substrate for a high-frequency device including a support substrate having unevenness on a surface thereof, a diamond layer on the surface of the support substrate, and a silicon oxide film layer on the diamond layer. Thereby, the substrate for a high-frequency device using diamond having excellent high-frequency characteristics and a method for producing a substrate for a high-frequency device using diamond having excellent high-frequency characteristics are provided.
G01B 11/30 - Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
18.
WAFER HAVING MICRO-LED STRUCTURE, METHOD FOR MANUFACTURING WAFER HAVING MICRO-LED STRUCTURE, AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR WAFER HAVING MICRO-LED STRUCTURE
The present invention is a wafer having a micro-LED structure, the wafer including a starting substrate, a mask formed on the starting substrate and having a mask pattern including an opening, and a plurality of epitaxial layer structures, each of the plurality of structures selectively grown on a portion corresponding to the opening of the mask pattern on the starting substrate, in which each of the plurality of the epitaxial layer structures has a pyramid-shape or a truncated pyramid-shape surrounded by {111} planes, the plurality of epitaxial layer structures includes a first structure, as a light-emitting device portion, and a second structure connected to the first structure, and a polarity of an electrode of the first structure is different from that of an electrode of the second structure, and the first structure and the second structure constitute a micro-LED structure operable as one micro-LED. Thereby, the wafer having a micro-LED structure, in which generation of brightness decrease is suppressed, can be provided.
H10H 20/813 - Bodies having a plurality of light-emitting regions, e.g. multi-junction LEDs or light-emitting devices having photoluminescent regions within the bodies
H10H 20/824 - Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
19.
METHOD FOR GROWING DIAMOND ON SILICON SUBSTRATE AND METHOD FOR SELECTIVELY GROWING DIAMOND ON SILICON SUBSTRATE
The present invention is a method for growing diamond on a silicon substrate, the method includes: subjecting a surface of the silicon substrate to damage as a pretreatment so as to make a Raman shift of a peak at 520 cm-1 in Raman spectroscopy 0.1 cm-1 or more, or subjecting the surface of the silicon substrate to unevenness formation as the pretreatment so as to make a surface roughness Sa measured by AFM 10 nm or more, or subjecting the surface of the silicon substrate to both the damage and the unevenness formation thereon as the pretreatment, and growing diamond by a CVD method on the silicon substrate subjected to the pretreatment. This provides a method for growing diamond on a silicon substrate and a method for selectively growing diamond on a silicon substrate.
The present invention is a nitride semiconductor substrate including a nitride semiconductor thin film formed on a substrate, in which the nitride semiconductor thin film includes a stress-relaxing layer formed on the substrate and a carbon-doped GaN layer formed on the stress-relaxing layer, and the GaN layer includes high carbon concentration layers and a low carbon concentration layer, the low carbon concentration layer being sandwiched between the high carbon concentration layers and having a lower carbon concentration by 75% or more than the high carbon concentration layers. This provides the nitride semiconductor substrate with improved crystallinity without increasing a thickness of a GaN epitaxial layer and without using other special materials, and a method for producing the substrate.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/06 - Semiconductor bodies characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
21.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SAME
A nitride semiconductor substrate includes: a silicon single crystal substrate having a front surface and a back surface; and a nitride semiconductor thin film formed on the front surface, in which the silicon single crystal substrate has a carbon diffusion layer that has been implanted with carbon and has a carbon concentration higher than a bulk portion of the silicon single crystal substrate in at least the front surface and the back surface, and the carbon concentration in the carbon diffusion layer is 5E+16 atoms/cm3 or more. The nitride semiconductor substrate can suppress warp failure caused by plastic deformation during epitaxial growth and device processes when the nitride semiconductor substrate is produced using a silicon single crystal substrate.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
22.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR SUBSTRATE
The present invention is a nitride semiconductor substrate including a group III-nitride semiconductor layer containing GaN and formed on a support substrate, in which the support substrate includes: a composite substrate having laminated layers, the laminated layers including a polycrystalline ceramic core, a first adhesive layer bonded entirely to the polycrystalline ceramic core, a second adhesive layer laminated entirely to the first adhesive layer, and a barrier layer bonded entirely to the second adhesive layer; and a group III-nitride semiconductor seed crystal layer containing at least GaN, bonded on the composite substrate via a planarization layer, in which the group III-nitride semiconductor layer is formed on the group III-nitride semiconductor seed crystal layer, and crystallinity on a (0002) growth surface of GaN in the group III-nitride semiconductor seed crystal layer is 550 arcsec or less in XRD half-value width. This can provide the nitride semiconductor substrate, including the group III-nitride semiconductor layer, with a small warp, low generation of dislocation, and excellent crystallinity.
C30B 33/04 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
A substrate for an electronic device, including a nitride semiconductor film formed on a bonded substrate of a silicon single crystal, in which the bonded substrate is a substrate including a first silicon single-crystal substrate having a crystal plane orientation of {111} and a second silicon single-crystal substrate having a crystal plane orientation of {100} being bonded via an oxide film, the first substrate is formed with a notch in <110> direction, the second substrate is formed with a notch in <011> direction or <001> direction, the <110> direction of the first substrate and the <011> direction of the second substrate are bonded in an angular range of −15° to 15°, and the nitride semiconductor film is formed on a surface of the first substrate of the bonded substrate.
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/26 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups , , , ,
24.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
The present invention is a nitride semiconductor substrate for high frequency, which includes an SOI substrate in which a single crystal silicon thin film is formed on a single crystal silicon substrate via a silicon oxide layer, and a nitride semiconductor layer including a GaN layer formed on the SOI substrate; in which the single crystal silicon thin film contains nitrogen at a concentration of 2.0×1014 atoms/cm3 or more and has a resistivity of 100 Ωcm or more, the single crystal silicon substrate has a resistivity of 50 mΩcm or less, and the silicon oxide layer has a thickness of 10 to 400 nm. This can provide the nitride semiconductor substrate in which the nitride semiconductor layer is grown on the SOI substrate for manufacturing devices for high frequency, and the nitride semiconductor substrate with suppressed plastic deformation.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
A method for manufacturing a bonded semiconductor wafer includes growing an etching stop layer on a starting substrate, producing an epitaxial wafer by growing an epitaxial layer having a compound semiconductor functional layer on the etching stop layer, forming an isolation groove to form a device in the compound semiconductor functional layer by a dry etching method, performing roughening etching on a surface of the epitaxial layer, being the opposite side of the starting substrate, making surface roughness thereon to have 0.1 μm or more in an arithmetic average roughness Ra, bonding a visible light-transmissive substrate to the surface opposite to the starting substrate of the epitaxial wafer via visible light-transmissive thermosetting bonding material, and removing the starting substrate. This method for manufacturing the bonded semiconductor wafer in which a micro-LED can be made with a suppressed generation of luminance decrease when a micro-LED device is produced on the substrate.
The present invention provides a method for producing a heteroepitaxial wafer heteroepitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method including: with using a reduced-pressure CVD apparatus, a first step of removing a native oxide film on a surface of the single crystal silicon substrate by hydrogen baking; a second step of nucleation of SiC on the single crystal silicon substrate on a condition of pressure of 13332 Pa or lower and a temperature of 300° C. or higher and 950° C. or lower and a third step of forming the 3C-SiC single crystal film by growing a SiC single crystal on condition of pressure of 13332 Pa or lower and a temperature of 800° C. or higher and lower than 1200° C., while supplying a source gas containing carbon and silicon into the reduced-pressure CVD apparatus. This provides the method for producing the heteroepitaxial wafer that can efficiently grow high-quality 3C-SiC single crystal film heteroepitaxially on the single crystal silicon substrate.
A method for manufacturing a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate includes: a step of forming the nitride semiconductor film on the silicon single-crystal substrate; and a step of irradiating the silicon single-crystal substrate with electron beam so that the silicon single-crystal substrate has a higher resistivity than a resistivity before the irradiation, wherein a substrate doped with nitrogen at a concentration of 5×1014 atoms/cm3 or more and 5×1016 atoms/cm3 or less is used as the silicon single-crystal substrate. A method for manufacturing a nitride semiconductor wafer having a nitride semiconductor film grown on a silicon single-crystal substrate, wherein the method makes it possible that a silicon single-crystal substrate having been irradiated with electron beam and thereby has an increased resistivity is prevented from recovering and having a lower resistivity during the epitaxial growth or other thermal treatment steps.
An epitaxial wafer production method, including forming a gettering epitaxial film containing silicon and carbon on a silicon substrate under reduced pressure using a reduced pressure CVD apparatus, and forming a silicon epitaxial film on the gettering epitaxial film. This provides a low-cost, low-contamination carbon-containing epitaxial wafer, and a method for producing such an epitaxial wafer.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 29/36 - Semiconductor bodies characterised by the concentration or distribution of impurities
30.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SAME
A nitride semiconductor substrate including a growth substrate, and a nitride semiconductor thin film formed on the growth substrate, in which the nitride semiconductor thin film includes an AlN layer formed on the growth substrate and a nitride semiconductor layer formed on the AlN layer, and an average concentration of Y (Yttrium) in the AlN layer is 1E15 atoms/cm3 or higher and 5E19 atoms/cm3 or lower. Thereby, a nitride semiconductor substrate is capable of improving the surface morphology of an AlN layer, thereby suppressing the generation of pits on the surface of a nitride semiconductor epitaxial wafer, and a method manufactures the nitride semiconductor substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
31.
BONDED WAFER AND METHOD FOR PRODUCING BONDED WAFER
A bonded wafer, wherein an epitaxial wafer having a heterojunction structure, in which a material with a different thermal expansion coefficient is epitaxially laminated on a growth substrate, and a support substrate are bonded via a bonding material, wherein the bonding material has an average thickness of 0.01 μm or more and 0.6 μm or less. As a result, provided is a bonded wafer and a method for producing the same that improves the film thickness distribution of the bonding material caused by the warpage of the semiconductor epitaxial substrate and the warpage that changes with thermal changes when the warped semiconductor epitaxial substrate and the support substrate are bonded together using the bonding material.
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
B32B 7/12 - Interconnection of layers using interposed adhesives or interposed materials with bonding properties
B32B 9/04 - Layered products essentially comprising a particular substance not covered by groups comprising such substance as the main or only constituent of a layer, next to another layer of a specific substance
32.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a substrate for film formation made of single-crystal silicon, in which a silicon nitride film is formed on an peripheral portion of the substrate for film formation, an AlN film is formed on the substrate for film formation and on the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film. A nitride semiconductor substrate without a reaction mark or a polycrystal growth portion on an edge portion when an AlN layer is epitaxially grown on a silicon substrate, and a GaN or AlGaN layers are epitaxially grown on top of that; and a method for manufacturing the nitride semiconductor substrate.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
The present invention relates to a method of manufacturing a compound semiconductor bonded substrate comprising the steps of:
(1) epitaxially growing a compound semiconductor functional layer on a starting substrate;
(2) temporarily bonding a support substrate to the epitaxially grown surface to form a first compound semiconductor bonded substrate;
(3) removing the starting substrate from the first compound semiconductor bonded substrate to form a second compound semiconductor bonded substrate;
(4) finally bonding a surface of the second compound semiconductor bonded substrate from which the starting substrate has been removed to a permanent substrate to form a third compound semiconductor bonded substrate;
(5) removing the support substrate from the third compound semiconductor bonded substrate to form a fourth compound semiconductor bonded substrate, wherein
the temporary bonding is performed via a thermosetting resin, the thermosetting resin being maintained in a softened state without being cured, and
the final bonding is performed via a silicon oxide film or a silicon nitride film.
Thus, provided is a method of manufacturing a compound semiconductor bonded substrate having an improved degree of freedom in designing a device or a device system.
H01L 21/18 - Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
34.
METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
A method for manufacturing a nitride semiconductor substrate in which a nitride semiconductor is formed on a substrate for film formation includes: (1) subjecting a substrate for film formation made of single-crystal silicon to heat treatment under a nitrogen atmosphere to form a silicon nitride film on the substrate for film formation, (2) growing an AlN film on the silicon nitride film, and (3) growing a GaN film, an AlGaN film, or both on the AlN film. A method for manufacturing a nitride semiconductor substrate can prevent diffusion of Al to the high-resistance single-crystal silicon substrate when the AlN layer is epitaxially grown on the high-resistance single-crystal silicon substrate, and the GaN or the AlGaN layer is epitaxially grown on top of that.
A nitride semiconductor substrate includes: a silicon single-crystal substrate; and a nitride semiconductor thin film formed on the silicon single-crystal substrate, wherein the silicon single-crystal substrate has a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less. This provides a nitride semiconductor substrate resistant against plastic deformation and a manufacturing method therefor.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
A temporarily bonded wafer in which an epitaxial functional layer having two or more electrodes with different polarities on one surface and a support substrate are temporarily bonded, in which the surface having the electrodes of the epitaxial functional layer and the support substrate are temporarily bonded via an uncured thermosetting bonding material. A resulting technique reduces bonding failure and delamination failure after removing the substrate after a bonding process, improves the yield, and easily removes the temporary support substrate.
The present invention provides a method for producing a silicon single crystal by a CZ method using a cusp magnetic field formed by an upper coil and a lower coil provided in a pulling furnace, the method includes seeding by bringing a seed crystal into contact with a silicon melt, and pulling up of a straight body after enlarging a diameter of the silicon single crystal, in which the seeding is performed with a magnetic field minimum plane position on a central axis of the pulling furnace as a first position below a surface of the silicon melt, before proceeding to the pulling up of the straight body, the magnetic field minimum plane position on the central axis of the pulling furnace is moved to a second position above the first position, the pulling up of the straight body is performed with the magnetic field minimum plane position on the central axis of the pulling furnace as the second position. This provides the method for producing the silicon single crystal that efficiently produces the single crystal having low oxygen concentration and excellent in-plane distribution with an improved success rate of the seeding.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
The present invention is a clean room including a stocker area in which an article management storage is installed, in which the article management storage includes an upper opening part and a lower flow-out port configured to adjust the aperture ratio, a ceiling of the stocker area includes an eyelid and an air outlet port, the upper opening part of the article management storage and the air outlet port are connected to each other so as to be surrounded by the eyelid, and the clean room is configured that air supplied from the air outlet port is directly supplied into the article management storage through the upper opening part and is discharged from the lower flow-out port. This can provide the clean room that can keep the inside of the article management storage clean with almost no additional cost and without reducing the storing volume in the article management storage.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
F24F 3/167 - Clean rooms, i.e. enclosed spaces in which a uniform flow of filtered air is distributed
F24F 13/06 - Outlets for directing or distributing air into rooms or spaces, e.g. ceiling air diffuser
39.
NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
A nitride semiconductor substrate including: a composite substrate with multiple layers stacked, a silicon oxide layer or a TEOS layer having a central flat surface and a side surface around the flat surface and stacked on the composite substrate; a single crystal silicon layer stacked on the silicon oxide layer or the TEOS layer, and a nitride semiconductor thin film deposited on the single crystal silicon layer, wherein the entire central flat surface of the silicon oxide layer or the TEOS layer is covered with the single crystal silicon layer.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
40.
SUBSTRATE FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
The present invention is a substrate for a semiconductor device, including: a high-resistant silicon single crystal substrate having a resistivity of 100 Ω·cm or more; a first buffer layer composed of an AlN layer and formed on the high-resistant silicon single crystal substrate; and a nitride semiconductor layer provided on the first buffer layer, wherein there is no low-resistivity portion on a top surface of the high-resistant silicon single crystal substrate, the low-resistivity portion having a resistivity relatively lower than the resistivity of an entirety of the high-resistant silicon single crystal substrate. This provides: a substrate for a semiconductor device that can impart good electric characteristics to a device; and a simple method for manufacturing such a substrate.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/778 - Field-effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT
41.
NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR
A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers is bonded, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/205 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds in different semiconductor regions
A debris determination method of determining, using an image obtained by an appearance inspection device, debris that occurs around a hard laser mark (HLM) on a backside of a wafer, including: a step of calculating reference luminance from a grayscale image obtained by the appearance inspection device; a step of extracting a printed region including the HLM from the grayscale image; a step of excluding a dot portion of the HLM from the printed region; a step of extracting, with reference to the reference luminance, a debris region from the printed region from which the dot portion of the HLM has been excluded; and a step of determining the presence or absence of debris in the printed region based on the debris region. This provides a debris determination method that can reliably detect debris that cannot be detected by shape measuring devices and determine the presence or absence of debris.
A debris determination method of determining, from an image obtained by an appearance inspection device, debris that occurs around an HLM on a backside of a wafer, including: replacing luminance data of the image with matrix data; extracting an HLM-printed region; obtaining a least-squares plane of luminance; obtaining normalized matrix data by subtracting the least-squares plane from the printed region; obtaining protrusion-side matrix data by substituting 0 for matrix values less than 0; obtaining recess-side matrix data by inverting the sign of the normalized matrix data and substituting 0 for matrix values representing dots and noise; obtaining composite matrix data from the protrusion- and recess-side matrix data; obtaining low-pass matrix data by processing the composite matrix data; and determining debris from the low-pass matrix data with a predetermined threshold and obtaining an area ratio of the debris to determine the presence or absence of debris in the printed region.
The present invention is a method for carrying a wafer, wherein in taking out the wafer from a closed container and carrying the wafer by a carrier robot or in taking in the wafer carried by the carrier robot into the closed container, when a latchkey is rotationally driven for fixing and unfixing a lid relative to a container body of the closed container mounted on a load port frame by a latchkey-driving mechanism provided on a load port door that can fit with a wafer carrying-in/out port of a carrying room and that holds the lid of the closed container to enable removal from the wafer carrying-in/out port, the latchkey is rotationally driven at a rotation rate of 60 deg/sec or less. This provides a method for carrying a wafer and wafer-carrying apparatus that can reduce an amount of dust generated when the lid of the closed container is opened and closed or when the load port door is raised and lowered for carrying the wafer.
H01L 21/677 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components for conveying, e.g. between different work stations
B25J 11/00 - Manipulators not otherwise provided for
45.
METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
The present invention provides a method for forming a thermal oxide film, comprising the steps of: a step of acquiring a first correlation between an amount of OH groups and thickness of the thermal oxide film by forming a thermal oxide film by thermal oxidation treatment under the same condition after preparing a plurality of semiconductor substrates having chemical oxide films formed by cleaning and having different amounts of OH groups; a step of acquiring a second correlation between an amount of OH groups and drying conditions by cleaning under the same cleaning condition followed by changed drying conditions to substrates and measuring amounts of OH groups; a step of acquiring a third correlation between drying condition and thickness of thermal oxide film by using the first correlation and the second correlation; a step of determining drying condition and thermal oxidation condition by using the third correlation; a step of cleaning the substrates; and a step of drying and a thermal oxide film formation after the cleaning step using the drying conditions and thermal oxidation treatment conditions determined in the drying and thermal oxidation treatment condition determination step. This provides a method for forming thermal oxide film in which a thermal oxide film can be formed with intended thickness with good reproducibility while without changing the composition of the cleaning chemical solution.
H01L 21/66 - Testing or measuring during manufacture or treatment
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
46.
WAFER MARKING METHOD, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR SUBSTRATE
A wafer marking method uses a laser for performing a laser marking on a defect region of a nitride semiconductor substrate in which a nitride semiconductor layer contains at least a GaN layer formed by epitaxial growth on a single-crystal silicon substrate. The method includes that a surface of the GaN layer and a surface of the single-crystal silicon substrate are performed laser marking simultaneously by irradiating the defect region with a laser of a wavelength within ±10% of 365 nm, having a wavelength corresponding to a band gap energy of GaN.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/268 - Bombardment with wave or particle radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
H01L 21/66 - Testing or measuring during manufacture or treatment
47.
PACKAGING MEMBER FOR PACKAGING OBJECT TO BE TRANSPORTED BETWEEN CLEAN ROOMS, PACKAGING METHOD, AND TRANSPORTING METHOD
A packaging member for packaging an object to be transported between clean rooms, the packaging member being used for packaging the object to be transported, being a FOUP or a FOSB, when transport thereof between the clean rooms each having a clean atmosphere of a semiconductor factory, in which the packaging member includes a dust-free cloth having dust-proof property and damp-proof property. The packaging member is capable of transporting an object to be transported between clean rooms at low cost while maintaining the high cleanness of the object to be transported, being the FOUP or the FOSB.
B65D 85/30 - Containers, packaging elements or packages, specially adapted for particular articles or materials for articles particularly sensitive to damage by shock or pressure
B65G 49/06 - Conveying systems characterised by their application for specified purposes not otherwise provided for for fragile or damageable materials or articles for fragile sheets, e.g. glass
The present invention is an apparatus for manufacturing a single crystal by growing a single crystal according to a Czochralski method, the apparatus includes a main chamber configured to house a crucible configured to accommodate a raw-material melt and a heater configured to heat the raw-material melt, a pulling chamber being continuously provided at an upper portion of the main chamber and configured to accommodate a single crystal grown and pulled, and a cooling cylinder extends from at least a ceiling portion of the main chamber toward a surface of the raw material melt to surround the single crystal being pulled. The cooling cylinder is configured to be forcibly cooled with a coolant. The apparatus includes a first auxiliary cooling cylinder fitted inside of the cooling cylinder, and a second auxiliary cooling cylinder threadedly connected to the outside of the first auxiliary cooling cylinder from a side of a lower end. A gap between a bottom surface of the cooling cylinder and a top surface of the second auxiliary cooling cylinder is 0 mm or more to 1.0 mm or less. This provides an apparatus for manufacturing a single crystal which can increase growth rate of the single crystal by efficiently cooling the single crystal being grown.
An epitaxial wafer for an ultraviolet ray emission device including: a first supporting substrate being transparent for ultraviolet ray and having heat resistance; a seed crystal layer of an AlxGa1-xN (0.5
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
50.
METHOD FOR MANUFACTURING EPITAXIAL WAFER FOR ULTRAVIOLET RAY EMISSION DEVICE, METHOD FOR MANUFACTURING SUBSTRATE FOR ULTRAVIOLET RAY EMISSION DEVICE, EPITAXIAL WAFER FOR ULTRAVIOLET RAY EMISSION DEVICE, AND SUBSTRATE FOR ULTRAVIOLET RAY EMISSION DEVICE
The present invention is a method for manufacturing an epitaxial wafer for an ultraviolet ray emission device, the method including steps of: preparing a supporting substrate having at least one surface composed of gallium nitride; forming a bonding layer on the surface composed of the gallium nitride of the supporting substrate; forming a laminated substrate having a seed crystal layer by laminating a seed crystal composed of an AlxGa1-xN (0.5
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/06 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
H01L 33/32 - Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
51.
METHOD FOR MANUFACTURING BONDED WAFER, AND BONDED WAFER
A method for manufacturing a bonded wafer, the method including bonding a to-be-bonded wafer and a compound semiconductor wafer including a compound semiconductor epitaxially grown on a growth substrate. An area of a bonding surface of the to-be-bonded wafer is larger than an area of a bonding surface of the compound semiconductor wafer. The growth substrate is removed after the to-be-bonded wafer is bonded to the compound semiconductor wafer.
The present invention is a silicon wafer manufacturing method including a grinding step of grinding front and back surfaces of a raw wafer to obtain a wafer having an arithmetic surface roughness Sa per 2 μm2 of 10 nm or less; a dry-etching step of subjecting the wafer obtained in the grinding step to isotropic whole-surface dry-etching with an etching removal of 1 μm or less per surface to remove a mechanically damaged layer introduced into each of front and back surfaces of the wafer in the grinding step; and a double-side polishing step of, after the dry-etching step, polishing both surfaces of the wafer with a stock removal of 3 μm or less per surface. Thus, the silicon wafer manufacturing method that enables to manufacture a wafer having high flatness can be provided.
A method for manufacturing a semiconductor wafer, including: a chamfering step of grinding at least a periphery of a wafer to form a chamfered portion having a wafer edge portion and a wafer notch portion; a double-side polishing step; a mirror-surface chamfering step; and a mirror polishing step, wherein the mirror-surface chamfering step includes: a first mirror-surface chamfering process of polishing the wafer notch portion in the chamfered portion before the double-side polishing step; and a second mirror-surface chamfering process of polishing the wafer notch portion and the wafer edge portion after the double-side polishing step, and a polishing rate of the wafer notch portion in the second mirror-surface chamfering process is smaller than a polishing rate of the wafer notch portion in the first mirror-surface chamfering process.
B24B 9/06 - Machines or devices designed for grinding edges or bevels on work or for removing burrsAccessories therefor characterised by a special design with respect to properties of materials specific to articles to be ground of non-metallic inorganic material, e.g. stone, ceramics, porcelain
B24B 7/22 - Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfacesAccessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
A method for producing a nitride semiconductor wafer by forming a nitride semiconductor film on a silicon single-crystal substrate, including the steps of forming the nitride semiconductor film on the silicon single-crystal substrate and irradiating the silicon single-crystal substrate with electron beams with an irradiation dose of 1×1014/cm2 or more. A method produces a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate, and in which a loss and a second harmonic characteristic due to the substrate are improved.
A seed substrate for epitaxial growth has a support substrate, a planarizing layer of 0.5 to 3 μm provided on the top surface of the support substrate, and a seed crystal layer provided on the top surface of the planarizing layer. The support substrate includes a core of group III nitride polycrystalline ceramics and a 0.05 to 1.5 μm encapsulating layer that encapsulates the core. The seed crystal layer is provided by thin-film transfer of 0.1 to 1.5 μm of the surface layer of Si<111> single crystal with oxidation-induced stacking faults (OSF) of 10 defects/cm2 or less. High-quality, inexpensive seed substrates with few crystal defects for epitaxial growth of epitaxial substrates and solid substrates of group III nitrides such as AlN, AlxGa1-xN (0
C23C 16/50 - Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
C30B 31/22 - Doping by irradiation with electromagnetic waves or by particle radiation by ion-implantation
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
56.
SINGLE CRYSTAL PULLING APPARATUS AND METHOD FOR PULLING SINGLE CRYSTAL
The present invention is a single crystal pulling apparatus which includes a pulling furnace having a central axis and a magnetic field generating apparatus having coils, and applies a horizontal magnetic field to a molten semiconductor raw material, wherein the coils are saddle-shaped, two pairs of the coils are provided with the coils of each pair arranged facing each other, two coil axes in the two pairs of coils are included in the same horizontal plane, when a magnetic force line direction on the central axis of the pulling furnace in the horizontal plane is defined as a X-axis, and a direction perpendicular to the X-axis in the horizontal plane is defined as a Y-axis, a center angle α between the two coil axes sandwiching the X-axis is 90 degrees or less and an inter-coil angle β between adjacent superconducting coils sandwiching the Y-axis is 20 degrees or less. As a result, the coil height can be reduced by increasing the magnetic field generation efficiency, the magnetic field center can be raised to near the melt surface of the semiconductor raw material, and it is possible to provide a single crystal pulling apparatus and a single crystal pulling method capable of pulling a single crystal with an even lower oxygen concentration than before and a defect-free crystal at a higher speed can be obtained.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
57.
Method for evaluating crystal defects in silicon carbide single crystal wafer
A method for evaluating crystal defects in a silicon carbide single crystal wafer, the method including steps of: etching a silicon carbide single crystal wafer with melted KOH so that a size of an etch pit due to a threading edge dislocation is 10 to 50 μm; obtaining microscopic images by automatic photographing at a plurality of positions on a surface of the silicon carbide single crystal wafer after the etching; determining presence or absence of a defect dense part in each of all the obtained microscopic images based on a continued length of the etch pit formed by the etching; and classifying all the obtained microscopic images into microscopic images having the defect dense part and microscopic images not having the defect dense part to evaluate a dense state of crystal defects in the silicon carbide single crystal wafer.
A method for processing a wafer including; surface-grinding front surface of the wafer and back surface opposite to the front surface with a grindstone having a size of 10000 or more and, double-side polishing both sides of the wafer that has been surface-ground so that removal on the back surface is ¼ or less than that on the front surface. This method can also process a wafer capable of selectively roughening the back surface of a wafer and suppressing warpage of the wafer due to stress, and a wafer having a sufficiently roughened back surface and having a small warpage.
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
59.
Method for evaluating semiconductor wafer, method for selecting semiconductor wafer and method for fabricating device
An evaluation method including steps of: acquiring profile measurement data on an entire surface in a thickness direction of a mirror-polished wafer; identifying a slice-cutting direction by performing first-order or second-order differentiation on diameter-direction profile measurement data on the wafer to acquire differential profiles at predetermined rotation angles and pitches, and comparing the acquired differential profiles; acquiring x-y grid data by performing first-order or second-order differentiation on profile measurement data at a predetermined pitch in a y-direction at a predetermined interval in an x-direction perpendicular to the y-direction, which is the identified slice-cutting direction; acquiring, from the x-y grid data, a maximum derivative value in an intermediate region including the wafer center in the y-direction and a maximum derivative value in upper-end-side and lower-end-side regions located outside the intermediate region; and judging failure incidence possibility in a device fabrication process based on the maximum derivative values.
H01L 21/66 - Testing or measuring during manufacture or treatment
C30B 30/00 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions
G01B 21/20 - Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring contours or curvatures, e.g. determining profile
60.
METHOD FOR DETECTING SURFACE STATE OF RAW MATERIAL MELT, METHOD FOR PRODUCING SINGLE CRYSTAL, AND APPARATUS FOR PRODUCING CZ SINGLE CRYSTAL
A method for detecting a surface state of a raw material melt in a crucible in single crystal production by a CZ method in which a single crystal is pulled from the raw material melt in the crucible including: photographing a predetermined same test region of the surface of the raw material melt in the crucible simultaneously in different directions with two CCD cameras to obtain measurement images; and automatically detecting, using parallax data of the measurement images from the two CCD cameras, one or more of the following: solidification timing when a state in which the raw material is completely melted becomes a state in which solidification is formed on the surface of the raw material melt; and melting complication timing when a state in which the raw material melt has solidification on the surface of the raw material melt becomes a completely melted state.
C30B 15/26 - Stabilisation or shape controlling of the molten zone near the pulled crystalControlling the section of the crystal using television detectorsStabilisation or shape controlling of the molten zone near the pulled crystalControlling the section of the crystal using photo or X-ray detectors
C30B 15/14 - Heating of the melt or the crystallised materials
C30B 15/30 - Mechanisms for rotating or moving either the melt or the crystal
61.
METHOD OF CLEANING SILICON WAFER, METHOD OF MANUFACTURING SILICON WAFER, AND SILICON WAFER
A method of cleaning a silicon wafer in which the silicon wafer is roughened, including: forming an oxide film on the silicon wafer by SC1 cleaning, SC2 cleaning, or ozone water cleaning; cleaning the silicon wafer on which the oxide film is formed by using any one of: a diluted aqueous solution of ammonium hydroxide having an ammonium hydroxide concentration of 0.051% by mass or less; or a diluted aqueous solution containing ammonium hydroxide and hydrogen peroxide water and having an ammonium hydroxide concentration of 0.051% by mass or less and a hydrogen peroxide concentration of 0.2% by mass or less, the hydrogen peroxide concentration being four times or less the ammonium hydroxide concentration, to roughen front and rear faces of the silicon wafer.
A nitride semiconductor substrate includes: a heat-resistant support substrate having a core including nitride ceramic enclosed in an encapsulating layer; a planarization layer provided on the heat-resistant support substrate; a silicon single crystal layer having a carbon concentration of 1×1017 atoms/cm3 or higher provided on the planarization layer; a carbonized layer containing silicon carbide as a main component and having a thickness of 4 to 2000 nm provided on the silicon single crystal layer; and a nitride semiconductor layer provided on the carbonized layer. This provides a high-quality nitride semiconductor substrate (a nitride semiconductor substrate particularly suitable for GaN-based high mobility transistors (HEMT) for high-frequency switches, power amplifiers, and power switching devices); and a method for producing the same.
A single crystal pulling apparatus includes: a pulling furnace having a central axis; and magnetic field generating apparatus around the pulling furnace and having coils, for applying a horizontal magnetic field to molten semiconductor raw material to suppress convection in crucible, in which, main coils and sub-coils are provided, as the main coils, two pairs of coils arranged facing each other are provided, two coil axes thereof are included in the same horizontal plane, a center angle α between the two coil axes sandwiching the X-axis, which is a magnetic force line direction on the central axis in the horizontal plane, is 100 degrees or more and 120 degrees or less, as the sub-coils, a pair of superconducting coils arranged to face each other is provided and its one coil axis is aligned with the X-axis, and current values of the main coils and the sub-coils can be set independently.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
A nitride semiconductor substrate, including a Ga-containing nitride semiconductor thin film formed on a substrate for film-forming in which a single crystal silicon layer is formed above a supporting substrate via an insulative layer, wherein the nitride semiconductor substrate has a region where the Ga-containing nitride semiconductor thin film is not formed inward from an edge of the single crystal silicon layer being a growth surface of the nitride semiconductor thin film. This provides: a nitride semiconductor substrate with inhibited generation of a reaction mark; and a manufacturing method therefor.
H01L 27/12 - Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/76 - Making of isolation regions between components
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
The present invention is a method for producing an epitaxial wafer forming a single crystal silicon layer on a single crystal silicon wafer, comprising, a step of removing native oxide film on surface of the single crystal silicon wafer with hydrofluoric acid, a step of forming an oxygen atomic layer on the surface of the single crystal silicon wafer from which the native oxide film has been removed, a step of epitaxially growing the single crystal silicon layer on the surface of the single crystal silicon wafer on which the oxygen atomic layer is formed, wherein the plane concentration of oxygen in the oxygen atomic layer is 1×1015 atoms/cm2 or less. As a result, a method for producing an epitaxial wafer, that an oxygen atomic layer can be stably and simply introduced into an epitaxial layer, and having a good-quality single crystal silicon epitaxial layer is provided.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
66.
METHOD FOR MEASURING DISTANCE BETWEEN LOWER END SURFACE OF HEAT SHIELDING MEMBER AND SURFACE OF RAW MATERIAL MELT, METHOD FOR CONTROLLING DISTANCE BETWEEN LOWER END SURFACE OF HEAT SHIELDING MEMBER AND SURFACE OF RAW MATERIAL MELT AND METHOD FOR MANUFACTURING SILICON SINGLE CRYSTAL
A method for measuring distance between lower end surface of heat shielding member and surface of raw material melt, the method including providing the member being located above the melt, when a silicon single crystal is pulled by the Czochralski method while a magnetic field is applied to the melt in a crucible, the method including: forming a through-hole in the member; measuring distance between the member and the melt surface, and observing position of mirror image of the through-hole with fixed point observation apparatus, the mirror image being reflected on the melt surface; then measuring a moving distance of the mirror image, and calculating distance between the member and the melt surface from a measured value and the moving distance of the mirror image, during the pulling of the crystal. The distance between the member and the melt can be precisely measured by the method.
C30B 15/26 - Stabilisation or shape controlling of the molten zone near the pulled crystalControlling the section of the crystal using television detectorsStabilisation or shape controlling of the molten zone near the pulled crystalControlling the section of the crystal using photo or X-ray detectors
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
C30B 15/14 - Heating of the melt or the crystallised materials
The present invention is an inspection apparatus for inspecting a container including a light-transmittable transparent portion and configured to house a wafer, the apparatus including: a flat lamp provided to irradiate a portion to be inspected including at least a part of the transparent portion of the container with light; and a camera provided to face the flat lamp across the portion to be inspected of the container and configured to image the portion to be inspected so as to detect a foreign matter and/or a defect in the portion to be inspected of the container. This can provide an inspection apparatus and inspection method that can inspect whether a foreign matter or a defect is present inside a wafer container more certainly than visual inspection by a person.
The present invention is a polishing pad having a polishing layer for polishing surface of a wafer and a double-sided tape for attaching the polishing layer to an upper turn table of a double-side polishing apparatus, wherein, the double-sided tape has a 90° peeling adhesive strength A of 2000 g/cm or more, and a ratio A/B of the 90° peeling adhesive strength A to a 180° peeling adhesive strength B of 1.05 or more, the double-sided tape has a base material, a polishing-layer-side adhesive layer to be attached to the polishing layer, and an upper-turn-table-side adhesive layer to be attached to the upper turn table, and total thickness of the polishing-layer-side adhesive layer and the upper-turn-table-side adhesive layer is 80 μm or less. This provides a polishing pad capable of suppressing deterioration of flatness of the wafer when performing double-side polishing of the wafer.
B24B 37/22 - Lapping pads for working plane surfaces characterised by a multi-layered structure
B24B 37/08 - Lapping machines or devicesAccessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
A single crystal manufacturing including: main chamber; pulling chamber; thermal shield member provided so as to face a silicon melt; rectifying cylinder provided on the thermal shield member so as to enclose the silicon single crystal being pulled up; cooling cylinder provided so as to encircle the silicon single crystal being pulled up and including an extending portion extending toward the silicon melt; and cooling auxiliary cylinder fitted to inside of the cooling cylinder. The extending portion of the cooling cylinder includes a bottom surface facing the silicon melt. The cooling auxiliary cylinder includes at least a first portion surrounding the bottom surface of the cooling cylinder and a second portion surrounding an upper end portion of the rectifying cylinder. This enables provision of the apparatus capable of manufacturing a single crystal with a carbon concentration lower than that according to the conventional technologies.
3 to the front surface of the wafer to perform spin cleaning after the second cleaning step; and a fourth cleaning step of supplying a cleaning solution containing HF to the front surface of the wafer to perform spin cleaning after the third cleaning step.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
C30B 25/20 - Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
C30B 33/00 - After-treatment of single crystals or homogeneous polycrystalline material with defined structure
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
71.
SUBSTRATE FOR GROUP-III NITRIDE EPITAXIAL GROWTH AND METHOD FOR PRODUCING THE SAME
A substrate for group III nitride epitaxial growth and a method for producing the same. The substrate for group III nitride epitaxial growth includes: a supporting substrate having a structure in which a core consisting of nitride ceramics is wrapped in an encapsulating layer having a thickness of between 0.05 μm and 1.5 μm, inclusive; a planarizing layer provided on an upper surface of the supporting substrate, the planarizing layer having a thickness of between 0.5 μm and 3.0 μm, inclusive; and a seed crystal layer made of a single crystal of a group III nitride, the seed crystal layer being provided on an upper surface of the planarizing layer and having a thickness of between 0.1 μm and 1.5 μm, inclusive.
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
72.
EPITAXIAL WAFER FOR ULTRAVIOLET LIGHT EMITTING DEVICE, METHOD FOR PRODUCING METAL BONDED SUBSTRATE FOR ULTRAVIOLET LIGHT EMITTING DEVICE, METHOD FOR PRODUCING ULTRAVIOLET LIGHT EMITTING DEVICE, AND METHOD FOR PRODUCING ULTRAVIOLET LIGHT EMITTING DEVICE ARRAY
An epitaxial wafer for an ultraviolet light emitting device, including, a heat-resistant first support substrate, a planarization layer with a thickness of 0.5 to 3 μm on at least upper surface of the first support substrate, a group III nitride single crystal seed crystal layer with a thickness of 0.1 to 1.5 μm, bonds to upper surface of the planarization layer by bonding, on the seed crystal layer, an epitaxial layer including at least a first conductivity type cladding layer containing AlxGa1-xN (0.5
A single-side polishing apparatus including: a base turntable having a groove for vacuum suction; a detachable polishing turntable immobilized by vacuum suction; a polishing pad; and a polishing head configured to hold a wafer. The single-side polishing apparatus brings a surface of a wafer held by the polishing head into sliding contact with the polishing pad for polishing. The polishing pad includes a polishing layer configured to polish the wafer surface, a first adhesive layer, a PET sheet layer, a second adhesive layer, an elastic layer, and a third adhesive layer for attachment to the polishing turntable. The layers are sequentially stacked. The polishing pad has a compressibility of 16% or more.
The present invention is a nitride semiconductor wafer, including: a silicon single-crystal substrate; and a device layer composed of a nitride semiconductor above the silicon single-crystal substrate, wherein the silicon single-crystal substrate is a CZ silicon single-crystal substrate, and has a resistivity of 1000 Ω·cm or more, an oxygen concentration of 5.0×1016 atoms/cm3 (JEIDA) or more and 2.0×1.017 atoms/cm3 (JEIDA) or less, and a nitrogen concentration of 5.0×1014 atoms/cm3 or more. This provides a nitride semiconductor wafer that hardly causes plastic deformation even using a high-resistant low-oxygen silicon single-crystal substrate produced by the CZ method, which is suitably used for a high-frequency device, and that can reduce warpage of the substrate.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/04 - Semiconductor bodies characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
75.
METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR WAFER AND NITRIDE SEMICONDUCTOR WAFER
A method for producing a nitride semiconductor wafer, in which a nitride semiconductor thin film is grown on a silicon single crystal substrate by vapor phase growth, includes, by using a silicon single crystal substrate having a resistivity of 1000 Ω·cm or more, an oxygen concentration of less than 1×1017 atoms/cm3 and a thickness of 1000 μm or more, growing the nitride semiconductor thin film on the silicon single crystal substrate by vapor phase growth. As a result, a method produces a nitride semiconductor wafer in which plastic deformation and warpage are suppressed even in the case of a high-resistivity, ultra-low oxygen concentration silicon single crystal substrate, which is promising as a support substrate for high frequency devices.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
76.
Method for producing semiconductor apparatus for quantum computer
A method produces a semiconductor apparatus for a quantum computer. The apparatus includes: a semiconductor substrate; a quantum computer device formed on the semiconductor substrate; and a peripheral circuit formed on the semiconductor substrate and connected to the quantum computer device. The apparatus is to be used as a quantum computer. The method includes: a step of forming the quantum computer device and the peripheral circuit on the semiconductor substrate; and a step of deactivating a carrier in the semiconductor substrate by irradiation of a particle beam to at least a formation part for the quantum computer device and a formation part for the peripheral circuit in the semiconductor substrate. The method for producing a semiconductor apparatus for a quantum computer can produce a semiconductor apparatus for a quantum computer having excellent 3HD characteristics.
G06N 10/40 - Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
H01L 21/263 - Bombardment with wave or particle radiation with high-energy radiation
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01P 3/00 - WaveguidesTransmission lines of the waveguide type
77.
Method for forming thermal oxide film on semiconductor substrate
The present invention is a method for forming a thermal oxide film on a semiconductor substrate, including: a correlation acquisition step of providing a plurality of semiconductor substrates each having a chemical oxide film having a different constitution formed by cleaning, performing a thermal oxidization treatment under identical thermal oxidization treatment conditions to form a thermal oxide film, and determining a correlation between the constitution of the chemical oxide film and a thickness of the thermal oxide film in advance; a cleaning condition determination step of determining the constitution of the chemical oxide film based on the correlation obtained in the correlation acquisition step so that a thickness of a thermal oxide film to be formed on a semiconductor substrate is a predetermined thickness, and determining cleaning conditions for forming a chemical oxide film having the determined constitution of the chemical oxide film; a substrate cleaning step of cleaning the semiconductor substrate under the determined cleaning conditions; and a thermal oxide film formation step of performing a thermal oxidization treatment on the cleaned semiconductor substrate under conditions identical to the thermal oxidization treatment conditions in the correlation acquisition step to form a thermal oxide film on a surface of the semiconductor substrate. Consequently, a thermal oxide film is formed with the target film thickness with excellent reproducibility.
A method for manufacturing an SOI wafer including: a step of forming a silicon oxide film by thermal oxidation on an entire surface of a base wafer containing a dopant; and bonding a main surface of a bond wafer to a first main surface via the silicon oxide film, wherein, prior to the thermal oxidation step, a step of forming a CVD insulator film on a second main surface; and a step of forming, on the first main surface, a barrier silicon layer containing a dopant at a lower concentration than a dopant concentration of the base wafer, and in the thermal oxidation step, the barrier silicon layer is thermally oxidized to produce a barrier silicon oxide film, and in the bonding step, the bond wafer is bonded to the base wafer via the barrier silicon oxide film as a part of the silicon oxide film.
A substrate for group-III nitride epitaxial growth and a method for producing the same is capable of fabricating a high-quality group III nitride single crystal at low cost. The substrate for group-III nitride epitaxial growth includes: a supporting substrate having a structure in which a core consisting of nitride ceramics is wrapped in an encapsulating layer having a thickness of between 0.05 μm and 1.5 μm, inclusive; a planarizing layer provided on an upper surface of the supporting substrate, the planarizing layer having a thickness of between 0.5 μm and 3.0 μm, inclusive; and a seed crystal layer consisting of a single crystal with a thickness of between 0.1 μm and 1.5 μm, inclusive, provided on an upper surface planarizing layer and having an uneven pattern on the surface.
An edge portion measuring apparatus for measuring shape of an edge portion of a wafer, including, a holding portion that holds the wafer, a rotating means for rotating the wafer, a sensor including a light projecting portion for projecting a laser light from a light source onto the edge portion of the wafer held by the holding portion, and a light receiving detection unit receiving diffuse reflected light that the laser light projected is reflected at the edge portion of the wafer, wherein, rotating the wafer while holding the wafer, at least in a range from normal direction of a held surface of the wafer to normal direction of a surface opposite to the held surface, projecting the laser light and detecting the diffuse reflected light by the sensor, being able to measure the shape of an entire area of the edge portion of the wafer by a triangulation method.
A silicon single crystal substrate for vapor phase growth, having the silicon single crystal substrate being made of an FZ crystal having a resistivity of 1000 Ωcm or more, wherein the surface of the silicon single crystal substrate is provided with a high nitrogen concentration layer having a nitrogen concentration higher than that of other regions and a nitrogen concentration of 5×1015 atoms/cm3 or more and a thickness of 10 to 100 μm.
H01L 29/20 - Semiconductor bodies characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
82.
Method for producing semiconductor apparatus and semiconductor apparatus
A method for producing a semiconductor apparatus capable of producing a semiconductor apparatus with improved transmission loss characteristic using an interposer substrate in which semiconductor devices formed on a silicon single crystal substrate are connected to each other by a through electrode, the method including: a step of providing the silicon single crystal substrate containing a dopant; a step of forming the semiconductor devices and the through electrode on the silicon single crystal substrate to obtain the interposer substrate; and a step of irradiating a particle beam to at least around a formation part for the through electrode on the silicon single crystal substrate to deactivate the dopant in a region around the formation part for the through electrode.
H01L 23/538 - Arrangements for conducting electric current within the device in operation from one component to another the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H01L 21/48 - Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups or
H01L 21/768 - Applying interconnections to be used for carrying current between separate components within a device
H01L 23/14 - Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
H01L 23/48 - Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
H01L 25/065 - Assemblies consisting of a plurality of individual semiconductor or other solid-state devices all the devices being of a type provided for in a single subclass of subclasses , , , , or , e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group
83.
METHOD FOR MANUFACTURING SILICON SINGLE-CRYSTAL SUBSTRATE AND SILICON SINGLE-CRYSTAL SUBSTRATE
A method for manufacturing a silicon single-crystal substrate having a carbon diffusion layer on a surface, proximity gettering ability, and high strength near the surface, and hardly generating dislocation or extending dislocation, includes: a step of adhering carbon on a surface of a silicon single-crystal substrate by an RTA treatment of the silicon single-crystal substrate in a carbon-containing gas atmosphere; a step of forming a 3C-SiC single-crystal film on the surface of the silicon single-crystal substrate by reacting the carbon and the silicon single-crystal substrate; a step of oxidizing the 3C-SiC single-crystal film to be an oxide film and diffusing carbon inward the silicon single-crystal substrate by an RTA treatment of the silicon single-crystal substrate on which the 3C-SiC single-crystal film is formed, the RTA treatment being performed in an oxidative atmosphere; and a step of removing the oxide film.
C30B 31/06 - Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structureApparatus therefor by contacting with diffusion material in the gaseous state
A bonded semiconductor device including an epitaxial layer, and a support substrate made of a material different from that of the epitaxial layer and bonded to the epitaxial layer. Any one of the epitaxial layer and the support substrate has a bonding surface with a radial pattern including recesses or protrusions radially spreading from a certain point on the bonding surface as a center.
H01L 33/22 - Roughened surfaces, e.g. at the interface between epitaxial layers
H01L 33/00 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof
H01L 33/44 - SEMICONDUCTOR DEVICES NOT COVERED BY CLASS - Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
H01L 33/56 - Materials, e.g. epoxy or silicone resin
85.
Bonded semiconductor light-receiving device and method for manufacturing bonded semiconductor light-receiving device
A bonded semiconductor light-receiving device including an epitaxial layer to serve as a device-functional layer, and a support substrate made of a material different from that of the device-functional layer and bonded to the epitaxial layer via a bonding material layer. The device-functional layer has a bonding surface with an uneven pattern formed thereon.
A method for dry-etching a semiconductor substrate having an oxide film, including: evaluating a film quality of the oxide film and determining a time for performing the dry-etching on a basis of results of the evaluation in advance. This provides a method for controlling the etching amount of an oxide film accurately and suppressing over-etching and insufficient etching without influence from variation in the film quality of the oxide film when dry-etching the oxide film on the surface of the semiconductor substrate.
G01N 21/3563 - Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using infrared light for analysing solidsPreparation of samples therefor
G01N 23/20 - Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using diffraction of the radiation by the materials, e.g. for investigating crystal structureInvestigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using scattering of the radiation by the materials, e.g. for investigating non-crystalline materialsInvestigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups , or by using reflection of the radiation by the materials
A method for evaluating a peripheral strain of a wafer having a polycrystalline film formed on a surface, the method including: using, as the wafer having the polycrystalline film formed on the surface, a wafer of a silicon single crystal substrate having a polycrystalline film formed on a surface; performing a pre-treatment of removing a surface of the polycrystalline film; subsequently allowing an infrared laser to enter a periphery of the wafer from a back surface; and evaluating the peripheral strain of the wafer from a polarization degree of the infrared laser transmitted through the wafer.
A manufacturing method for a substrate wafer, including: a wafer having a first and second main surface; forming a flattening resin layer on second main surface; with the flattening resin layer adsorbed and held as a reference surface, grinding or polishing first main surface as a first processing; removing flattening resin layer from the wafer; with the wafer's first main surface subjected to the first processing adsorbed and held, grinding or polishing second main surface as a second processing; with the second main surface subjected to second processing adsorbed and held, further grinding or polishing first main surface as a third processing; with first main surface subjected to third processing adsorbed and held, further grinding or polishing second main surface as a fourth processing to obtain a substrate wafer, wherein first processing and/or third processing is executed such that the wafer has a central concave or central convex thickness distribution.
B24B 1/00 - Processes of grinding or polishingUse of auxiliary equipment in connection with such processes
B24B 7/02 - Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfacesAccessories therefor involving a reciprocatingly-moved work-table
B24B 7/22 - Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfacesAccessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
B29C 59/02 - Surface shaping, e.g. embossingApparatus therefor by mechanical means, e.g. pressing
A method for etching a silicon wafer, the method including a spin etching step in which while an acid etching solution is supplied to a front or back side surface of a silicon wafer through a supply nozzle, the silicon wafer is rotated to expand a supply range of the acid etching solution to perform acid etching throughout the front or back side surface of the silicon wafer. Before the rotation of the silicon wafer is started, an acid mixture containing at least hydrofluoric acid and nitric acid is added dropwise within an impinging jet area which is located immediately below the supply nozzle, and in which the acid etching solution supplied through the supply nozzle impinges on the surface of the silicon wafer. After the impinging jet area is covered with the acid mixture, the rotation of the silicon wafer is started to perform the spin etching step.
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
90.
Single-crystal pulling apparatus and single-crystal pulling method
A single-crystal pulling apparatus includes: a pulling furnace having a heater and crucible; and a magnetic field generation device having superconducting coils, the device having four of the superconducting coils, two of the superconducting coils are in each of two regions divided by a cross section that includes an X axis being a direction of magnetic force lines at the central axis in the horizontal plane including all the coil axes of the four superconducting coils, and includes the pulling furnace central axis having line symmetry about the cross section, the four superconducting coils are all arranged so that the coil axes have an angle of more than −30° and less than 30° relative to a Y axis, the direction of the magnetic force lines thereof have line symmetry about the cross section, and in each of the regions, the two superconducting coils generate magnetic force lines in opposite directions.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
91.
Method for forming thermal oxide film on semiconductor substrate
A method for forming a thermal oxide film on a semiconductor substrate, including: a correlation acquisition step of providing a plurality of semiconductor substrates; a substrate cleaning step of cleaning a semiconductor substrate; a thermal oxide film thickness estimation step of determining a constitution of a chemical oxide film formed on the semiconductor substrate by the cleaning in the substrate cleaning step and, based on the correlation, estimating a thickness of a thermal oxide film on a hypothesis that the semiconductor substrate has been subjected to a thermal oxidization treatment conditions in the correlation acquisition step; a thermal oxidization treatment condition determination step of determining thermal oxidization treatment conditions based on the thermal oxidization treatment conditions in the correlation acquisition step so that the thermal oxide film is a predetermined thickness; and a thermal oxide film formation step of forming a thermal oxide film on the semiconductor substrate.
A method for cleaning a semiconductor wafer to clean a semiconductor wafer after polishing, including: performing a first ozone-water treatment step of cleaning the polished semiconductor wafer with ozone water to form an oxide film; performing a brush cleaning step of brush-cleaning the semiconductor wafer with carbonated water after the first ozone-water treatment step; and then performing a second ozone-water treatment step including cleaning the semiconductor wafer with hydrofluoric acid to remove the oxide film, followed by cleaning with ozone water to form an oxide film again. This second ozone-water treatment step is performed one or more times.
A method for manufacturing an SOI wafer including a step of performing an adjustment to a film thickness of an SOI layer of the SOI wafer by wet etching. In the step of performing the adjustment to the film thickness of the SOI layer, a first etching step of etching a surface of the SOI layer using an SC1 solution; and a second etching step of etching the surface of the SOI layer by bringing the SOI layer into contact with ozone water to form an oxide film on the surface of the SOI layer and then bringing the formed oxide film into contact with an HF-containing aqueous solution to remove the oxide film, are performed in combination. The etchings are performed such that a removal amount of the SOI layer in the first etching step is smaller than that in the second etching step.
A method for manufacturing a semiconductor substrate by forming an insulator film and a semiconductor single crystal layer on a surface of a silicon single crystal substrate to manufacture a semiconductor substrate having the semiconductor single crystal layer on the insulator film, the method including at least the steps of: forming a silicon nitride film having an epitaxial relationship with the silicon single crystal substrate on the surface of the silicon single crystal substrate as the insulator film by subjecting the silicon single crystal substrate to a heat treatment under a nitrogen gas-containing atmosphere; and forming the semiconductor single crystal layer on the silicon nitride film by epitaxial growth. This makes it possible to obtain a semiconductor substrate by simple method with high productivity at low cost even when the insulator film provided between the silicon single crystal substrate and the semiconductor single crystal layer is a silicon nitride film.
A single-crystal pulling apparatus including: a pulling furnace having a central axis; and a magnetic field generation device arranged around the pulling furnace and having superconducting coils, the apparatus applying a horizontal magnetic field to the molten semiconductor raw material, two coil axes in the two pairs of the superconducting coils are included in a single horizontal plane, and when a direction of lines of magnetic force at the central axis of the pulling furnace in the horizontal plane is determined as an X axis, a center angle α having the X axis between the two coil axes is 100 degrees or more and 120 degrees or less. This makes it possible to reduce the height of the coils, to raise the magnetic field center close to the melt surface of the semiconductor raw material, and to obtain a single crystal having a lower oxygen concentration than conventional single crystals.
C30B 30/04 - Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
A method for polishing a wafer in order to correct a shape of a polished wafer subjected to polishing, by pressing the wafer to a polishing pad while continuously supplying a composition for polishing containing water to perform correction-polishing, the method including the steps of: measuring the shape of the polished wafer before performing the correction-polishing; determining, in accordance with the measured shape of the polished wafer, a kind and concentration of a surfactant to be contained in the composition for polishing; and performing the correction-polishing while supplying the composition for polishing adjusted on a basis of the determined kind and concentration of the surfactant. This provides a method and apparatus for polishing a wafer that make it possible to reduce, in the latter polishing step, a variation in the shape of the wafer that occurred in a preceding polishing step.
B24B 37/04 - Lapping machines or devicesAccessories designed for working plane surfaces
B24B 37/005 - Control means for lapping machines or devices
B24B 49/02 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent
B24B 49/04 - Measuring or gauging equipment for controlling the feed movement of the grinding tool or workArrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation according to the instantaneous size and required size of the workpiece acted upon, the measuring or gauging being continuous or intermittent involving measurement of the workpiece at the place of grinding during grinding operation
B24B 57/02 - Devices for feeding, applying, grading or recovering grinding, polishing or lapping agents for feeding of fluid, sprayed, pulverised, or liquefied grinding, polishing or lapping agents
C09G 1/02 - Polishing compositions containing abrasives or grinding agents
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/304 - Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/306 - Chemical or electrical treatment, e.g. electrolytic etching
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
97.
Method for measuring DIC defect shape on silicon wafer and polishing method
A method for measuring a DIC defect shape on a silicon wafer, the method including steps of: detecting a DIC defect on a main surface of the silicon wafer with a particle counter; specifying position coordinates of the detected DIC defect; and measuring a shape including at least a height or depth of the detected DIC defect by utilizing the specified position coordinates according to phase-shifting interferometry. The method for measuring a DIC defect shape by which the shape including size of DIC defect generated on a main surface of a silicon wafer is easily and precisely measured.
G01N 21/95 - Investigating the presence of flaws, defects or contamination characterised by the material or shape of the object to be examined
G01N 21/94 - Investigating contamination, e.g. dust
H01L 21/67 - Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereofApparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
H01L 21/02 - Manufacture or treatment of semiconductor devices or of parts thereof
98.
Method for producing a silicon single crystal doped with nitrogen and having a controlled amount of carbon impurities
A method for producing a silicon single crystal, wherein a silicon nitride powder is introduced into a raw material before start of melting and the silicon single crystal doped with nitrogen is pulled by Czochralski method, wherein nitrogen doping is performed while an upper limit amount of usable silicon nitride powder is limited based on an amount of carbon impurities contained in the silicon nitride powder so that a carbon concentration in the silicon single crystal is equal to or less than allowable value. This makes it possible to achieve the required nitrogen doping amount at low cost while achieving the low carbon-concentration specification.
C30B 15/04 - Single-crystal growth by pulling from a melt, e.g. Czochralski method adding crystallising materials or reactants forming it in situ to the melt adding doping materials, e.g. for n–p-junction
A method for manufacturing an epitaxial wafer by forming a single crystal silicon layer on a wafer containing a group IV element including silicon, the method including the steps of: removing a natural oxide film on a surface of the wafer containing the group IV element including silicon in an atmosphere containing hydrogen; forming an oxygen atomic layer by oxidizing the wafer after removing the natural oxide film; and forming a single crystal silicon by epitaxial growth on the surface of the wafer after forming the oxygen atomic layer, where a planar density of oxygen in the oxygen atomic layer is set to 4×1014 atoms/cm2 or less. A method for manufacturing an epitaxial wafer having an epitaxial layer of good-quality single crystal silicon while also allowing the introduction of an oxygen atomic layer in an epitaxial layer stably and simply.
H01L 21/322 - Treatment of semiconductor bodies using processes or apparatus not provided for in groups to modify their internal properties, e.g. to produce internal imperfections
H01L 21/20 - Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
100.
Apparatus for manufacturing a single crystal by the Czochralski method comprising a cooling cylinder with an auxiliary cooling cylinder fitted inside the cooling cylinder
An apparatus for manufacturing a single crystal by growing a single crystal according to a Czochralski method, the apparatus including: main chamber configured to house crucible configured to accommodate raw-material melt, and heater configured to heat raw-material melt; pulling chamber continuously provided at upper portion of main chamber and configured to accommodate single crystal grown and pulled; cooling cylinder extending from at least ceiling portion of main chamber toward raw-material melt so as to surround single crystal being pulled, cooling cylinder configured to be forcibly cooled with coolant; and auxiliary cooling cylinder fitted in an inside of cooling cylinder. Auxiliary cooling cylinder is made of any one or more materials of graphite, carbon composite, stainless steel, molybdenum, and tungsten. The auxiliary cooling cylinder has structure covering bottom surface of cooling cylinder facing raw-material melt. Gap between auxiliary cooling cylinder and bottom surface of cooling cylinder is 1.0 mm or less.
patents
